SuccessChanges

Summary

  1. [NFC][scudo] Print errno of fork failure (details)
  2. [AIX] Define __STDC_NO_ATOMICS__ and __STDC_NO_THREADS__ predefined macros (details)
  3. [AMDGPU] Add v5f32/VReg_160 support for MIMG instructions (details)
  4. Revert "[AIX] Define __STDC_NO_ATOMICS__ and __STDC_NO_THREADS__ predefined macros" (details)
  5. [AIX] Define __STDC_NO_ATOMICS__ and __STDC_NO_THREADS__ (details)
  6. [AMDGPU] Allow oversize vaddr in GFX10 MIMG assembly (details)
  7. [yaml2obj] Fix buildbot-issue-4886 (details)
Commit b41b76b303cdfde389f70e0a311698d7391423f1 by Vitaly Buka
[NFC][scudo] Print errno of fork failure

This fork fails sometime on sanitizer-x86_64-linux-qemu bot.
The file was modifiedcompiler-rt/lib/scudo/standalone/tests/wrappers_c_test.cpp
Commit e6629be31e67190f0a524f009752d73410894560 by cbowler
[AIX] Define __STDC_NO_ATOMICS__ and __STDC_NO_THREADS__ predefined macros

Differential Revision: https://reviews.llvm.org/D103707
The file was modifiedclang/lib/Basic/Targets/OSTargets.h
The file was modifiedclang/test/Preprocessor/init-ppc.c
Commit f8816c7400250961af4810956248c3636a5fcb04 by carl.ritson
[AMDGPU] Add v5f32/VReg_160 support for MIMG instructions

Avoid having to round up to v8f32/VReg_256 when only 5 VGPRs are
required for a MIMG address operand.

Maintain _V8 instruction variants of pseudo instructions allowing
assembly prior to GFX10 to work as-is.  Currently the validator
can tell for GFX10 what the correct size is, so will disallow
oversize address registers.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D103672
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.o.dim.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
The file was modifiedllvm/test/MC/AMDGPU/gfx10_asm_mimg.s
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.dim.ll
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/gfx10_mimg.txt
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.nsa.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.g16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.dim.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.encode.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.ll
The file was modifiedllvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll
The file was modifiedllvm/lib/Target/AMDGPU/MIMGInstructions.td
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.o.dim.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.a16.dim.ll
The file was modifiedllvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/nsa-reassign.mir
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/mimg_gfx10.txt
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.a16.dim.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.o.dim.ll
Commit f97e01e61af1115bb9cb68dbdc70cc7f9f884759 by cebowleratibm
Revert "[AIX] Define __STDC_NO_ATOMICS__ and __STDC_NO_THREADS__ predefined macros"

This reverts commit e6629be31e67190f0a524f009752d73410894560.
The file was modifiedclang/lib/Basic/Targets/OSTargets.h
The file was modifiedclang/test/Preprocessor/init-ppc.c
Commit f38eff777e46f42884d82815d0b39766520ac2bf by cebowleratibm
[AIX] Define __STDC_NO_ATOMICS__ and __STDC_NO_THREADS__

Revert/reapply to fix Git authorship metadata

Differential Revision: https://reviews.llvm.org/D103707
The file was modifiedclang/test/Preprocessor/init-ppc.c
The file was modifiedclang/lib/Basic/Targets/OSTargets.h
Commit c8bbfb8cf5eac991351c03c41a15abaac4b78ecf by carl.ritson
[AMDGPU] Allow oversize vaddr in GFX10 MIMG assembly

As a follow up to D103672, we should allow vaddr to be larger than
required when assembling GFX10 MIMG instructions.

Reviewed By: dp

Differential Revision: https://reviews.llvm.org/D103733
The file was modifiedllvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
The file was modifiedllvm/test/MC/AMDGPU/gfx10_err_pos.s
The file was modifiedllvm/test/MC/AMDGPU/gfx10_asm_mimg.s
Commit 310d2b4957c8c11387354c58d15e3249971accc7 by esme.yi
[yaml2obj] Fix buildbot-issue-4886

XCOFFEmitter.cpp:67:16: runtime error: null pointer passed as argument 2,
which is declared to never be null
The file was modifiedllvm/lib/ObjectYAML/XCOFFEmitter.cpp