SuccessChanges

Summary

  1. Revert "[Polly][Isl] Removing nullptr constructor from C++ bindings. NFC." (details)
  2. [libc++] Remove the old HTML documentation (details)
  3. NFC: .clang-tidy: Inherit configs from parents to improve maintainability (details)
  4. [IR] make -stack-alignment= into a module attr (details)
  5. .clang-tidy: Disable misc-no-recursion in general/across the monorepo (details)
  6. [MLIR][MemRef] Only allow fold of cast for the pointer operand, not the value (details)
  7. Revert "[IR] make -stack-alignment= into a module attr" (details)
  8. [clang-cl] Parse the /external: flags (PR36003) (details)
  9. [libc++] NFC: Add regression tests for some <tuple> PRs that have been fixed (details)
  10. [MLIR] Remove LLVM_AnyInteger type constraint (details)
  11. [ELF] Add a GRP_COMDAT test with a local signature symbol (details)
  12. [RISCV] Remove ForceTailAgnostic flag from vmv.s.x, vfmv.s.f and reductions. (details)
  13. Fix a typo in the internals manual (details)
  14. Further improve register allocation for vwadd(u).wv, vwsub(u).wv, vfwadd.wv, and vfwsub.wv. (details)
  15. [Verifier] Speed up and parallelize dominance checking.  NFC (details)
  16. [Core] Add Twine support for StringAttr and Identifier. NFC. (details)
  17. [AMDGPU] Add gfx1013 target (details)
  18. InstrEmitter.cpp - don't dereference a dyn_cast<>. (details)
  19. PPCISelLowering.cpp - don't dereference a dyn_cast<>. (details)
  20. Use llvm_unreachable for unsupported integer types. (details)
  21. Revert "[llvm] Make Sequence reverse-iterable" (details)
  22. [Fuchsia] Update some of the Fuchsia toolchain flags (details)
  23. Add missing header <atomic> in lib/IR/Verifier.cpp (NFC) (details)
  24. [GlobalISel] Handle non-multiples of the base type in narrowScalarInsert (details)
  25. [GlobalISel] Handle non-multiples of the base type in narrowScalarAddSub (details)
  26. [libc++] Add a CI configuration for the modular build (details)
Commit f60ea691a94b3b4c28f2ff85a4520562f4110810 by patacca
Revert "[Polly][Isl] Removing nullptr constructor from C++ bindings. NFC."

This reverts commit be5e2fc7bf781c7fc079943552ea1b519f45c815.

This introduced a building error for polly. https://lab.llvm.org/buildbot#builders/10/builds/4951
The file was modifiedpolly/lib/Analysis/ScopInfo.cpp
The file was modifiedpolly/lib/CodeGen/IslAst.cpp
The file was modifiedpolly/lib/Transform/FlattenSchedule.cpp
The file was modifiedpolly/lib/Support/ISLTools.cpp
The file was modifiedpolly/lib/Analysis/ScopBuilder.cpp
The file was modifiedpolly/lib/Transform/ForwardOpTree.cpp
The file was modifiedpolly/lib/Transform/DeLICM.cpp
The file was modifiedpolly/include/polly/ScopInfo.h
The file was modifiedpolly/unittests/DeLICM/DeLICMTest.cpp
The file was modifiedpolly/lib/Transform/ScheduleOptimizer.cpp
The file was modifiedpolly/lib/Transform/FlattenAlgo.cpp
The file was modifiedpolly/lib/External/isl/include/isl/isl-noexceptions.h
The file was modifiedpolly/lib/Transform/ZoneAlgo.cpp
Commit 491d04595751a712db41c196bc1ad816fd9cdaa0 by Louis Dionne
[libc++] Remove the old HTML documentation

This commit finishes moving the <atomic> design documents to the RST
documentation and removes the old documentation. https://libcxx.llvm.org
is already pointing to the new documentation only now, so the removal of
the old documentation is really a NFC.

I went over the old documentation and I don't think we're leaving anything
important behind - I think everything important was mentionned in the RST
documentation anyway.
The file was removedlibcxx/www/atomic_design_b.html
The file was removedlibcxx/www/atomic_design_c.html
The file was removedlibcxx/www/cxx1y_status.html
The file was modifiedlibcxx/docs/index.rst
The file was removedlibcxx/www/content.css
The file was removedlibcxx/www/type_traits_design.html
The file was removedlibcxx/www/index.html
The file was addedlibcxx/docs/DesignDocs/AtomicDesign.rst
The file was removedlibcxx/www/ts1z_status.html
The file was removedlibcxx/www/cxx2a_status.html
The file was removedlibcxx/www/upcoming_meeting.html
The file was removedlibcxx/www/menu.css
The file was removedlibcxx/www/atomic_design.html
The file was removedlibcxx/www/atomic_design_a.html
The file was removedlibcxx/www/cxx1z_status.html
Commit c5d56fec502f36a0c994835ca23bc93a6c682d95 by dblaikie
NFC: .clang-tidy: Inherit configs from parents to improve maintainability

In the interests of disabling misc-no-recursion across LLVM (this seems
like a stylistic choice that is not consistent with LLVM's
style/development approach) this NFC preliminary change adjusts all the
.clang-tidy files to inherit from their parents as much as possible.

This change specifically preserves all the quirks of the current configs
in order to make it easier to review as NFC.

I validatad the change is NFC as follows:

for X in `cat ../files.txt`;
do
  mkdir -p ../tmp/$(dirname $X)
  touch $(dirname $X)/blaikie.cpp
  clang-tidy -dump-config $(dirname $X)/blaikie.cpp > ../tmp/$(dirname $X)/after
  rm $(dirname $X)/blaikie.cpp
done

(similarly for the "before" state, without this patch applied)

for X in `cat ../files.txt`;
do
  echo $X
  diff \
    ../tmp/$(dirname $X)/before \
    <(cat ../tmp/$(dirname $X)/after \
      | sed -e "s/,readability-identifier-naming\(.*\),-readability-identifier-naming/\1/" \
      | sed -e "s/,-llvm-include-order\(.*\),llvm-include-order/\1/" \
      | sed -e "s/,-misc-no-recursion\(.*\),misc-no-recursion/\1/" \
      | sed -e "s/,-clang-diagnostic-\*\(.*\),clang-diagnostic-\*/\1/")
done

(using sed to strip some add/remove pairs to reduce the diff and make it easier to read)

The resulting report is:
  .clang-tidy
  clang/.clang-tidy
  2c2
  < Checks:          'clang-diagnostic-*,clang-analyzer-*,-*,clang-diagnostic-*,llvm-*,misc-*,-misc-unused-parameters,-misc-non-private-member-variables-in-classes,-readability-identifier-naming,-misc-no-recursion'
  ---
  > Checks:          'clang-diagnostic-*,clang-analyzer-*,-*,clang-diagnostic-*,llvm-*,misc-*,-misc-unused-parameters,-misc-non-private-member-variables-in-classes,-misc-no-recursion'
  compiler-rt/.clang-tidy
  2c2
  < Checks:          'clang-diagnostic-*,clang-analyzer-*,-*,clang-diagnostic-*,llvm-*,-llvm-header-guard,misc-*,-misc-unused-parameters,-misc-non-private-member-variables-in-classes'
  ---
  > Checks:          'clang-diagnostic-*,clang-analyzer-*,-*,clang-diagnostic-*,llvm-*,misc-*,-misc-unused-parameters,-misc-non-private-member-variables-in-classes,-llvm-header-guard'
  flang/.clang-tidy
  2c2
  < Checks:          'clang-diagnostic-*,clang-analyzer-*,-*,llvm-*,-llvm-include-order,misc-*,-misc-no-recursion,-misc-unused-parameters,-misc-non-private-member-variables-in-classes'
  ---
  > Checks:          'clang-diagnostic-*,clang-analyzer-*,-*,llvm-*,misc-*,-misc-unused-parameters,-misc-non-private-member-variables-in-classes,-llvm-include-order,-misc-no-recursion'
  flang/include/flang/Lower/.clang-tidy
  flang/include/flang/Optimizer/.clang-tidy
  flang/lib/Lower/.clang-tidy
  flang/lib/Optimizer/.clang-tidy
  lld/.clang-tidy
  lldb/.clang-tidy
  llvm/tools/split-file/.clang-tidy
  mlir/.clang-tidy

The `clang/.clang-tidy` change is a no-op, disabling an option that was never enabled.
The compiler-rt and flang changes are no-op reorderings of the same flags.

(side note, the .clang-tidy file in parallel-libs is broken and crashes
clang-tidy because it uses "lowerCase" as the style instead of "lower_case" -
so I'll deal with that separately)

Differential Revision: https://reviews.llvm.org/D103842
The file was modifiedclang/.clang-tidy
The file was modifiedllvm/tools/split-file/.clang-tidy
The file was modifiedcompiler-rt/.clang-tidy
The file was modifiedflang/include/flang/Optimizer/.clang-tidy
The file was modifiedflang/.clang-tidy
The file was modifiedflang/include/flang/Lower/.clang-tidy
The file was modifiedflang/lib/Optimizer/.clang-tidy
The file was modifiedlldb/.clang-tidy
The file was modifiedlld/.clang-tidy
The file was modifiedmlir/.clang-tidy
The file was modifiedflang/lib/Lower/.clang-tidy
The file was modifiedllvm/.clang-tidy
Commit 433c8d950cb3a1fa0977355ce0367e8c763a3f13 by ndesaulniers
[IR] make -stack-alignment= into a module attr

Similar to D102742, specifying the stack alignment via CodegenOpts means
that this flag gets dropped during LTO, unless the command line is
re-specified as a plugin opt. Instead, encode this information as a
module level attribute so that we don't have to expose this llvm
internal flag when linking the Linux kernel with LTO.

Looks like external dependencies might need a fix:
* https://github.com/llvm-hs/llvm-hs/issues/345
* https://github.com/halide/Halide/issues/6079

Link: https://github.com/ClangBuiltLinux/linux/issues/1377

Reviewed By: tejohnson

Differential Revision: https://reviews.llvm.org/D103048
The file was addedllvm/test/CodeGen/X86/movtopush-stack-align.ll
The file was modifiedllvm/lib/IR/Module.cpp
The file was addedllvm/test/CodeGen/X86/dynamic-allocas-VLAs-stack-align.ll
The file was modifiedllvm/lib/Target/X86/X86TargetMachine.cpp
The file was modifiedllvm/test/CodeGen/X86/force-align-stack-alloca.ll
The file was modifiedllvm/test/CodeGen/X86/base-pointer-and-mwaitx.ll
The file was modifiedllvm/test/CodeGen/X86/hipe-cc64.ll
The file was modifiedllvm/test/CodeGen/X86/movtopush.ll
The file was modifiedclang/lib/CodeGen/CodeGenModule.cpp
The file was modifiedllvm/include/llvm/IR/Module.h
The file was modifiedllvm/test/CodeGen/Generic/ForceStackAlign.ll
The file was modifiedllvm/test/CodeGen/X86/base-pointer-and-cmpxchg.ll
The file was modifiedllvm/include/llvm/Target/TargetOptions.h
The file was modifiedllvm/test/CodeGen/X86/x86-64-xmm-spill-unaligned.ll
The file was modifiedllvm/test/CodeGen/X86/unaligned-spill-folding.ll
The file was modifiedllvm/test/CodeGen/X86/hipe-cc.ll
The file was addedllvm/test/Linker/stack-alignment.ll
The file was modifiedllvm/lib/CodeGen/CommandFlags.cpp
The file was modifiedllvm/test/CodeGen/X86/x86-64-baseptr.ll
The file was modifiedclang/test/CodeGen/stackrealign-main.c
The file was modifiedllvm/test/CodeGen/X86/pr11468.ll
The file was modifiedllvm/test/CodeGen/X86/dynamic-allocas-VLAs.ll
The file was modifiedclang/lib/CodeGen/BackendUtil.cpp
Commit 49454ebc56ecf8b11f4b6c328c9fdb7b92307684 by dblaikie
.clang-tidy: Disable misc-no-recursion in general/across the monorepo
The file was modifiedflang/lib/Lower/.clang-tidy
The file was modifiedflang/lib/Optimizer/.clang-tidy
The file was modifiedflang/include/flang/Optimizer/.clang-tidy
The file was modifiedclang/.clang-tidy
The file was modified.clang-tidy
The file was modifiedflang/include/flang/Lower/.clang-tidy
The file was modifiedflang/.clang-tidy
Commit 965ad79ea7d0b98f905a27785a6fd0091b904218 by gh
[MLIR][MemRef] Only allow fold of cast for the pointer operand, not the value

Currently canonicalizations of a store and a cast try to fold all casts into the store.

In the case where the operand being stored is itself a cast, this is illegal as the type of the value being stored
will change. This PR fixes this by not checking the value for folding with a cast.

Depends on https://reviews.llvm.org/D103828

Differential Revision: https://reviews.llvm.org/D103829
The file was modifiedmlir/test/Dialect/Affine/canonicalize.mlir
The file was modifiedmlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
The file was modifiedmlir/test/Dialect/MemRef/canonicalize.mlir
The file was modifiedmlir/lib/Dialect/Affine/IR/AffineOps.cpp
Commit a596b54d471cfde548bdda3925ea2f143f06b964 by ndesaulniers
Revert "[IR] make -stack-alignment= into a module attr"

This reverts commit 433c8d950cb3a1fa0977355ce0367e8c763a3f13.

Breaks the MIPS build.
The file was modifiedllvm/test/CodeGen/X86/hipe-cc.ll
The file was modifiedllvm/test/CodeGen/X86/base-pointer-and-mwaitx.ll
The file was removedllvm/test/CodeGen/X86/dynamic-allocas-VLAs-stack-align.ll
The file was removedllvm/test/CodeGen/X86/movtopush-stack-align.ll
The file was modifiedllvm/test/CodeGen/X86/unaligned-spill-folding.ll
The file was modifiedllvm/test/CodeGen/X86/x86-64-xmm-spill-unaligned.ll
The file was modifiedllvm/test/CodeGen/X86/base-pointer-and-cmpxchg.ll
The file was modifiedllvm/test/CodeGen/X86/dynamic-allocas-VLAs.ll
The file was modifiedllvm/test/CodeGen/X86/pr11468.ll
The file was removedllvm/test/Linker/stack-alignment.ll
The file was modifiedclang/test/CodeGen/stackrealign-main.c
The file was modifiedllvm/lib/Target/X86/X86TargetMachine.cpp
The file was modifiedllvm/test/CodeGen/X86/movtopush.ll
The file was modifiedclang/lib/CodeGen/BackendUtil.cpp
The file was modifiedllvm/test/CodeGen/Generic/ForceStackAlign.ll
The file was modifiedllvm/lib/CodeGen/CommandFlags.cpp
The file was modifiedllvm/lib/IR/Module.cpp
The file was modifiedllvm/test/CodeGen/X86/force-align-stack-alloca.ll
The file was modifiedllvm/include/llvm/IR/Module.h
The file was modifiedclang/lib/CodeGen/CodeGenModule.cpp
The file was modifiedllvm/test/CodeGen/X86/hipe-cc64.ll
The file was modifiedllvm/include/llvm/Target/TargetOptions.h
The file was modifiedllvm/test/CodeGen/X86/x86-64-baseptr.ll
Commit 172fcd9600e13d5365f5cf648105891ff6a0e59d by hans
[clang-cl] Parse the /external: flags (PR36003)

They are still unsupported, but at least this makes clang-cl not mistake
them for being filenames.

As pointed out in the bug, VS 16.10 now uses these flags in new projects
by default.
The file was modifiedclang/include/clang/Driver/Options.td
The file was modifiedclang/test/Driver/cl-options.c
Commit d2eccf9bb7f10bd5c9ac0259ee1b03f2e25fb7a1 by Louis Dionne
[libc++] NFC: Add regression tests for some <tuple> PRs that have been fixed
The file was addedlibcxx/test/std/utilities/tuple/tuple.tuple/PR27375.pass.cpp
The file was addedlibcxx/test/std/utilities/tuple/tuple.tuple/PR38601.pass.cpp
Commit cd73af92315ecf25ed47f4991806a054ddfca5ea by kiran.chandramohan
[MLIR] Remove LLVM_AnyInteger type constraint

LLVM Dialect uses builtin-integer types. The existing LLVM_AnyInteger
type constraint is a dupe of AnyInteger. This patch removes LLVM_AnyInteger
and replaces all usage with AnyInteger.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D103839
The file was modifiedmlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
The file was modifiedmlir/include/mlir/Dialect/AMX/AMX.td
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
The file was modifiedmlir/test/Dialect/LLVMIR/invalid.mlir
Commit 928a197d26ffd035bc4279ba533f169190a03574 by i
[ELF] Add a GRP_COMDAT test with a local signature symbol

See https://groups.google.com/g/generic-abi/c/2X6mR-s2zoc

Test that a local signature symbol does not suppress COMDAT deduplication.
The file was addedlld/test/ELF/comdat-local-signature.s
Commit c57bce9cc5facbdde52c24fe64fa4f6bf23a8449 by craig.topper
[RISCV] Remove ForceTailAgnostic flag from vmv.s.x, vfmv.s.f and reductions.

In 0.9 these were defined to leave elements other than 0 in the
destination unmodified. They were changed to use the tail policy
in 0.10. I missed that update.

I assume no one has noticed because in order cores treat tail
agnostic the same as tail undisturbed. I believe Spike and QEMU do
the same.

Reviewed By: arcbbb, frasercrmck

Differential Revision: https://reviews.llvm.org/D103736
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwredsum-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredand-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/urem-seteq-illegal-types.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredminu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-buildvec.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfredmin-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredmaxu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredmaxu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/insertelt-fp-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfredosum-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-fp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwredosum-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredor-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwredsum-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfredosum-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredsum-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredmin-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfredmin-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfredsum-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwredsumu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredxor-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredminu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredxor-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredor-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/insertelt-fp-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredmax-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfredsum-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfredmax-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/insertelt-int-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredsum-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwredosum-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-stepvector-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwredsum-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfredmax-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwredsumu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredmax-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredmin-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/insertelt-int-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwredsum-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredand-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-i1.ll
Commit 71fb98e0c1de97c8ba2aa3292447b0c5d0f248d5 by aaron
Fix a typo in the internals manual
The file was modifiedclang/docs/InternalsManual.rst
Commit 8b4c80d380a681e6ea6ea60e9d9f9424e7782980 by craig.topper
Further improve register allocation for vwadd(u).wv, vwsub(u).wv, vfwadd.wv, and vfwsub.wv.

The first source has the same EEW as the destination, but we're
using earlyclobber which prevents them from ever being the same
register. This patch attempts to work around this.

-For unmasked .wv, add a special TIED pseudo that pretends like
the first operand and the destination must be the same register. This
disables the earlyclobber for that source. Mark the instruction
as convertible to 3 address form which will switch it to the
original untied pseudo when the TwoAddressInstructionPass decides
that keeping them tied would require an extra copy. This uses
code in RISCVInstrInfo.cpp to do the conversion to the untied
opcode.

The untie test case show that we can generate the untied version.
Not sure it was profitable to do it in this case, but they have
really simple IR.

Reviewed By: arcbbb

Differential Revision: https://reviews.llvm.org/D103552
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsubu.w-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsub.w-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwaddu.w-rv32.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfo.h
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfo.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsub.w-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwadd.w-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwaddu.w-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsubu.w-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwadd.w-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv32.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
Commit 08664d005c02003180371049b19c7e5d01541c58 by clattner
[Verifier] Speed up and parallelize dominance checking.  NFC

One of the key algorithms used in the "mlir::verify(op)" method is the
dominance checker, which ensures that operand values properly dominate
the operations that use them.

The MLIR dominance implementation has a number of algorithmic problems,
and is not really set up in general to answer dense queries: it's constant
factors are really slow with multiple map lookups and scans, even in the
easy cases.  Furthermore, when calling mlir::verify(module) or some other
high level operation, it makes sense to parallelize the dominator
verification of all the functions within the module.

This patch has a few changes to enact this:
1) It splits dominance checking into "IsolatedFromAbove" units.  Instead
    of building a monolithic DominanceInfo for everything in a module,
    for example, it checks dominance for the module to all the functions
    within it (noop, since there are no operands at this level) then each
    function gets their own DominanceInfo for each of their scope.
2) It adds the ability for mlir::DominanceInfo (and post dom) to be
    constrained to an IsolatedFromAbove region.  There is no reason to
    recurse into IsolatedFromAbove regions since use/def relationships
    can't span this region anyway.  This is already checked by the time
    the verifier gets here.
3) It avoids querying DominanceInfo for trivial checks (e.g. intra Block
    references) to eliminate constant factor issues).
4) It switches to lazily constructing DominanceInfo because the trivial
    check case handles the vast majority of the cases and avoids
    constructing DominanceInfo entirely in some cases (e.g. at the module
    level or for many Regions's that contain a single Block).
5) It parallelizes analysis of collections IsolatedFromAbove operations,
    e.g. each of the functions within a Module.

All together this is more than a 10% speedup on `firtool` in circt on a
large design when run in -verify-each mode (our default) since the verifier
is invoked after each pass.

Still todo is to parallelize the main verifier pass.  I decided to split
this out to its own thing since this patch is already large-ish.

Differential Revision: https://reviews.llvm.org/D103373
The file was modifiedmlir/include/mlir/IR/Dominance.h
The file was modifiedmlir/lib/IR/Verifier.cpp
Commit 92a79dbe91413f685ab19295fc7a6297dbd6c824 by clattner
[Core] Add Twine support for StringAttr and Identifier. NFC.

This is both more efficient and more ergonomic than going
through an std::string, e.g. when using llvm::utostr and
in string concat cases.

Unfortunately we can't just overload ::get().  This causes an
ambiguity because both twine and stringref implicitly convert
from std::string.

Differential Revision: https://reviews.llvm.org/D103754
The file was modifiedmlir/lib/IR/MLIRContext.cpp
The file was modifiedmlir/lib/CAPI/IR/BuiltinAttributes.cpp
The file was modifiedmlir/include/mlir/IR/BuiltinAttributes.td
The file was modifiedmlir/lib/Dialect/GPU/Transforms/SerializeToBlob.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
The file was modifiedmlir/lib/Conversion/GPUToVulkan/ConvertGPULaunchFuncToVulkanLaunchFunc.cpp
The file was modifiedmlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
The file was modifiedmlir/lib/IR/BuiltinAttributes.cpp
The file was modifiedmlir/include/mlir/IR/Builders.h
The file was modifiedmlir/include/mlir/IR/Identifier.h
The file was modifiedmlir/lib/IR/Builders.cpp
Commit ea10a86984ea73fcec3b12d22404a15f2f59b219 by brendon.cahoon
[AMDGPU] Add gfx1013 target

Differential Revision: https://reviews.llvm.org/D103663
The file was modifiedllvm/lib/Object/ELFObjectFile.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
The file was modifiedllvm/lib/Target/AMDGPU/GCNSubtarget.h
The file was modifiedllvm/test/tools/llvm-readobj/ELF/amdgpu-elf-headers.test
The file was modifiedllvm/lib/ObjectYAML/ELFYAML.cpp
The file was modifiedclang/test/Misc/target-invalid-cpu-note.c
The file was modifiedclang/lib/Basic/Targets/NVPTX.cpp
The file was modifiedllvm/include/llvm/Support/TargetParser.h
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/MIMGInstructions.td
The file was modifiedllvm/test/MC/AMDGPU/gfx10_unsupported.s
The file was modifiedllvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
The file was modifiedllvm/test/Object/AMDGPU/elf-header-flags-mach.yaml
The file was modifiedllvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedclang/test/CodeGenOpenCL/amdgpu-features.cl
The file was modifiedclang/test/Driver/amdgpu-mcpu.cl
The file was modifiedllvm/include/llvm/BinaryFormat/ELF.h
The file was modifiedllvm/tools/llvm-readobj/ELFDumper.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/get_elf_mach_gfx_name.cpp
The file was modifiedclang/lib/Basic/Cuda.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPU.td
The file was modifiedllvm/test/MC/AMDGPU/dl-insts-err.s
The file was modifiedllvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
The file was modifiedllvm/lib/Target/AMDGPU/GCNProcessors.td
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedclang/lib/Basic/Targets/AMDGPU.cpp
The file was modifiedllvm/lib/Support/TargetParser.cpp
The file was modifiedllvm/docs/AMDGPUUsage.rst
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
The file was modifiedclang/test/Driver/amdgpu-macros.cl
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
The file was modifiedclang/include/clang/Basic/Cuda.h
Commit 114e712c344fbf8361b97130e78baa2624ff9bca by llvm-dev
InstrEmitter.cpp - don't dereference a dyn_cast<>.

dyn_cast<> can return nullptr which we would then dereference - use cast<> which will assert that the type is correct.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
Commit 01b77159e30b38613ab700d8bb128b006822c58c by llvm-dev
PPCISelLowering.cpp - don't dereference a dyn_cast<>.

dyn_cast<> can return nullptr which we would then dereference - use cast<> which will assert that the type is correct.
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
Commit 52396577a2d85ef1b18f86e643fe3b1033750e15 by llvm-dev
Use llvm_unreachable for unsupported integer types.

As suggested on rG937c4cffd024, use llvm_unreachable for unhandled integer types (which shouldn't be possible) instead of breaking and dropping down to the existing fatal error handler.

Helps silence static analyzer warnings.
The file was modifiedllvm/lib/ExecutionEngine/Interpreter/ExternalFunctions.cpp
Commit a4e2cf712af3a3c7a4389e400a29da244b276f96 by joker.eph
Revert "[llvm] Make Sequence reverse-iterable"

This reverts commit e772216e708937988c039420d2c559568f91ae27
(and fixup 7f6c878a2c035eb6325ab228d9bc2d257509d959).

The build is broken with gcc5 host compiler:

In file included from
                 from mlir/lib/Dialect/Utils/StructuredOpsUtils.cpp:9:
tools/mlir/include/mlir/IR/BuiltinAttributes.h.inc:424:57: error: type/value mismatch at argument 1 in template parameter list for 'template<class ItTy, class FuncTy, class FuncReturnTy> class llvm::mapped_iterator'
                               std::function<T(ptrdiff_t)>>;
                                                         ^
tools/mlir/include/mlir/IR/BuiltinAttributes.h.inc:424:57: note:   expected a type, got 'decltype (seq<ptrdiff_t>(0, 0))::const_iterator'
The file was modifiedmlir/include/mlir/IR/BuiltinAttributes.td
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
The file was modifiedllvm/include/llvm/ADT/Sequence.h
The file was modifiedmlir/lib/Conversion/PDLToPDLInterp/PDLToPDLInterp.cpp
The file was modifiedllvm/unittests/ADT/SequenceTest.cpp
Commit 1dba2a026956b0f3918dcf8bb1d3f3483db2de8c by phosek
[Fuchsia] Update some of the Fuchsia toolchain flags

This should make the build more self-contained.

Differential Revision: https://reviews.llvm.org/D103875
The file was modifiedclang/cmake/caches/Fuchsia.cmake
The file was modifiedclang/cmake/caches/Fuchsia-stage2.cmake
Commit 30bb5dcb0a5cfe933136340318cbff2ba329a8c4 by joker.eph
Add missing header <atomic> in lib/IR/Verifier.cpp (NFC)

Fix the build on some platform.
The file was modifiedmlir/lib/IR/Verifier.cpp
Commit 2a7e759734982bea1d08642332a92f687266148f by Justin Bogner
[GlobalISel] Handle non-multiples of the base type in narrowScalarInsert

When narrowing G_INSERT, handle types that aren't a multiple of the
type we're narrowing to. This comes up if we're narrowing something
like an s96 to fit in 64 bit registers and also for non-byte multiple
packed types if they come up.

This implementation handles these cases by extending the extra bits to
the narrow size and truncating the result back to the destination
size.

Differential Revision: https://reviews.llvm.org/D97791
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-inserts.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
Commit 4271e1d2c52271ddb9544fa0c76543bffe053937 by Justin Bogner
[GlobalISel] Handle non-multiples of the base type in narrowScalarAddSub

When narrowing G_ADD and G_SUB, handle types that aren't a multiple of
the type we're narrowing to. This allows us to handle types like s96
on 64 bit targets.

Note that the test here has a couple of dead instructions because of
the way the setup legalizes. I wasn't able to come up with a way to
write this test that avoids that easily.

Differential Revision: https://reviews.llvm.org/D97811
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
Commit 4d680b06c92a0b785da9bb4370cd7d8819b6d726 by Louis Dionne
[libc++] Add a CI configuration for the modular build

Differential Revision: https://reviews.llvm.org/D103559
The file was modifiedlibcxx/utils/libcxx/test/format.py
The file was modifiedlibcxx/utils/libcxx/test/params.py
The file was modifiedlibcxx/utils/ci/run-buildbot
The file was addedlibcxx/cmake/caches/Generic-modules.cmake
The file was modifiedlibcxx/utils/libcxx/test/config.py
The file was modifiedlibcxx/test/libcxx/utilities/utility/pairs/pairs.pair/non_trivial_copy_move_ABI.pass.cpp
The file was modifiedlibcxx/utils/ci/buildkite-pipeline.yml
The file was modifiedlibcxx/test/libcxx/include_as_c.sh.cpp