FailedChanges

Summary

  1. Change Target::ReadMemory to ensure the amount of memory read from the file-cache is the amount requested. (details)
  2. Add null-pointer checks when accessing a TypeSystem's SymbolFile (details)
  3. [mlir] Use static shape knowledge when lowering memref.reshape (details)
  4. [libomptarget][nfc] Add hook to easily disable building amdgcn bclib (details)
  5. [libc++] s/_VSTD::declval/declval/g. NFCI. (details)
  6. [libc++] s/std::size_t/size_t/g. NFCI. (details)
  7. [libc++] s/_VSTD::chrono/chrono/g. NFCI. (details)
  8. [libc++] s/_VSTD::is_unsigned/is_unsigned/ in <random>. NFCI. (details)
  9. [libc++] Remove more unnecessary _VSTD:: from type names. NFCI. (details)
  10. Revert "Fix branch coverage merging in FunctionCoverageSummary::get() for instantiation" (details)
  11. [RISCV] Match trunc_vector_vl+sra_vl/srl_vl with splat shift amount to vnsra/vnsrl. (details)
  12. [X86][Codegen] Shift amount mod: sh? i64 x, (32-y) --> sh? i64 x, -(y+32) (details)
  13. [RISCV] Use fractional LMULs for fixed length types smaller than riscv-v-vector-bits-min. (details)
  14. [libcxx][tests] Fix incomplte.verify tests by disabling them on clang-10. (details)
  15. [X86][SSE] Add tests for permute(phaddw(phaddw(x,y),phaddw(z,w))) -> phaddw(phaddw(),phaddw()) folds. (details)
  16. Reland "[Coverage] Fix branch coverage merging in FunctionCoverageSummary::get() for instantiation"" (details)
  17. Revert "[ORC-RT] Add unit test infrastructure, extensible_rtti..." (details)
  18. [TextAPI] Reformat llvm_unreachable message (details)
  19. [flang] Allow large and erroneous ac-implied-do's (details)
  20. Re-apply "[ORC-RT] Add unit test infrastructure, extensible_rtti..." (details)
  21. [lld/mac] Implement -sectalign (details)
  22. [git-clang-format] Do not apply clang-format to symlinks (details)
  23. [libcxx] [test] Fix filesystem permission tests for windows (details)
  24. [mlir][ODS]: Add per-op cppNamespace. (details)
  25. [ArgumentPromotion] Fix byval alignment handling. (details)
  26. [RISCV] Prefer to lower MC_GlobalAddress operands to .Lfoo$local (details)
  27. [AArch64][GlobalISel] Support truncstorei8/i16 w/ combine to form truncating G_STOREs. (details)
  28. [GlobalOpt] Remove heap SROA (details)
  29. [X86] X86TTIImpl::getInterleavedMemoryOpCostAVX2(): canonicalize to integer type (details)
  30. [lld][WebAssembly] Convert test to assembly. NFC. (details)
  31. [clang] Support -fpic -fno-semantic-interposition for RISCV (details)
  32. [OpenMP] Use compound operators for reduction combiner if available. (details)
  33. [libc++] Run `substitutes-in-compile-flags.sh.cpp` test on Windows. (details)
  34. Add an "interrupt timeout" to Process, and pipe that through the (details)
  35. [lld][WebAssembly] Remove relocation target verification (details)
  36. [mlir] Move move capture in SparseElementsAttr::getValues (details)
  37. [NFC][LSAN] Limit the number of concurrent threads is the test (details)
  38. [AArch64][GlobaISel] Mark target generic instructions as HasNoSideEffects. (details)
  39. [PowerPC] Improve codegen for int-to-fp conversion of subword vector extract (details)
  40. [OpenMP] Changes to enable MSVC ARM64 build of libomp (details)
  41. [RISCV] Regenerate stepvector.ll. NFC (details)
  42. [hwasan] Stress test for thread creation. (details)
  43. [AMDGPU] Fix extra waitcnt being added with BUFFER_INVL2 (details)
  44. Removed unnecessary introduction of semi-colons. (details)
  45. [mlir] Elide large elements attrs when printing Operations in diagnostics (details)
  46. [mlir][tosa] Tosa elementwise broadcasting had some minor bugs (details)
  47. [InstCombine] Clean up one-hot merge optimization (NFC) (details)
  48. [RISCV] Move instruction information into the RISCVII namespace (NFC) (details)
  49. [llvm-cov] Support for v4 format in convert-for-testing (details)
  50. Revert "[LoopInterchange] Fix legality for triangular loops" (details)
  51. [AIX][TLS] Diagnose use of unimplemented TLS models (details)
  52. [JITLink] Make LinkGraph debug dumps more readable. (details)
  53. [JITLink][x86-64] Add an x86_64 PointerSize constexpr. (details)
  54. [JITLink][MachO/x86_64] Expose API for creating eh-frame fixing passes. (details)
  55. [Coverage] Support overriding compilation directory (details)
  56. [LoopInterchange] Fix legality for triangular loops (details)
  57. [clang][Fuchsia] Introduce compat multilibs (details)
  58. [JITLink] Fix bogus format string. (details)
  59. Revert "[GVN] Clobber partially aliased loads." (details)
Commit 6c82b8a378a6f59e94a81d91225db4fabf6e2bff by augusto2112
Change Target::ReadMemory to ensure the amount of memory read from the file-cache is the amount requested.

This change ensures that if for whatever reason we read less bytes than expected (for example, when trying to read memory that spans multiple sections), we try reading from the live process as well.

Reviewed By: jasonmolenda

Differential Revision: https://reviews.llvm.org/D101390
The file was modifiedlldb/source/Target/Target.cpp (diff)
Commit ec28e43e01540a57f8822b2efb8638996873f945 by augusto2112
Add null-pointer checks when accessing a TypeSystem's SymbolFile

A type system is not guaranteed to have a symbol file. This patch adds null-pointer checks so we don't crash when trying to access a type system's symbol file.

Reviewed By: aprantl, teemperor

Differential Revision: https://reviews.llvm.org/D101539
The file was modifiedlldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp (diff)
The file was modifiedlldb/source/Symbol/Type.cpp (diff)
The file was modifiedlldb/source/Plugins/SymbolFile/PDB/PDBASTParser.cpp (diff)
The file was modifiedlldb/unittests/Symbol/TestTypeSystemClang.cpp (diff)
Commit b20e150c9be16f69c73f4cd2986053d13d0f376a by benny.kra
[mlir] Use static shape knowledge when lowering memref.reshape

This is actually necessary for correctness, as memref.reinterpret_cast
doesn't verify if the output shape doesn't match the static sizes.

Differential Revision: https://reviews.llvm.org/D102232
The file was modifiedmlir/lib/Dialect/StandardOps/Transforms/ExpandOps.cpp (diff)
The file was modifiedmlir/test/Dialect/Standard/expand-ops.mlir (diff)
Commit 72995a4bdf7d95887883ccfa04567b723f2b342a by jonathanchesterfield
[libomptarget][nfc] Add hook to easily disable building amdgcn bclib

[libomptarget][nfc] Add hook to easily disable building amdgcn bclib

This is useful when building LLVM with a toolchain that can't emit code
for amdgcn, e.g. because it overrides the include search path with headers
from another architecture, or the clang compiler is missing builtins.

Reviewed By: tianshilei1992

Differential Revision: https://reviews.llvm.org/D102229
The file was modifiedopenmp/libomptarget/deviceRTLs/amdgcn/CMakeLists.txt (diff)
Commit ab3fcc5065a895f88ec8a020bc3c2f7e54cc4561 by arthur.j.odwyer
[libc++] s/_VSTD::declval/declval/g. NFCI.
The file was modifiedlibcxx/include/optional (diff)
The file was modifiedlibcxx/include/__memory/construct_at.h (diff)
The file was modifiedlibcxx/include/ostream (diff)
The file was modifiedlibcxx/include/concepts (diff)
The file was modifiedlibcxx/include/__memory/shared_ptr.h (diff)
The file was modifiedlibcxx/include/scoped_allocator (diff)
The file was modifiedlibcxx/include/type_traits (diff)
The file was modifiedlibcxx/include/experimental/propagate_const (diff)
The file was modifiedlibcxx/include/memory (diff)
The file was modifiedlibcxx/include/algorithm (diff)
The file was modifiedlibcxx/include/istream (diff)
The file was modifiedlibcxx/include/__functional_base (diff)
The file was modifiedlibcxx/include/variant (diff)
Commit 0b8da5fa5915f1cea790c7e246195e30afd9e391 by arthur.j.odwyer
[libc++] s/std::size_t/size_t/g. NFCI.
The file was modifiedlibcxx/include/experimental/functional (diff)
The file was modifiedlibcxx/include/type_traits (diff)
Commit aa5e3beea3d4d4e00cb2b0f2d103b4bd52239384 by arthur.j.odwyer
[libc++] s/_VSTD::chrono/chrono/g. NFCI.
The file was modifiedlibcxx/include/chrono (diff)
Commit 866b27950aaf2c38f4ecfc8a0f18945fff3b8542 by arthur.j.odwyer
[libc++] s/_VSTD::is_unsigned/is_unsigned/ in <random>. NFCI.
The file was modifiedlibcxx/test/std/numerics/rand/rand.eng/rand.eng.lcong/params.fail.cpp (diff)
The file was modifiedlibcxx/include/random (diff)
Commit 6491d99e330c38b33b9cb6acb19afa3a464febeb by arthur.j.odwyer
[libc++] Remove more unnecessary _VSTD:: from type names. NFCI.

Differential Revision: https://reviews.llvm.org/D102181
The file was modifiedlibcxx/include/algorithm (diff)
The file was modifiedlibcxx/include/memory (diff)
The file was modifiedlibcxx/include/random (diff)
The file was modifiedlibcxx/include/type_traits (diff)
The file was modifiedlibcxx/include/experimental/type_traits (diff)
The file was modifiedlibcxx/include/__memory/allocator_traits.h (diff)
The file was modifiedlibcxx/include/functional (diff)
The file was modifiedlibcxx/include/experimental/functional (diff)
Commit 668dccc396da4f593ac87c92dc0eb7bc983b5762 by a-phipps
Revert "Fix branch coverage merging in FunctionCoverageSummary::get() for instantiation"

This reverts commit 6400905a615282c83a2fc6e49e57ff716aa8b4de.
The file was modifiedllvm/test/tools/llvm-cov/branch-templates.cpp (diff)
The file was modifiedllvm/tools/llvm-cov/CoverageSummaryInfo.h (diff)
The file was modifiedllvm/tools/llvm-cov/CoverageSummaryInfo.cpp (diff)
Commit dc00cbb5053895356955a6dc03632d4fa05048e3 by craig.topper
[RISCV] Match trunc_vector_vl+sra_vl/srl_vl with splat shift amount to vnsra/vnsrl.

Limited to splats because we would need to truncate the shift
amount vector otherwise.

I tried to do this with new ISD nodes and a DAG combine to
avoid such a large pattern, but we don't form the splat until
LegalizeDAG and need DAG combine to remove a scalable->fixed->scalable
cast before it becomes visible to the shift node. By the time that
happens we've already visited the truncate node and won't revisit it.

I think I have an idea how to improve i64 on RV32 I'll save for a
follow up.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D102019
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td (diff)
The file was addedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vnsra-vnsrl.ll
Commit 5f78ba001ca23ab826b9be823fc8ac0a0e5d2237 by lebedev.ri
[X86][Codegen] Shift amount mod: sh? i64 x, (32-y) --> sh? i64 x, -(y+32)

I've seen this in the RawSpeed's BitPumpMSB*::push() hotpath,
after fixing the buffer abstraction to a more sane one,
when looking into a +5% runtime regression.
I was hoping that this would fix it, but it does not look it does.

This seems to be at least not worse than the original pattern.
But i'm actually mainly interested in the case where we already
compute `(y+32)` (see last test),

https://alive2.llvm.org/ce/z/ZCzJio

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D101944
The file was modifiedllvm/lib/Target/X86/X86ISelDAGToDAG.cpp (diff)
The file was modifiedllvm/test/CodeGen/X86/64-bit-shift-by-32-minus-y.ll (diff)
Commit ce6e4f27dd72f834502f47176d84869a1f509d7b by craig.topper
[RISCV] Use fractional LMULs for fixed length types smaller than riscv-v-vector-bits-min.

My thought process is that if v2i64 is an LMUL=1 type then v2i32
should be an LMUL=1/2 type. We limit the fractional LMUL so that
SEW=64 clips to LMUL=1, SEW=32 clips to LMUL=1/2, etc. This
ensures there's always a fractional LMUL available to truncate a type.
This does reduce the number of vsetvlis in some cases.

Some tests increase vsetvlis because the best container type for a
mask type is dependent on the LMUL+SEW that the mask was produced
from, but you can't tell that from the type. I think this is
something we need to solve this in the machine IR when optimizing
vsetvlis.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D101215
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-i2fp.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-int.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vremu-vp.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-bitcast.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/urem-seteq-illegal-types.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmin.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vdivu-vp.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmax.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vshl-vp.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vreductions-mask.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-load-store.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmul-vp.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-conv.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-splat.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-stepvector-rv64.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitcast.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-shuffles.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-exttrunc.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsrl-vp.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-logic.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsra-vp.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-int.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vor-vp.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-i1.ll (diff)
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-int.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-extload-truncstore.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vxor-vp.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-setcc.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-buildvec.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vand-vp.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsub-vp.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-fp.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vdiv-vp.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vrem-vp.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-fp.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vrsub-vp.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-stepvector-rv32.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-fp.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-subvector.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll (diff)
Commit db13f832a1eec7427762c1ef1f56f169518f1abe by zoecarver
[libcxx][tests] Fix incomplte.verify tests by disabling them on clang-10.

For some reason clang-10 can't match the expected errors produced by
passing icomplete arrays to range access functions. Disabling the tests
is a stop-gap solution to fix the bots.
The file was modifiedlibcxx/test/std/ranges/range.access/range.access.cend/incomplete.compile.verify.cpp (diff)
The file was modifiedlibcxx/test/std/ranges/range.access/range.access.begin/incomplete.compile.verify.cpp (diff)
The file was modifiedlibcxx/test/std/ranges/range.access/range.prim/empty.incomplete.verify.cpp (diff)
The file was modifiedlibcxx/test/std/ranges/range.access/range.access.cbegin/incomplete.compile.verify.cpp (diff)
The file was modifiedlibcxx/test/std/ranges/range.access/range.access.end/incomplete.compile.verify.cpp (diff)
Commit 4f80340fb6712f5f1e97e7667bfd5cffa7d684b7 by llvm-dev
[X86][SSE] Add tests for permute(phaddw(phaddw(x,y),phaddw(z,w))) -> phaddw(phaddw(),phaddw()) folds.

We currently only fold if NumEltsPerLane == 4
The file was modifiedllvm/test/CodeGen/X86/horizontal-shuffle-4.ll (diff)
Commit eccb925147d5f262a3e74cc050d0665dd4e6d8db by a-phipps
Reland "[Coverage] Fix branch coverage merging in FunctionCoverageSummary::get() for instantiation""

Originally landed in: 6400905a615282c83a2fc6e49e57ff716aa8b4de
Reverted in: 668dccc396da4f593ac87c92dc0eb7bc983b5762

Fix branch coverage merging in FunctionCoverageSummary::get() for instantiation
groups.

This change corrects the implementation for the branch coverage summary to do
the same thing for branches that is done for lines and regions.  That is,
across function instantiations in an instantiation group, the maximum branch
coverage found in any of those instantiations is returned, with the total
number of branches being the same across instantiations.

Differential Revision: https://reviews.llvm.org/D102193
The file was modifiedllvm/tools/llvm-cov/CoverageSummaryInfo.h (diff)
The file was modifiedllvm/tools/llvm-cov/CoverageSummaryInfo.cpp (diff)
The file was modifiedllvm/test/tools/llvm-cov/branch-templates.cpp (diff)
Commit 1c7c6f2b106250d63905d7cde99a4559f0bb4978 by Lang Hames
Revert "[ORC-RT] Add unit test infrastructure, extensible_rtti..."

This reverts commit 6d263b6f1c9 while I investigate the CMake failures that it
causes in some configurations.
The file was removedcompiler-rt/lib/orc/unittests/extensible_rtti_test.cpp
The file was addedcompiler-rt/lib/orc/placeholder.cpp
The file was modifiedcompiler-rt/lib/orc/CMakeLists.txt (diff)
The file was removedcompiler-rt/lib/orc/unittests/CMakeLists.txt
The file was removedcompiler-rt/lib/orc/unittests/orc_unit_test_main.cpp
The file was removedcompiler-rt/lib/orc/extensible_rtti.cpp
The file was modifiedcompiler-rt/cmake/config-ix.cmake (diff)
The file was removedcompiler-rt/lib/orc/extensible_rtti.h
Commit cba508fb678798094a4fd668ce6bf4225fc73509 by Jonas Devlieghere
[TextAPI] Reformat llvm_unreachable message

Change llvm_unreachable message from "Unknown llvm.MachO.PlatformKind
enum" to "Unknown llvm::MachO::PlatformKind enum".

Differential revision: https://reviews.llvm.org/D102250
The file was modifiedllvm/lib/TextAPI/Platform.cpp (diff)
Commit 5a9497d6890145da74325dfcb032ad2963b5da3f by psteinfeld
[flang] Allow large and erroneous ac-implied-do's

We sometimes unroll an ac-implied-do of an array constructor into a flat list
of values.  We then re-analyze the array constructor that contains the
resulting list of expressions.  Such a list may or may not contain errors.

But when processing an array constructor with an unrolled ac-implied-do, the
compiler was building an expression to represent the extent of the resulting
array constructor containing the list of values.  The number of operands
in this extent expression was based on the number of elements in the
unrolled list of values.  For very large lists, this created an
expression so large that it could not be evaluated by the compiler
without overflowing the stack.

I fixed this by continuously folding the extent expression as each operand is
added to it.  I added the test .../flang/test/Semantics/array-constr-big.f90
that will cause the compiler to seg fault without this change.

Also, when the unrolled ac-implied-do expression contains errors, we were
repeating the same error message referencing the same source line for every
instance of the erroneous expression in the unrolled list.  This potentially
resulted in a very long list of messages for a single error in the source code.

I fixed this by comparing the message being emitted to the previously emitted
message.  If they are the same, I do not emit the message.  This change is also
tested by the new test array-constr-big.f90.

Several of the existing tests had duplicate error messages for the same source
line, and this change caused differences in their output.  So I adjusted the
tests to match the new message emitting behavior.

Differential Revision: https://reviews.llvm.org/D102210
The file was modifiedflang/include/flang/Evaluate/shape.h (diff)
The file was modifiedflang/test/Semantics/allocate02.f90 (diff)
The file was modifiedflang/test/Semantics/omp-clause-validity01.f90 (diff)
The file was modifiedflang/test/Semantics/resolve70.f90 (diff)
The file was modifiedflang/lib/Parser/message.cpp (diff)
The file was addedflang/test/Semantics/array-constr-big.f90
The file was modifiedflang/include/flang/Parser/message.h (diff)
The file was modifiedflang/test/Semantics/io06.f90 (diff)
The file was modifiedflang/test/Semantics/omp-flush01.f90 (diff)
The file was modifiedflang/test/Semantics/omp-atomic.f90 (diff)
Commit e0b6c99288bf1798ccc80aa0c5c7940c17665e69 by Lang Hames
Re-apply "[ORC-RT] Add unit test infrastructure, extensible_rtti..."

This reapplies 6d263b6f1c9 (which was reverted in 1c7c6f2b106) with a fix for a
CMake issue.
The file was addedcompiler-rt/lib/orc/extensible_rtti.cpp
The file was modifiedcompiler-rt/cmake/config-ix.cmake (diff)
The file was addedcompiler-rt/lib/orc/unittests/extensible_rtti_test.cpp
The file was addedcompiler-rt/lib/orc/unittests/orc_unit_test_main.cpp
The file was modifiedcompiler-rt/lib/orc/CMakeLists.txt (diff)
The file was addedcompiler-rt/lib/orc/extensible_rtti.h
The file was removedcompiler-rt/lib/orc/placeholder.cpp
The file was addedcompiler-rt/lib/orc/unittests/CMakeLists.txt
Commit 9ab49ae55dd7b928c2b806adccf6d07a89e59102 by thakis
[lld/mac] Implement -sectalign

clang sometimes passes this flag along (see D68351), so we should implement it.

Differential Revision: https://reviews.llvm.org/D102247
The file was modifiedlld/MachO/Driver.cpp (diff)
The file was modifiedlld/MachO/Config.h (diff)
The file was modifiedlld/MachO/OutputSegment.cpp (diff)
The file was addedlld/test/MachO/sectalign.s
The file was modifiedlld/MachO/Options.td (diff)
Commit 0fd0a010a1ed2ce761d20bfc6378e5bbaa75c8de by pirama
[git-clang-format] Do not apply clang-format to symlinks

This fixes PR46992.

Git stores symlinks as text files and we should not format them even if
they have one of the requested extensions.

(Move the call to `cd_to_toplevel()` up a few lines so we can also print
the skipped symlinks during verbose output.)

Differential Revision: https://reviews.llvm.org/D101878
The file was modifiedclang/tools/clang-format/git-clang-format (diff)
The file was modifiedclang/docs/ReleaseNotes.rst (diff)
Commit 68de58cd649cb3a3e94a1c9552ebf2a18bb9d040 by martin
[libcxx] [test] Fix filesystem permission tests for windows

On Windows, the permission bits are mapped down to essentially only
two possible states; readonly or readwrite. Normalize the checked
permission bitmask to match what the implementation will return.

Differential Revision: https://reviews.llvm.org/D101728
The file was modifiedlibcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.permissions/permissions.pass.cpp (diff)
The file was modifiedlibcxx/test/support/filesystem_test_helper.h (diff)
The file was modifiedlibcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.copy_file/copy_file.pass.cpp (diff)
Commit 49755871ad0c24ed970c0a4f2c51f90488b0ddd2 by silvasean
[mlir][ODS]: Add per-op cppNamespace.

This is useful for dialects that have logical subparts.

Differential Revision: https://reviews.llvm.org/D102200
The file was modifiedmlir/include/mlir/TableGen/CodeGenHelpers.h (diff)
The file was modifiedmlir/include/mlir/TableGen/Operator.h (diff)
The file was modifiedmlir/lib/TableGen/Operator.cpp (diff)
The file was modifiedmlir/test/mlir-tblgen/dialect.td (diff)
The file was modifiedmlir/tools/mlir-tblgen/OpDefinitionsGen.cpp (diff)
The file was modifiedmlir/include/mlir/IR/OpBase.td (diff)
Commit 61cbbba7a645a1d87db9a80867c84a788ab2ea9c by efriedma
[ArgumentPromotion] Fix byval alignment handling.

Make sure the alignment of the generated operations matches the
alignment of the byval argument.  Previously, we were just ignoring
alignment and getting lucky.

While I'm here, also delete the unnecessary "tail" handling.
Passing a pointer to a byval argument to a "tail" call is UB, so
rewriting to an alloca doesn't require any special handling.

Differential Revision: https://reviews.llvm.org/D89819
The file was modifiedllvm/lib/Transforms/IPO/ArgumentPromotion.cpp (diff)
The file was modifiedllvm/test/Transforms/ArgumentPromotion/dbg.ll (diff)
The file was modifiedllvm/test/Transforms/ArgumentPromotion/byval-2.ll (diff)
The file was removedllvm/test/Transforms/ArgumentPromotion/tail.ll
The file was modifiedllvm/test/Transforms/ArgumentPromotion/byval.ll (diff)
The file was modifiedllvm/test/Transforms/ArgumentPromotion/attrs.ll (diff)
Commit ec27c5f170441ab54295830aa9f7d376406c6a0f by i
[RISCV] Prefer to lower MC_GlobalAddress operands to .Lfoo$local

Similar to X86 D73230 and AArch64 D101872

With this change, we can set dso_local in clang's -fpic -fno-semantic-interposition mode,
for default visibility external linkage non-ifunc-non-COMDAT definitions.

For such dso_local definitions, variable access/taking the address of a
function/calling a function will go through a local alias to avoid GOT/PLT.

Reviewed By: jrtc27, luismarques

Differential Revision: https://reviews.llvm.org/D101875
The file was addedllvm/test/CodeGen/RISCV/elf-preemption.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVMCInstLower.cpp (diff)
Commit ae2b36e8bdfa612649c6f2d8b6b9079679cb2572 by Amara Emerson
[AArch64][GlobalISel] Support truncstorei8/i16 w/ combine to form truncating G_STOREs.

This needs some tablegen changes so that we can actually import the patterns properly.

Differential Revision: https://reviews.llvm.org/D102204
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/select-store.mir (diff)
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll (diff)
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp (diff)
The file was modifiedllvm/utils/TableGen/GlobalISelEmitter.cpp (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64Combine.td (diff)
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-truncstore.mir
The file was modifiedllvm/include/llvm/Target/TargetSelectionDAG.td (diff)
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp (diff)
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir (diff)
Commit 129f466e222e13fdf680356831bb935e1229bdf4 by i
[GlobalOpt] Remove heap SROA

GlobalOpt implements a heap SROA (SROA for an malloc allocatated struct or array
of structs) which is largely undertested (heap-sra-[1234].ll are basically the
same test with very little difference) and does not trigger at all when
bootstrapping clang (it only supports the case of one single store).

The heap SROA implementation causes PR50027 (GEP is not properly handled; crash or miscompile).
Just drop the implementation. I have deleted some obviously duplicated tests
but kept `heap-sra-[12]{,-no-nullopt}.ll`.

Reviewed By: aeubanks

Differential Revision: https://reviews.llvm.org/D102257
The file was modifiedllvm/test/Transforms/GlobalOpt/MallocSROA-section.ll (diff)
The file was removedllvm/test/Transforms/GlobalOpt/heap-sra-3.ll
The file was removedllvm/test/Transforms/GlobalOpt/heap-sra-4.ll
The file was removedllvm/test/Transforms/GlobalOpt/heap-sra-4-no-null-opt.ll
The file was modifiedllvm/lib/Transforms/IPO/GlobalOpt.cpp (diff)
The file was modifiedllvm/test/Transforms/GlobalOpt/heap-sra-2.ll (diff)
The file was modifiedllvm/test/Transforms/GlobalOpt/heap-sra-1.ll (diff)
The file was removedllvm/test/Transforms/GlobalOpt/heap-sra-3-no-null-opt.ll
The file was modifiedllvm/test/Transforms/GlobalOpt/heap-sra-phi.ll (diff)
Commit 97e04d41e646aa13b0cc5ff3812bfb7305fa4756 by lebedev.ri
[X86] X86TTIImpl::getInterleavedMemoryOpCostAVX2(): canonicalize to integer type

This way we don't have to duplicate i32/f32 and i64/f64 entries,
which was already forgotten to be done for a few tuples.
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp (diff)
Commit b2f227c6c87c16fa593e643a487efd9326249066 by sbc
[lld][WebAssembly] Convert test to assembly. NFC.

Differential Revision: https://reviews.llvm.org/D102264
The file was addedlld/test/wasm/reloc-addend.s
The file was removedlld/test/wasm/reloc-addend.ll
Commit 2075f2b296b0fa90cb7597f0f318232940d29e95 by i
[clang] Support -fpic -fno-semantic-interposition for RISCV

-fno-semantic-interposition (only effective with -fpic) can optimize default
visibility external linkage (non-ifunc-non-COMDAT) variable access and function
calls to avoid GOT/PLT, by using local aliases, e.g.
```
int var;
__attribute__((optnone)) int fun(int x) { return x * x; }
int test() { return fun(var); }
```

-fpic (var and fun are dso_preemptable)
```
test:
.LBB1_1:
        auipc   a0, %got_pcrel_hi(var)
        ld      a0, %pcrel_lo(.LBB1_1)(a0)
        lw      a0, 0(a0)
// fun is preemptible by default in ld -shared mode. ld will create a PLT.
        tail    fun@plt
```

vs -fpic -fno-semantic-interposition (var and fun are dso_local)
```
test:
.Ltest$local:
.LBB1_1:
        auipc   a0, %pcrel_hi(.Lvar$local)
        addi    a0, a0, %pcrel_lo(.LBB1_1)
        lw      a0, 0(a0)
// The assembler either resolves .Lfun$local at assembly time (-mno-relax
// -fno-function-sections), or produces a relocation referencing a non-preemptible
// local symbol (which can avoid PLT).
        tail    .Lfun$local
```

Note: Clang's default -fpic is more aggressive than GCC -fpic: interprocedural
optimizations (including inlining) are available but local aliases are not used.
-fpic -fsemantic-interposition can disable interprocedural optimizations.

Depends on D101875

Reviewed By: luismarques

Differential Revision: https://reviews.llvm.org/D101876
The file was modifiedclang/test/Driver/fsemantic-interposition.c (diff)
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp (diff)
Commit f90abac6caab3b44e6a000de8cb72d204e74eb76 by michael.p.rice
[OpenMP] Use compound operators for reduction combiner if available.

The OpenMP spec seems to require the compound operators be used for
+, *, &, |, and ^ reduction.  So use these if a class has those operators.
If not try the simple operators as we did previously to limit the impact
to existing code.

Fixes: https://bugs.llvm.org/show_bug.cgi?id=48584

Differential Revision: https://reviews.llvm.org/D101941
The file was modifiedclang/test/OpenMP/parallel_reduction_messages.cpp (diff)
The file was modifiedclang/test/OpenMP/target_reduction_messages.cpp (diff)
The file was modifiedclang/test/OpenMP/taskloop_simd_reduction_messages.cpp (diff)
The file was modifiedclang/test/OpenMP/parallel_master_taskloop_simd_reduction_messages.cpp (diff)
The file was modifiedclang/test/OpenMP/for_reduction_messages.cpp (diff)
The file was modifiedclang/test/OpenMP/teams_distribute_simd_reduction_messages.cpp (diff)
The file was modifiedclang/test/OpenMP/taskgroup_task_reduction_messages.cpp (diff)
The file was modifiedclang/test/OpenMP/distribute_parallel_for_reduction_messages.cpp (diff)
The file was modifiedclang/test/OpenMP/taskloop_reduction_messages.cpp (diff)
The file was modifiedclang/test/OpenMP/parallel_master_reduction_messages.cpp (diff)
The file was addedclang/test/OpenMP/reduction_compound_op.cpp
The file was modifiedclang/test/OpenMP/simd_reduction_messages.cpp (diff)
The file was modifiedclang/test/OpenMP/parallel_master_taskloop_reduction_messages.cpp (diff)
The file was modifiedclang/lib/Sema/SemaOpenMP.cpp (diff)
The file was modifiedclang/test/OpenMP/target_simd_reduction_messages.cpp (diff)
The file was modifiedclang/test/OpenMP/target_teams_distribute_parallel_for_simd_reduction_messages.cpp (diff)
The file was modifiedclang/test/OpenMP/master_taskloop_in_reduction_messages.cpp (diff)
The file was modifiedclang/test/OpenMP/master_taskloop_reduction_messages.cpp (diff)
The file was modifiedclang/test/OpenMP/for_simd_reduction_messages.cpp (diff)
The file was modifiedclang/test/OpenMP/master_taskloop_simd_in_reduction_messages.cpp (diff)
The file was modifiedclang/test/OpenMP/master_taskloop_simd_reduction_messages.cpp (diff)
The file was modifiedclang/test/OpenMP/parallel_sections_reduction_messages.cpp (diff)
The file was modifiedclang/test/OpenMP/target_parallel_for_reduction_messages.cpp (diff)
The file was modifiedclang/test/OpenMP/target_teams_distribute_parallel_for_reduction_messages.cpp (diff)
The file was modifiedclang/test/OpenMP/parallel_for_reduction_messages.cpp (diff)
The file was modifiedclang/test/OpenMP/taskloop_simd_in_reduction_messages.cpp (diff)
The file was modifiedclang/test/OpenMP/teams_distribute_parallel_for_simd_reduction_messages.cpp (diff)
The file was modifiedclang/test/OpenMP/taskloop_in_reduction_messages.cpp (diff)
The file was modifiedclang/test/OpenMP/task_in_reduction_message.cpp (diff)
The file was modifiedclang/test/OpenMP/target_teams_distribute_reduction_messages.cpp (diff)
The file was modifiedclang/test/OpenMP/distribute_simd_reduction_messages.cpp (diff)
The file was modifiedclang/test/OpenMP/teams_reduction_messages.cpp (diff)
The file was modifiedclang/test/OpenMP/parallel_for_simd_reduction_messages.cpp (diff)
The file was modifiedclang/test/OpenMP/distribute_parallel_for_simd_reduction_messages.cpp (diff)
The file was modifiedclang/test/OpenMP/nvptx_target_parallel_reduction_codegen_tbaa_PR46146.cpp (diff)
The file was modifiedclang/test/OpenMP/teams_distribute_parallel_for_reduction_messages.cpp (diff)
The file was modifiedclang/test/OpenMP/teams_distribute_reduction_messages.cpp (diff)
The file was modifiedclang/test/OpenMP/sections_reduction_messages.cpp (diff)
The file was modifiedclang/test/OpenMP/target_parallel_reduction_messages.cpp (diff)
The file was modifiedclang/test/OpenMP/target_parallel_for_simd_reduction_messages.cpp (diff)
The file was modifiedclang/test/OpenMP/target_teams_distribute_simd_reduction_messages.cpp (diff)
The file was modifiedclang/test/OpenMP/target_teams_reduction_messages.cpp (diff)
Commit 384dd9ddaf616a1563ee1c1a8a1347b7658e7a70 by vvereschaka
[libc++] Run `substitutes-in-compile-flags.sh.cpp` test on Windows.

Fix for substitutes-in-compile-flags.sh.cpp to run it properly on Windows platform.

Differential Revision: https://reviews.llvm.org/D102048
The file was modifiedlibcxx/test/libcxx/selftest/additional_compile_flags/substitutes-in-compile-flags.sh.cpp (diff)
Commit 9558b602b22cb7d681757c5f56d941e39a9d9d19 by jingham
Add an "interrupt timeout" to Process, and pipe that through the
ProcessGDBRemote plugin layers.

Also fix a bug where if we tried to interrupt, but the ReadPacket
wakeup timer woke us up just after the timeout, we would break out
the switch, but then since we immediately check if the response is
empty & fail if it is, we could end up actually only giving a
small interval to the interrupt.

Differential Revision: https://reviews.llvm.org/D102085
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteClientBase.h (diff)
The file was modifiedlldb/source/Plugins/Platform/gdb-server/PlatformRemoteGDBServer.cpp (diff)
The file was modifiedlldb/include/lldb/Target/Process.h (diff)
The file was modifiedlldb/source/Target/Process.cpp (diff)
The file was modifiedlldb/test/API/functionalities/gdb_remote_client/TestHaltFails.py (diff)
The file was modifiedlldb/unittests/Process/gdb-remote/GDBRemoteClientBaseTest.cpp (diff)
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.cpp (diff)
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteClientBase.cpp (diff)
The file was modifiedlldb/unittests/Process/gdb-remote/GDBRemoteCommunicationClientTest.cpp (diff)
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp (diff)
The file was modifiedlldb/source/Target/TargetProperties.td (diff)
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.h (diff)
The file was modifiedlldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp (diff)
The file was modifiedlldb/unittests/tools/lldb-server/tests/TestClient.cpp (diff)
Commit b49a798e71f922a68628ad9e31ca12fdb864c2f5 by sbc
[lld][WebAssembly] Remove relocation target verification

We have this extra step in wasm-ld that doesn't exist in other lld
backend which verifies the existing contents of the relocation targets.
This was originally intended as an extra form of double checking and an
aid to compiler developers.   However it has always been somewhat
controversial and there have been suggestions in the past the we simply
remove it.

My motivation for removing it now is that its causing me a headache
when trying to fix an issue with negative addends.  In the case of
negative addends that final result can be wrapped/negative but this
checking code would require significant modification to be able to deal
with that case.  For example with some test cases I'm looking at I'm
seeing error like this:

```
wasm-ld: warning: /usr/local/google/home/sbc/dev/wasm/llvm-build/tools/lld/test/wasm/Output/merge-string.s.tmp.o:(.rodata_relocs): unexpected existing value for R_WASM_MEMORY_ADDR_I32: existing=FFFFFFFA expected=FFFFFFFFFFFFFFFA
```

Rather than try to refactor `calcExpectedValue` to somehow return two
different types of results (32 and 64-bit) depending on the relocation
type, I think we can just remove this code.

Differential Revision: https://reviews.llvm.org/D102265
The file was modifiedlld/wasm/InputChunks.cpp (diff)
The file was modifiedlld/test/wasm/reloc-addend.s (diff)
The file was modifiedlld/wasm/InputFiles.cpp (diff)
The file was modifiedlld/wasm/InputFiles.h (diff)
Commit 731206f3684af5979e3a794970db83f9a34b4541 by riddleriver
[mlir] Move move capture in SparseElementsAttr::getValues

This was a TODO for the move to C++14. Now that the move has been completed, we can resolve it.
The file was modifiedmlir/include/mlir/IR/BuiltinAttributes.h (diff)
Commit 2a73b7bd8cf7620fc0e478ac838b07ee6649dd8a by Vitaly Buka
[NFC][LSAN] Limit the number of concurrent threads is the test

Test still fails with D88184 reverted.

The test was flaky on https://bugs.chromium.org/p/chromium/issues/detail?id=1206745 and
https://lab.llvm.org/buildbot/#/builders/sanitizer-x86_64-linux

Reviewed By: morehouse

Differential Revision: https://reviews.llvm.org/D102218
The file was modifiedcompiler-rt/test/lsan/TestCases/many_threads_detach.cpp (diff)
Commit 69069509b2d3cb0e0bcf6e38e0ab05c432adc763 by Amara Emerson
[AArch64][GlobaISel] Mark target generic instructions as HasNoSideEffects.

One test needed updating because the newly side-effect-free instructions were
now being DCE'd.
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrGISel.td (diff)
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/select-ext.mir (diff)
Commit ffbffaf6b6b0fc06abb7b43ec8de8bc61d941bc7 by albionapc
[PowerPC] Improve codegen for int-to-fp conversion of subword vector extract

When an integer is converted into floating point in subword vector extract,
it can be done in 2 instructions instead of the 3+ instructions it generates
right now. This patch removes the uncessary generation.

Differential: https://reviews.llvm.org/D100604
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrVSX.td (diff)
The file was addedllvm/test/CodeGen/PowerPC/vec-extract-itofp.ll
The file was modifiedllvm/test/CodeGen/PowerPC/uint-to-fp-v4i32.ll (diff)
The file was modifiedllvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp32_elts.ll (diff)
The file was modifiedllvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp32_elts.ll (diff)
Commit 4fb0aaf03381473ec8af727edb4b5d59b64b0d60 by Andrey.Churbanov
[OpenMP] Changes to enable MSVC ARM64 build of libomp

This is the first in a series of changes to the OpenMP runtime
that have been done internally by Microsoft. This patch makes
the necessary changes to enable libomp.dll to build with
the MSVC compiler targeting ARM64.

Differential Revision: https://reviews.llvm.org/D101173
The file was modifiedopenmp/runtime/src/CMakeLists.txt (diff)
The file was modifiedopenmp/runtime/src/z_Windows_NT-586_util.cpp (diff)
The file was modifiedopenmp/runtime/src/kmp_os.h (diff)
The file was modifiedopenmp/runtime/src/dllexports (diff)
The file was modifiedopenmp/runtime/src/kmp_atomic.cpp (diff)
The file was modifiedopenmp/runtime/src/kmp_platform.h (diff)
The file was modifiedopenmp/runtime/src/kmp.h (diff)
Commit d092dd56aed8af64425446544ca7c9a0616d86ce by craig.topper
[RISCV] Regenerate stepvector.ll. NFC

It looks like the RV32 and RV64 prefixes were removed from the
RUN lines while another patch was in review that added check
lines that used them.
The file was modifiedllvm/test/CodeGen/RISCV/rvv/stepvector.ll (diff)
Commit a7757f6c22e45e84e56da79af67fe29dd1c224f5 by eugenis
[hwasan] Stress test for thread creation.

This test has two modes - testing reused threads with multiple loops of
batch create/join, and testing new threads with a single loop of
create/join per fork.

The non-reuse variant catches the problem that was fixed in D101881 with
a high probability.

Differential Revision: https://reviews.llvm.org/D101936
The file was addedcompiler-rt/test/hwasan/TestCases/Linux/create-thread-stress.cpp
Commit 4433f4601e8a8e36ddd9bb6f6ed394bda353b828 by Austin.Kerbow
[AMDGPU] Fix extra waitcnt being added with BUFFER_INVL2

The waitcnt pass would increment the number of vmem events for some buffer
invalidates that were not handled by the pass.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D102252
The file was modifiedllvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/waitcnt-preexisting.mir (diff)
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h (diff)
The file was modifiedllvm/lib/Target/AMDGPU/BUFInstructions.td (diff)
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp (diff)
Commit ebdcebfcb4b522a81290f67dcbb7222ff7f9d052 by aorlov
Removed unnecessary introduction of semi-colons.
The file was modifiedllvm/include/llvm/DebugInfo/Symbolize/DIPrinter.h (diff)
Commit a9bbbaaa8810b22c9672694d576e3a0a210af54a by riddleriver
[mlir] Elide large elements attrs when printing Operations in diagnostics

Diagnostics are intended to be read by users, and in most cases displayed in a terminal. When not eliding huge element attributes, in some cases we end up dumping hundreds of megabytes(gigabytes) to the terminal (or logs), completely obfuscating the main diagnostic being shown.

Differential Revision: https://reviews.llvm.org/D102272
The file was modifiedmlir/lib/IR/Diagnostics.cpp (diff)
Commit 764ad3b3fafbf57ca916715625fffb7df5dbeb92 by rob.suderman
[mlir][tosa] Tosa elementwise broadcasting had some minor bugs

Updated tests to include broadcast of left and right. Includes
bypass if in-type and out-type match shape (no broadcasting).

Differential Revision: https://reviews.llvm.org/D102276
The file was modifiedmlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp (diff)
The file was modifiedmlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir (diff)
Commit 15565403722ec37d8b1a3ee8625ee2e8efcd96ee by nikita.ppv
[InstCombine] Clean up one-hot merge optimization (NFC)

Remove the requirement that the instruction is a BinaryOperator,
make the predicate check more compact and use slightly more
meaningful naming for the and operands.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp (diff)
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineInternal.h (diff)
Commit 3a64b7080d5033b3bd6f28fbac4a24d9490dc3c3 by evandro.menezes
[RISCV] Move instruction information into the RISCVII namespace (NFC)

Move instruction attributes into the `RISCVII` namespace and add associated helper functions.

Differential Revision: https://reviews.llvm.org/D102268
The file was modifiedllvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp (diff)
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.h (diff)
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp (diff)
The file was modifiedllvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp (diff)
The file was modifiedllvm/lib/Target/RISCV/RISCVMCInstLower.cpp (diff)
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp (diff)
The file was modifiedllvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp (diff)
The file was modifiedllvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h (diff)
Commit 489a3531a42fe97c7fa00255fc5e8d31a610492d by phosek
[llvm-cov] Support for v4 format in convert-for-testing

v4 moves function records to a dedicated section so we need to write
and read it separately.

https://reviews.llvm.org/D100535
The file was modifiedllvm/tools/llvm-cov/TestingSupport.cpp (diff)
The file was modifiedllvm/lib/ProfileData/Coverage/CoverageMappingReader.cpp (diff)
Commit d3f89d4d16883b2bcf5f032152f10e384b53d92a by congzhecao
Revert "[LoopInterchange] Fix legality for triangular loops"

This reverts commit 29342291d25b83da97e74d75004b177ba41114fc.

The test case requires an assert build. Will add REQUIRES and re-commit.
The file was modifiedllvm/lib/Transforms/Scalar/LoopInterchange.cpp (diff)
The file was removedllvm/test/Transforms/LoopInterchange/inner-indvar-depend-on-outer-indvar.ll
Commit 46475a79f85b230fde3e7de8966c96bef14f0d24 by wei.huang
[AIX][TLS] Diagnose use of unimplemented TLS models

Add front end diagnostics to report error for unimplemented TLS models set by
- compiler option `-ftls-model`
- attributes like `__thread int __attribute__((tls_model("local-exec"))) var_name;`

Reviewed by: aaron.ballman, nemanjai, PowerPC

Differential Revision: https://reviews.llvm.org/D102070
The file was addedclang/test/CodeGen/aix-tls-model.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td (diff)
The file was addedclang/test/Sema/aix-attr-tls_model.c
The file was modifiedclang/lib/Sema/SemaDeclAttr.cpp (diff)
The file was modifiedclang/include/clang/Basic/DiagnosticDriverKinds.td (diff)
The file was modifiedclang/lib/Frontend/CompilerInvocation.cpp (diff)
Commit cbcfca343f02876cef2b5ca3f27a037bab8fa90f by Lang Hames
[JITLink] Make LinkGraph debug dumps more readable.

This commit reorders some fields and fixes the width of others to try to
maintain more consistent columns. It also switches to long-hand scope
and linkage names, since LinkGraph dumps aren't read often enough for
single-character codes to be memorable.
The file was modifiedllvm/lib/ExecutionEngine/JITLink/JITLink.cpp (diff)
Commit 74a96b4c98434e328eeca0afc85dc7053133a7d2 by Lang Hames
[JITLink][x86-64] Add an x86_64 PointerSize constexpr.

This can be used in place of magic '8' values in generic x86-64 utilities.
The file was modifiedllvm/lib/ExecutionEngine/JITLink/x86_64.cpp (diff)
The file was modifiedllvm/include/llvm/ExecutionEngine/JITLink/x86_64.h (diff)
Commit a0162a81b1377331c3e0ebb58ac349b2ffd7b598 by Lang Hames
[JITLink][MachO/x86_64] Expose API for creating eh-frame fixing passes.

These can be used to create eh-frame section fixing passes outside the usual
linker pipeline, which can be useful for tests and tools that just want to
verify or dump graphs.
The file was modifiedllvm/lib/ExecutionEngine/JITLink/MachO_x86_64.cpp (diff)
The file was modifiedllvm/include/llvm/ExecutionEngine/JITLink/MachO_x86_64.h (diff)
Commit 8280ece0c972db24e51aae5074ca5433002f1071 by phosek
[Coverage] Support overriding compilation directory

When making compilation relocatable, for example in distributed
compilation scenarios, we want to set compilation dir to a relative
value like `.` but this presents a problem when generating reports
because if the file path is relative as well, for example `..`, you
may end up writing files outside of the output directory.

This change introduces a flag that allows overriding the compilation
directory that's stored inside the profile with a different value that
is absolute.

Differential Revision: https://reviews.llvm.org/D100232
The file was modifiedllvm/lib/ProfileData/Coverage/CoverageMapping.cpp (diff)
The file was modifiedllvm/lib/ProfileData/Coverage/CoverageMappingReader.cpp (diff)
The file was addedllvm/test/tools/llvm-cov/compilation_dir.c
The file was modifiedllvm/include/llvm/ProfileData/Coverage/CoverageMappingReader.h (diff)
The file was modifiedllvm/unittests/ProfileData/CoverageMappingTest.cpp (diff)
The file was modifiedllvm/include/llvm/ProfileData/Coverage/CoverageMapping.h (diff)
The file was addedllvm/test/tools/llvm-cov/Inputs/compilation_dir.proftext
The file was modifiedllvm/tools/llvm-cov/CodeCoverage.cpp (diff)
The file was addedllvm/test/tools/llvm-cov/Inputs/compilation_dir.covmapping
The file was modifiedllvm/tools/llvm-cov/CoverageViewOptions.h (diff)
Commit 40e3aa39bd68b554808ddcb096a63919f53f2e43 by congzhecao
[LoopInterchange] Fix legality for triangular loops

This is a bug fix in legality check.

When we encounter triangular loops such as the following form:
    for (int i = 0; i < m; i++)
      for (int j = 0; j < i; j++), or

    for (int i = 0; i < m; i++)
      for (int j = 0; j*i < n; j++),

we should not perform interchange since the number of executions
of the loop body will be different before and after interchange,
resulting in incorrect results.

Reviewed By: bmahjour

Differential Revision: https://reviews.llvm.org/D101305
The file was modifiedllvm/lib/Transforms/Scalar/LoopInterchange.cpp (diff)
The file was addedllvm/test/Transforms/LoopInterchange/inner-indvar-depend-on-outer-indvar.ll
Commit 5cb17728d19408725d4ced928ff3276dd4ffd1c9 by leonardchan
[clang][Fuchsia] Introduce compat multilibs

These are GCC-compatible multilibs that use the generic Itanium C++ ABI
instead of the Fuchsia C++ ABI.

Differential Revision: https://reviews.llvm.org/D102030
The file was addedclang/test/Driver/Inputs/basic_fuchsia_tree/lib/x86_64-unknown-fuchsia/compat/libc++.so
The file was modifiedclang/lib/Driver/ToolChains/Fuchsia.cpp (diff)
The file was modifiedclang/test/Driver/fuchsia.cpp (diff)
Commit d63860a05226d89f840a665134e2cb52c30ce4c4 by Lang Hames
[JITLink] Fix bogus format string.
The file was modifiedllvm/lib/ExecutionEngine/JITLink/JITLink.cpp (diff)
Commit fec2945998947f04d672e9c5f33b57f7177474c0 by rupprecht
Revert "[GVN] Clobber partially aliased loads."

This reverts commit 6c570442318e2d3b8b13e95c2f2f588d71491acb.

It causes assertion errors due to widening atomic loads, and potentially causes miscompile elsewhere too. Repro, also posted to D95543:

```
$ cat repro.ll
; ModuleID = 'repro.ll'
source_filename = "repro.ll"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.widget = type { i32 }
%struct.baz = type { i32, %struct.snork }
%struct.snork = type { %struct.spam }
%struct.spam = type { i32, i32 }

@global = external local_unnamed_addr global %struct.widget, align 4
@global.1 = external local_unnamed_addr global i8, align 1
@global.2 = external local_unnamed_addr global i32, align 4

define void @zot(%struct.baz* %arg) local_unnamed_addr align 2 {
bb:
  %tmp = getelementptr inbounds %struct.baz, %struct.baz* %arg, i64 0, i32 1
  %tmp1 = bitcast %struct.snork* %tmp to i64*
  %tmp2 = load i64, i64* %tmp1, align 4
  %tmp3 = getelementptr inbounds %struct.baz, %struct.baz* %arg, i64 0, i32 1, i32 0, i32 1
  %tmp4 = icmp ugt i64 %tmp2, 4294967295
  br label %bb5

bb5:                                              ; preds = %bb14, %bb
  %tmp6 = load i32, i32* %tmp3, align 4
  %tmp7 = icmp ne i32 %tmp6, 0
  %tmp8 = select i1 %tmp7, i1 %tmp4, i1 false
  %tmp9 = zext i1 %tmp8 to i8
  store i8 %tmp9, i8* @global.1, align 1
  %tmp10 = load i32, i32* @global.2, align 4
  switch i32 %tmp10, label %bb11 [
    i32 1, label %bb12
    i32 2, label %bb12
  ]

bb11:                                             ; preds = %bb5
  br label %bb14

bb12:                                             ; preds = %bb5, %bb5
  %tmp13 = load atomic i32, i32* getelementptr inbounds (%struct.widget, %struct.widget* @global, i64 0, i32 0) acquire, align 4
  br label %bb14

bb14:                                             ; preds = %bb12, %bb11
  br label %bb5
}
$ opt -O2 repro.ll -disable-output
opt: /home/rupprecht/src/llvm-project/llvm/lib/Transforms/Utils/VNCoercion.cpp:496: llvm::Value *llvm::VNCoercion::getLoadValueForLoad(llvm::LoadInst *, unsigned int, llvm::Type *, llvm::Instruction *, const llvm::DataLayout &): Assertion `SrcVal->isSimple() && "Cannot widen volatile/atomic load!"' failed.
PLEASE submit a bug report to https://bugs.llvm.org/ and include the crash backtrace.
Stack dump:
0.      Program arguments: /home/rupprecht/dev/opt -O2 repro.ll -disable-output
...
```
The file was modifiedllvm/include/llvm/Analysis/MemoryDependenceAnalysis.h (diff)
The file was modifiedllvm/lib/Analysis/MemoryDependenceAnalysis.cpp (diff)
The file was modifiedllvm/lib/Transforms/Scalar/GVN.cpp (diff)
The file was modifiedllvm/test/Transforms/GVN/PRE/rle.ll (diff)