SuccessChanges

Summary

  1. [Polly] Invalidate passes after Scop processing in NewPM. (details)
  2. [AMDGPU] Add llvm.amdgcn.wqm.demote intrinsic (details)
  3. [X86] Convert fmin/fmax _mm_reduce_* intrinsics to emit llvm.reduction intrinsics (PR47506) (details)
  4. [Polly] Regenerate isl-noexceptions.h. (details)
  5. [RISCV] Add i16 bswap and i8/i16 bitreverse tests to the Zbp tests. NFC (details)
Commit d09491895f8cd9fdc8ca4cdf45f30d4c2e3066a6 by llvm-project
[Polly] Invalidate passes after Scop processing in NewPM.

ScopDetection's DetectionContext holds AssertionVH for
RequiredInvariantLoads. An assertion is thrown if the handle's value is
erased and the ScopDetection is not yet invalidated. The ScopDetection
must remain valid durting the ScopPassManager. Enusure that all Scop
analyses are free'd when the ScopPass manager is done.

If IR generation has happened, also invalidate all other passes to avoid
possible issues because, like for the legacy pass manager, Polly does not
yet perfectly preserve them.
The file was modifiedpolly/include/polly/ScopPass.h (diff)
Commit aef781b47a5e3a82eb70a9c96595915fc7fe6cb3 by carl.ritson
[AMDGPU] Add llvm.amdgcn.wqm.demote intrinsic

Add intrinsic which demotes all active lanes to helper lanes.
This is used to implement demote to helper Vulkan extension.

In practice demoting a lane to helper simply means removing it
from the mask of live lanes used for WQM/WWM/Exact mode.
Where the shader does not use WQM, demotes just become kills.

Additionally add llvm.amdgcn.live.mask intrinsic to complement
demote operations. In theory llvm.amdgcn.ps.live can be used
to detect helper lanes; however, ps.live can be moved by LICM.
The movement of ps.live cannot be remedied without changing
its type signature and such a change would require ps.live
users to update as well.

Reviewed By: piotr

Differential Revision: https://reviews.llvm.org/D94747
The file was modifiedllvm/include/llvm/IR/IntrinsicsAMDGPU.td (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td (diff)
The file was modifiedllvm/lib/Target/AMDGPU/SILowerControlFlow.cpp (diff)
The file was addedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.demote.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp (diff)
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.live.mask.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp (diff)
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.wqm.demote.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIInstructions.td (diff)
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.demote.ll
Commit 61da20575d6c6bc72438bb3d169b4b2797e909e4 by pengfei.wang
[X86] Convert fmin/fmax _mm_reduce_* intrinsics to emit llvm.reduction intrinsics (PR47506)

This is a follow up of D92940.

We have successfully converted fadd/fmul _mm_reduce_* intrinsics to
llvm.reduction + reassoc flag. We can do the same approach for fmin/fmax
too, i.e. llvm.reduction + nnan flag.

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D93179
The file was modifiedclang/include/clang/Basic/BuiltinsX86.def (diff)
The file was modifiedclang/lib/Headers/avx512fintrin.h (diff)
The file was modifiedclang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c (diff)
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp (diff)
Commit ab0556bb208bb7598b13e6a629d936e1920d6c0b by llvm-project
[Polly] Regenerate isl-noexceptions.h.

Regenerate the C++ wrapper header from the current isl version's
headers.

The most notable change is that some dimension sizes are represented by
an isl_size (instead of unsigned), which is a signed int. Additionally,
some function may return -1 in case of an error which already had been
fixed in the past. The C++ may no return -1 instead of UINT_MAX which
caused the problems.

Some types in Polly had been changed from unsigned to isl_size
(that were not already auto) and some loops/comparision had to be
changed to avoid unsigned/signed comparison warnings.
The file was modifiedpolly/lib/Transform/FlattenAlgo.cpp (diff)
The file was modifiedpolly/lib/Analysis/DependenceInfo.cpp (diff)
The file was modifiedpolly/unittests/Isl/IslTest.cpp (diff)
The file was modifiedpolly/include/polly/Support/ISLTools.h (diff)
The file was modifiedpolly/lib/Support/ISLTools.cpp (diff)
The file was modifiedpolly/lib/Transform/ScheduleOptimizer.cpp (diff)
The file was modifiedpolly/lib/External/isl/include/isl/isl-noexceptions.h (diff)
The file was modifiedpolly/lib/Analysis/ScopBuilder.cpp (diff)
The file was modifiedpolly/lib/Analysis/ScopInfo.cpp (diff)
Commit e764e9e32c20914948787cc28996ecaab257628d by craig.topper
[RISCV] Add i16 bswap and i8/i16 bitreverse tests to the Zbp tests. NFC

Maybe we should use GREVI directly for these rather than
promoting and then shifting right.
The file was modifiedllvm/test/CodeGen/RISCV/rv64Zbp.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rv32Zbp.ll (diff)