Commit
5be314f79ba7db0dcd6ea94b8dfcf7f03d8da89c
by yuanke.luo[X86] Check immediate before get it.
For CMP imm instruction, when the operand 1 is symbol address we should check if it is immediate first. Here is the example code. `CMP64mi32 $noreg, 8, killed renamable $rcx, @d, $noreg, @a, implicit-def $eflags` Many thanks to Craig, Topper for the test case to reproduce this issue.
Differential Revision: https://reviews.llvm.org/D104037
|
 | llvm/lib/Target/X86/X86InstrInfo.cpp (diff) |
 | llvm/test/CodeGen/X86/unfoldMemoryOperand.mir |
|
 | llvm/lib/Target/ARM/ARMISelLowering.cpp (diff) |
 | llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp (diff) |
 | llvm/test/CodeGen/ARM/arm-vlddup-update.ll (diff) |
 | llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp (diff) |
 | llvm/lib/Target/ARM/ARMInstrNEON.td (diff) |
Commit
bf20631782183cd19e0bb7219e908c2bbb01a75f
by mizvekov[clang] Implement P2266 Simpler implicit move
This Implements [[http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2021/p2266r1.html|P2266 Simpler implicit move]].
Signed-off-by: Matheus Izvekov <mizvekov@gmail.com>
Reviewed By: Quuxplusone
Differential Revision: https://reviews.llvm.org/D99005
|
 | clang/test/CXX/drs/dr3xx.cpp (diff) |
 | clang/lib/Sema/SemaType.cpp (diff) |
 | clang/test/SemaCXX/warn-return-std-move.cpp (diff) |
 | clang/include/clang/Sema/Sema.h (diff) |
 | clang/lib/Sema/SemaExprCXX.cpp (diff) |
 | clang/test/CXX/dcl.dcl/dcl.spec/dcl.type/dcl.spec.auto/p7-cxx14.cpp (diff) |
 | clang/test/SemaCXX/return-stack-addr.cpp (diff) |
 | clang/test/CXX/expr/expr.prim/expr.prim.lambda/p4-cxx14.cpp (diff) |
 | clang/test/CXX/class/class.init/class.copy.elision/p3.cpp (diff) |
 | clang/test/SemaCXX/constant-expression-cxx14.cpp (diff) |
 | clang/test/SemaCXX/constant-expression-cxx11.cpp (diff) |
 | clang/test/CXX/temp/temp.decls/temp.mem/p5.cpp (diff) |
 | clang/lib/Sema/SemaStmt.cpp (diff) |
 | clang/test/SemaCXX/coroutines.cpp (diff) |
 | clang/lib/Sema/SemaCoroutine.cpp (diff) |
 | clang/test/SemaCXX/coroutine-rvo.cpp (diff) |
 | clang/test/SemaCXX/deduced-return-type-cxx14.cpp (diff) |
|
 | compiler-rt/lib/orc/wrapper_function_utils.h (diff) |
|
 | llvm/test/ExecutionEngine/JITLink/X86/MachO_cstring_section_splitting.s |
|
 | compiler-rt/lib/orc/unittests/simple_packed_serialization_test.cpp (diff) |
 | compiler-rt/lib/orc/unittests/wrapper_function_utils_test.cpp (diff) |
|
 | llvm/lib/Transforms/Vectorize/VPlanSLP.cpp (diff) |
|
 | llvm/lib/Transforms/IPO/ArgumentPromotion.cpp (diff) |
|
 | clang/include/clang/StaticAnalyzer/Checkers/SValExplainer.h (diff) |
|
 | llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp (diff) |
 | llvm/test/Transforms/InstCombine/intrinsics.ll (diff) |
Commit
7ff3a89a7b94193638cb13f8a0a1ef70094c8263
by markus.boeck02[clang][NFC] Add IsAnyDestructorNoReturn field to CXXRecord instead of calculating it on demand
This patch addresses a performance issue I noticed when using clang-12 to compile projects of mine. Even though the files weren't too large (around 1k cpp), the compiler was taking more than a minute to compile the source file, much longer than either GCC or MSVC.
Using a profiler it turned out the issue was the isAnyDestructorNoReturn function in CXXRecordDecl. In particular it being recursive, recalculating the property for every invocation, for every field and base class. This showed up in tracebacks in the profiler.
This patch instead adds IsAnyDestructorNoReturn as a Field to the data inside of CXXRecord and updates when a new base class, destructor, or record field member is added.
After this patch the problematic file of mine went from a compile time of 81s, down to 12s.
The patch itself should not change any functionality, just improve performance.
Differential Revision: https://reviews.llvm.org/D104182
|
 | clang/lib/AST/DeclCXX.cpp (diff) |
 | clang/include/clang/AST/CXXRecordDeclDefinitionBits.def (diff) |
 | clang/include/clang/AST/DeclCXX.h (diff) |
Commit
bee2f618d599201aa0c91d0322f058cc697e0779
by david.green[ARM] Introduce t2WhileLoopStartTP
This adds t2WhileLoopStartTP, similar to the t2DoLoopStartTP added in D90591. It keeps a reference to both the tripcount register and the element count register, so that the ARMLowOverheadLoops pass in the backend can pick the correct one without having to search for it from the operand of a VCTP.
Differential Revision: https://reviews.llvm.org/D103236
|
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/wls-search-pred.mir (diff) |
 | llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp (diff) |
 | llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp (diff) |
 | llvm/lib/Target/ARM/MVETailPredUtils.h (diff) |
 | llvm/lib/Target/ARM/ARMInstrThumb2.td (diff) |
 | llvm/lib/Target/ARM/ARMBaseInstrInfo.h (diff) |
 | llvm/lib/Target/ARM/ARMBlockPlacement.cpp (diff) |
 | llvm/test/CodeGen/Thumb2/mve-gather-scatter-optimisation.ll (diff) |
 | llvm/test/CodeGen/Thumb2/mve-memtp-loop.ll (diff) |
 | llvm/lib/Target/ARM/MVETPAndVPTOptimisationsPass.cpp (diff) |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/memcall.ll (diff) |
|
 | llvm/lib/Transforms/Scalar/LoopUnrollAndJamPass.cpp (diff) |
|
 | llvm/lib/Transforms/Scalar/GVN.cpp (diff) |