Started 1 yr 0 mo ago
Took 2 hr 52 min

Build clang-d399950-g320832cc9b7e-t24225-b24225.tar.gz (Sep 25, 2021 5:43:15 PM)

Issues

No known issues detected

Build Log

Changes
  1. [RISCV] Fix incorrect operand type of inst alias for InstR4 (details)
  2. [TTI] getUserCost - Ensure a vector insert/extract index is in unsigned 32-bit range (details)
  3. tsan: uninline RacyStacks::operator== (details)
  4. [ARM] Fix Arm block placement creating branches after jump tables. (details)
  5. [MLIR] Add functionality to remove redundant local variables (details)
  6. [DAG] combineShiftToMULH - move getValueType() inside assert. NFCI. (details)
  7. [IR] DIBuilder::createEnumerator - pass APSInt by const reference (details)
  8. [CMake] Consistently use the LibXml2::LibXml2 target instead of LIBXML2_LIBRARIES (details)
  9. [InstCombine] Ensure shifts are in range for (X << C1) / C2 -> X fold. (details)
  10. [fir] Add desc to fir.array_load op and update operand name (details)
  11. [lldb] Convert misc. StringConvert uses (details)
  12. [X86] combineShiftToPMULH - relax from ISA from SSE41 to SSE2 (details)
  13. [X86] X86FastISel::fastMaterializeConstant - break if-else chain to fix llvm-else-after-return warning. NFCI (details)
  14. [X86][SSE] combineMulToPMADDWD - enable sext(v8i16) -> zext(v8i16) fold on pre-SSE41 targets (details)
  15. [Mips] Remove redundant declarations (NFC) (details)
  16. [X86][SSE] combineMulToPMADDWD - enable sext(v8i16) -> zext(v8i16) fold on sub-128 bit vectors (details)
  17. [X86][SSE] combineMulToPMADDWD - mask off upper bits of sign-extended vXi32 constants (details)
  18. [CostModel][X86] Adjust vXi32 multiply costs if it can be performed using PMADDWD (details)
  19. [clang-format] Left/Right alignment fixer can cause false positive replacements when they don't actually change anything (details)
  20. [DAG] ReduceLoadOpStoreWidth - replace getABITypeAlign with allowsMemoryAccess (PR45116) (details)
  21. [ORC] Introduce EPCGenericRTDyldMemoryManager. (details)
  22. [lli] Add ChildTarget dependence on OrcTargetProcess library. (details)
  23. Revert "[ORC] Introduce EPCGenericRTDyldMemoryManager." (details)
  24. [ELF][test] Improve test coverage (details)
  25. [ORC-RT] ExecutorAddrDiff ergonomic improvements; contains and overlaps methods (details)
  26. [BasicAA] Don't consider Argument as escape source (NFCI) (details)
  27. [DSE] Make capture check more precise (details)
  28. [AA] Move earliest escape tracking from DSE to AA (details)
  29. [ELF] Default gotBaseSymInGotPlt to false (NFC for most architectures) (details)
  30. [ELF] Replace noneRel = R_*_NONE with static constexpr. NFC (details)
  31. [ELF] Remove unneeded binding parameter from addOptionalRegular. NFC (details)
  32. [ORC] Fix uninitialized variable. (details)
  33. [ORC] Wait for handleDisconnect to complete in SimpleRemoteEPC::disconnect. (details)

Started by upstream project relay-test-suite-verify-machineinstrs build number 10761
originally caused by:

This run spent:

  • 2 hr 38 min waiting;
  • 2 hr 52 min build duration;
  • 2 hr 52 min total from scheduled to completion.
Revision: fbdda46df1702d87909e66856796ffaefb5c0b41
Repository: https://github.com/llvm/llvm-zorg.git
  • refs/remotes/origin/main
Revision: 320832cc9b7e7fea5fc8afbed75c34c4a43287ba
Repository: http://labmaster3.local/git/llvm-project.git
  • detached
Revision: b4db71089b2ab669e4071dc6cdc3c60959ddc1d5
Repository: https://github.com/llvm/llvm-lnt.git
  • refs/remotes/origin/main
Revision: b983131b7e46d34f0eb2be399baf6c2e48d5734c
Repository: https://github.com/llvm/llvm-test-suite.git
  • refs/remotes/origin/main