Changes

Changes from Git (git http://labmaster3.local/git/llvm-project.git)

Summary

  1. [WebAssembly] Add prototype relaxed SIMD fma/fms instructions (details)
  2. [lldb] [gdb-remote] Refactor getting remote regs to use local vector (details)
  3. [lldb] [gdb-remote] Use local regnos for value_regs/invalidate_regs (details)
  4. Revert "Diagnose -Wunused-value based on CFG reachability" (details)
  5. [x86] move combiner state check into convertIntLogicToFPLogic(); NFC (details)
  6. [x86] add AVX512 run for fcmp+logic ops; NFC (details)
  7. [RISCV] Add more tests for (and (srl x, C2), C1) that can be improved by using a pair of shifts. NFC (details)
  8. [RISCV] Add more isel optimizations for (and (shr x, c2), c1). (details)
  9. [AArch64] Update some sve-fixed-length test checks. (details)
  10. [clang-format] Add Left/Right Const fixer capability (details)
  11. [gn build] Port a44ab1702539 (details)
  12. [InlineAdvisor] Use one single quote (details)
  13. [ORC] Minor renaming and typo fixes (NFC) (details)
  14. [llvm] Replace tab with spaces in one test (details)
  15. [llvm] Fix a copy-pasto (details)
  16. [ORC][examples] Export exectuable symbols explicitly in LLJITWithExecutorProcessControl (details)
  17. [mlir][sparse] Moved a conditional from the RT library to the generated MLIR. (details)
  18. [lldb] Show fix-it applied even if expression didn't evaluate succesfully (details)
  19. [flang] Represent (parentheses around derived types) (details)
  20. [Polly] Remove -polly-opt-fusion option. (details)
  21. Support: Add closing namespace comment in raw_ostream_test.cpp, NFC (details)
  22. Revert "[Polly] Implement user-directed loop distribution/fission." (details)
  23. [clang-format] NFC ensure Penality variable is passed back with Fixes (details)
  24. [clangd] Support `#pragma mark` in the outline (details)
  25. [CMake] Pass llvm-readelf to CMake external builds (details)
  26. [RISCV] Add more tests for (and (shl x, C2), C1) that can be improved by using a pair of shifts. NFC (details)
  27. [RISCV] Add another isel optimization for (and (shl x, c2), c1) (details)
  28. RegAllocGreedy: Remove an unhelpful auto, and don't use a reference (details)
  29. [OpenMP] Fix data-race in new device RTL (details)
  30. [lldb] Handle malformed qfThreadInfo reply (details)
  31. [profile][fuchsia] Don't include extra NUL in log messages (details)
  32. [AMDGPU] Propagate defining src reg for AGPR to AGPR Copys (details)
  33. [libc++][NFC] Refactor the std::reverse_view tests (details)
  34. [ORC] Fix file header. (details)
  35. Revert "[compiler-rt][profile] Add padding after binary IDs" (details)
  36. [CSSPGO] Do not pass -fpseudo-probe-for-profiling to the linker. (details)
  37. [RISCV] Limit transformAddImmMulImm to prevent an infinite loop. (details)
  38. [NFC] Refactor tests to improve readability. (details)
  39. Fix -fno-unwind-tables -fasynchronous-unwind-tables to emit unwind tables (details)
  40. [clang-format] Fix unittest failures with -Werror (details)
  41. [ORC] Shut down services in SimpleRemoteEPCServer. (details)
  42. [compiler-rt][profile] Make corrupted-profile.c more robust (details)
  43. [ThinLTO] Don't emit original GUID for locals to distributed indexes (details)
  44. [ThinLTO] Fix bot failures (details)
  45. [mlir][linalg] Merge all tiling passes into a single one. (details)
  46. [mlir][linalg] Support tile+peel with TiledLoopOp (details)
  47. Add missing storageType to AttrDef to ODS (details)
  48. [Polly] Implement user-directed loop distribution/fission. (details)
  49. [Driver] Default Generic_GCC x86 to -fasynchronous-unwind-tables (details)
  50. [AMDGPU] Legalize initialized LDS variables (details)
  51. DebugInfo: Implement the -gsimple-template-names functionality (details)
  52. [ORC] Introduce EPCGenericDylibManager / SimpleExecutorDylibManager. (details)
  53. [gn build] Port a2c1cf09dfaa (details)
  54. [TableGen] Allow targets to entirely ignore Psets for registers (details)
  55. [Sanitizers] intercept ttyent api on FreeBSD. (details)
  56. [docs] Document the --print-passes flag in opt. (details)
  57. [ORC] Rename ExecutorAddress to ExecutorAddr. (details)
  58. Remove non-portable directory separator from test (details)
  59. DebugInfo: STN: Handle unreconstitutable types in function types (details)
  60. Fix that same path separator issue again... (details)
  61. [PowerPC] SemaChecking for darn family of builtins (details)
  62. [ORC-RT] Rename ExecutorAddress to ExecutorAddr. (details)
  63. [AArch64][GlobalISel] Fix crash in the extend(extract_vector_elt) optimization. (details)
  64. [clang-offload-bundler][docs][NFC] invalid indentation cause build issue (details)
Commit 2f519825ba56cc2377ef9fbf1514944215ed9d0d by tlively
[WebAssembly] Add prototype relaxed SIMD fma/fms instructions

Add experimental clang builtins, LLVM intrinsics, and backend definitions for
the new {f32x4,f64x2}.{fma,fms} instructions in the relaxed SIMD proposal:
https://github.com/WebAssembly/relaxed-simd/blob/main/proposals/relaxed-simd/Overview.md.
Do not allow these instructions to be selected without explicit user opt-in.

Differential Revision: https://reviews.llvm.org/D110295
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
The file was modifiedllvm/test/MC/WebAssembly/simd-encodings.s
The file was modifiedclang/test/CodeGen/builtins-wasm.c
The file was modifiedllvm/include/llvm/IR/IntrinsicsWebAssembly.td
The file was modifiedclang/include/clang/Basic/BuiltinsWebAssembly.def
The file was modifiedllvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
Commit fa456505b80b0cf83647a1b26713e4d3b38eccc2 by mgorny
[lldb] [gdb-remote] Refactor getting remote regs to use local vector

Refactor remote register getters to collect them into a local
std::vector rather than adding them straight into DynamicRegisterInfo.
The purpose of this change is to lay groundwork for switching value_regs
and invalidate_regs to use local LLDB register numbers rather than
remote numbers.

Differential Revision: https://reviews.llvm.org/D110025
The file was modifiedlldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
The file was modifiedlldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
Commit cc3c788ad23636d16f1db2ae859315628783b0e8 by mgorny
[lldb] [gdb-remote] Use local regnos for value_regs/invalidate_regs

Switch the gdb-remote client logic to use local (LLDB) register numbers
in value_regs/invalidate_regs rather than remote regnos. This involves
translating regnos received from lldb-server.

Differential Revision: https://reviews.llvm.org/D110027
The file was modifiedlldb/source/Plugins/Process/Utility/DynamicRegisterInfo.cpp
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.cpp
The file was modifiedlldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
Commit 59337263ab45d7657ee901eb5525a21967c46265 by Yuanfang Chen
Revert "Diagnose -Wunused-value based on CFG reachability"

This reverts commit cbbf2e8c8ae7730ff0121f4868de4a7d188feb65.
It seems causing diagnoses in SFINAE context.
The file was modifiedclang/test/SemaCXX/overloaded-operator.cpp
The file was modifiedclang/test/CXX/basic/basic.link/p8.cpp
The file was modifiedclang/lib/Sema/SemaExpr.cpp
The file was modifiedclang/test/Sema/warn-type-safety.c
The file was modifiedclang/test/Parser/objc-messaging-1.m
The file was modifiedclang/test/Sema/exprs.c
The file was modifiedclang/test/SemaCXX/builtin-constant-p.cpp
The file was modifiedclang/test/SemaCXX/expression-traits.cpp
The file was modifiedclang/test/CXX/drs/dr20xx.cpp
The file was modifiedclang/test/Parser/cxx0x-ambig.cpp
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/test/Analysis/dead-stores.c
The file was modifiedclang/test/CXX/temp/temp.constr/temp.constr.constr/partial-specializations.cpp
The file was modifiedclang/test/Parser/objc-try-catch-1.m
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was modifiedclang/test/PCH/cxx-explicit-specifier.cpp
The file was modifiedclang/test/SemaCXX/constant-expression.cpp
The file was modifiedclang/test/Sema/vla-2.c
The file was modifiedclang/lib/Sema/SemaExprCXX.cpp
The file was modifiedclang/test/SemaCXX/vector.cpp
The file was modifiedclang/test/SemaCXX/matrix-type-operators.cpp
The file was modifiedclang/test/Sema/warn-unused-value.c
The file was modifiedclang/test/SemaCXX/attr-annotate.cpp
The file was modifiedclang/test/CXX/drs/dr7xx.cpp
The file was modifiedclang/test/SemaCXX/constant-expression-cxx2a.cpp
The file was modifiedclang/test/SemaCXX/warn-comma-operator.cpp
The file was modifiedclang/test/SemaTemplate/derived.cpp
The file was modifiedclang/test/Sema/i-c-e.c
The file was modifiedclang/test/SemaCXX/sizeless-1.cpp
The file was modifiedclang/test/SemaCXX/warn-unused-value.cpp
The file was modifiedclang/test/Frontend/fixed_point_crash.c
The file was modifiedclang/test/CodeCompletion/pragma-macro-token-caching.c
The file was modifiedclang/test/CXX/drs/dr14xx.cpp
The file was modifiedclang/test/Sema/const-eval.c
The file was modifiedclang/lib/Sema/SemaStmt.cpp
The file was modifiedclang/test/Parser/cxx-ambig-decl-expr.cpp
The file was modifiedclang/test/Sema/sizeless-1.c
The file was modifiedclang/test/Sema/switch-1.c
The file was modifiedclang/test/Parser/cxx1z-init-statement.cpp
The file was modifiedclang/test/SemaTemplate/lambda-capture-pack.cpp
The file was modifiedclang/test/Parser/objcxx11-attributes.mm
Commit 74ba4b769ad9a5d7ba381ebc80fa8ced7d658451 by spatel
[x86] move combiner state check into convertIntLogicToFPLogic(); NFC

This function can be adapted to solve bugs like PR51245,
but it could require differentiating the combiner timing
between the existing and new transforms.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 5188e2c9ce1fb33600270243bbc32b4b108f1019 by spatel
[x86] add AVX512 run for fcmp+logic ops; NFC

Suggested in D110342
The file was modifiedllvm/test/CodeGen/X86/fcmp-logic.ll
Commit 19734ae6f05498a75d4bb3960be06f5d704f8528 by craig.topper
[RISCV] Add more tests for (and (srl x, C2), C1) that can be improved by using a pair of shifts. NFC

These tests have C1 as a shifted mask having C2 leading zeros and some
number of trailing zeros, C3. We can select this as
(slli (srli x, C2+C3), C3) or (slli (srliw x, C2+C3), C3).
The file was addedllvm/test/CodeGen/RISCV/shift-and.ll
Commit 4a69551d663e42453c3ad5ab799326fe2ddc9657 by craig.topper
[RISCV] Add more isel optimizations for (and (shr x, c2), c1).

Turn (and (shr x, c2), c1) -> (slli (srli x, c2+c3), c3) if c1 is a
shifted mask with c2 leading zeros and c3 trailing zeros.

When the leading zeros is C2+32 we can use SRLIW in place of SRLI.
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
The file was modifiedllvm/test/CodeGen/RISCV/shift-and.ll
Commit 52272f294ffc28691ec3d77582c3678273d25411 by david.green
[AArch64] Update some sve-fixed-length test checks.

Some of these test show very poor code generation. Updating the tests
to make the tests more maintainable and prevent problems from being
hidden behind badly written test checks. Also in some of them the check
lines were using incorrect prefixes.

These are not-quite auto-generated. They are generated with the normal
update scripts and then uninteresting checks are removed, which at least
makes the test _more_ maintainable without materially changing what they
are testing.

I have otherwise attempted to not alter what is tested.
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-vector-shuffle.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-fp-select.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-fp-extend-trunc.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-fp-vselect.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-int-vselect.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-int-mulh.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-insert-vector-elt.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-float-compares.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-masked-stores.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-masked-scatter.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-int-to-fp.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-masked-loads.ll
Commit a44ab1702539c9ef3aea292e23cfbff17897bdbd by mydeveloperday
[clang-format] Add Left/Right Const fixer capability

Developers these days seem to argue over east vs west const like they used to argue over tabs vs whitespace or the various bracing style. These previous arguments were mainly eliminated with tools like `clang-format` that allowed those rules to become part of your style guide. Anyone who has been using clang-format in a large team over the last couple of years knows that we don't have those religious arguments any more, and code reviews are more productive.

https://www.youtube.com/watch?v=fv--IKZFVO8
https://mariusbancila.ro/blog/2018/11/23/join-the-east-const-revolution/
https://www.youtube.com/watch?v=z6s6bacI424

The purpose of this revision is to try to do the same for the East/West const discussion. Move the debate into the style guide and leave it there!

In addition to the new `ConstStyle: Right` or `ConstStyle: Left` there is an additional command-line argument `--const-style=left/right` which would allow an individual developer to switch the source back and forth to their own style for editing, and back to the committed style before commit. (you could imagine an IDE might offer such a switch)

The revision works by implementing a separate pass of the Annotated lines much like the SortIncludes and then create replacements for constant type declarations.

Differential Revision: https://reviews.llvm.org/D69764
The file was modifiedclang/lib/Format/CMakeLists.txt
The file was modifiedclang/include/clang/Format/Format.h
The file was modifiedclang/tools/clang-format/ClangFormat.cpp
The file was addedclang/unittests/Format/QualifierFixerTest.cpp
The file was modifiedclang/docs/ClangFormatStyleOptions.rst
The file was modifiedclang/docs/ReleaseNotes.rst
The file was addedclang/lib/Format/QualifierAlignmentFixer.cpp
The file was modifiedclang/unittests/Format/FormatTest.cpp
The file was addedclang/lib/Format/QualifierAlignmentFixer.h
The file was modifiedclang/docs/tools/dump_format_style.py
The file was modifiedclang/lib/Format/Format.cpp
The file was modifiedclang/unittests/Format/CMakeLists.txt
Commit 1aed7fcf09ee11443c3e05f2ec3bd62a946dfdd9 by llvmgnsyncbot
[gn build] Port a44ab1702539
The file was modifiedllvm/utils/gn/secondary/clang/lib/Format/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/clang/unittests/Format/BUILD.gn
Commit 0bb767e7db4401fc578f1be55db1d4038921d94b by i
[InlineAdvisor] Use one single quote
The file was modifiedllvm/lib/Analysis/InlineAdvisor.cpp
Commit 767b328e506ef069ecbb89b7cc9e2da7f8f84c6c by Stefan Gränitz
[ORC] Minor renaming and typo fixes (NFC)

Two typos, one unsused include and some leftovers from the TargetProcessControl -> ExecutorProcessControl renaming

Reviewed By: xgupta

Differential Revision: https://reviews.llvm.org/D110260
The file was addedllvm/examples/OrcV2Examples/LLJITWithExecutorProcessControl/LLJITWithExecutorProcessControl.cpp
The file was removedllvm/examples/OrcV2Examples/LLJITWithTargetProcessControl/LLJITWithTargetProcessControl.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h
The file was addedllvm/examples/OrcV2Examples/LLJITWithExecutorProcessControl/CMakeLists.txt
The file was removedllvm/examples/OrcV2Examples/LLJITWithTargetProcessControl/CMakeLists.txt
The file was modifiedllvm/examples/OrcV2Examples/CMakeLists.txt
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/SimpleRemoteEPC.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/Shared/SimpleRemoteEPCUtils.cpp
The file was modifiedclang/docs/ClangFormattedStatus.rst
Commit 4450cf985f0cfc94f8621261208f583d721bd693 by thakis
[llvm] Replace tab with spaces in one test

Also use just one space after comma. Now grepping for ', offset '
in llvm/test actually finds the test for `offset`.

No behavior change.
The file was modifiedllvm/test/MC/X86/pr32530.s
Commit 3fa43da7a3b46169b731dfca2bf3d41e85d3769d by thakis
[llvm] Fix a copy-pasto

We should use IMAGE_REL_I386_SECREL in the i386 section of this file.

IMAGE_REL_I386_SECREL and IMAGE_REL_AMD64_SECREL have the same
numeric value 0xB, so this doesn't change behavior.
The file was modifiedllvm/lib/Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp
Commit 1286bbc85f421dbdcab430674783bde17b15ba0d by Stefan Gränitz
[ORC][examples] Export exectuable symbols explicitly in LLJITWithExecutorProcessControl

Functions in static code that should be callable from JITed code must be exported. For dynamic libraries extern functions are exported by default. For exectuables, linkers usually strip them away unless we explicitly ask for keeping them.

Reviewed By: xgupta

Differential Revision: https://reviews.llvm.org/D110345
The file was modifiedllvm/examples/OrcV2Examples/LLJITWithExecutorProcessControl/CMakeLists.txt
Commit 221856f5cd13a877543ea6c5418330c1ee7fd715 by 2998727+wrengr
[mlir][sparse] Moved a conditional from the RT library to the generated MLIR.

When generating code to add an element to SparseTensorCOO (e.g., when doing dense=>sparse conversion), we used to check for nonzero values on the runtime side, whereas now we generate MLIR code to do that check.

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D110121
The file was modifiedmlir/lib/Dialect/SparseTensor/Transforms/SparseTensorPasses.cpp
The file was modifiedmlir/lib/Dialect/SparseTensor/Transforms/SparseTensorConversion.cpp
The file was modifiedmlir/lib/ExecutionEngine/SparseUtils.cpp
Commit fbaf36721783c3bcbd45f81294e6980eaef165e4 by augusto2112
[lldb] Show fix-it applied even if expression didn't evaluate succesfully

If we applied a fix-it before evaluating an expression and that
expression didn't evaluate correctly, we should still tell users about
the fix-it we applied since that may be the reason why it didn't work
correctly.

Differential Revision: https://reviews.llvm.org/D109908
The file was modifiedlldb/test/API/commands/expression/fixits/TestFixIts.py
The file was modifiedlldb/test/API/commands/expression/fixits/main.cpp
The file was modifiedlldb/source/Commands/CommandObjectExpression.cpp
Commit f6ecea1a35758bbb504bc8d6f5dccf353ea1355b by pklausler
[flang] Represent (parentheses around derived types)

The strongly typed expression representation classes supported
a representation of parentheses only around intrinsic types
with specific kinds.  Parentheses around derived type variables
must also be preserved so that expressions may be distinguished
from variables; this distinction matters for actual arguments &
construct associations.

Differential Revision: https://reviews.llvm.org/D110355
The file was modifiedflang/include/flang/Evaluate/expression.h
The file was modifiedflang/lib/Evaluate/expression.cpp
The file was modifiedflang/lib/Evaluate/tools.cpp
The file was addedflang/test/Evaluate/expr01.f90
Commit 07e7cb9433daa80e7a8b418cb334c663abe68202 by llvm-project
[Polly] Remove -polly-opt-fusion option.

The name of the option is misleading and has been renamed by isl to
"serialize-sccs". Instead of also renaming the option, remove it.
The option is still accessible using

    -polly-isl-arg=--no-schedule-serialize-sccs
The file was modifiedpolly/lib/Transform/ScheduleOptimizer.cpp
The file was modifiedpolly/lib/CodeGen/PPCGCodeGeneration.cpp
The file was modifiedpolly/test/ScheduleOptimizer/computeout.ll
The file was modifiedpolly/test/ScheduleOptimizer/tile_after_fusion.ll
The file was modifiedpolly/lib/Analysis/ScopInfo.cpp
Commit c7b1279a38286194b2f781c821e6eeaa6dd010cf by Duncan P. N. Exon Smith
Support: Add closing namespace comment in raw_ostream_test.cpp, NFC

The closing namespace comment prevents clang-format from dropping a
blank line after the final test. Also add in a blank line (which
simplifies merging/rebasing/etc. WIP patches).
The file was modifiedllvm/unittests/Support/raw_ostream_test.cpp
Commit c7bcd72a38bcf99e03e4651ed5204d1a1f2bf695 by phosek
Revert "[Polly] Implement user-directed loop distribution/fission."

This reverts commit 52c30adc7dfe6334b71adf256d81f70e7b976143 which
breaks the build when NDEBUG is defined.
The file was modifiedpolly/lib/Transform/ManualOptimizer.cpp
The file was removedpolly/test/ScheduleOptimizer/ManualOptimization/distribute_heuristic.ll
The file was modifiedpolly/include/polly/ScheduleTreeTransform.h
The file was modifiedpolly/lib/Transform/ScheduleTreeTransform.cpp
The file was removedpolly/test/ScheduleOptimizer/ManualOptimization/distribute_illegal_looploc.ll
The file was removedpolly/test/ScheduleOptimizer/ManualOptimization/distribute_illegal_pragmaloc.ll
The file was modifiedpolly/include/polly/DependenceInfo.h
The file was modifiedpolly/include/polly/ManualOptimizer.h
The file was modifiedpolly/lib/Analysis/DependenceInfo.cpp
The file was modifiedpolly/lib/Transform/ScheduleOptimizer.cpp
Commit 5fcde57b73fbc068c51f55a80894a6ef208d4afd by mydeveloperday
[clang-format] NFC ensure Penality variable is passed back with Fixes

Fix set but not used warning
The file was modifiedclang/lib/Format/QualifierAlignmentFixer.cpp
Commit d75fb1ee794e94a011e88739df84c359c987a65b by davg
[clangd] Support `#pragma mark` in the outline

Xcode uses `#pragma mark -` to draw a divider in the outline view
and `#pragma mark Note` to add `Note` in the outline view. For more
information, see https://nshipster.com/pragma/.

Since the LSP spec doesn't contain dividers for the symbol outline,
instead we treat `#pragma mark -` as a group with children - the
decls that come after it, implicitly terminating when the symbol's
parent ends.

The following code:

```
@implementation MyClass

- (id)init {}

- (int)foo;
@end
```

Would give an outline like

```
MyClass
        > Overrides
                    > init
        > Public Accessors
                    > foo
```

Differential Revision: https://reviews.llvm.org/D105904
The file was modifiedclang-tools-extra/clangd/unittests/ParsedASTTests.cpp
The file was modifiedclang-tools-extra/clangd/ParsedAST.h
The file was modifiedclang-tools-extra/clangd/Preamble.cpp
The file was modifiedclang-tools-extra/clangd/SourceCode.cpp
The file was modifiedclang/include/clang/Lex/PPCallbacks.h
The file was modifiedclang-tools-extra/clangd/CollectMacros.h
The file was modifiedclang-tools-extra/clangd/CollectMacros.cpp
The file was modifiedclang-tools-extra/clangd/Preamble.h
The file was modifiedclang-tools-extra/clangd/unittests/FindSymbolsTests.cpp
The file was modifiedclang-tools-extra/clangd/FindSymbols.cpp
The file was modifiedclang-tools-extra/clangd/ParsedAST.cpp
The file was modifiedclang-tools-extra/clangd/SourceCode.h
Commit 093245ed9ee495146b3478447473ad21ae237cb1 by phosek
[CMake] Pass llvm-readelf to CMake external builds

This matches other LLVM binary tools.

Differential Revision: https://reviews.llvm.org/D110313
The file was modifiedllvm/cmake/modules/LLVMExternalProjectUtils.cmake
Commit 8811227a0c0ac398857988b4fce0fb4dc699468b by craig.topper
[RISCV] Add more tests for (and (shl x, C2), C1) that can be improved by using a pair of shifts. NFC

These tests have C1 as a shifted mask having no leading zeros and
C3 trailing zeros. If C3 is more than C2, we can select this as
(slli (srli x, C3-C2), C3).
The file was modifiedllvm/test/CodeGen/RISCV/shift-and.ll
Commit 70f50114f37e86bd4869a75b1a8313440bd55780 by craig.topper
[RISCV] Add another isel optimization for (and (shl x, c2), c1)

Turn (and (shl x, c2), c1) -> (slli (srli x, c3-c2), c3) if c1 is a
shifted mask with no leading zeros and c3 trailing zeros where c3
is greater than c2.
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
The file was modifiedllvm/test/CodeGen/RISCV/shift-and.ll
Commit 2875d3d484bb82dcd7f44bccafda8a52aacc328d by arsenm2
RegAllocGreedy: Remove an unhelpful auto, and don't use a reference
The file was modifiedllvm/lib/CodeGen/RegAllocGreedy.cpp
Commit d83ca624a1d52b600ddbd8bfcbb3d5d7c6003af7 by jhuber6
[OpenMP] Fix data-race in new device RTL

This patch fixes a data-race observed when using the new device runtime
library. The Internal control variable for the parallel level is read in
the `__kmpc_parallel_51` function while it could potentially be written
by other threads. This causes data corruption and will cause
nondetermistic behaviour in the runtime. This patch fixes this by adding
an explicit synchronization before the region starts.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D110366
The file was modifiedopenmp/libomptarget/DeviceRTL/src/Parallelism.cpp
Commit 953ddded1aa2b459a939e0f1649691c9086ba416 by tedwood
[lldb] Handle malformed qfThreadInfo reply

If the remote gdbserver's qfThreadInfo reply has a trailing comma,
GDBRemoteCommunicationClient::GetCurrentProcessAndThreadIDs will return
an empty vector of thread ids. This will cause lldb to recurse through
three functions trying to get the list of threads, until it blows its
stack and crashes.

A trailing comma is a malformed response, but it shouldn't cause lldb to
crash. This patch will return the tids received before the malformed
response.

Reviewed By: clayborg, labath

Differential Revision: https://reviews.llvm.org/D109937
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
The file was addedlldb/test/API/functionalities/gdb_remote_client/TestThreadInfoTrailingComma.py
Commit 80b92db02c5aec4e92b2df1492e8268a3239de26 by mcgrathr
[profile][fuchsia] Don't include extra NUL in log messages

Reviewed By: phosek

Differential Revision: https://reviews.llvm.org/D110361
The file was modifiedcompiler-rt/lib/profile/InstrProfilingPlatformFuchsia.c
Commit 1443ba6163d66743ff9f9d28b0505fca159b824c by Vang.Thao
[AMDGPU] Propagate defining src reg for AGPR to AGPR Copys

On targets that do not support AGPR to AGPR copying directly, try to find the
defining accvgpr_write and propagate its source vgpr register to the copies
before register allocation so the source vgpr register does not get clobbered.

The postrapseudos pass also attempt to propagate the defining accvgpr_write but
if the register to propagate is clobbered, it will give up and create new
temporary vgpr registers instead.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D108830
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll
The file was addedllvm/test/CodeGen/AMDGPU/agpr-to-agpr-copy.mir
The file was modifiedllvm/lib/Target/AMDGPU/GCNPreRAOptimizations.cpp
Commit a6406ce18cb6d42265ce854f133545e049dc0d05 by Louis Dionne
[libc++][NFC] Refactor the std::reverse_view tests

Mostly, remove the global assumption that all ranges have size 8.
I should have called this out during the initial review.
The file was modifiedlibcxx/test/std/ranges/range.adaptors/range.reverse/begin.pass.cpp
The file was modifiedlibcxx/test/std/ranges/range.adaptors/range.reverse/types.h
The file was modifiedlibcxx/test/std/ranges/range.adaptors/range.reverse/size.pass.cpp
The file was modifiedlibcxx/test/std/ranges/range.adaptors/range.reverse/ctor.view.pass.cpp
The file was modifiedlibcxx/test/std/ranges/range.adaptors/range.reverse/ctor.default.pass.cpp
The file was modifiedlibcxx/test/std/ranges/range.adaptors/range.reverse/end.pass.cpp
The file was removedlibcxx/test/std/ranges/range.adaptors/range.reverse/ctad.compile.pass.cpp
The file was modifiedlibcxx/test/std/ranges/range.adaptors/range.reverse/base.pass.cpp
The file was addedlibcxx/test/std/ranges/range.adaptors/range.reverse/ctad.pass.cpp
Commit 2ce73f13c98ad3bfb904ac991f5810ddff9e77e7 by Lang Hames
[ORC] Fix file header.
The file was modifiedllvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleExecutorMemoryManager.cpp
Commit eb115aa6c841c4a7fcd1e1ce4423955135c2ae51 by leonardchan
Revert "[compiler-rt][profile] Add padding after binary IDs"

This reverts commit 6bc9c8dfe32cc4662f2ed9041af527f69dfff13b.

Reverted because this broke some PPC buildbots.
The file was modifiedcompiler-rt/lib/profile/InstrProfilingPlatformLinux.c
Commit e9d1a679a1c9cb309aea8c5d944e55865d38b867 by hoy
[CSSPGO] Do not pass -fpseudo-probe-for-profiling to the linker.

The correponding linker switch has been removed by https://reviews.llvm.org/D110209, so do not pass it in clang.

Reviewed By: wenlei

Differential Revision: https://reviews.llvm.org/D110371
The file was modifiedclang/lib/Driver/ToolChains/CommonArgs.cpp
The file was removedclang/test/Driver/pseudo-probe-lto.c
Commit 40b230f6856d41f1b8dae7ac2d8e5e5e8de1ca77 by craig.topper
[RISCV] Limit transformAddImmMulImm to prevent an infinite loop.

This fixes an issue reported in D108607.
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/test/CodeGen/RISCV/addimm-mulimm.ll
Commit 4f28a2eb037defa6a8d85a69e1ff56fe85c0a27b by daniil.fukalov
[NFC] Refactor tests to improve readability.
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/fabs.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/shufflevector.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/fmul.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/fma.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/fneg.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/reduce-and.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/fadd.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/mul.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/extractelement.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/fsub.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/bit-ops.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/insertelement.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/logicalop.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/add-sub.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/shifts.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/control-flow.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/reduce-or.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/addrspacecast.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/fdiv.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/fused_costs.ll
Commit 7647a8413be55568a8a80fae379a872b7359f5b5 by i
Fix -fno-unwind-tables -fasynchronous-unwind-tables to emit unwind tables

This matches GCC.

Change the CC1 option to encode the unwind table level (1: needed by exceptions,
2: asynchronous) so that we can support two modes in the future.
The file was modifiedclang/test/Driver/sanitize_unwind_tables.c
The file was modifiedclang/test/Driver/clang-translation.c
The file was modifiedclang/test/CodeGenCXX/linetable-eh.cpp
The file was modifiedclang/test/Driver/windows-exceptions.cpp
The file was modifiedclang/test/Driver/win-macho-unwind.c
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedclang/test/CodeGen/asan-globals.cpp
The file was modifiedclang/test/Driver/fuchsia.c
The file was modifiedclang/test/Driver/aarch64-features.c
The file was modifiedclang/test/CodeGenCXX/thunks-ehspec.cpp
The file was modifiedclang/test/CodeGenCXX/exceptions-seh-filter-uwtable.cpp
The file was modifiedclang/test/Driver/ppc-features.cpp
The file was modifiedclang/include/clang/Driver/Options.td
The file was modifiedclang/test/CodeGenCXX/thunks.cpp
The file was modifiedclang/include/clang/Basic/CodeGenOptions.def
The file was modifiedclang/test/Driver/freebsd.c
The file was modifiedclang/test/Preprocessor/unwind-tables.c
Commit 76d845cb169f048cb6f2176c3e7a6534dc5af097 by nemanja.i.ibm
[clang-format] Fix unittest failures with -Werror

Commit a44ab1702539 added a unit test that fails to build with
-Werror which causes build bot breaks on bots that include that
option in their build. This patch just adds the necessary casts to
silence the warnings.
The file was modifiedclang/unittests/Format/QualifierFixerTest.cpp
Commit c965fde7c234abbb311ab9f58e8684970a69c916 by Lang Hames
[ORC] Shut down services in SimpleRemoteEPCServer.

This should have been included with ExecutorBootstrapService in 78b083dbb72,
but was accidentally left out. It give services a chance to release any
resources that they have acquired.
The file was modifiedllvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleRemoteEPCServer.cpp
Commit c579c658cd42034449d4fa19f28b43f2082c0991 by leonardchan
[compiler-rt][profile] Make corrupted-profile.c more robust

This test specifically checks that profiles are not mergeable if there's a
change in the CounterPtr in the profile header. The test manually changes
CounterPtr by explicitly calling memset on some offset into the profile file.
This test would fail if binary IDs were emitted because the offset calculation
does not take into account the binary ID sizes.

This patch updates the test to use types provided in profile/InstrProfData.inc
to make it more resistant to profile layout changes.

Differential Revision: https://reviews.llvm.org/D110277
The file was modifiedcompiler-rt/test/profile/Linux/corrupted-profile.c
Commit 2c1defeee40cf643ea6f0fa5e01164c9a4c48c30 by tejohnson
[ThinLTO] Don't emit original GUID for locals to distributed indexes

In ThinLTO for locals we normally compute the GUID from the name after
prepending the source path to get a unique global id. SamplePGO indirect
call profiles contain the target GUID without this uniquification,
however (unless compiling with -funique-internal-linkage-names).
Therefore, the index contains the original GUID of the local symbols
(without module path prepended to uniquify), in order to correctly
handle the call edges added for these indirect call profile targets
with SamplePGO.

We were emitting these to the combined index when writing it out as
bitcode, which is unnecessary and causes overhead when writing out the
indexes for distributed backends. The only use of the original GUID name
is in the thin link. Suppress it in that case. This reduced the thin
link time for a large distributed build by about 7%, and the aggregate
size of the serialized indexes by over 2%.

Continue to print it when writing out the full index, since that is just
used for debugging and testing.

Update a distributed thinlto index test to contain a local and ensure
that we don't get a COMBINED_ORIGINAL_NAME record.

Differential Revision: https://reviews.llvm.org/D110296
The file was modifiedllvm/lib/Bitcode/Writer/BitcodeWriter.cpp
The file was modifiedllvm/test/ThinLTO/X86/distributed_indexes.ll
Commit 7da4ee2df088d39c7ca6531d80172af7d973bb67 by tejohnson
[ThinLTO] Fix bot failures

Fix bot failures after 2c1defeee40cf643ea6f0fa5e01164c9a4c48c30. The new
GUID I added isn't matching because it is a local with the source path
prepended. There isn't much use in matching the GUID's exactly anyway,
so remove those from the patterns.
The file was modifiedllvm/test/ThinLTO/X86/distributed_indexes.ll
Commit 8dc16ba8d2b429261dd95e88496b2a866dc18ae5 by springerm
[mlir][linalg] Merge all tiling passes into a single one.

Passes such as `linalg-tile-to-tiled-loop` are merged into `linalg-tile`.

Differential Revision: https://reviews.llvm.org/D110214
The file was modifiedmlir/test/Integration/Dialect/Linalg/CPU/test-tensor-matmul.mlir
The file was modifiedmlir/include/mlir/Dialect/Linalg/Passes.h
The file was modifiedmlir/test/Dialect/Linalg/tile.mlir
The file was modifiedmlir/test/Integration/Dialect/Linalg/CPU/test-conv-3d-ndhwc-dhwcf-call.mlir
The file was modifiedmlir/test/Integration/Dialect/Linalg/CPU/test-conv-3d-call.mlir
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Tiling.cpp
The file was modifiedmlir/test/Dialect/Linalg/tile-simple-conv.mlir
The file was modifiedmlir/include/mlir/Dialect/Linalg/Utils/Utils.h
The file was modifiedmlir/test/Dialect/Linalg/tile-pad-tensor-op.mlir
The file was modifiedmlir/test/Dialect/Linalg/tile-conv.mlir
The file was modifiedmlir/test/Integration/Dialect/Linalg/CPU/test-conv-1d-nwc-wcf-call.mlir
The file was modifiedmlir/test/Integration/Dialect/Linalg/CPU/test-conv-2d-nhwc-hwcf-call.mlir
The file was modifiedmlir/include/mlir/Dialect/Linalg/Passes.td
The file was modifiedmlir/test/Integration/Dialect/Linalg/CPU/test-conv-1d-call.mlir
The file was modifiedmlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
The file was modifiedmlir/test/Dialect/Linalg/tile-parallel.mlir
The file was modifiedmlir/test/Dialect/Linalg/tile-indexed.mlir
The file was modifiedmlir/test/Dialect/Linalg/tile-parallel-reduce.mlir
The file was modifiedmlir/test/Dialect/Linalg/tile-conv-padding.mlir
The file was modifiedmlir/test/Integration/Dialect/Linalg/CPU/test-conv-2d-call.mlir
The file was modifiedmlir/test/Dialect/Linalg/tile-tensors.mlir
Commit 2190f8a8b1e01b7bc7429eb490f3001a23f27df1 by springerm
[mlir][linalg] Support tile+peel with TiledLoopOp

Only scf.for was supported until now.

Differential Revision: https://reviews.llvm.org/D110220
The file was modifiedmlir/test/lib/Dialect/Linalg/TestLinalgTransforms.cpp
The file was modifiedmlir/test/Dialect/Linalg/tile-and-peel-tensors.mlir
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
Commit 83f3c615dde3fce5c0560c19316b08c1e6aa8c27 by joker.eph
Add missing storageType to AttrDef to ODS

This is only noticeable when using an attribute across dialects I think.
Previously the namespace would be ommited, but it wouldn't matter as
long as the generated code stays within a single namespace.

Differential Revision: https://reviews.llvm.org/D110367
The file was modifiedmlir/test/mlir-tblgen/op-attribute.td
The file was modifiedmlir/include/mlir/IR/OpBase.td
Commit e470f9268a448fedea25289ec343f82ff52ccc36 by llvm-project
[Polly] Implement user-directed loop distribution/fission.

This is a simple version without the possibility to define distribute
points or followup-transformations. However, it is the first
transformation that has to check whether the transformation is correct.

It interprets the same metadata as the LoopDistribute pass.

Re-apply after revert in c7bcd72a38bcf99e03e4651ed5204d1a1f2bf695 with
fix: Take isBand out of #ifndef NDEBUG since it now is used
unconditionally.
The file was modifiedpolly/lib/Transform/ManualOptimizer.cpp
The file was modifiedpolly/lib/Transform/ScheduleOptimizer.cpp
The file was modifiedpolly/include/polly/ScheduleTreeTransform.h
The file was addedpolly/test/ScheduleOptimizer/ManualOptimization/distribute_illegal_pragmaloc.ll
The file was modifiedpolly/lib/Transform/ScheduleTreeTransform.cpp
The file was addedpolly/test/ScheduleOptimizer/ManualOptimization/distribute_heuristic.ll
The file was modifiedpolly/include/polly/DependenceInfo.h
The file was modifiedpolly/lib/Analysis/DependenceInfo.cpp
The file was addedpolly/test/ScheduleOptimizer/ManualOptimization/distribute_illegal_looploc.ll
The file was modifiedpolly/include/polly/ManualOptimizer.h
Commit afab3c488f0c86af87e262cc7454e04de18e3e6a by i
[Driver] Default Generic_GCC x86 to -fasynchronous-unwind-tables

to match GCC and Clang's own x86-64.
The file was modifiedclang/lib/Driver/ToolChains/Gnu.cpp
The file was modifiedclang/test/Driver/clang-translation.c
Commit 7a62a5b56d670c4e152159740cd7fc4030a9470f by Christudasan.Devadasan
[AMDGPU] Legalize initialized LDS variables

We don't allow an initializer for LDS variables
and there is an early abort during instruction
selection. This patch legalizes them by ignoring
the init values. During assembly emission, proper
error reporting already exists for such instances.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D109901
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/lds-zero-initializer.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/lds-zero-initializer.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
Commit 25ac0d3c73d68c017546eb622ba7632c6b581bfb by dblaikie
DebugInfo: Implement the -gsimple-template-names functionality

This excludes certain names that can't be rebuilt from the available
DWARF:

* Atomic types - no DWARF differentiating int from atomic int.
* Vector types - enough DWARF (an attribute on the array type) to do
  this, but I haven't written the extra code to add the attributes
  required for this
* Lambdas - ambiguous with any other unnamed class
* Unnamed classes/enums - would need column info for the type in
  addition to file/line number
* noexcept function types - not encoded in DWARF
The file was addedclang/test/CodeGenCXX/debug-info-simple-template-names.cpp
The file was modifiedclang/lib/CodeGen/CGDebugInfo.cpp
Commit a2c1cf09dfaaa6d2161fee00f8317005bf955d64 by Lang Hames
[ORC] Introduce EPCGenericDylibManager / SimpleExecutorDylibManager.

EPCGenericDylibManager provides an interface for loading dylibs and looking up
symbols in the executor, implemented using EPC-calls to functions in the
executor.

SimpleExecutorDylibManager is an executor-side service that provides the
functions used by EPCGenericDylibManager.

SimpleRemoteEPC is updated to use an EPCGenericDylibManager instance to
implement the ExecutorProcessControl loadDylib and lookup methods. In a future
commit these methods will be removed, and clients updated to use
EPCGenericDylibManagers directly.
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/Shared/OrcRTBridge.h
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/SimpleRemoteEPC.h
The file was addedllvm/lib/ExecutionEngine/Orc/EPCGenericDylibManager.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/TargetProcess/CMakeLists.txt
The file was addedllvm/include/llvm/ExecutionEngine/Orc/TargetProcess/SimpleExecutorDylibManager.h
The file was addedllvm/include/llvm/ExecutionEngine/Orc/EPCGenericDylibManager.h
The file was addedllvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleExecutorDylibManager.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/SimpleRemoteEPC.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/CMakeLists.txt
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/TargetProcess/SimpleRemoteEPCServer.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleRemoteEPCServer.cpp
Commit 58d9ed2c935d6665da388cd72273360349792281 by llvmgnsyncbot
[gn build] Port a2c1cf09dfaa
The file was modifiedllvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/TargetProcess/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
Commit 40ddde5d1fa7e5eadb76f6c3cc37dae2f80a8ca2 by Christudasan.Devadasan
[TableGen] Allow targets to entirely ignore Psets for registers

Tablegen currently expects targets to have at least one
pressure set for every broader register category. AMDGPU's
VGPR or AGPR, for instance, seemed to work correctly without
any pset, though we have forced one for each type to avoid
the assertion in computeRegUnitSets. However, psets can not
be entirely empty. At least one set is mandatory for every
target. This patch bypasses the assertion for the classes
when GeneratePressureSet is zero while ensuring the
RegUnitSets are not empty.

Reviewed By: arsenm, rampitec

Differential Revision: https://reviews.llvm.org/D110305
The file was addedllvm/test/TableGen/bare-minimum-psets.td
The file was addedllvm/test/TableGen/empty-psets.td
The file was modifiedllvm/utils/TableGen/CodeGenRegisters.cpp
Commit 3675e147a1ccbce44ce64a1bc8dd38547aba1443 by David CARLIER
[Sanitizers] intercept ttyent api on FreeBSD.

and ttyentpath separately on NetBSD.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D109843
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_platform_limits_freebsd.h
The file was addedcompiler-rt/test/sanitizer_common/TestCases/Linux/ttyent.cpp
The file was removedcompiler-rt/test/sanitizer_common/TestCases/NetBSD/ttyent.cpp
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_platform_limits_freebsd.cpp
Commit 4ed05312a1557b2f2552298a3aac12c2e224d77e by shivam98.tkg
[docs] Document the --print-passes flag in opt.

Reviewed By: aeubanks, asbirlea

Differential Revision: https://reviews.llvm.org/D109663
The file was modifiedllvm/docs/CommandGuide/opt.rst
Commit ef391df2b63320c9aec61045d8b96917081f0cb2 by Lang Hames
[ORC] Rename ExecutorAddress to ExecutorAddr.

Removing the 'ess' suffix improves the ergonomics without sacrificing clarity.
Since this class is likely to be used more frequently in the future it's worth
some short term pain to fix this now.
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/LookupAndRecordAddrs.h
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/EPCGenericMemoryAccess.h
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/TargetProcess/SimpleRemoteEPCServer.h
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/MachOPlatform.h
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/Shared/TargetProcessControlTypes.h
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/Shared/OrcRTBridge.h
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/Shared/SimpleRemoteEPCUtils.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/TargetProcess/OrcRTBootstrap.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/EPCGenericDylibManager.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/EPCGenericJITLinkMemoryManager.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/EPCDebugObjectRegistrar.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/ExecutorProcessControl.cpp
The file was modifiedllvm/unittests/ExecutionEngine/Orc/EPCGenericJITLinkMemoryManagerTest.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderGDB.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/TargetProcess/RegisterEHFrames.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/Shared/SimpleRemoteEPCUtils.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/SimpleRemoteEPC.h
The file was modifiedllvm/unittests/ExecutionEngine/Orc/SimpleExecutorMemoryManagerTest.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/TargetProcess/SimpleExecutorDylibManager.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/EPCGenericJITLinkMemoryManager.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/TargetProcess/OrcRTBootstrap.h
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/OrcRPCExecutorProcessControl.h
The file was modifiedllvm/unittests/ExecutionEngine/Orc/WrapperFunctionUtilsTest.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/SimpleRemoteEPC.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/Shared/WrapperFunctionUtils.h
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/TargetProcess/ExecutorBootstrapService.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleExecutorMemoryManager.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/TargetProcess/SimpleExecutorMemoryManager.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/ELFNixPlatform.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/Shared/SimplePackedSerialization.h
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/EPCGenericDylibManager.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleExecutorDylibManager.cpp
The file was modifiedllvm/unittests/ExecutionEngine/Orc/LookupAndRecordAddrsTest.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/ExecutorProcessControl.h
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/ELFNixPlatform.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/LookupAndRecordAddrs.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/EPCEHFrameRegistrar.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleRemoteEPCServer.cpp
The file was modifiedllvm/unittests/ExecutionEngine/Orc/EPCGenericMemoryAccessTest.cpp
Commit e70082e9add7e82e580148fbd4c0a5a832763cb6 by dblaikie
Remove non-portable directory separator from test
The file was modifiedclang/test/CodeGenCXX/debug-info-simple-template-names.cpp
Commit 8d9ddd4f509c54d05a38427d7999c061d88ca35c by dblaikie
DebugInfo: STN: Handle unreconstitutable types in function types
The file was modifiedclang/lib/CodeGen/CGDebugInfo.cpp
The file was modifiedclang/test/CodeGenCXX/debug-info-simple-template-names.cpp
Commit 165926aa4ce9f05572cf8828210a1af5ce286bdb by dblaikie
Fix that same path separator issue again...
The file was modifiedclang/test/CodeGenCXX/debug-info-simple-template-names.cpp
Commit 840afbde48e90213028174fdba715e10aa39dd85 by albionapc
[PowerPC] SemaChecking for darn family of builtins

The __darn family of builtins are only available on Pwr9,
and only __darn_32 is available on both 64 and 32 bit, while the rest
are only available on 64 bit. The patch adds sema checking
for these builtins and separate the __darn_32's 32 bit
test cases.

Differential revision: https://reviews.llvm.org/D110282
The file was modifiedclang/test/CodeGen/builtins-ppc-xlcompat-error.c
The file was modifiedclang/test/CodeGen/builtins-ppc-xlcompat-darn.c
The file was modifiedclang/lib/Sema/SemaChecking.cpp
The file was modifiedclang/test/CodeGen/builtins-ppc.c
Commit 0820fbab99a1f1986a8c6e0a8e5cb4542ec52515 by Lang Hames
[ORC-RT] Rename ExecutorAddress to ExecutorAddr.

This is an ORC-runtime counterpart to LLVM commit ef391df2b63, and the
motivation is the same: to move to a shorter name to improve the ergonomics of
this type before it's more widely adopted.
The file was modifiedcompiler-rt/lib/orc/executor_address.h
The file was modifiedcompiler-rt/lib/orc/elfnix_platform.h
The file was modifiedcompiler-rt/lib/orc/macho_platform.cpp
The file was modifiedcompiler-rt/lib/orc/macho_platform.h
The file was modifiedcompiler-rt/lib/orc/elfnix_platform.cpp
The file was modifiedcompiler-rt/lib/orc/simple_packed_serialization.h
Commit 661ab70314008b609dda792e2c9dc57afa1f8864 by Amara Emerson
[AArch64][GlobalISel] Fix crash in the extend(extract_vector_elt) optimization.

It was assuming that GPR extends could only have destination sizes of 32 or 64
bits, but for AArch64 we allow < 32 bits even without matching size physregs.
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/select-extract-vector-elt-with-extend.mir
Commit 7890afddecff01119f4d5e8825b43dd2c8361648 by mydeveloperday
[clang-offload-bundler][docs][NFC] invalid indentation cause build issue
The file was modifiedclang/docs/ClangOffloadBundler.rst