SuccessChanges

Summary

  1. [AMDGPU] Set unused dst_sel to '?' in the encoding (details)
  2. [LoopUnroll] Add multi-exit test which does not exit through latch. (details)
  3. [OpenMP] Fixed Bug 49356 (details)
  4. [HWASan] Build separate LAM runtime on x86_64. (details)
  5. [llvm][doc] fix header for read/write_register intrinsics in LangRef (details)
  6. [Clang][NVPTX] Add NVPTX intrinsics and builtins for CUDA PTX cp.async instructions (details)
  7. [Clang][NVPTX] Add NVPTX intrinsics and builtins for CUDA PTX redux.sync instructions (details)
  8. [mlir][tosa] Fix tosa.avg_pool2d lowering to normalize correctly (details)
  9. [HIP] Fix spack detection (details)
  10. Make `mlir::OpState::operator bool` explicit (details)
  11. [HWASan] Don't build alias mode on non-x86. (details)
  12. [LoopIdiom] 'logical right-shift until zero' ('count active bits') "on steroids" idiom recognition. (details)
  13. [LLDB] Switch from using member_clang_type.GetByteSize() to member_type->GetByteSize() in ParseSingleMember (details)
  14. [NewPM] Add C bindings for new pass manager (details)
  15. Reset the wakeup timeout when we re-enter the continue wait. (details)
  16. Revert "[NewPM] Add C bindings for new pass manager" (details)
  17. [Clang] -Wunused-but-set-parameter and -Wunused-but-set-variable (details)
  18. [analyzer] Engine: fix crash with SEH __leave keyword (details)
  19. Merge with mainline. (details)
  20. [lld/mac] Honor REFERENCED_DYAMICALLY, set it on __mh_execute_header (details)
  21. [mlir][sparse] replace experimental flag with inplace attribute (details)
  22. [NewPM] Add C bindings for new pass manager (details)
  23. Add type function for ConstShape op. (details)
  24. gn build: Only build the hwasan runtime in aliasing mode on x86. (details)
  25. [AArch64] Support customizing stack protector guard (details)
  26. [InstCombine] add tests for fneg-of-select; NFC (details)
  27. [InstCombine] fold fnegs around select (details)
  28. [gn build] Port 0c557db61711 (details)
  29. Revert "[Clang] -Wunused-but-set-parameter and -Wunused-but-set-variable" (details)
  30. [NFC][scudo] Clang-format tests (details)
  31. Revert "X86: support Swift Async context" (details)
  32. [lldb] Document ctrl-f for completing show-autosuggestion (details)
  33. [lld][MinGW] Introduce aliases for -Bdynamic and -Bstatic (details)
  34. [clang CodeGen] Don't crash on large atomic function parameter. (details)
  35. [Driver][test] Don't assume integrated-as (details)
  36. [mlir][NFC] Remove stale `createLowerAffinePass` declaration (details)
  37. [WebAssembly] Nullify DBG_VALUE_LISTs in DebugValueManager (details)
  38. [test] Free triple in PassBuilderBindingsTest (details)
Commit f4c0fdc6c9db616e2a50e3b39c615f972b4b3158 by Stanislav.Mekhanoshin
[AMDGPU] Set unused dst_sel to '?' in the encoding

This is to allow disasm with any bits in the unused fields.

Differential Revision: https://reviews.llvm.org/D102526
The file was modifiedllvm/lib/Target/AMDGPU/VOPInstructions.td
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/sdwa_vi.txt
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/sdwa_gfx9.txt
Commit fded6f77c357447b06b952f56c83d2a5487c5adf by flo
[LoopUnroll] Add multi-exit test which does not exit through latch.

This patch adds a new test for loop-unrolling with multiple exiting
blocks, where the latch does not exit, but the header does. This can
happen when the loop has not been rotated, e.g. due to minsize.

Inspired by the following end-to-end test, using -Oz
https://godbolt.org/z/fP6sna8qK

    bool foo(int *ptr, int limit) {
        #pragma clang loop unroll(full)
        for (unsigned int i = 0; i < 4; i++) {
            if (ptr[i] > limit)
            return false;
            ptr[i]++;
        }
        return true;
    }
The file was addedllvm/test/Transforms/LoopUnroll/unroll-header-exiting-with-phis-multiple-exiting-blocks.ll
Commit af6511d730f18beb9053c0120c45abef031344e9 by tianshilei1992
[OpenMP] Fixed Bug 49356

Bug 49356 (https://bugs.llvm.org/show_bug.cgi?id=49356) reports crash in
the test case `tasking/bug_taskwait_detach.cpp`, which is caused by the wrong
function declaration. `gtid` in `__kmpc_omp_task` should be `kmp_int32`.

Reviewed By: AndreyChurbanov

Differential Revision: https://reviews.llvm.org/D102584
The file was modifiedopenmp/runtime/test/tasking/bug_taskwait_detach.cpp
Commit 5f58322368b070b63fe2b2559a54f646cb97e2c4 by mascasa
[HWASan] Build separate LAM runtime on x86_64.

Since we have both aliasing mode and Intel LAM on x86_64, we need to
choose the mode at either run time or compile time.  This patch
implements the plumbing to build both and choose between them at
compile time.

Reviewed By: vitalybuka, eugenis

Differential Revision: https://reviews.llvm.org/D102286
The file was modifiedcompiler-rt/lib/hwasan/CMakeLists.txt
The file was modifiedclang/lib/Driver/ToolChains/CommonArgs.cpp
The file was modifiedcompiler-rt/lib/hwasan/hwasan.h
The file was modifiedcompiler-rt/lib/hwasan/hwasan_linux.cpp
The file was modifiedcompiler-rt/lib/hwasan/hwasan_allocator.h
The file was modifiedcompiler-rt/lib/hwasan/hwasan_dynamic_shadow.cpp
Commit 1417ddafdb68755300c115694ef8861302506062 by zinenko
[llvm][doc] fix header for read/write_register intrinsics in LangRef

Mutli-line headers are not allowed in RST, reformat the header to be a
single wide line.
The file was modifiedllvm/docs/LangRef.rst
Commit 02c2468864bbb37f7b279aff84961815c1500b6c by tra
[Clang][NVPTX] Add NVPTX intrinsics and builtins for CUDA PTX cp.async instructions

Adds NVPTX builtins and intrinsics for the CUDA PTX `cp.async` instructions for
`sm_80` architecture or newer.

PTX ISA description of `cp.async`:
https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#data-movement-and-conversion-instructions-asynchronous-copy
https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#parallel-synchronization-and-communication-instructions-cp-async-mbarrier-arrive

Authored-by: Stuart Adams <stuart.adams@codeplay.com>
Co-Authored-by: Alexander Johnston <alexander@codeplay.com>

Differential Revision: https://reviews.llvm.org/D100394
The file was modifiedclang/test/CodeGen/builtins-nvptx.c
The file was addedllvm/test/CodeGen/NVPTX/async-copy.ll
The file was addedllvm/test/CodeGen/NVPTX/mbarrier.ll
The file was modifiedclang/include/clang/Basic/BuiltinsNVPTX.def
The file was modifiedllvm/lib/Target/NVPTX/NVPTXIntrinsics.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsNVVM.td
The file was modifiedllvm/lib/Target/NVPTX/NVPTXInstrInfo.td
Commit f226e28a880f8e40b1bfd4c77b9768a667372d22 by tra
[Clang][NVPTX] Add NVPTX intrinsics and builtins for CUDA PTX redux.sync instructions

Adds NVPTX builtins and intrinsics for the CUDA PTX `redux.sync` instructions
for `sm_80` architecture or newer.

PTX ISA description of `redux.sync`:
https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#parallel-synchronization-and-communication-instructions-redux-sync

Authored-by: Steffen Larsen <steffen.larsen@codeplay.com>

Differential Revision: https://reviews.llvm.org/D100124
The file was addedclang/test/CodeGenCUDA/redux-builtins.cu
The file was modifiedllvm/include/llvm/IR/IntrinsicsNVVM.td
The file was modifiedclang/include/clang/Basic/BuiltinsNVPTX.def
The file was modifiedllvm/lib/Target/NVPTX/NVPTXIntrinsics.td
The file was addedllvm/test/CodeGen/NVPTX/redux-sync.ll
Commit 08068ddba7f52255fa39968207309f3d1ad98223 by rob.suderman
[mlir][tosa] Fix tosa.avg_pool2d lowering to normalize correctly

Initial version of pooling assumed normalization was accross all elements
equally. TOSA actually requires the noramalization is perform by how
many elements were summed (edges are not artifically dimmer). Updated
the lowering to reflect this change with corresponding tests.

Reviewed By: NatashaKnk

Differential Revision: https://reviews.llvm.org/D102540
The file was modifiedmlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
The file was modifiedmlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
Commit 18cb17ce4cd54b9971550840b6f0b872de0d4c8c by Yaxun.Liu
[HIP] Fix spack detection

Missing or duplicate spack package should not cause error, since
users may only installed llvm/clang package, or users may installed
duplicate HIP package but will use environment variable or compiler
option to choose HIP path.

The message about missing or duplicate spack package is informational,
therefore should be emitted only when -v is specified.

Reviewed by: Artem Belevich

Differential Revision: https://reviews.llvm.org/D102556
The file was modifiedclang/test/Driver/rocm-detect.hip
The file was modifiedclang/lib/Driver/ToolChains/ROCm.h
The file was modifiedclang/lib/Driver/ToolChains/AMDGPU.cpp
Commit 43f6e04258aaece5b45c18986e0e6c3e690fa82e by joker.eph
Make `mlir::OpState::operator bool` explicit

This change makes the conversion of an mlir::OpState to bool `explicit`. Idiomatic boolean uses continue to work as before, but questionable implicit uses (e.g. accumulating over a range of OpStates to count "true" states) become ill-formed. This makes the class interface a lilttle less error-prone.

I tested this change on our internal (fairly large) codebase, and only one fix was needed, which was ultimately an improvement of the affected code.

Reviewed By: rriddle, mehdi_amini

Differential Revision: https://reviews.llvm.org/D101989
The file was modifiedmlir/include/mlir/IR/OpDefinition.h
Commit d97bab65118558ec8376749529338477b5768866 by mascasa
[HWASan] Don't build alias mode on non-x86.

Alias mode is not expected work on non-x86, so don't build it there.
Should fix the aarch64 bot.
The file was modifiedcompiler-rt/lib/hwasan/CMakeLists.txt
Commit 0633d5ce7bd9339228d301d4b1ee49fbd0a78b56 by lebedev.ri
[LoopIdiom] 'logical right-shift until zero' ('count active bits') "on steroids" idiom recognition.

I think i've added exhaustive test coverage, and i have verified that alive2 is happy with all the tests,
so in principle i'm fine with landing this without review, but just in case..

This adds support for the "count active bits" pattern, i.e.:
```
int countActiveBits(unsigned val) {
    int cnt = 0;
    for( ; (val >> cnt) != 0; ++cnt)
        ;
    return cnt;
}
```
but a somewhat more general one, since that is what i need:
```
int countActiveBits(unsigned val, int start, int off) {
    int cnt;
    for (cnt = start; val >> (cnt + off); cnt++)
        ;
    return cnt;
}
```

I've followed in footstep of 'left-shift until bittest' idiom (D91038),
in the sense that iff the `ctlz` intrinsic is cheap, we'll transform,
regardless of all other factors.

This can have a shocking effect on certain benchmarks:
```
raw.pixls.us-unique/Olympus/XZ-1$ /repositories/googlebenchmark/tools/compare.py -a benchmarks ~/rawspeed/build-{old,new}/src/utilities/rsbench/rsbench --benchmark_counters_tabular=true --benchmark_min_time=0.00000001 --benchmark_repetitions=128 p1319978.orf
RUNNING: /home/lebedevri/rawspeed/build-old/src/utilities/rsbench/rsbench --benchmark_counters_tabular=true --benchmark_min_time=0.00000001 --benchmark_repetitions=128 p1319978.orf --benchmark_display_aggregates_only=true --benchmark_out=/tmp/tmp49_28zcm
2021-05-09T01:06:05+03:00
Running /home/lebedevri/rawspeed/build-old/src/utilities/rsbench/rsbench
Run on (32 X 3600.24 MHz CPU s)
CPU Caches:
  L1 Data 32 KiB (x16)
  L1 Instruction 32 KiB (x16)
  L2 Unified 512 KiB (x16)
  L3 Unified 32768 KiB (x2)
Load Average: 5.26, 6.29, 3.49
------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
Benchmark                                                      Time             CPU   Iterations  CPUTime,s CPUTime/WallTime     Pixels Pixels/CPUTime Pixels/WallTime Raws/CPUTime Raws/WallTime WallTime,s
------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
p1319978.orf/threads:32/process_time/real_time_mean          145 ms          145 ms          128   0.145319         0.999981   10.1568M       69.8949M        69.8936M      6.88159       6.88146   0.145322
p1319978.orf/threads:32/process_time/real_time_median        145 ms          145 ms          128   0.145317         0.999986   10.1568M       69.8941M        69.8931M      6.88151       6.88141   0.145319
p1319978.orf/threads:32/process_time/real_time_stddev      0.766 ms        0.766 ms          128   766.586u         15.1302u          0       354.167k        354.098k    0.0348699     0.0348631   766.469u
RUNNING: /home/lebedevri/rawspeed/build-new/src/utilities/rsbench/rsbench --benchmark_counters_tabular=true --benchmark_min_time=0.00000001 --benchmark_repetitions=128 p1319978.orf --benchmark_display_aggregates_only=true --benchmark_out=/tmp/tmpwb9sw2x0
2021-05-09T01:06:24+03:00
Running /home/lebedevri/rawspeed/build-new/src/utilities/rsbench/rsbench
Run on (32 X 3599.95 MHz CPU s)
CPU Caches:
  L1 Data 32 KiB (x16)
  L1 Instruction 32 KiB (x16)
  L2 Unified 512 KiB (x16)
  L3 Unified 32768 KiB (x2)
Load Average: 4.05, 5.95, 3.43
------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
Benchmark                                                      Time             CPU   Iterations  CPUTime,s CPUTime/WallTime     Pixels Pixels/CPUTime Pixels/WallTime Raws/CPUTime Raws/WallTime WallTime,s
------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
p1319978.orf/threads:32/process_time/real_time_mean         99.8 ms         99.8 ms          128  0.0997758         0.999972   10.1568M       101.797M        101.794M      10.0225       10.0222  0.0997786
p1319978.orf/threads:32/process_time/real_time_median       99.7 ms         99.7 ms          128  0.0997165         0.999985   10.1568M       101.857M        101.854M      10.0284       10.0281  0.0997195
p1319978.orf/threads:32/process_time/real_time_stddev      0.224 ms        0.224 ms          128   224.166u          34.345u          0        226.81k        227.231k    0.0223309     0.0223723   224.586u
Comparing /home/lebedevri/rawspeed/build-old/src/utilities/rsbench/rsbench to /home/lebedevri/rawspeed/build-new/src/utilities/rsbench/rsbench
Benchmark                                                               Time             CPU      Time Old      Time New       CPU Old       CPU New
----------------------------------------------------------------------------------------------------------------------------------------------------
p1319978.orf/threads:32/process_time/real_time_pvalue                 0.0000          0.0000      U Test, Repetitions: 128 vs 128
p1319978.orf/threads:32/process_time/real_time_mean                  -0.3134         -0.3134           145           100           145           100
p1319978.orf/threads:32/process_time/real_time_median                -0.3138         -0.3138           145           100           145           100
p1319978.orf/threads:32/process_time/real_time_stddev                -0.7073         -0.7078             1             0             1             0

```

Reviewed By: craig.topper, zhuhan0

Differential Revision: https://reviews.llvm.org/D102116
The file was modifiedllvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
The file was modifiedllvm/test/Transforms/LoopIdiom/X86/logical-right-shift-until-zero-debuginfo.ll
The file was modifiedllvm/test/Transforms/LoopIdiom/X86/logical-right-shift-until-zero.ll
Commit 2182eda3062471e2e6994307c46ffcca7e39ecff by Shafik Yaghmour
[LLDB] Switch from using member_clang_type.GetByteSize() to member_type->GetByteSize() in ParseSingleMember

We have a bug in which using member_clang_type.GetByteSize() triggers record
layout and during this process since the record was not yet complete we ended
up reaching a record that had not been layed out yet.
Using member_type->GetByteSize() avoids this situation since it relies on size
from DWARF and will not trigger record layout.

For reference: rdar://77293040

Differential Revision: https://reviews.llvm.org/D102445
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
Commit cd220a06782c3da13a53de2fdf10d928eef6460c by aeubanks
[NewPM] Add C bindings for new pass manager

This patch contains the bare minimum to run the new Pass Manager from the LLVM-C APIs. It does not feature PGOOptions, PassPlugins or Debugify in its current state. Bugzilla: PR48499

Reviewed By: aeubanks

Differential Revision: https://reviews.llvm.org/D102136
The file was addedllvm/include/llvm-c/Transforms/PassBuilder.h
The file was addedllvm/lib/Passes/PassBuilderBindings.cpp
The file was addedllvm/unittests/Passes/PassBuilderBindingsTest.cpp
The file was modifiedllvm/lib/Passes/CMakeLists.txt
The file was modifiedllvm/unittests/Passes/CMakeLists.txt
Commit bd5751f3d249ec0798060bd98c07272174c52af0 by jingham
Reset the wakeup timeout when we re-enter the continue wait.

Differential Revision: https://reviews.llvm.org/D102562
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteClientBase.cpp
Commit 0b339778722207528ad7299b0fc77314c26efb33 by thakis
Revert "[NewPM] Add C bindings for new pass manager"

This reverts commit cd220a06782c3da13a53de2fdf10d928eef6460c.
Doesn't build.
The file was modifiedllvm/unittests/Passes/CMakeLists.txt
The file was removedllvm/include/llvm-c/Transforms/PassBuilder.h
The file was modifiedllvm/lib/Passes/CMakeLists.txt
The file was removedllvm/unittests/Passes/PassBuilderBindingsTest.cpp
The file was removedllvm/lib/Passes/PassBuilderBindings.cpp
Commit 14dfb3831c425c7f22540a2160424224008c257e by aeubanks
[Clang] -Wunused-but-set-parameter and -Wunused-but-set-variable

These are intended to mimic warnings available in gcc.

Reviewed By: aeubanks

Differential Revision: https://reviews.llvm.org/D100581
The file was modifiedclang/test/FixIt/fixit.cpp
The file was modifiedclang/test/CodeGen/builtins-arm.c
The file was modifiedclang/lib/Sema/SemaExpr.cpp
The file was addedclang/test/SemaCXX/warn-unused-but-set-variables-cpp.cpp
The file was modifiedclang/test/CodeGen/X86/x86_64-xsave.c
The file was modifiedclang/test/SemaObjC/foreach.m
The file was modifiedclang/test/Sema/vector-gcc-compat.cpp
The file was addedclang/test/Sema/warn-unused-but-set-parameters.c
The file was modifiedclang/test/SemaCXX/sizeless-1.cpp
The file was modifiedclang/test/Sema/vector-gcc-compat.c
The file was modifiedclang/test/CodeGen/builtins-riscv.c
The file was modifiedclang/lib/Sema/SemaExprCXX.cpp
The file was modifiedclang/test/SemaCXX/shift.cpp
The file was modifiedclang/test/Misc/warning-wall.c
The file was addedclang/test/SemaCXX/warn-unused-but-set-parameters-cpp.cpp
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/test/CXX/expr/expr.prim/expr.prim.lambda/p12.cpp
The file was modifiedclang/lib/Sema/SemaDecl.cpp
The file was modifiedclang/test/SemaCXX/goto.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticGroups.td
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was modifiedclang/test/Sema/shift.c
The file was addedclang/test/Sema/warn-unused-but-set-variables.c
The file was modifiedclang/test/CodeGen/2007-10-30-Volatile.c
The file was modifiedclang/test/CodeGen/X86/x86_32-xsave.c
Commit ebcf030efc5ef149e423f8fa2ca705b590a129ed by balazs.benics
[analyzer] Engine: fix crash with SEH __leave keyword

MSVC has a `try-except` statement.
This statement could containt a `__leave` keyword, which is similar to
`goto` to the end of the try block. The semantic of this keyword is not
implemented.

We should at least parse such code without crashing.

https://docs.microsoft.com/en-us/cpp/cpp/try-except-statement?view=msvc-160

Patch By: AbbasSabra!

Reviewed By: steakhal

Differential Revision: https://reviews.llvm.org/D102280
The file was modifiedclang/lib/StaticAnalyzer/Core/CoreEngine.cpp
The file was addedclang/test/Analysis/ms-seh.cpp
Commit 648f34a2840b75f4081884052f2ccb11f62f8209 by clattner
Merge with mainline.

Differential Revision: https://reviews.llvm.org/D102636
The file was modifiedmlir/include/mlir/Transforms/Passes.td
The file was modifiedmlir/lib/Transforms/Utils/FoldUtils.cpp
The file was modifiedmlir/docs/PatternRewriter.md
The file was addedmlir/test/Transforms/canonicalize-td.mlir
The file was modifiedmlir/include/mlir/Transforms/FoldUtils.h
The file was modifiedmlir/lib/Transforms/Utils/GreedyPatternRewriteDriver.cpp
The file was modifiedmlir/include/mlir/Transforms/GreedyPatternRewriteDriver.h
The file was modifiedmlir/lib/Transforms/Canonicalizer.cpp
Commit 4a12248ee27631c86c2c29d203b22599339ced92 by thakis
[lld/mac] Honor REFERENCED_DYAMICALLY, set it on __mh_execute_header

Has the effect that `__mh_execute_header` stays in the symbol table of
outputs even after running `strip` on the output. I don't know if that's
important for anything -- my motivation for the patch is just is to make
the output more similar to ld64.

(Corresponds to symbolTableInAndNeverStrip in ld64.)

Differential Revision: https://reviews.llvm.org/D102619
The file was modifiedlld/test/MachO/stabs.s
The file was modifiedlld/MachO/InputFiles.cpp
The file was modifiedlld/MachO/Symbols.h
The file was modifiedlld/MachO/SymbolTable.h
The file was modifiedlld/MachO/SymbolTable.cpp
The file was modifiedlld/MachO/MergedOutputSection.cpp
The file was modifiedlld/MachO/UnwindInfoSection.cpp
The file was modifiedlld/test/MachO/symtab.s
The file was modifiedlld/MachO/SyntheticSections.cpp
The file was modifiedlld/MachO/Driver.cpp
The file was addedlld/test/MachO/referenced-dynamically.s
Commit 5879da496cdf44e50cbd8ea062aa36370e218fdb by ajcbik
[mlir][sparse] replace experimental flag with inplace attribute

The experimental flag for "inplace" bufferization in the sparse
compiler can be replaced with the new inplace attribute. This gives
a uniform way of expressing the more efficient way of bufferization.

Reviewed By: bixia

Differential Revision: https://reviews.llvm.org/D102538
The file was modifiedmlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.h
The file was modifiedmlir/test/Dialect/SparseTensor/sparse_lower.mlir
The file was modifiedmlir/lib/Dialect/SparseTensor/Transforms/SparseTensorPasses.cpp
The file was modifiedmlir/lib/Dialect/SparseTensor/Transforms/Sparsification.cpp
The file was modifiedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sampled_matmul.mlir
The file was addedmlir/test/Dialect/SparseTensor/sparse_lower_inplace.mlir
Commit 0c557db617112b429e5abfbcec72d181221bfead by aeubanks
[NewPM] Add C bindings for new pass manager

This patch contains the bare minimum to run the new Pass Manager from the LLVM-C APIs. It does not feature PGOOptions, PassPlugins or Debugify in its current state. Bugzilla: PR48499

Reviewed By: aeubanks

Differential Revision: https://reviews.llvm.org/D102136
The file was modifiedllvm/lib/Passes/CMakeLists.txt
The file was addedllvm/unittests/Passes/PassBuilderBindingsTest.cpp
The file was modifiedllvm/unittests/Passes/CMakeLists.txt
The file was addedllvm/include/llvm-c/Transforms/PassBuilder.h
The file was addedllvm/lib/Passes/PassBuilderBindings.cpp
Commit 24bf554b1059d1ee27040ea90fc046d75950e58d by jpienaar
Add type function for ConstShape op.

- Enables inferring return type for ConstShape, takes into account valid return types;
- The compatible return type function could be reused, leaving that for next use refactoring;

Differential Revision: https://reviews.llvm.org/D102182
The file was modifiedmlir/include/mlir/Dialect/Shape/IR/ShapeOps.td
The file was modifiedmlir/test/Dialect/Shape/ops.mlir
The file was modifiedmlir/test/Dialect/Shape/invalid.mlir
The file was modifiedmlir/lib/Dialect/Shape/IR/Shape.cpp
Commit c870e36be1b21c1f306927fc9eb983390e434278 by peter
gn build: Only build the hwasan runtime in aliasing mode on x86.

The LAM mode is currently untested by check-hwasan, so we only need
to build the runtime in aliasing mode. Because LAM mode will always
need to be conditional (because only certain hardware will support
it) we can always just disable the LAM lit tests if it ever starts
being tested.
The file was modifiedllvm/utils/gn/secondary/compiler-rt/lib/hwasan/BUILD.gn
Commit 0f417789192e74f9d2fad0f6aee4efc394257176 by ndesaulniers
[AArch64] Support customizing stack protector guard

Follow up to D88631 but for aarch64; the Linux kernel uses the command
line flags:

1. -mstack-protector-guard=sysreg
2. -mstack-protector-guard-reg=sp_el0
3. -mstack-protector-guard-offset=0

to use the system register sp_el0 for the stack canary, enabling the
kernel to have a unique stack canary per task (like a thread, but not
limited to userspace as the kernel can preempt itself).

Address pr/47341 for aarch64.

Fixes: https://github.com/ClangBuiltLinux/linux/issues/289
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>

Reviewed By: xiangzhangllvm, DavidSpickett, dmgreen

Differential Revision: https://reviews.llvm.org/D100919
The file was addedllvm/test/CodeGen/AArch64/stack-guard-sysreg.ll
The file was modifiedclang/include/clang/Basic/CodeGenOptions.h
The file was modifiedclang/test/Driver/stack-protector-guard.c
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.cpp
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedllvm/include/llvm/Target/TargetOptions.h
The file was modifiedclang/lib/CodeGen/BackendUtil.cpp
The file was modifiedclang/include/clang/Driver/Options.td
The file was modifiedllvm/lib/CodeGen/CommandFlags.cpp
Commit e9f600f20af66ce7a24adb3971453a1f7ce6bc29 by spatel
[InstCombine] add tests for fneg-of-select; NFC
The file was modifiedllvm/test/Transforms/InstCombine/fneg.ll
Commit 3cdd05e519ddab7d4e4864cadb977a876cd19046 by spatel
[InstCombine] fold fnegs around select

This is one of the folds requested in:
https://llvm.org/PR39480

https://alive2.llvm.org/ce/z/NczU3V

Note - this uses the normal FMF propagation logic
(flags transfer from the final value to new/intermediate ops).
It's not clear if this matches what Alive2 implements,
so we may want to adjust one or the other.
The file was modifiedllvm/test/Transforms/InstCombine/fneg.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
Commit 11c857c71d62b50a8e8b3b2c5ec1488d60bdafab by llvmgnsyncbot
[gn build] Port 0c557db61711
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Passes/BUILD.gn
Commit 3a0b6dc3e84bb91c0dbd721b1931e4a0ff396142 by aeubanks
Revert "[Clang] -Wunused-but-set-parameter and -Wunused-but-set-variable"

This reverts commit 14dfb3831c425c7f22540a2160424224008c257e.

More false positives, see D100581.
The file was modifiedclang/include/clang/Basic/DiagnosticGroups.td
The file was modifiedclang/test/SemaCXX/goto.cpp
The file was modifiedclang/test/SemaObjC/foreach.m
The file was modifiedclang/test/CodeGen/X86/x86_64-xsave.c
The file was modifiedclang/test/CodeGen/2007-10-30-Volatile.c
The file was modifiedclang/test/Misc/warning-wall.c
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was removedclang/test/Sema/warn-unused-but-set-variables.c
The file was modifiedclang/lib/Sema/SemaExprCXX.cpp
The file was modifiedclang/test/SemaCXX/shift.cpp
The file was modifiedclang/lib/Sema/SemaExpr.cpp
The file was modifiedclang/test/Sema/shift.c
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/test/CodeGen/builtins-arm.c
The file was removedclang/test/SemaCXX/warn-unused-but-set-parameters-cpp.cpp
The file was modifiedclang/test/SemaCXX/sizeless-1.cpp
The file was modifiedclang/test/Sema/vector-gcc-compat.c
The file was modifiedclang/test/Sema/vector-gcc-compat.cpp
The file was modifiedclang/test/CXX/expr/expr.prim/expr.prim.lambda/p12.cpp
The file was removedclang/test/Sema/warn-unused-but-set-parameters.c
The file was modifiedclang/test/FixIt/fixit.cpp
The file was modifiedclang/lib/Sema/SemaDecl.cpp
The file was removedclang/test/SemaCXX/warn-unused-but-set-variables-cpp.cpp
The file was modifiedclang/test/CodeGen/builtins-riscv.c
The file was modifiedclang/test/CodeGen/X86/x86_32-xsave.c
Commit 1eb78a64c4a5d3febd1799643e0d0aa7151d52bf by Vitaly Buka
[NFC][scudo] Clang-format tests
The file was modifiedcompiler-rt/test/scudo/stats.c
The file was modifiedcompiler-rt/test/scudo/mismatch.cpp
The file was modifiedcompiler-rt/test/scudo/sized-delete.cpp
The file was modifiedcompiler-rt/test/scudo/threads.c
The file was modifiedcompiler-rt/test/scudo/realloc.cpp
The file was modifiedcompiler-rt/test/scudo/double-free.cpp
The file was modifiedcompiler-rt/test/scudo/secondary.c
The file was modifiedcompiler-rt/test/scudo/preinit.c
The file was modifiedcompiler-rt/test/scudo/alignment.c
The file was modifiedcompiler-rt/test/scudo/options.cpp
The file was modifiedcompiler-rt/test/scudo/aligned-new.cpp
The file was modifiedcompiler-rt/test/scudo/malloc.cpp
The file was modifiedcompiler-rt/test/scudo/rss.c
The file was modifiedcompiler-rt/test/scudo/dealloc-race.c
The file was modifiedcompiler-rt/test/scudo/overflow.c
The file was modifiedcompiler-rt/test/scudo/quarantine.c
The file was modifiedcompiler-rt/test/scudo/valloc.c
The file was modifiedcompiler-rt/test/scudo/memalign.c
The file was modifiedcompiler-rt/test/scudo/random_shuffle.cpp
The file was modifiedcompiler-rt/test/scudo/tsd_destruction.c
The file was modifiedcompiler-rt/test/scudo/interface.cpp
Commit 6791a6b309b7aca847336f0175e97ff177687c7e by 31459023+hctim
Revert "X86: support Swift Async context"

This reverts commit 747e5cfb9f5d944b47fe014925b0d5dc2fda74d7.

Reason: New frame layout broke the sanitizer unwinder. Not clear why,
but seems like some of the changes aren't always guarded by Swyft
checks. See
https://reviews.llvm.org/rG747e5cfb9f5d944b47fe014925b0d5dc2fda74d7 for
more information.
The file was removedllvm/test/CodeGen/X86/swift-async.ll
The file was modifiedllvm/lib/Target/X86/X86MachineFunctionInfo.h
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/lib/Target/X86/X86FrameLowering.cpp
The file was modifiedllvm/lib/Target/X86/X86FastISel.cpp
The file was removedllvm/test/CodeGen/X86/swift-async-reg.ll
The file was modifiedllvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
Commit 02286d96dbb3862a7dc5f7a2481c1f763186b259 by davelee.com
[lldb] Document ctrl-f for completing show-autosuggestion

Document how to complete command line suggestions provided by `show-autosuggestion`.

Differential Revision: https://reviews.llvm.org/D102544
The file was modifiedlldb/source/Core/CoreProperties.td
Commit 65271ffe84165b935cefc9a7d468cb6f46a96a91 by markus.boeck02
[lld][MinGW] Introduce aliases for -Bdynamic and -Bstatic

Besides -Bdynamic and -Bstatic, ld documents additional aliases for both of these options. Instead of -Bstatic, one may write -dn, -non_shared or -static. Instead of -Bdynamic one may write -dy or -call_shared. Source: https://sourceware.org/binutils/docs-2.36/ld/Options.html

This patch adds those aliases to the MinGW driver of lld for the sake of ld compatibility.

Encountered this case while compiling a static Qt 6.1 distribution and got build failures as -static was passed directly to the linker, instead of through the compiler driver.

Differential Revision: https://reviews.llvm.org/D102637
The file was modifiedlld/test/MinGW/lib.test
The file was modifiedlld/MinGW/Options.td
Commit 698568b74c93ab6d9374adc8bdc6e60fbcf41ff1 by efriedma
[clang CodeGen] Don't crash on large atomic function parameter.

I wouldn't recommend writing code like the testcase; a function
parameter isn't atomic, so using an atomic type doesn't really make
sense.  But it's valid, so clang shouldn't crash on it.

The code was assuming hasAggregateEvaluationKind(Ty) implies Ty is a
RecordType, which isn't true.  Just use isRecordType() instead.

Differential Revision: https://reviews.llvm.org/D102015
The file was modifiedclang/test/CodeGen/big-atomic-ops.c
The file was modifiedclang/lib/CodeGen/CGDecl.cpp
The file was modifiedclang/lib/CodeGen/CGCall.cpp
The file was modifiedclang/test/CodeGenCXX/atomic.cpp
Commit 82b52812471ca4e7228714aab15110bb740669d0 by Jinsong Ji
[Driver][test] Don't assume integrated-as

The tests of fdebug-compilation-dir and -ffile-compilation-dir for `-x
assembler` are assuming integrated-as.
If the platform set the no-itegrated-as by default (eg: AIX for now), then this test will
fail.

Add the -integrated-as to aviod relying on the platform defaults.

Reviewed By: thakis

Differential Revision: https://reviews.llvm.org/D102647
The file was modifiedclang/test/Driver/clang_f_opts.c
Commit e2e1a78abcefb396ea1c08990f4cf20ae5068ef8 by riddleriver
[mlir][NFC] Remove stale `createLowerAffinePass` declaration

This pass isn't defined in the Transforms/ library anymore.
The file was modifiedmlir/include/mlir/Transforms/Passes.h
Commit 6e1c1dac4c72cc57f4cd2bc8554e8ac9f2f50b6e by aheejin
[WebAssembly] Nullify DBG_VALUE_LISTs in DebugValueManager

WebAssemblyDebugValueManager class currently does not handle
DBG_VALUE_LIST instructions correctly for two reasons, which are
explained in https://bugs.llvm.org/show_bug.cgi?id=50361.

This effectively nullifies DBG_VALUE_LISTs in
WebAssemblyDebugValueManager so that the info will appear as "optimized
out" in debuggers but still be at least correct in the meantime.

Reviewed By: dschuff, jmorse

Differential Revision: https://reviews.llvm.org/D102589
The file was addedllvm/test/CodeGen/WebAssembly/reg-stackify-dbg.mir
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyDebugValueManager.cpp
Commit ceb1ac9812cb0972cfa34cecc5e5704ae2a22063 by aeubanks
[test] Free triple in PassBuilderBindingsTest
The file was modifiedllvm/unittests/Passes/PassBuilderBindingsTest.cpp