Commit
45ebe38ffc40bb7221fc587bfb4481cf7f53ebbc
by llvm-dev[X86][AVX] Pad small shuffle inputs in combineX86ShufflesRecursively
As detailed on PR45974 and D79987, getFauxShuffleMask is creating nodes on the fly to create shuffles with inputs the same size as the result, causing problems for hasOneUse() checks in later simplification stages.
Currently only combineX86ShufflesRecursively benefits from these widened inputs so I've begun moving the functionality there, and out of getFauxShuffleMask. This allows us to remove the widening from VBROADCAST and *EXTEND* faux shuffle cases.
This just leaves the INSERT_SUBVECTOR case in getFauxShuffleMask still creating nodes, which will require more extensive refactoring.
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 | llvm/lib/Target/X86/X86ISelLowering.cpp |
Commit
d33ba1aa0b505e3f4c55b382f171e8cbef6a1843
by llvm-dev[X86][AVX] getFauxShuffleMask - don't widen shuffle inputs from INSERT_SUBVECTOR(X,SHUFFLE(Y,Z))
Don't create nodes on the fly when decoding INSERT_SUBVECTOR as faux shuffles.
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 | llvm/lib/Target/X86/X86ISelLowering.cpp |
Commit
129c501aa9199c2c5a69c7a6de8ec9873e3d41a4
by spatel[PhaseOrdering] add scalarization test for PR42174; NFC
Motivating test for vector-combine enhancement in D80885. Make sure that vectorization and canonicalization are working together as expected.
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 | llvm/test/Transforms/PhaseOrdering/X86/scalarization.ll |
Commit
15b281d7805dde85af532b954e27e3fc8bf2611d
by llvm-dev[X86][AVX] Add test case described in D79987
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 | llvm/test/CodeGen/X86/oddshuffles.ll |
Commit
f046326847076b50017b3d32db62c3511c478888
by llvm-dev[X86] getFauxShuffleMask/getTargetShuffleInputs - make SelectionDAG const (PR45974).
Try to prevent future node creation issues (as detailed in PR45974) by making the SelectionDAG reference const, so it can still be used for analysis, but not node creation.
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 | llvm/lib/Target/X86/X86ISelLowering.cpp |
Commit
e31f2a894a7bec0a64553d615ef40fa36134844e
by spatel[VectorCombine] add tests for scalarizing binop-with-constant; NFC
Goes with proposal in D80885.
This is adapted from the InstCombine tests that were added for D50992
But these should be adjusted further to provide more interesting scenarios for x86-specific codegen. Eg, vector types/sizes will have different costs depending on ISA attributes.
We also need to add tests that include a load of the scalar variable and add tests that include extra uses of the insert to further exercise the cost model.
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 | llvm/test/Transforms/VectorCombine/X86/insert-binop-with-constant.ll |
Commit
4a2673d79fdbae57a800ec578ee3d58a6890a4f9
by llvm-dev[X86][AVX] Add SimplifyMultipleUseDemandedBits VBROADCAST handling to SimplifyDemandedVectorElts.
As suggested on D79987.
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 | llvm/lib/Target/X86/X86ISelLowering.cpp |
 | llvm/test/CodeGen/X86/oddshuffles.ll |
Commit
91b45fb527af8f1f83b51e7238642d3af011bad4
by spatel[PhaseOrdering] add test for hoisting/CSE (PR46115); NFC
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 | llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll |
Commit
bfdc2552664d6f0bb332a9c6a115877020f3c1df
by spatel[utils] change update_test_checks.py use of 'TMP' value names
As discussed in PR45951: https://bugs.llvm.org/show_bug.cgi?id=45951
There's a potential name collision between update_test_checks.py and -instnamer and/or manually-generated IR test files because all of them try to use the variable name that should never be used: "tmp".
This patch proposes to reduce the odds of collision and adds a warning if we detect the problem. This will cause regression test churn when regenerating CHECK lines on existing files.
Differential Revision: https://reviews.llvm.org/D80584
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 | llvm/utils/UpdateTestChecks/common.py |
Commit
95f65a7c6cebba7dbcd955bc02235f5d3581ff44
by arsenm2AArch64/GlobalISel: Fix incorrect ptrmask usage for alignment
I inverted the mask when I ported to the new form of G_PTRMASK in 8bc03d2168241f7b12265e9cd7e4eb7655709f34.
I don't think this really broke anything, since G_VASTART isn't handled for types with an alignment higher than the stack alignment.
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 | llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-vaarg.mir |
Commit
f23ddbe3c3ae5f40b99ba272afc3d16b800ba8b9
by n.james93clang-tidy and clang-query wont crash with invalid command line options
Summary: Motivated by [[ https://bugs.llvm.org/show_bug.cgi?id=46141 | clang-tidy crashed for unknown command line argument. ]]
Reviewers: aaron.ballman, alexfh
Reviewed By: aaron.ballman
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D80879
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 | clang-tools-extra/test/clang-tidy/infrastructure/invalid-command-line.cpp |
 | clang-tools-extra/test/clang-query/invalid-command-line.cpp |
 | clang-tools-extra/clang-tidy/tool/ClangTidyMain.cpp |
 | clang-tools-extra/clang-query/tool/ClangQuery.cpp |
Commit
dfbfdc96f9e15be40c938cde9b159afd028bf4a2
by spatel[utils] update expected strings in tests; NFC
The script was changes with: https://github.com/llvm/llvm-project/commit/bfdc2552664d6f0bb332a9c6a115877020f3c1df
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 | clang/test/utils/update_cc_test_checks/Inputs/mangled_names.c.funcsig.expected |
 | clang/test/utils/update_cc_test_checks/Inputs/mangled_names.c.expected |
Commit
f4b0ebb89b3086a2bdd8c7dd1f5d142fa09ca728
by n.james93Revert "clang-tidy and clang-query wont crash with invalid command line options"
This reverts commit f23ddbe3c3ae5f40b99ba272afc3d16b800ba8b9.
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 | clang-tools-extra/test/clang-query/invalid-command-line.cpp |
 | clang-tools-extra/clang-query/tool/ClangQuery.cpp |
 | clang-tools-extra/clang-tidy/tool/ClangTidyMain.cpp |
 | clang-tools-extra/test/clang-tidy/infrastructure/invalid-command-line.cpp |
Commit
5952125691571de9bd817551fb1baabe270e73f9
by n.james93clang-tidy and clang-query wont crash with invalid command line options
Motivated by [[ https://bugs.llvm.org/show_bug.cgi?id=46141 | clang-tidy crashed for unknown command line argument. ]]
Reviewed By: aaron.ballman, thakis
Differential Revision: https://reviews.llvm.org/D80879
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 | clang-tools-extra/clang-tidy/tool/ClangTidyMain.cpp |
 | clang-tools-extra/test/clang-query/invalid-command-line.cpp |
 | clang-tools-extra/test/clang-tidy/infrastructure/invalid-command-line.cpp |
 | clang-tools-extra/clang-query/tool/ClangQuery.cpp |
Commit
0cf5ef176b5222b6ee8825a2e4ec843dd7152b46
by clattnerChange some extraneous /// comments to // comments inside methods. NFC.
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 | mlir/lib/Transforms/DialectConversion.cpp |
Commit
8f2f613a6ecc75d592e9bd379b20b95790c00827
by llvm-dev[X86][AVX] combineX86ShufflesRecursively - peekThroughOneUseBitcasts subvector before widening.
This matches what we do for the full sized vector ops at the start of combineX86ShufflesRecursively, and helps getFauxShuffleMask extract more INSERT_SUBVECTOR patterns.
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 | llvm/test/CodeGen/X86/vector-reduce-mul.ll |
 | llvm/lib/Target/X86/X86ISelLowering.cpp |
Commit
22e50833e9564f6be75fcbbabe9d75ca745e778d
by llvm-dev[X86][AVX] Reduce unary target shuffles width if the upper elements aren't demanded.
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 | llvm/test/CodeGen/X86/vector-reduce-mul.ll |
 | llvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll |
 | llvm/lib/Target/X86/X86ISelLowering.cpp |
 | llvm/test/CodeGen/X86/vector-shuffle-combining-avx.ll |
Commit
8abe830093f65a0fc6ba398ee1786d4d96607fdf
by craig.topper[X86] Rewrite how X86PartialReduction finds candidates to consider optimizing.
Previously we walked the users of any vector binop looking for more binops with the same opcode or phis that eventually ended up in a reduction. While this is simple it also means visiting the same nodes many times since we'll do a forward walk for each BinaryOperator in the chain. It was also far more general than what we have tests for or expect to see.
This patch replaces the algorithm with a new method that starts at extract elements looking for a horizontal reduction. Once we find a reduction we walk through backwards through phis and adds to collect leaves that we can consider for rewriting.
We only consider single use adds and phis. Except for a special case if the Add is used by a phi that forms a loop back to the Add. Including other single use Adds to support unrolled loops.
Ultimately, I want to narrow the Adds, Phis, and final reduction based on the partial reduction we're doing. I still haven't figured out exactly what that looks like yet. But restricting the types of graphs we expect to handle seemed like a good first step. As does having all the leaves and the reduction at once.
Differential Revision: https://reviews.llvm.org/D79971
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 | llvm/test/CodeGen/X86/sad.ll |
 | llvm/lib/Target/X86/X86PartialReduction.cpp |
 | llvm/test/CodeGen/X86/madd.ll |
Commit
403d5a5e351956e950fdb8bba07f804fb7d52742
by hubert.reinterpretcast[test][compiler-rt] Avoid LD_PRELOAD for "outer" dynamic linkers
Summary: This patch moves the setting of `LD_PRELOAD` "inwards" to avoid issues where the built library needs to be loaded with the dynamic linker that was configured with the build (and cannot, for example, be loaded by the dynamic linker associated with the `env` utility).
Reviewed By: vitalybuka, nemanjai, jsji
Differential Revision: https://reviews.llvm.org/D79695
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 | compiler-rt/test/asan/TestCases/Linux/preinstalled_signal.cpp |
Commit
c15d5d12c625df52bf82828a6af5ef2dfb6b4533
by hubert.reinterpretcast[Driver] NFC: Use Twine temp to replace std::string local
This patch replaces a `std::string` local used for a concatentation with a `Twine` where the string was being passed into call.
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 | clang/lib/Driver/ToolChains/Gnu.cpp |
Commit
77e1181df446b54391acad08512b540e174cf6e6
by dkszelethus[analyzer] Add dumps to CheckerRegistry
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 | clang/lib/StaticAnalyzer/Frontend/CheckerRegistry.cpp |
 | clang/include/clang/StaticAnalyzer/Frontend/CheckerRegistry.h |
Commit
92448fd23daf966fe368eb8523d9c5a31797d5d8
by maskray[Driver] Simplify Linux::addProfileRTLibs
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 | clang/lib/Driver/ToolChains/Linux.cpp |
Commit
a8ca0ec267050f9ded865a729d50c2c0eb078b7e
by arsenm2AMDGPU/GlobalISel: Add stub reg-bank aware combiner pass
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 | llvm/lib/Target/AMDGPU/AMDGPUCombine.td |
 | llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp |
 | llvm/lib/Target/AMDGPU/CMakeLists.txt |
 | llvm/lib/Target/AMDGPU/AMDGPU.h |
Commit
216bad9a64ebfac51d36210738d2b9aa3de69511
by thakis[gn build] (semi-manually) port a8ca0ec2670
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 | llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn |
Commit
3101601b54fbb8062c179e804974b9fb4e2b7c19
by onelirong[PowerPC] Exploit vabsd on P9
Summary: Exploit vabsd* for for absolute difference of vectors on P9, for example: void foo (char *restrict p, char *restrict q, char *restrict t) { for (int i = 0; i < 16; i++) t[i] = abs (p[i] - q[i]); } this case should be matched to the HW instruction vabsdub.
Reviewed By: steven.zhang
Differential Revision: https://reviews.llvm.org/D80271
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 | llvm/lib/Target/PowerPC/PPCISelLowering.cpp |
 | llvm/test/CodeGen/PowerPC/vec_absd.ll |