Changes

Implement better path matching in FileSpecList::FindCompatibleIndex(...).

Currently a FileSpecList::FindFileIndex(...) will only match the specified FileSpec if:
- it has filename and directory and both match exactly
- if has a filename only and any filename in the list matches

Because of this, we modify our breakpoint resolving so it can handle relative paths by doing some extra code that removes the directory from the FileSpec when searching if the path is relative.

This patch is intended to fix breakpoints so they work as users expect them to by adding the following features:
- allow matches to relative paths in the file list to match as long as the relative path is at the end of the specified path at valid directory delimiters
- allow matches to paths to match if the specified path is relative and shorter than the file paths in the list

This allows us to remove the extra logic from BreakpointResolverFileLine.cpp that added support for setting breakpoints with relative paths.

This means we can still set breakpoints with relative paths when the debug info contains full paths. We add the ability to set breakpoints with full paths when the debug info contains relative paths.

Debug info contains "./a/b/c/main.cpp", the following will set breakpoints successfully:
- /build/a/b/c/main.cpp
- a/b/c/main.cpp
- b/c/main.cpp
- c/main.cpp
- main.cpp
- ./c/main.cpp
- ./a/b/c/main.cpp
- ./b/c/main.cpp
- ./main.cpp

This also ensures that we won't match partial directory names, if a relative path is in the list or is used for the match, things must match at the directory level.

The breakpoint resolving code will now use the new FileSpecList::FindCompatibleIndex(...) function to allow this fuzzy matching to work for breakpoints.

Differential Revision: https://reviews.llvm.org/D130401

Partially revert "[llvm] Repair the modules build with C++17"

This reverts commit db008af501534d4590542253ae3acf783986f5f7 because
this now breaks the non-module build...

[llvm-profgen] Fix perf script parsing issues

Fix two perf script parsing issues:

1) Redirect the error message to a new file. (the error message mixed in the perfscript could screw up the MMAP event line and cause a parsing failure)

2) Changed the MMap parsing error message to warning since the perfscript can still be parsed using the preferred address as base address.

Reviewed By: hoy, wenlei

Differential Revision: https://reviews.llvm.org/D131449

[flang] Don't compute pointer component procedure characteristics when not needed

When a procedure pointer component has an interface that is a forward
reference to a procedure, syntax errors can be emitted if there is
a structure constructor that tries to initialize that component,
since its characteristics are not yet known; however, when the
initializer is a bare NULL(with no mold), those characteristics
don't matter.  Make the characterization of the procedure pointer
component take place only when needed.

Differential Revision: https://reviews.llvm.org/D131100

[mlir][tosa] Updates tosa.equal to use the InferTensorType interface

Reviewed By: jpienaar

Differential Revision: https://reviews.llvm.org/D130373

[X86] Add 64bits test cases for D131358

[NFC][asan] Clang-format a file

[Clang] Allow downgrading to a warning the diagnostic for setting a non fixed enum to a value outside the range of the enumeration values

In D130058 we diagnose the undefined behavior of setting the value outside the
range of the enumerations values for an enum without a fixed underlying type.

Based on feedback we will provide users to the ability to downgrade this
diagnostic to a waring to allow for a transition period. We expect to turn this
diagnostic to an error in the next release.

Differential Revision: https://reviews.llvm.org/D131307

[NFC][asan] Add LIKELY/UNLIKELY on hot memcpy paths

[CMake] Build lib/gwp_asan/tests with -std=c++17

With the recent llvm-project C++17 switch (D130689), gwp_asan/tests may fail to
link with some versions of GCC (https://github.com/llvm/llvm-project/issues/56994):

> backtrace.cpp:(.text+0xca6): undefined reference to `gwp_asan::AllocationMetadata::kMaxTraceLengthToCollect'

I cannot reproduce this issue by myself, but notice that currently
lib/gwp_asan/*.cpp get -std=c++17 while lib/gwp_asan/tests/*.cpp don't
(therefore may use -std=g++14 default from Clang and older GCC). Using -std=c++17
for lib/gwp_asan/tests will ensure that backtrace.cpp uses inline variable and will assuredly avoid the
possible GCC issue.

In the long-term, we should add -std=c++17 to a central place like generate_compiler_rt_tests.

Reviewed By: dyung

Differential Revision: https://reviews.llvm.org/D131440

[mlir][tosa] Use arith::maxf/arith::minf in lowering from tosa

now that `arith` dialect has maxf/minf use it instead of cmp/select.
Also refactor clamp helpers to make them simlper.

Reviewed By: rsuderman

Differential Revision: https://reviews.llvm.org/D131426

[PowerPC] mapping hardward loop intrinsics to powerpc pseudo

Map hardware loop intrinsics loop_decrement and set_loop_iteration
to the new PowerPC pseudo instructions, so that the hardware loop
intrinsics will be expanded to normal cmp+branch form or ctrloop
form based on the CTR register usage on MIR level.

Reviewed By: lkail

Differential Revision: https://reviews.llvm.org/D123366

[AArch64] Fix and add A64FX scheduling resource/latency info

1. Missing instruction information (FTSSEL, FMSB, PFIRST and RDFFR)
   is added and CompleteModel is set to one.

2. Information for pseudo SVE instructions is added. Those
   instructions are present at the time of scheduling.

3. Resource and latency information for SVE instructions is modified
   to be more accurate.
   For example, the description for CMPEQ, which consumes one cycle
   each of unit FLA and PPR, is as follows.
```
Previous:
  def A64FXGI01 : ProcResGroup<[A64FXIPFLA, A64FXIPPR]>;
  def A64FXWrite_4Cyc_GI01 : SchedWriteRes<[A64FXGI01]> {...
Modified:
  def A64FXGI0 : ProcResGroup<[A64FXIPFLA]>;
  def A64FXGI1 : ProcResGroup<[A64FXIPPR]>;
  def A64FXWrite_CMP : SchedWriteRes<[A64FXGI0, A64FXGI1]> {...
```

Reference: A64FX Microarchitecture Manual (Table 16-3)
https://github.com/fujitsu/A64FX/blob/master/doc/A64FX_Microarchitecture_Manual_en_1.7.pdf

Reviewed By: dmgreen, kawashima-fj

Differential Revision: https://reviews.llvm.org/D131165

[Driver] Add -Xclang= as an alias for -Xclang

Driver options taking a value typically use `=` as the separator, instead of a
space. Unfortunately many older driver options do not stick with the rule, but I
find -Xclang used a lot and will be convenient if -Xclang= exists.

For build systems using a string array instead of a string to indicate compiler options,
`["-Xclang=-foo"]` is more convenient than `["-Xclang", "-foo"]`.
If a tool wants to filter out -Xclang=-foo, it is trivial for the `=` form, but
complex for the space separated form.

Reviewed By: jhuber6

Differential Revision: https://reviews.llvm.org/D131455

[NFC][asan] Fix Condition annotation after 30bbb73bb448

[asan] Avoid few branches on memcpy hot path

[LLDB] Remove undefined behavior in TestConstStaticIntegralMember.py

Setting an enum without a fixed underlying type to a value which is outside the
value range is undefined behavior.

The initializer needs to be a constant expression and therefore this was always
ill-formed we just were not diagnosing it before.

See D130058 and D131307 for more details.

Differential Revision: https://reviews.llvm.org/D131460

[lldb] Refactor Symbols::DownloadObjectAndSymbolFile

 - Reduce indentation
 - Extract caching of the DbgShellCommand and the dsymForUUID executable
   (or equivalent)
 - Check the DBGShellCommands before falling back to
   /usr/local/bin/dsymForUUID
 - Don't check ~rc/bin/dsymForUUID
 - Improve error reporting
 - Don't cache the value of LLDB_APPLE_DSYMFORUUID_EXECUTABLE

Differential revision: https://reviews.llvm.org/D131303

[mlir] LLVM_FALLTHROUGH => [[fallthrough]]. NFC

LLVM_FALLTHROUGH => [[fallthrough]]. NFC

[MachinePipeliner] Fix Phi generation failure for large stages

The previous code overwrites VRMap for prologue stages during Phi
generation if a register spans many stages.
As a result, the wrong register is used as the one coming from
the prologue in Phis at later stages. (A process exists to correct
this, but it does not work in all cases.)
In addition, VRMap for prologue must be preserved until addBranches().

This patch fixes them by separating the map for Phis into a different
variable (VRMapPhi).

Reviewed By: bcahoon

Differential Revision: https://reviews.llvm.org/D127840

[NFC] fix warning

[Basic] Deprecate MapEntryOptionalStorage::{hasValue,getValue}

MapEntryOptionalStorage is an underlying storage class for
OptionalStorage<clang::DirectoryEntryRef>.

This patch deprecates:

  OptionalStorage<clang::DirectoryEntryRef>::hasValue
  OptionalStorage<clang::DirectoryEntryRef>::getValue

as there is no known users of these two methods.

Differential Revision: https://reviews.llvm.org/D131368

[llvm] Alternative attempt at fixing the modules build with C++17

My initial attempt in db008af50153 resulted in "error: no viable
constructor or deduction guide for deduction of template arguments of
'array'". Let's see if we can work around that by using an ArrayRef with
an explicit template argument.

[asan] Faster version of QuickCheckForUnpoisonedRegion

Slightly helps with performance regression after D128146.

[globalisel] Select register bank for DBG_VALUE

The register operand of DBG_VALUE is not selected to a proper register
bank in both AArch64 and X86. This would cause getRegClass crash after
global ISel. After discussion, we think the MIR should assume all
vritual register should be set proper register class after global ISel,
so this patch is to fix the gap of DBG_VALUE for AArch64 and X86.

Differential Revision: https://reviews.llvm.org/D129037

[llvm] Don't rely on C++17 deduction guide for array creation

Seems like at least one bot (clang-ppc64-aix) is having trouble with the
C++17 deduction guide for array creation. Specify the template arguments
explicitly.

[LoongArch] Add codegen support for bswap

Differential Revision: https://reviews.llvm.org/D131352

[LoongArch] Implement branch analysis

This allows a number of optimisation passes to work.
E.g. BranchFolding and MachineBlockPlacement.

Differential Revision: https://reviews.llvm.org/D131316

[LoongArch] Add codegen support for not

Differential Revision: https://reviews.llvm.org/D131384