Changes

Summary

  1. [VPlan] Queue (block, operand) pairs together (NFC). (details)
  2. [llvm-profgen] Ignore broken LBR samples (details)
  3. [lld/mac] Search .tbd before binary for framework files too (details)
  4. [AMDGPU] Switch PostRA sched to MachineSched (details)
  5. Revert "[WebAssembly] Rethrow longjmp in EH handling if EmSjLj is enabled" (details)
  6. [CMake][AIX] Disable visibility options in build (details)
  7. [SCEV] Attempt to define what flags are legal on a SCEV (details)
Commit 7359450e6a053f11cc628afcfc562aeb1da229cc by flo
[VPlan] Queue (block, operand) pairs together (NFC).

Instead of discovering the sink-to block for each operand in the main
loop, the sink-to block can instead be directly queued with the
operands.

This simplifies processing in the main loop and is a NFC change split
off from D104254 as suggested there.
The file was modifiedllvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Commit 8cbbd7e0b2aa21ce7e416cfb63d9965518948c35 by hoy
[llvm-profgen] Ignore broken LBR samples

Perf script can sometimes give disordered LBR samples like below.

```
          b022500
          32de0044
          3386e1d1
      7f118e05720c
      7f118df2d81f
0x2a0b9622/0x2a0b9610/P/-/-/1  0x2a0b79ff/0x2a0b9618/P/-/-/2  0x2a0b7a4a/0x2a0b79e8/P/-/-/1  0x2a0b7a33/0x2a0b7a46/P/-/-/1  0x2a0b7a42/0x2a0b7a23/P/-/-/1  0x2a0b7a21/0x2a0b7a37/P/-/-/2  0x2a0b79e6/0x2a0b7a07/P/-/-/1  0x2a0b79d4/0x2a0b79dc/P/-/-/2  0x2a0b7a03/0x2a0b79aa/P/-/-/1  0x2a0b79a8/0x2a0b7a00/P/-/-/234  0x2a0b9613/0x2a0b7930/P/-/-/1  0x2a0b9622/0x2a0b9610/P/-/-/1  0x2a0b79ff/0x2a0b9618/P/-/-/2  0x2a0b7a4a/0x2aWarning:
Processed 10263226 events and lost 1 chunks!

```
Note that the last LBR record `0x2a0b7a4a/0x2aWarning:` . Currently llvm-profgen does not detect that and as a result an uninitialized branch target value will be used. The uninitialized value can cause creepy instruction ranges created which which in turn will result in a completely wrong profile. An example is like

```

.... @ _ZN5folly13loadUnalignedIsEET_PKv]:18446744073709551615:18446744073709551615
1: 18446744073709551615
!CFGChecksum: 4294967295
!Attributes: 0
```

Reviewed By: wenlei, wlei

Differential Revision: https://reviews.llvm.org/D109637
The file was modifiedllvm/tools/llvm-profgen/ProfileGenerator.cpp
The file was modifiedllvm/tools/llvm-profgen/PerfReader.h
The file was modifiedllvm/tools/llvm-profgen/PerfReader.cpp
Commit ed2f0ad307193165a64c9847c24d8c9f4219f42b by thakis
[lld/mac] Search .tbd before binary for framework files too

This matters for example for the iPhoneSimulator14.0.sdk, which has
a System/Library/Frameworks/UIKit.framework/UIKit that has
LC_BUILD_VERSION with minos of 14.0, so linking against that file
will produce warnings like:

   .../iPhoneSimulator14.0.sdk/System/Library/Frameworks/UIKit.framework/UIKit
   has version 14.0.0, which is newer than target minimum of 12.0.0

when targeting x86_64-apple-ios12.0-simulator. That doens't happen when
linking against UIKit.tbd instead, obviously.

Linking with RC_TRACE_DYLIB_SEARCHING=1 shows that ld64 also searches
the tbd file first, and we already get that right for non-framework
dylibs.

Fixes crbug.com/1249456.

Differential Revision: https://reviews.llvm.org/D109768
The file was modifiedlld/test/MachO/link-search-order.s
The file was modifiedlld/MachO/DriverUtils.cpp
Commit 3ce1b9631a50d4853ab6d5750eaf50951b49e89d by Joseph.Nash
[AMDGPU] Switch PostRA sched to MachineSched

Use GCNHazardRecognizer in postra sched.
Updated tests for the new schedules.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D109536

Change-Id: Ia86ba2ae168f12fb34b4d8efdab491f84d936cde
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/load-unaligned.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/shl.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/vector-extract-insert.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fexp.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.store.2d.d16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/vgpr-liverange.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/vgpr-descriptor-waterfall-loop-idom-update.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/flat-scratch-init.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/usubsat.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/move-addr64-rsrc-dead-subreg-writes.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.h
The file was modifiedllvm/test/CodeGen/AMDGPU/stack-realign.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/bypass-div.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/idot4s.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/ssubsat.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.a16.dim.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i128.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/amdgpu-mul24-knownbits.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/load-local.96.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/urem64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/call-preserved-registers.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/memory-legalizer-private-nontemporal.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/cttz_zero_undef.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/callee-special-input-vgprs.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/strict_fma.f16.ll
The file was modifiedllvm/lib/Target/AMDGPU/GCNSubtarget.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/saddo.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.g16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/roundeven.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llc-pipeline.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fmax_legacy.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/fmul.v2f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/cc-update.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fptosi.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/sdiv64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/store-local.96.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.a16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/load-local.128.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/branch-relaxation-inst-size-gfx10.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/store-local.96.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/bswap.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fp_to_sint.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/bitreverse.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/srem64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/frem.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fmin_legacy.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.dim.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/agpr-remat.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/anyext.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/strict_fadd.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fshr.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.atomic.dim.a16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/shl_add_ptr.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/load-local.128.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i8.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fp-min-max-atomics.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/call-waitcnt.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.o.dim.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/max.i16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/ashr.v2i16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/frame-setup-without-sgpr-to-vgpr-spills.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/sint_to_fp.i64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/fma.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/callee-frame-setup.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/idot2.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/add3.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/load-constant.96.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/lshl64-to-32.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.fma.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.a16.dim.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fpow.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.mulo.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/callee-special-input-sgprs.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/half.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/udivrem.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/uaddsat.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/cluster_stores.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/idot4u.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/load-local.96.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/captured-frame-index.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/callee-special-input-sgprs-fixed-abi.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/idot8s.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/udiv64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/select64.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/store-local.128.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/lds-atomic-fmin-fmax.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/shift-i128.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/mul.i16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/strict_fmul.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.atomic.inc.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/memory-legalizer-local-nontemporal.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fpext.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/load-global-i16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/load-constant-i16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fshl.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/memory_clause.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/non-entry-alloca.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/store-weird-sizes.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/ctpop16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/memory-legalizer-private-volatile.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/lshr.v2i16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/insertelement-stack-lower.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/copy-illegal-type.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.round.f64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2d.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/add.v2i16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/floor.f64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/fmed3.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/srl.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/ds_read2.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.a16.dim.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/sign_extend.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.a16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fneg-fabs.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/skip-if-dead.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/flat-scratch.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/min.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/select.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/gfx-callable-preserved-registers.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/trunc.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.atomic.dec.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.private.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/xor3.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/sra.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/ds_write2.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/idot8u.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/saddsat.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/spill-scavenge-offset.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/sdiv.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/memory-legalizer-local-volatile.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.global.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/store-local.128.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/kernel-args.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fptoui.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/idiv-licm.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/orn2.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/shl.v2i16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/vector-alloca-bitcast.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/ds-alignment.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
Commit 468c4409f61455a168f9d8c187c75435487adf8c by aheejin
Revert "[WebAssembly] Rethrow longjmp in EH handling if EmSjLj is enabled"

This reverts commit b7b4ebbcfa463a7fae61dca7cec30c5b747bdec8.

Reason: This breaks several code-size tests in Emscripten test suite
because this exports `emscripten_longjmp` for programs that didn't do it
before.
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
The file was removedllvm/test/CodeGen/WebAssembly/lower-em-ehsjlj-sjlj-not-used.ll
Commit 26b803177456112b4c6c2d30b7c3dc4d439af7e2 by daltenty
[CMake][AIX] Disable visibility options in build

Visibility options currently have limited support on AIX and may cause warnings or errors
depending on the build compiler used.

Reviewed By: ZarkoCA

Differential Revision: https://reviews.llvm.org/D108467
The file was modifiedllvm/lib/Target/CMakeLists.txt
The file was modifiedllvm/cmake/modules/HandleLLVMOptions.cmake
Commit c4048d8f50aaf2c4c13b8d3e138abc34a22da754 by listmail
[SCEV] Attempt to define what flags are legal on a SCEV

This is an attempt to define what the current semantics are closest too.  Unfortunately, the current implementation does appear to be inconsistent with all semantic variants we've considered.  This semantics is the one which seems to be closest to the spirit of the code, and that matched several long time contributors mental models of how the code "should work".

https://bugs.llvm.org/show_bug.cgi?id=51817 tracks the list of currently known violations of these rules.  A series of follow up patches will be addressing each now that we've defined them to be bugs.

Differential Revision: https://reviews.llvm.org/D109553
The file was modifiedllvm/include/llvm/Analysis/ScalarEvolution.h