Commit
a1857e2ce35e749e16d092305f53c0f2bf2e9c7b
by stl[libcxx][test] Fix span tests. span.cons/container.pass.cpp N4842 22.7.3.2 [span.cons]/13 constrains span's range constructor for ranges::contiguous_range (among other criteria). 24.4.5 [range.refinements]/2 says that contiguous_range requires data(), and (via contiguous_range, random_access_range, bidirectional_range, forward_range, input_range, range) it also requires begin() and end() (see 24.4.2 [range.range]/1). Therefore, IsAContainer needs to provide begin() and end(). (Detected by MSVC's concept-constrained implementation.) span.cons/stdarray.pass.cpp This test uses std::array, so it must include <array>. <span> isn't guaranteed to drag in <array>. (Detected by MSVC's implementation which uses a forward declaration to avoid dragging in <array>, for increased compiler throughput.) span.objectrep/as_bytes.pass.cpp span.objectrep/as_writable_bytes.pass.cpp Testing `sp.extent == std::dynamic_extent` triggers MSVC warning C4127 "conditional expression is constant". Using `if constexpr` is a simple way to avoid this without disrupting anyone else (as span requires C++20 mode). span.tuple/get.pass.cpp 22.7.3.2 [span.cons]/4.3: "Preconditions: If extent is not equal to dynamic_extent, then count is equal to extent." These lines were triggering undefined behavior (detected by assertions in MSVC's implementation). I changed the count arguments in the first two chunks, followed by changing the span extents, in order to preserve the test's coverage and follow the existing pattern. span.cons/span.pass.cpp 22.7.3.2 [span.cons]/18.1 constrains span's converting constructor with "Extent == dynamic_extent || Extent == OtherExtent is true". This means that converting from dynamic extent to static extent is not allowed. (Other constructors tested elsewhere, like span(It first, size_type count), can be used to write such code.) As this is the test for the converting constructor, I have: * Removed the "dynamic -> static" case from checkCV(), which is comprehensive. * Changed the initialization of std::span<T, 0> s1{}; in testConstexprSpan() and testRuntimeSpan(), because s1 is used below. * Removed ASSERT_NOEXCEPT(std::span<T, 0>{s0}); from those functions, as they are otherwise comprehensive. * Deleted testConversionSpan() entirely. Note that this could never compile (it had a bool return type, but forgot to say `return`). And it couldn't have provided useful coverage, as the /18.2 constraint "OtherElementType(*)[] is convertible to ElementType(*)[]" permits only cv-qualifications, which are already tested by checkCV().
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 | libcxx/test/std/containers/views/span.objectrep/as_writable_bytes.pass.cpp |
 | libcxx/test/std/containers/views/span.cons/stdarray.pass.cpp |
 | libcxx/test/std/containers/views/span.objectrep/as_bytes.pass.cpp |
 | libcxx/test/std/containers/views/span.tuple/get.pass.cpp |
 | libcxx/test/std/containers/views/span.cons/container.pass.cpp |
 | libcxx/test/std/containers/views/span.cons/span.pass.cpp |
Commit
0a4daff6e26f276dd92e777b597e94e093ae018d
by Raphael Isemann[lldb][NFC] Remove redundant ClangASTContext constructor that takes ArchSpec ArchSpec has a superset of the information of llvm::Triple but the ClangASTContext just uses the Triple part of it. This deletes the ArchSpec constructor and all the code creating ArchSpecs and instead just uses the llvm::Triple constructor for ClangASTContext.
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 | lldb/source/Symbol/ClangASTContext.cpp |
 | lldb/include/lldb/Symbol/ClangASTContext.h |
Commit
903e5c3028d61481c570c09eeb5e7a920c2d7d38
by Tim NorthoverAArch64: add missing Apple CPU names and use them by default. Apple's CPUs are called A7-A13 in official communication, occasionally with weird suffixes which we probably don't need to care about. This adds each one and describes its features. It also switches the default CPU to the canonical name for Cyclone, but leaves legacy support in so that existing bitcode still compiles.
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 | llvm/lib/Target/AArch64/AArch64SystemOperands.td |
 | clang/test/Preprocessor/aarch64-target-features.c |
 | llvm/lib/Target/AArch64/AArch64.td |
 | llvm/unittests/Support/TargetParserTest.cpp |
 | clang/lib/Driver/ToolChains/Arch/AArch64.cpp |
 | clang/test/Driver/arm64-as.s |
 | llvm/include/llvm/Support/AArch64TargetParser.def |
 | llvm/lib/Target/AArch64/AArch64Subtarget.cpp |
 | llvm/lib/Target/AArch64/AArch64Subtarget.h |
 | llvm/test/CodeGen/AArch64/arm64-zero-cycle-zeroing.ll |
 | clang/test/Driver/aarch64-cpus.c |
Commit
b212eb7159b40c98b3c40619b82b996fb903282b
by kadircetRevert "[InstCombine] fold zext of masked bit set/clear" This reverts commit a041c4ec6f7aa659b235cb67e9231a05e0a33b7d. This looks like a non-trivial change and there has been no code reviews (at least there were no phabricator revisions attached to the commit description). It is also causing a regression in one of our downstream integration tests, we haven't been able to come up with a minimal reproducer yet.
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 | llvm/test/Transforms/InstCombine/zext.ll |
 | llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp |
Commit
dfeb8730e24c5a4493e9092907b7ff083fae43a5
by th3charlie[llvm-symbolizer]Fix printing of malformed address values not passed via stdin Summary: relates https://bugs.llvm.org/show_bug.cgi?id=44443 Adding missing newline when printing bad input values. Fix testcase Reviewers: jhenderson Reviewed By: jhenderson Subscribers: rupprecht, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72313
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 | llvm/tools/llvm-symbolizer/llvm-symbolizer.cpp |
 | llvm/test/tools/llvm-symbolizer/invalid-input-address.test |
 | llvm/test/tools/llvm-symbolizer/sym.test |
Commit
518597c1737646ea1f087c1fa43109f689adf7a6
by Raphael Isemann[lldb] Remove default llvm::Triple argument from ClangASTContext constructor Creating an ASTContext with an unknown triple is rarely a good idea (as usually all our ASTs have a valid triple that is either from the host or the target) and the default argument makes it far to easy to implicitly create such an AST. Let's remove it and force people to pass a triple. The only place where we don't pass a triple is a DWARFASTParserClangTests where we now just pass the host triple instead (the test doesn't depend on any triple so this shouldn't change anything).
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 | lldb/include/lldb/Symbol/ClangASTContext.h |
 | lldb/unittests/SymbolFile/DWARF/DWARFASTParserClangTests.cpp |
Commit
96d2d96b03ff590867cd6578eb7f6d32770cbbf0
by sam.parker[NFC][ARM] Update tests Run the update_mir_test on some of the low-overhead loop tests.
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 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/mov-after-dls.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/cond-mov.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/revert-while.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/size-limit.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/end-positive-offset.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/safe-def-no-mov.mir |
Commit
1cf11a4c67a15ab5493ef424c898accf49012caa
by a.v.lapshin[Dsymutil][Debuginfo][NFC] Reland: Refactor dsymutil to separate DWARF optimizing part. #2. Summary: This patch relands D71271. The problem with D71271 is that it has cyclic dependency: CodeGen->AsmPrinter->DebugInfoDWARF->CodeGen. To avoid cyclic dependency this patch puts implementation for DWARFOptimizer into separate library: lib/DWARFLinker. Thus the difference between this patch and D71271 is in that DWARFOptimizer renamed into DWARFLinker and it`s files are put into lib/DWARFLinker. Reviewers: JDevlieghere, friss, dblaikie, aprantl Reviewed By: JDevlieghere Subscribers: thegameg, merge_guards_bot, probinson, mgorny, hiraditya, llvm-commits Tags: #llvm, #debug-info Differential Revision: https://reviews.llvm.org/D71839
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 | llvm/tools/dsymutil/DwarfStreamer.h |
 | llvm/tools/dsymutil/LLVMBuild.txt |
 | llvm/lib/DWARFLinker/DWARFLinker.cpp |
 | llvm/lib/CodeGen/NonRelocatableStringpool.cpp |
 | llvm/tools/dsymutil/DwarfStreamer.cpp |
 | llvm/include/llvm/DWARFLinker/DWARFLinkerCompileUnit.h |
 | llvm/tools/dsymutil/DeclContext.h |
 | llvm/include/llvm/DWARFLinker/DWARFLinkerDeclContext.h |
 | llvm/lib/DWARFLinker/CMakeLists.txt |
 | llvm/lib/DWARFLinker/DWARFLinkerDeclContext.cpp |
 | llvm/tools/dsymutil/CompileUnit.cpp |
 | llvm/tools/dsymutil/CMakeLists.txt |
 | llvm/include/llvm/DWARFLinker/DWARFLinker.h |
 | llvm/lib/DWARFLinker/DWARFLinkerCompileUnit.cpp |
 | llvm/lib/DWARFLinker/LLVMBuild.txt |
 | llvm/include/llvm/CodeGen/NonRelocatableStringpool.h |
 | llvm/tools/dsymutil/DwarfLinker.cpp |
 | llvm/tools/dsymutil/DwarfLinkerForBinary.h |
 | llvm/tools/dsymutil/DeclContext.cpp |
 | llvm/tools/dsymutil/CompileUnit.h |
 | llvm/tools/dsymutil/DwarfLinkerForBinary.cpp |
 | llvm/lib/LLVMBuild.txt |
 | llvm/lib/CMakeLists.txt |
 | llvm/tools/dsymutil/DwarfLinker.h |
Commit
111ec8c2a435440a72904aeca22c9f3046de5f42
by thakis[gn build] (manually) merge 1cf11a4c67a15
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 | llvm/utils/gn/secondary/llvm/tools/dsymutil/BUILD.gn |
 | llvm/utils/gn/secondary/llvm/lib/DWARFLinker/BUILD.gn |
Commit
55a51e1c79a21080289ba88d5eac4bbe54ec4272
by aaronDisallow an empty string literal in an asm label An empty string literal in an asm label does not make a whole lot of sense. GCC does not diagnose such a construct, but it also generates code that cannot be assembled by gas should two symbols have an empty asm label within the same TU. This does not affect an asm statement with an empty string literal, which is still a useful construct.
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 | clang/lib/Parse/ParseDecl.cpp |
 | clang/lib/Parse/ParseExprCXX.cpp |
 | clang/lib/Parse/ParseDeclCXX.cpp |
 | clang/lib/Parse/Parser.cpp |
 | clang/test/Parser/asm.c |
 | clang/include/clang/Basic/DiagnosticParseKinds.td |
 | clang/test/AST/ast-print-attr.c |
 | clang/test/CodeGen/asm-label.c |
 | clang/include/clang/Parse/Parser.h |
 | clang/lib/Parse/ParseStmtAsm.cpp |
Commit
346f6b54bd1237a9a5a2d9bb1e424b57dc178998
by anna.welker[ARM][MVE] Enable masked gathers from vector of pointers Adds a pass to the ARM backend that takes a v4i32 gather and transforms it into a call to MVE's masked gather intrinsics. Differential Revision: https://reviews.llvm.org/D71743
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 | llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp |
 | llvm/test/CodeGen/ARM/O3-pipeline.ll |
 | llvm/lib/Target/ARM/ARM.h |
 | llvm/lib/Target/ARM/ARMTargetTransformInfo.h |
 | llvm/test/CodeGen/Thumb2/mve-gather-ind32-unscaled.ll |
 | llvm/test/CodeGen/Thumb2/mve-gather-scatter-opt.ll |
 | llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp |
 | llvm/lib/Target/ARM/ARMTargetMachine.cpp |
 | llvm/lib/Target/ARM/CMakeLists.txt |
 | llvm/test/CodeGen/Thumb2/mve-gather-ptrs.ll |
 | llvm/test/CodeGen/Thumb2/mve-gather-ind32-scaled.ll |
Commit
26ac7923e7df982081e726bb2856fadb35d6d35d
by llvmgnsyncbot[gn build] Port 346f6b54bd1
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 | llvm/utils/gn/secondary/llvm/lib/Target/ARM/BUILD.gn |
Commit
7a77ad144694ced7b553c644bcbcbfffac2b5fe1
by aaronFixing a formatting nit; NFC
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 | clang/lib/ASTMatchers/Dynamic/Registry.cpp |
Commit
b2c2fe72197267af90b4b6a187ab6163f806ce00
by qiucofan[NFC] Move InPQueue into arguments of releaseNode This patch moves `InPQueue` into function arguments instead of template arguments of `releaseNode`, which is a cleaner approach. Differential Revision: https://reviews.llvm.org/D72125
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 | llvm/lib/CodeGen/MachineScheduler.cpp |
 | llvm/include/llvm/CodeGen/MachineScheduler.h |
Commit
8e2b44f7e0641d3776021163ee6a77089cca9cdc
by mikael.holmen[Intrinsic] Add fixed point division intrinsics. Summary: This patch adds intrinsics and ISelDAG nodes for signed and unsigned fixed-point division: llvm.sdiv.fix.* llvm.udiv.fix.* These intrinsics perform scaled division on two integers or vectors of integers. They are required for the implementation of the Embedded-C fixed-point arithmetic in Clang. Patch by: ebevhan Reviewers: bjope, leonardchan, efriedma, craig.topper Reviewed By: craig.topper Subscribers: Ka-Ka, ilya, hiraditya, jdoerfert, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D70007
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 | llvm/include/llvm/IR/Intrinsics.td |
 | llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp |
 | llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp |
 | llvm/test/CodeGen/X86/udiv_fix.ll |
 | llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp |
 | llvm/lib/CodeGen/TargetLoweringBase.cpp |
 | llvm/lib/IR/Verifier.cpp |
 | llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp |
 | llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp |
 | llvm/include/llvm/CodeGen/ISDOpcodes.h |
 | llvm/include/llvm/CodeGen/TargetLowering.h |
 | llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h |
 | llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp |
 | llvm/docs/LangRef.rst |
 | llvm/test/CodeGen/X86/sdiv_fix.ll |
 | llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp |
 | llvm/include/llvm/Target/TargetSelectionDAG.td |
Commit
ba129c7d0f5c7c32398ad708c88e14cb06a339ad
by abpostelnicu[clang-tidy] Disable match on `if constexpr` statements in template instantiation for `readability-misleading-indentation` check. Summary: Fixes fixes `readability-misleading-identation` for `if constexpr`. This is very similar to D71980. Reviewers: alexfh Subscribers: xazax.hun, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D72333
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 | clang-tools-extra/test/clang-tidy/checkers/readability-misleading-indentation.cpp |
 | clang-tools-extra/clang-tidy/readability/MisleadingIndentationCheck.cpp |
Commit
3100480925df10960c1e0a077dd9875037d3fe29
by simon.tatham[ARM,MVE] Intrinsics for partial-overwrite imm shifts. This batch of intrinsics covers two sets of immediate shift instructions, which have in common that they only overwrite part of their output register and so they need an extra input giving its previous value. The VSLI and VSRI instructions shift each lane of the input vector left or right just as if they were normal immediate VSHL/VSHR, but then they only overwrite the output bits that correspond to actual shifted bits of the input. So VSLI will leave the low n bits of each output lane unchanged, and VSRI the same with the top n bits. The V[Q][R]SHR[U]N family are all narrowing shifts: they take an input vector of 2n-bit integers, shift each lane right by a constant, and then narrowing the shifted result to only n bits. So they only overwrite half of the n-bit lanes in the output register, and the B/T suffix indicates whether it's the bottom or top half of each 2n-bit lane. I've implemented the whole of the latter family using a single IR intrinsic `vshrn`, which takes a lot of i32 parameters indicating which instruction it expands to (by specifying signedness of the input and output types, whether it saturates and/or rounds, etc). Reviewers: dmgreen, MarkMurrayARM, miyuki, ostannard Reviewed By: dmgreen Subscribers: kristof.beyls, hiraditya, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D72328
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 | clang/test/CodeGen/arm-mve-intrinsics/vector-shift-imm-dyadic.c |
 | llvm/test/CodeGen/Thumb2/mve-intrinsics/vector-shift-imm-dyadic.ll |
 | llvm/include/llvm/IR/IntrinsicsARM.td |
 | clang/include/clang/Basic/arm_mve.td |
 | clang/include/clang/Basic/arm_mve_defs.td |
 | llvm/lib/Target/ARM/ARMInstrMVE.td |
 | clang/utils/TableGen/MveEmitter.cpp |
Commit
dac7b23cc3efbb4ccb6a9ea101f367f866f334e2
by simon.tatham[ARM,MVE] Intrinsics for variable shift instructions. This batch of intrinsics fills in all the shift instructions that take a variable shift distance in a register, instead of an immediate. Some of these instructions take a single shift distance in a scalar register and apply it to all lanes; others take a vector of per-lane distances. These instructions are all basically one family, varying in whether they saturate out-of-range values, and whether they round when bits are shifted off the bottom. I've implemented them at the IR level by a much smaller family of IR intrinsics, which take flag parameters to indicate saturating and/or rounding (along with the usual one to specify signed/unsigned integers). An oddity is that all of them are //left// shift instructions – but if you pass a negative shift count, they'll shift right. So the vector shift distances are always vectors of //signed// integers, regardless of whether you're considering the other input vector to be of signed or unsigned. Also, even the simplest `vshlq` instruction in this family (neither saturating nor rounding) has to be implemented as an IR intrinsic, because the ordinary LLVM IR `shl` operation would consider an out-of-range shift count to be undefined behavior. Reviewers: dmgreen, MarkMurrayARM, miyuki, ostannard Reviewed By: dmgreen Subscribers: kristof.beyls, hiraditya, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D72329
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 | clang/include/clang/Basic/arm_mve_defs.td |
 | llvm/include/llvm/IR/IntrinsicsARM.td |
 | clang/test/CodeGen/arm-mve-intrinsics/vector-shift-var.c |
 | llvm/test/CodeGen/Thumb2/mve-intrinsics/vector-shift-var.ll |
 | llvm/lib/Target/ARM/ARMInstrMVE.td |
 | clang/include/clang/Basic/arm_mve.td |
Commit
ead815924e6ebeaf02c31c37ebf7a560b5fdf67b
by kazu[JumpThreading] Thread jumps through two basic blocks Summary: This patch teaches JumpThreading.cpp to thread through two basic blocks like: bb3: %var = phi i32* [ null, %bb1 ], [ @a, %bb2 ] %tobool = icmp eq i32 %cond, 0 br i1 %tobool, label %bb4, label ... bb4: %cmp = icmp eq i32* %var, null br i1 %cmp, label bb5, label bb6 by duplicating basic blocks like bb3 above. Once we duplicate bb3 as bb3.dup and redirect edge bb2->bb3 to bb2->bb3.dup, we have: bb3: %var = phi i32* [ @a, %bb2 ] %tobool = icmp eq i32 %cond, 0 br i1 %tobool, label %bb4, label ... bb3.dup: %var = phi i32* [ null, %bb1 ] %tobool = icmp eq i32 %cond, 0 br i1 %tobool, label %bb4, label ... bb4: %cmp = icmp eq i32* %var, null br i1 %cmp, label bb5, label bb6 Then the existing code in JumpThreading.cpp can thread edge bb3.dup->bb4 through bb4 and eventually create bb3.dup->bb5. Reviewers: wmi Subscribers: hiraditya, jfb, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D70247
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 | llvm/lib/Transforms/Scalar/JumpThreading.cpp |
 | llvm/include/llvm/Transforms/Scalar/JumpThreading.h |
 | llvm/test/Transforms/JumpThreading/thread-two-bbs2.ll |
 | llvm/test/Transforms/JumpThreading/thread-two-bbs1.ll |
Commit
c74a8adda3bc4fc5714aef14cdcfda944d3038a0
by a.bataev[OPENMP]Allow comma in combiner expression. Use ParseExpression() instead of ParseAssignmentExpression() to allow commas in combiner expressions.
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 | clang/test/OpenMP/declare_reduction_ast_print.cpp |
 | clang/lib/Parse/ParseOpenMP.cpp |
Commit
780ba1f22b53116918cf12decccaed7ba2292bd5
by spatel[DAGCombiner] clean up extract-of-concat fold; NFC This hopes to improve readability and adds an assert. The functional change noted by the TODO comment is proposed in: D72361
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 | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp |
Commit
5dfd52398f5c1b67024106febdc68e6b12f8ad37
by spatel[InstCombine] Adding testcase for Z / (1.0 / Y) => (Y * Z); NFC The added testcase shows the current transformation for the operation Z / (1.0 / Y), which remains unchanged. This will be updated to align with the transformed code (Y * Z) with D72319. The existing transformation Z / (X / Y) => (Y * Z) / X is not handling this case as there are multiple uses for (1.0 / Y) in this testcase. Patch by: @raghesh (Raghesh Aloor) Differential Revision: https://reviews.llvm.org/D72388
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 | llvm/test/Transforms/InstCombine/fdiv.ll |
Commit
108279948de31eba4f212b2a4715030b9d471c9e
by llvm-dev[SelectionDAG] Use llvm::Optional<APInt> for FoldValue. Use llvm::Optional<APInt> instead of std::pair<APInt, bool> with the bool second being used to report success/failure of fold.
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 | llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp |
Commit
07a569a0539a12700401b8f4221af0a58f28a654
by michael.hliao[amdgpu] Remove unused header. NFC.
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 | llvm/lib/Target/AMDGPU/SIFoldOperands.cpp |
Commit
bbbbf8a1065e9420e3cc7c958897683e84023075
by Jonas Devlieghere[lldb/CMake] Use LLDB's autodetection logic for libxml2 Libxml2 is already an optional dependency. It should use the same infrastructure as the other dependencies. Differential revision: https://reviews.llvm.org/D72290
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 | lldb/docs/resources/build.rst |
 | lldb/cmake/modules/LLDBConfig.cmake |
Commit
5936717fa6537812257990143e2384bb78486ef9
by llvm-devFix "pointer is null" static analyzer warning. NFCI. Use castAs<> instead of getAs<> since we know that the pointer will be valid (and is dereferenced immediately below).
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 | clang/lib/CodeGen/CGOpenCLRuntime.cpp |
Commit
19bfb6d8df6c23c8c8d19af9221d12bf08244b51
by llvm-devFix "pointer is null" static analyzer warning. NFCI. Use cast<> instead of dyn_cast<> since we know that the pointer should be valid (and is dereferenced immediately below in the getSignature call).
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 | llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp |
Commit
46e2f89364ce24a06953d08c78218fb5548a9fa3
by llvm-dev[MC] writeFragment - assert MCFragment::FT_Fill length is legal. Silence (clang/MSVC) static analyzer warnings that the fragment data may either write out of bounds of the local array or reference uninitialized data.
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 | llvm/lib/MC/MCAssembler.cpp |
Commit
96e2376d02f0840e82b96314108660ecabe63c7f
by maskray[ELF] Don't special case weak symbols for pie with no shared objects D59275 added the following clause to Symbol::includeInDynsym() if (isUndefWeak() && Config->Pie && SharedFiles.empty()) return false; D59549 explored the possibility to generalize it for -no-pie. GNU ld's rules are architecture dependent and partly controlled by -z {,no-}dynamic-undefined-weak. Our attempts to mimic its rules are actually half-baked and don't provide perceivable benefits (it can save a few more weak undefined symbols in .dynsym in a -static-pie executable). Let's just delete the rule for simplicity. We will expect cosmetic inconsistencies with ld.bfd in certain -static-pie scenarios. This permits a simplification in D71795. Reviewed By: peter.smith Differential Revision: https://reviews.llvm.org/D71794
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 | lld/test/ELF/ppc32-weak-undef-call.s |
 | lld/test/ELF/weak-undef-no-shared-libs.s |
 | lld/ELF/Symbols.cpp |
Commit
b841e119d77ed0502e3a2e710f26a899bef28b3c
by maskray[ELF] Delete an unused special rule from isStaticLinkTimeConstant. NFC Weak undefined symbols are preemptible after D71794. if (sym.isPreemptible) return false; if (!config->isPic) return true; // isPic means includeInDynsym is true after D71794. ... // We can delete this if because it can never be true. if (sym.isUndefWeak) return true; Differential Revision: https://reviews.llvm.org/D71795
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 | lld/ELF/Relocations.cpp |
Commit
29ccb12e2c12b6a50a1451ffdbf70fef29efda0e
by listmail[BranchAlign] Compiler support for suppressing branch align As discussed heavily in the original review (D70157), there's a need for the compiler to be able to selective suppress padding (either nop or prefix) to respect assumptions about the meaning of labels and instructions in generated code. Rather than wait for syntax to be finalized - which appears to be a very slow process - this patch focuses on the compiler use case and *only* worries about the integrated assembler. To my knowledge, this covers all cases mentioned to date for clang/JIT support. For testing purposes, I wired it up so that if the integrated assembler was using autopadding for branch alignment (e.g. enabled at command line) then the textual assembly output would contain a comment for each location where padding was enabled or disabled. This seemed like the least painful choice overall. Note that the result of this patch effective disables the jcc errata mitigation for many constructs (statepoints, implicit null checks, xray, etc...) which is non ideal. It is at least *correct* and should allow us to enable the mitigation for the compiler. Once that's done, and a few other items are worked through, we probably want to come back to this an explore a bundling based approach instead so that we can pad instructions while keeping labels in the right place. Differential Revision: https://reviews.llvm.org/D72303
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 | llvm/test/CodeGen/X86/align-branch-boundary-noautopadding.ll |
 | llvm/include/llvm/MC/MCAsmBackend.h |
 | llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp |
 | llvm/lib/Target/X86/X86MCInstLower.cpp |
 | llvm/lib/MC/MCObjectStreamer.cpp |
 | llvm/test/CodeGen/X86/align-branch-boundary-suppressions.ll |
 | llvm/include/llvm/MC/MCStreamer.h |
 | llvm/lib/MC/MCAsmStreamer.cpp |
Commit
d60b3b4817cb9346b682bb75371c41642c273b13
by craig.topper[X86] Add isel patterns for bitcasting between v32i1/v64i1 and float/double. We have to do an intermediate jump to a GPR to make the cast. Fixes PR43750.
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 | llvm/test/CodeGen/X86/avx512bw-mask-op.ll |
 | llvm/lib/Target/X86/X86InstrAVX512.td |
Commit
3811417f39a7d0a370fac2923060f5ef8dacd8d7
by craig.topper[X86] Custom type legalize v4i64->v4f32 uint_to_fp on sse4.1 targets in 64-bit mode For v4i64->v4f32 uint_to_fp on pre-avx targets where v4i64 isn't legal we create to v2i64->v2f32 uint_to_fp that need to be shuffled together. Our codegen for v2i64->v2f32 involves detecting if the number is larger than (2^31 - 1), if so we do a special divison by 2 so we can do a signed conversion which we need to scalarize, then do a multiply by 2 at the end if we divided earlier. When v4i64 isn't legal we need to split the checking for a larger number and dividing by 2 into two v2i64 vectors. The scalar part can extract the 4 i64 values from those 4 splits. But we can reassemble the 4 scalar f32 results directly into a single v432 vector. Then we just need to combine the fixup indications from the 2 halves and we can do the final multiply by 2 fixup on all 4 values if needed at once using a single v4f32 blend and v4f32 fadd. Differential Revision: https://reviews.llvm.org/D72368
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 | llvm/test/CodeGen/X86/vec_int_to_fp.ll |
 | llvm/lib/Target/X86/X86ISelLowering.cpp |
Commit
766ce87e9bed89bc3b5c2c904f1eb2d10be0d3be
by ntv[mlir][Linalg] Lower linalg.reshape to LLVM for the static case Summary: This diff adds lowering of the linalg.reshape op to LLVM. A new descriptor is created with fields initialized as follows: 1. allocatedPTr, alignedPtr and offset are copied from the source descriptor 2. sizes are copied from the static destination shape 3. strides are copied from the static strides collected with `getStridesAndOffset` Only the static case in which the target view conforms to strided memref semantics is supported. Other cases are left for future work and will be added on a per-need basis. Reviewers: ftynse, mravishankar Subscribers: mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst, arpith-jacob, mgester, lucyrfox, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72316
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 | mlir/lib/Conversion/LinalgToLLVM/LinalgToLLVM.cpp |
 | mlir/test/Dialect/Linalg/llvm.mlir |
Commit
659f7d463b3d677823fdcfddc37eea481078c514
by riverriddle[mlir] NFC: Move the state for managing aliases out of ModuleState and into a new class AliasState. Summary: This reduces the complexity of ModuleState and simplifies the code. A future revision will mold ModuleState into something that can be used by users for caching of printer state, as well as for implementing printAsOperand style methods. Reviewed By: antiagainst Differential Revision: https://reviews.llvm.org/D72292
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 | mlir/lib/IR/AsmPrinter.cpp |
Commit
0a01ec972d2e24c721f46e55210d42391ae52b70
by abpostelnicu[clang-tidy] Remove broken test on Windows for `readability-misleading-indentation`. Because Windows build uses by default `fdelayed-template-parsing` we cannot have a test where we don't instantiate the template. Please see D72333.
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 | clang-tools-extra/test/clang-tidy/checkers/readability-misleading-indentation.cpp |
Commit
48b14e58abc57cfea7bcdc0d7165686f135a2ebd
by stilis[MLIR] Fix ML IR build on Windows with Visual Studio Summary: Right now the path for each lib in whole_archive_link when MSVC is used as the compiler is not a full path - and it's not even the correct path when VS is used to build. This patch sets the lib path to a full path using CMAKE_CFG_INTDIR which means the path will be correct regardless of whether ninja, make or VS is used and it will always be a full path. Reviewers: denis13, jpienaar Reviewed By: jpienaar Subscribers: mgorny, mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, llvm-commits, asmith Tags: #llvm Differential Revision: https://reviews.llvm.org/D72403
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 | mlir/CMakeLists.txt |
Commit
ba181d0063e43fb56938555112ab859f48aee287
by listmail[X86] Keep cl::opts at top of file [NFC]
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 | llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp |
Commit
b675a7628ce6a21b1e4a71c079a67badfb8b073d
by eugenisMerge memtag instructions with adjacent stack slots. Summary: Detect a run of memory tagging instructions for adjacent stack frame slots, and replace them with a shorter instruction sequence * replace STG + STG with ST2G * replace STGloop + STGloop with STGloop This code needs to run when stack slot offsets are already known, but before FrameIndex operands in STG instructions are eliminated; that's the reason for the new hook in PrologueEpilogue. This change modifies STGloop and STZGloop pseudos to take the size as an immediate integer operand, and base address as a FI operand when possible. This is needed to simplify recognizing an STGloop instruction as operating on a stack slot post-regalloc. This improves memtag code size by ~0.25%, and it looks like an additional ~0.1% is possible by rearranging the stack frame such that consecutive STG instructions reference adjacent slots (patch pending). Reviewers: pcc, ostannard Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D70286
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 | llvm/test/CodeGen/AArch64/settag-merge.mir |
 | llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp |
 | llvm/test/CodeGen/AArch64/stack-tagging-unchecked-ld-st.ll |
 | llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp |
 | llvm/lib/Target/AArch64/AArch64InstrInfo.td |
 | llvm/include/llvm/CodeGen/TargetFrameLowering.h |
 | llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp |
 | llvm/lib/Target/AArch64/AArch64FrameLowering.cpp |
 | llvm/test/CodeGen/AArch64/settag-merge.ll |
 | llvm/lib/Target/AArch64/AArch64InstrInfo.cpp |
 | llvm/test/CodeGen/AArch64/settag.ll |
 | llvm/lib/CodeGen/PrologEpilogInserter.cpp |
 | llvm/lib/Target/AArch64/AArch64FrameLowering.h |
Commit
2823e91d55891e33a7a8b9a4016db4ec9e2765ae
by aaronAdd a new AST matcher 'optionally'. This matcher matches any node and at the same time executes all its inner matchers to produce any possbile result bindings. This is useful when a user wants certain supplementary information that's not always present along with the main match result.
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 | clang/include/clang/ASTMatchers/ASTMatchersInternal.h |
 | clang/lib/ASTMatchers/Dynamic/Registry.cpp |
 | clang/include/clang/ASTMatchers/ASTMatchers.h |
 | clang/unittests/ASTMatchers/ASTMatchersNarrowingTest.cpp |
 | clang/docs/LibASTMatchersReference.html |
 | clang/lib/ASTMatchers/ASTMatchersInternal.cpp |
Commit
43f938eddc8a5c8e12c116ca5f31df5a6fead24e
by tejohnsonLTOVisibility.rst: fix up syntax in example Summary: Pretty self-evident. This example was missing an lparen. Added it, and fixed up the ASCII art. Patch by Nick Black <dankamongmen@gmail.com> Reviewers: pcc Reviewed By: pcc Subscribers: tejohnson, mehdi_amini, inglorion, hiraditya, steven_wu, dexonsmith, cfe-commits Tags: #llvm, #clang Differential Revision: https://reviews.llvm.org/D70765
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 | clang/docs/LTOVisibility.rst |
Commit
31992a69b808f30a46a4ddb6da0d073d528bc72e
by spatel[x86] add test for concat-extract corner case; NFC See D72361 for discussion.
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 | llvm/test/CodeGen/X86/extract-concat.ll |
Commit
1e25109f93ffe5b28b28a2359e69143b7fb4aa5f
by ataeiCanonicalize static alloc followed by memref_cast and std.view Summary: Rewrite alloc, memref_cast, std.view into allo, std.view by droping memref_cast. Reviewers: nicolasvasilache Subscribers: mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst, arpith-jacob, mgester, lucyrfox, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72379
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 | mlir/lib/Dialect/StandardOps/Ops.cpp |
 | mlir/test/Transforms/canonicalize.mlir |
Commit
78ce19b7e1dc521fa8ac8300823d52d619d4e93e
by martin[LLD] [COFF] Fix post-commit suggestions for absolute symbol equality Differential Revision: https://reviews.llvm.org/D72252
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 | lld/test/COFF/duplicate-absolute-same.s |
 | lld/COFF/Symbols.h |
 | lld/COFF/SymbolTable.cpp |
Commit
0b8ce37d64747ba7d8908626256e2b5e58f7b396
by spatel[InstSimplify] add tests for select of true/false; NFC
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 | llvm/test/Transforms/InstSimplify/select.ll |
Commit
0341c11e08504acef8c16ab07210bc253dadf2d9
by Jonas Devlieghere[lldb/SWIG] Refactor extensions to be non Python-specific The current SWIG extensions for the string conversion operator is Python specific because it uses the PythonObjects. This means that the code cannot be reused for other SWIG supported languages such as Lua. This reimplements the extensions in a more generic way that can be reused. Differential revision: https://reviews.llvm.org/D72377
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 | lldb/scripts/lldb.swig |
 | lldb/scripts/Python/python-extensions.swig |
 | lldb/scripts/interface/SBTarget.i |
 | lldb/scripts/lldb_lua.swig |
Commit
2d258ed931cdf47a7d1dcf08ad963b5452a8670f
by kazuRevert "[JumpThreading] Thread jumps through two basic blocks" It looks like my patch breaks the sanitizer-windows build: http://lab.llvm.org:8011/builders/sanitizer-windows/builds/56324 This reverts commit ead815924e6ebeaf02c31c37ebf7a560b5fdf67b.
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 | llvm/include/llvm/Transforms/Scalar/JumpThreading.h |
 | llvm/lib/Transforms/Scalar/JumpThreading.cpp |
 | llvm/test/Transforms/JumpThreading/thread-two-bbs1.ll |
 | llvm/test/Transforms/JumpThreading/thread-two-bbs2.ll |
Commit
edadb818e5be005fa4397b7e4bd5e397ddb4f5d6
by Jonas Devlieghere[lldb/CMake] Only auto-enable Lua when SWIG is found Just like Python, Lua should only be auto-enabled if SWIG is found as well. This moves the logic of finding SWIG and Lua as a whole into a new CMake package.
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 | lldb/cmake/modules/FindLuaAndSwig.cmake |
 | lldb/cmake/modules/LLDBConfig.cmake |
Commit
28b9cdd26073c79be36c79476a9bacceca3d116f
by Adrian PrantlDelete dead code. https://reviews.llvm.org/D58856
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 | lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp |
Commit
58deb20dd2dfbfbfff8097ce80137d12a57a3607
by eugenisRevert "Merge memtag instructions with adjacent stack slots." *** Bad machine code: Tied use must be a register *** - function: stg_alloca17 - basic block: %bb.0 entry (0x20076710580) - instruction: early-clobber %0:gpr64common, early-clobber %1:gpr64sp = STGloop 272, %stack.0.a :: (store 272 into %ir.a, align 16) - operand 3: %stack.0.a http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win/builds/21481/steps/test-check-all/logs/stdio This reverts commit b675a7628ce6a21b1e4a71c079a67badfb8b073d.
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 | llvm/test/CodeGen/AArch64/stack-tagging-unchecked-ld-st.ll |
 | llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp |
 | llvm/test/CodeGen/AArch64/settag.ll |
 | llvm/lib/CodeGen/PrologEpilogInserter.cpp |
 | llvm/test/CodeGen/AArch64/settag-merge.mir |
 | llvm/include/llvm/CodeGen/TargetFrameLowering.h |
 | llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp |
 | llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp |
 | llvm/test/CodeGen/AArch64/settag-merge.ll |
 | llvm/lib/Target/AArch64/AArch64InstrInfo.cpp |
 | llvm/lib/Target/AArch64/AArch64FrameLowering.h |
 | llvm/lib/Target/AArch64/AArch64InstrInfo.td |
 | llvm/lib/Target/AArch64/AArch64FrameLowering.cpp |
Commit
f84d3200528a4aa1e8c7f2d3a9567f63f855b165
by ataei[MLIR] Don't use SSA names directly for std.view canonicalization test Reviewers: rriddle, nicolasvasilache Subscribers: mehdi_amini, jpienaar, burmako, shauheen, antiagainst, arpith-jacob, mgester, lucyrfox, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72408
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 | mlir/test/Transforms/canonicalize.mlir |
Commit
7f1026a7520eb3d7e99da77f6738deb72de17980
by maskray[cfi][test] cross-dso/stats.cpp: don't assume the order of static constructors __sanitizer_stat_init is called for the executable first, then the shared object. In WriterModuleReport(), the information for the shared object will be recorded first. It'd be nice to get rid of the order requirement of static constructors. (This should make .ctors platforms work.)
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 | compiler-rt/test/cfi/cross-dso/stats.cpp |
Commit
ae47a3d8107856c84c104f3c2e43a553f4e36748
by Jonas Devlieghere[lldb/SWIG] Refactor extensions to be non Python-specific (2/2) The current SWIG extensions for the string conversion operator is Python specific because it uses the PythonObjects. This means that the code cannot be reused for other SWIG supported languages such as Lua. This reimplements the extensions in a more generic way that can be reused. It uses a SWIG macro to reduce code duplication. Differential revision: https://reviews.llvm.org/D72377
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 | lldb/scripts/interface/SBDeclaration.i |
 | lldb/scripts/interface/SBBreakpointLocation.i |
 | lldb/scripts/interface/SBAddress.i |
 | lldb/scripts/interface/SBModule.i |
 | lldb/scripts/interface/SBModuleSpec.i |
 | lldb/scripts/interface/SBInstruction.i |
 | lldb/scripts/interface/SBBreakpointName.i |
 | lldb/scripts/interface/SBData.i |
 | lldb/scripts/interface/SBMemoryRegionInfo.i |
 | lldb/scripts/interface/SBInstructionList.i |
 | lldb/scripts/interface/SBTarget.i |
 | lldb/scripts/macros.swig |
 | lldb/scripts/interface/SBError.i |
 | lldb/scripts/interface/SBFrame.i |
 | lldb/scripts/interface/SBDebugger.i |
 | lldb/scripts/interface/SBCompileUnit.i |
 | lldb/scripts/interface/SBBreakpoint.i |
 | lldb/scripts/lldb_lua.swig |
 | lldb/scripts/interface/SBBlock.i |
 | lldb/scripts/interface/SBCommandReturnObject.i |
 | lldb/scripts/interface/SBLineEntry.i |
 | lldb/scripts/lldb.swig |
 | lldb/scripts/interface/SBFunction.i |
 | lldb/scripts/Python/python-extensions.swig |
 | lldb/scripts/interface/SBFileSpec.i |
Commit
ee57469a5128a5cd4f8b13945c873d3421a4b3d0
by paulsson[X86] Remove EFLAGS from live-in lists in X86FlagsCopyLowering. When EFLAGS is no longer live into a basic block, remove it from the live-in list. Fixes https://bugs.llvm.org/show_bug.cgi?id=44462. Review: Craig Topper Differential Revision: https://reviews.llvm.org/D71375
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 | llvm/lib/Target/X86/X86FlagsCopyLowering.cpp |
 | llvm/test/CodeGen/X86/copy-eflags-liveinlists.mir |
Commit
b2fb6a7ba118f651cc76580ecb48eb5f877920aa
by xazax[NFC] Whitespace fixes
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 | clang/include/clang/Basic/Attr.td |
 | clang/include/clang/Basic/AttrDocs.td |
Commit
85ee4ff4e474788abc7abdc939114281c2a68ec1
by bion[libcxx] [test] Disable refwrap/weak_result.pass.cpp in C++20 mode (broken by P0357R3)
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 | libcxx/test/std/utilities/function.objects/refwrap/weak_result.pass.cpp |
Commit
659efa21f1b3eded304b7239b356eecf1f5034ae
by paulssonRecommit "[MachineVerifier] Improve verification of live-in lists." MachineVerifier::visitMachineFunctionAfter() is extended to check the live-through case for live-in lists. This is only done for registers without aliases and that are neither allocatable or reserved, such as the SystemZ::CC register. The MachineVerifier earlier only catched the case of a live-in use without an entry in the live-in list (as "using an undefined physical register"). A comment in LivePhysRegs.h has been added stating a guarantee that addLiveOuts() can be trusted for a full register both before and after register allocation. Review: Quentin Colombet Differential Revision: https://reviews.llvm.org/D68267
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 | llvm/test/MachineVerifier/live-ins-01.mir |
 | llvm/test/MachineVerifier/live-ins-02.mir |
 | llvm/test/MachineVerifier/live-ins-03.mir |
 | llvm/include/llvm/CodeGen/LivePhysRegs.h |
 | llvm/lib/CodeGen/MachineVerifier.cpp |
Commit
ff0311c4b3b9dce9d25d08e38aa163682b155513
by chmeeedalf[PowerPC]: Add powerpcspe target triple subarch component Summary: This allows the use of '-target powerpcspe-unknown-linux-gnu' or 'powerpcspe-unknown-freebsd' to be used, instead of '-target powerpc-unknown-linux-gnu -mspe'. Reviewed By: dim Differential Revision: https://reviews.llvm.org/D72014
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 | clang/lib/Basic/Targets/PPC.cpp |
 | clang/test/Preprocessor/init.c |
 | llvm/unittests/ADT/TripleTest.cpp |
 | llvm/lib/Support/Triple.cpp |
 | clang/lib/Basic/Targets/PPC.h |
 | llvm/include/llvm/ADT/Triple.h |
 | llvm/lib/Target/PowerPC/PPCSubtarget.cpp |
Commit
76aab66d34446ccf764cf8127b73e1517df75fb4
by mtrofin[NFC][InlineCost] Factor cost modeling out of CallAnalyzer traversal. Summary: The goal is to simplify experimentation on the cost model. Today, CallAnalyzer decides 2 things: legality, and benefit. The refactoring keeps legality assessment in CallAnalyzer, and factors benefit evaluation out, as an extension. Reviewers: davidxl, eraman Subscribers: kamleshbhalui, fedor.sergeev, hiraditya, baloghadamsoftware, haicheng, a.sidorin, Szelethus, donat.nagy, dkrupp, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D71733
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 | llvm/lib/Analysis/InlineCost.cpp |
Commit
1e46eb74be6527377e47090bbe0fc9298f7de2c5
by johannes[Attributor][FIX] Avoid dangling value pointers during code modification When we replace instructions with unreachable we delete instructions. We now avoid dangling pointers to those deleted instructions in the `ToBeChangedToUnreachableInsts` set. Other modification collections might need to be updated in the future as well.
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 | llvm/test/Transforms/Attributor/undefined_behavior.ll |
 | llvm/lib/Transforms/IPO/Attributor.cpp |
 | llvm/include/llvm/Transforms/IPO/Attributor.h |
 | llvm/include/llvm/IR/ValueHandle.h |
Commit
a4088c75cc1034307400076d29b35905d0ae58b2
by johannes[Attributor][FIX] Carefully change invokes to calls (after manifest) Before we manually inserted unreachable early but that could lead to broken PHI nodes. Now we use the existing late modification functionality.
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 | llvm/test/Transforms/Attributor/liveness.ll |
 | llvm/test/Transforms/Attributor/ArgumentPromotion/crash.ll |
 | llvm/test/Transforms/Attributor/ArgumentPromotion/live_called_from_dead.ll |
 | llvm/include/llvm/Transforms/IPO/Attributor.h |
 | llvm/test/Transforms/Attributor/ArgumentPromotion/nonzero-address-spaces.ll |
 | llvm/lib/Transforms/IPO/Attributor.cpp |
 | llvm/test/Transforms/Attributor/IPConstantProp/return-constant.ll |
 | llvm/test/Transforms/Attributor/ArgumentPromotion/fp80.ll |
 | llvm/test/Transforms/Attributor/IPConstantProp/recursion.ll |
 | llvm/test/Transforms/Attributor/noreturn_async.ll |
Commit
338a601612ca36e112b14f622eb310985b93192a
by mtrofinRevert "[NFC][InlineCost] Factor cost modeling out of CallAnalyzer traversal." This reverts commit 76aab66d34446ccf764cf8127b73e1517df75fb4. Failure: http://lab.llvm.org:8011/builders/clang-with-thin-lto-ubuntu/builds/20562, will investigate and resubmit.
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 | llvm/lib/Analysis/InlineCost.cpp |
Commit
26ba160d47220a0bce75b1f491bf6e262edf69fa
by czhengsz[PowerPC] when folding rlwinm+rlwinm. to andi., we should use first rlwinm input reg. %2:gprc = RLWINM %1:gprc, 27, 5, 10 %3:gprc = RLWINM_rec %2:gprc, 8, 5, 10, implicit-def $cr0 ==> %3:gprc = ANDI_rec %1, 0, implicit-def $cr0 we should use %1 instead of %2 as ANDI_rec input. Reviewed By: steven.zhang Differential Revision: https://reviews.llvm.org/D71885
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 | llvm/lib/Target/PowerPC/PPCMIPeephole.cpp |
 | llvm/test/CodeGen/PowerPC/fold-rlwinm.mir |
Commit
a63af915288ad9d1049d486833fcd085b620dc6d
by apl[lldb] Remove various dead Compare functions
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 | lldb/source/Core/Section.cpp |
 | lldb/source/Symbol/Function.cpp |
 | lldb/source/Plugins/SymbolFile/DWARF/DWARFFormValue.cpp |
 | lldb/source/Symbol/Type.cpp |
Commit
be841f89d0014b1e0246a4feae941b2f74abd908
by daniel_l_sanders[MIR] Target specific MIR formating and parsing Summary: Added MIRFormatter for target specific MIR formating and parsing with immediate and custom pseudo source values. Target machine can subclass MIRFormatter and implement custom logic for printing and parsing immediate and custom pseudo source values for better readability. * Target specific immediate mnemonic need to start with "." follows by identifier string. When MIR parser sees immediate it will call target specific parsing function. * Custom pseudo source value need to start with custom follows by double-quoted string. MIR parser will pass the quoted string to target specific PSV parsing function. * MIRFormatter have 2 helper functions to facilitate LLVM value printing and parsing for custom PSV if they refers LLVM values. Reviewers: dsanders, arsenm Reviewed By: dsanders Subscribers: wdng, jvesely, nhaehnle, hiraditya, jfb, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69836
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 | llvm/test/CodeGen/AMDGPU/extract_subvector_vec4_vec3.ll |
 | llvm/include/llvm/CodeGen/PseudoSourceValue.h |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.store.ll |
 | llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f32.ll |
 | llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.load.ll |
 | llvm/lib/CodeGen/MIRPrinter.cpp |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll |
 | llvm/include/llvm/Target/TargetMachine.h |
 | llvm/lib/CodeGen/MIRParser/MIParser.cpp |
 | llvm/include/llvm/CodeGen/MachineOperand.h |
 | llvm/lib/CodeGen/MIRParser/MILexer.cpp |
 | llvm/include/llvm/CodeGen/MIRFormatter.h |
 | llvm/include/llvm/CodeGen/MIRParser/MIParser.h |
 | llvm/unittests/CodeGen/MachineOperandTest.cpp |
 | llvm/lib/CodeGen/MachineOperand.cpp |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f16.ll |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.load.1d.ll |
 | llvm/lib/Target/TargetMachine.cpp |
 | llvm/lib/CodeGen/MachineInstr.cpp |
 | llvm/include/llvm/CodeGen/TargetInstrInfo.h |
 | llvm/test/CodeGen/AMDGPU/buffer-intrinsics-mmo-offsets.ll |
 | llvm/lib/CodeGen/MIRParser/MILexer.h |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.sample.1d.ll |
 | llvm/include/llvm/CodeGen/MachineMemOperand.h |
Commit
d44a0743175fc781aa2a23d638d683ded6eb10b8
by Jason MolendaSave more descriptive error msg from FBS/BKS, relay it up to lldb. When lldb requests an app launch through FrontBoard/BackBoard, we get back an NSError object if there was a problem with an integer error code and a descriptive text string. debugserver would log the descriptive text string to the console, but it would only save the error code value, ask for the much-less-specific name of that error code, and send that very generic error word back to lldb. This patch saves the longer description of the failure when available, and sends that to lldb. If unavailable, it falls back to sending up the generic description of the error code as it was doing before. This only impacts the iOS on-device debugserver. <rdar://problem/49953304>
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 | lldb/tools/debugserver/source/MacOSX/MachProcess.mm |
Commit
5ab6fa7b7011b00e8955168c5bbcb46e9712afa9
by daniel_l_sandersRevert "[MIR] Target specific MIR formating and parsing" Forgot to credit Peng in the commit message. This reverts commit be841f89d0014b1e0246a4feae941b2f74abd908.
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 | llvm/test/CodeGen/AMDGPU/extract_subvector_vec4_vec3.ll |
 | llvm/include/llvm/CodeGen/MachineOperand.h |
 | llvm/lib/CodeGen/MIRPrinter.cpp |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.sample.1d.ll |
 | llvm/include/llvm/CodeGen/MIRParser/MIParser.h |
 | llvm/lib/CodeGen/MIRParser/MILexer.h |
 | llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f32.ll |
 | llvm/lib/CodeGen/MIRParser/MIParser.cpp |
 | llvm/lib/CodeGen/MachineInstr.cpp |
 | llvm/lib/Target/TargetMachine.cpp |
 | llvm/lib/CodeGen/MIRParser/MILexer.cpp |
 | llvm/lib/CodeGen/MachineOperand.cpp |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f16.ll |
 | llvm/include/llvm/CodeGen/PseudoSourceValue.h |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll |
 | llvm/test/CodeGen/AMDGPU/buffer-intrinsics-mmo-offsets.ll |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.load.1d.ll |
 | llvm/include/llvm/Target/TargetMachine.h |
 | llvm/unittests/CodeGen/MachineOperandTest.cpp |
 | llvm/include/llvm/CodeGen/MIRFormatter.h |
 | llvm/include/llvm/CodeGen/MachineMemOperand.h |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.load.ll |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.store.ll |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll |
 | llvm/include/llvm/CodeGen/TargetInstrInfo.h |
 | llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll |
Commit
3ef05d85be8c3666ebfa3ad986eb334da5195a47
by daniel_l_sanders[MIR] Target specific MIR formating and parsing Summary: Added MIRFormatter for target specific MIR formating and parsing with immediate and custom pseudo source values. Target machine can subclass MIRFormatter and implement custom logic for printing and parsing immediate and custom pseudo source values for better readability. * Target specific immediate mnemonic need to start with "." follows by identifier string. When MIR parser sees immediate it will call target specific parsing function. * Custom pseudo source value need to start with custom follows by double-quoted string. MIR parser will pass the quoted string to target specific PSV parsing function. * MIRFormatter have 2 helper functions to facilitate LLVM value printing and parsing for custom PSV if they refers LLVM values. Patch by Peng Guo Reviewers: dsanders, arsenm Reviewed By: dsanders Subscribers: wdng, jvesely, nhaehnle, hiraditya, jfb, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69836
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 | llvm/include/llvm/CodeGen/MIRFormatter.h |
 | llvm/include/llvm/Target/TargetMachine.h |
 | llvm/lib/CodeGen/MIRParser/MIParser.cpp |
 | llvm/lib/Target/TargetMachine.cpp |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f32.ll |
 | llvm/lib/CodeGen/MachineInstr.cpp |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.load.1d.ll |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll |
 | llvm/lib/CodeGen/MIRPrinter.cpp |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.load.ll |
 | llvm/include/llvm/CodeGen/MIRParser/MIParser.h |
 | llvm/lib/CodeGen/MIRParser/MILexer.h |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll |
 | llvm/test/CodeGen/AMDGPU/buffer-intrinsics-mmo-offsets.ll |
 | llvm/include/llvm/CodeGen/TargetInstrInfo.h |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.store.ll |
 | llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll |
 | llvm/unittests/CodeGen/MachineOperandTest.cpp |
 | llvm/include/llvm/CodeGen/MachineMemOperand.h |
 | llvm/lib/CodeGen/MIRParser/MILexer.cpp |
 | llvm/test/CodeGen/AMDGPU/extract_subvector_vec4_vec3.ll |
 | llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp |
 | llvm/include/llvm/CodeGen/PseudoSourceValue.h |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f16.ll |
 | llvm/include/llvm/CodeGen/MachineOperand.h |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.sample.1d.ll |
 | llvm/lib/CodeGen/MachineOperand.cpp |
Commit
71d64f72f934631aa2f12b9542c23f74f256f494
by thakisRevert "[MIR] Target specific MIR formating and parsing" This reverts commit 3ef05d85be8c3666ebfa3ad986eb334da5195a47. It broke check-llvm on many bots, see comments on D69836.
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 | llvm/test/CodeGen/AMDGPU/buffer-intrinsics-mmo-offsets.ll |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.load.ll |
 | llvm/unittests/CodeGen/MachineOperandTest.cpp |
 | llvm/lib/CodeGen/MachineInstr.cpp |
 | llvm/lib/Target/TargetMachine.cpp |
 | llvm/include/llvm/CodeGen/TargetInstrInfo.h |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll |
 | llvm/include/llvm/CodeGen/MachineMemOperand.h |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.store.ll |
 | llvm/include/llvm/CodeGen/MachineOperand.h |
 | llvm/lib/CodeGen/MIRPrinter.cpp |
 | llvm/include/llvm/CodeGen/MIRFormatter.h |
 | llvm/include/llvm/Target/TargetMachine.h |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f16.ll |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.sample.1d.ll |
 | llvm/include/llvm/CodeGen/MIRParser/MIParser.h |
 | llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll |
 | llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll |
 | llvm/test/CodeGen/AMDGPU/extract_subvector_vec4_vec3.ll |
 | llvm/lib/CodeGen/MIRParser/MILexer.h |
 | llvm/include/llvm/CodeGen/PseudoSourceValue.h |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f32.ll |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.load.1d.ll |
 | llvm/lib/CodeGen/MachineOperand.cpp |
 | llvm/lib/CodeGen/MIRParser/MILexer.cpp |
 | llvm/lib/CodeGen/MIRParser/MIParser.cpp |
Commit
de3d0ee023cb14c06d5be01369ef8db4cbfa16b4
by daniel_l_sandersRevert "Revert "[MIR] Target specific MIR formating and parsing"" There was an unguarded dereference of MF in a function that permitted nullptr. Fixed This reverts commit 71d64f72f934631aa2f12b9542c23f74f256f494.
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 | llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.store.ll |
 | llvm/test/CodeGen/AMDGPU/buffer-intrinsics-mmo-offsets.ll |
 | llvm/lib/CodeGen/MIRPrinter.cpp |
 | llvm/include/llvm/CodeGen/MachineMemOperand.h |
 | llvm/include/llvm/Target/TargetMachine.h |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.sample.1d.ll |
 | llvm/test/CodeGen/AMDGPU/extract_subvector_vec4_vec3.ll |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.load.ll |
 | llvm/lib/CodeGen/MachineOperand.cpp |
 | llvm/lib/Target/TargetMachine.cpp |
 | llvm/lib/CodeGen/MIRParser/MIParser.cpp |
 | llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp |
 | llvm/lib/CodeGen/MachineInstr.cpp |
 | llvm/lib/CodeGen/MIRParser/MILexer.cpp |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.load.1d.ll |
 | llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll |
 | llvm/include/llvm/CodeGen/PseudoSourceValue.h |
 | llvm/include/llvm/CodeGen/TargetInstrInfo.h |
 | llvm/lib/CodeGen/MIRParser/MILexer.h |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll |
 | llvm/include/llvm/CodeGen/MIRParser/MIParser.h |
 | llvm/include/llvm/CodeGen/MIRFormatter.h |
 | llvm/unittests/CodeGen/MachineOperandTest.cpp |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f32.ll |
 | llvm/include/llvm/CodeGen/MachineOperand.h |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f16.ll |
Commit
d48ac7d54d8a096677c84cfb2928400e05b918ea
by qshanz[DAGCombine] Fold the (fma -x, y, -z) to -(fma x, y, z) This is a positive combination as long as the NEG is NOT free, as we are reducing the number of NEG from two to one. Differential Revision: https://reviews.llvm.org/D72312
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 | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp |
 | llvm/test/CodeGen/PowerPC/fma-combine.ll |
 | llvm/test/CodeGen/PowerPC/recipest.ll |
 | llvm/test/CodeGen/PowerPC/qpx-recipest.ll |
 | llvm/test/CodeGen/PowerPC/combine-fneg.ll |
 | llvm/test/CodeGen/PowerPC/repeated-fp-divisors.ll |
Commit
51bdd98b8a52d07004bcaddff26caf376a1c32bf
by Jonas Devlieghere[lldb/SWIG] Refactor extensions to be non Python-specific (3/3) The current SWIG extensions for the string conversion operator is Python specific because it uses the PythonObjects. This means that the code cannot be reused for other SWIG supported languages such as Lua. This reimplements the extensions in a more generic way that can be reused. It uses a SWIG macro to reduce code duplication. Differential revision: https://reviews.llvm.org/D72377
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 | lldb/scripts/interface/SBValueList.i |
 | lldb/scripts/interface/SBTypeCategory.i |
 | lldb/scripts/interface/SBSymbolContext.i |
 | lldb/scripts/interface/SBSymbol.i |
 | lldb/scripts/interface/SBSymbolContextList.i |
 | lldb/scripts/interface/SBTypeEnumMember.i |
 | lldb/scripts/interface/SBTypeSummary.i |
 | lldb/scripts/interface/SBValue.i |
 | lldb/scripts/interface/SBTypeFormat.i |
 | lldb/scripts/interface/SBTypeNameSpecifier.i |
 | lldb/scripts/Python/python-extensions.swig |
 | lldb/scripts/interface/SBTypeFilter.i |
 | lldb/scripts/interface/SBThread.i |
 | lldb/scripts/interface/SBSection.i |
 | lldb/scripts/interface/SBWatchpoint.i |
 | lldb/scripts/interface/SBTypeSynthetic.i |
 | lldb/scripts/interface/SBType.i |
 | lldb/scripts/interface/SBProcess.i |
Commit
4ebb589629b0d3de0827cab179338836ebb3a8b6
by czhengsz[SCEV] [NFC] add testcase for constant range for addrecexpr with nsw flag
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 | llvm/test/Analysis/ScalarEvolution/range_nw_flag.ll |
Commit
24b326cc610dfdccdd50bc78505ec228d96c8e7a
by ehudkatz[APFloat] Fix checked error assert failures `APFLoat::convertFromString` returns `Expected` result, which must be "checked" if the LLVM_ENABLE_ABI_BREAKING_CHECKS preprocessor flag is set. To mark an `Expected` result as "checked" we must consume the `Error` within. In many cases, we are only interested in knowing if an error occured, without the need to examine the error info. This is achieved, easily, with the `errorToBool()` API.
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 | llvm/lib/Support/StringRef.cpp |
 | clang/lib/Lex/LiteralSupport.cpp |
 | llvm/include/llvm/ADT/StringRef.h |
 | clang-tools-extra/clang-tidy/readability/MagicNumbersCheck.cpp |
 | llvm/lib/Support/APFloat.cpp |
 | llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp |
 | llvm/unittests/ADT/APFloatTest.cpp |
 | llvm/lib/MC/MCParser/AsmParser.cpp |
 | llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp |
Commit
65678d938431c90408afa8d255cbed3d8ed8273f
by ntv[mlir][VectorOps] Implement strided_slice conversion Summary: This diff implements the progressive lowering of strided_slice to either: 1. extractelement + insertelement for the 1-D case 2. extract + optional strided_slice + insert for the n-D case. This combines properly with the other conversion patterns to lower all the way to LLVM. Appropriate tests are added. Reviewers: ftynse, rriddle, AlexEichenberger, andydavis1, tetuante Reviewed By: andydavis1 Subscribers: merge_guards_bot, mehdi_amini, jpienaar, burmako, shauheen, antiagainst, arpith-jacob, mgester, lucyrfox, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72310
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 | mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp |
 | mlir/include/mlir/IR/Attributes.h |
 | mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir |
Commit
2d515e49d89c0738ccef8f1733d5f9afe00ee979
by ntv[mlir][VectorOps] Implement insert_strided_slice conversion Summary: This diff implements the progressive lowering of insert_strided_slice. Two cases appear: 1. when the source and dest vectors have different ranks, extract the dest subvector at the proper offset and reduce to case 2. 2. when they have the same rank N: a. if the source and dest type are the same, the insertion is trivial: just forward the source b. otherwise, iterate over all N-1 D subvectors and create an extract/insert_strided_slice/insert replacement, reducing the problem to vecotrs of the same N-1 rank. This combines properly with the other conversion patterns to lower all the way to LLVM. Reviewers: ftynse, rriddle, AlexEichenberger, andydavis1, tetuante, nicolasvasilache Reviewed By: andydavis1 Subscribers: merge_guards_bot, mehdi_amini, jpienaar, burmako, shauheen, antiagainst, arpith-jacob, mgester, lucyrfox, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72317
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 | mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp |
 | mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir |
Commit
e93e0d413f3afa1df5c5f88df546bebcd1183155
by sam.parker[ARM][LowOverheadLoops] Update liveness info After expanding the pseudo instructions, update the liveness info. We do this in a post-order traversal of the loop, including its exit blocks and preheader(s). Differential Revision: https://reviews.llvm.org/D72131
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 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-in-vpt-2.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/while.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/mov-lr-terminator.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/dont-remove-loop-update.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/unsafe-cpsr-loop-use.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/wlstp.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/disjoint-vcmp.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/dont-remove-loop-update3.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-in-vpt.mir |
 | llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp |
 | llvm/lib/CodeGen/LivePhysRegs.cpp |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/move-start-after-def.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/loop-guards.ll |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/dont-remove-loop-update2.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/move-def-before-start.mir |
Commit
08778d8c4fd8a6519c7f27bfa6b09c47262cb844
by zinenko[mlir][GPU] introduce utilities for promotion to workgroup memory Introduce a set of function that promote a memref argument of a `gpu.func` to workgroup memory using memory attribution. The promotion boils down to additional loops performing the copy from the original argument to the attributed memory in the beginning of the function, and back at the end of the function using all available threads. The loop bounds are specified so as to adapt to any size of the workgroup. These utilities are intended to compose with other existing utilities (loop coalescing and tiling) in cases where the distribution of work across threads is uneven, e.g. copying a 2D memref with only the threads along the "x" dimension. Similarly, specialization of the kernel to specific launch sizes should be implemented as a separate pass combining constant propagation and canonicalization. Introduce a simple attribute-driven pass to test the promotion transformation since we don't have a heuristic at the moment. Differential revision: https://reviews.llvm.org/D71904
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 | mlir/test/lib/Transforms/CMakeLists.txt |
 | mlir/include/mlir/Dialect/GPU/MemoryPromotion.h |
 | mlir/include/mlir/Dialect/GPU/GPUDialect.h |
 | mlir/lib/Dialect/GPU/IR/GPUDialect.cpp |
 | mlir/lib/Dialect/GPU/Transforms/MemoryPromotion.cpp |
 | mlir/lib/IR/Block.cpp |
 | mlir/test/lib/Transforms/TestGpuMemoryPromotion.cpp |
 | mlir/include/mlir/IR/Block.h |
 | mlir/include/mlir/Dialect/GPU/GPUOps.td |
 | mlir/lib/Dialect/GPU/CMakeLists.txt |
 | mlir/test/Dialect/GPU/promotion.mlir |
Commit
8f1887456ab4ba24a62ccb19d0d04b08972a0289
by sjoerd.meijer[LV] Still vectorise when tail-folding can't find a primary inducation variable This addresses a vectorisation regression for tail-folded loops that are counting down, e.g. loops as simple as this: void foo(char *A, char *B, char *C, uint32_t N) { while (N > 0) { *C++ = *A++ + *B++; N--; } } These are loops that can be vectorised, but when tail-folding is requested, it can't find a primary induction variable which we do need for predicating the loop. As a result, the loop isn't vectorised at all, which it is able to do when tail-folding is not attempted. So, this adds a check for the primary induction variable where we decide how to lower the scalar epilogue. I.e., when there isn't a primary induction variable, a scalar epilogue loop is allowed (i.e. don't request tail-folding) so that vectorisation could still be triggered. Having this check for the primary induction variable make sense anyway, and in addition, in a follow-up of this I will look into discovering earlier the primary induction variable for counting down loops, so that this can also be tail-folded. Differential revision: https://reviews.llvm.org/D72324
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 | llvm/test/Transforms/LoopVectorize/ARM/tail-folding-counting-down.ll |
 | llvm/lib/Transforms/Vectorize/LoopVectorize.cpp |
 | llvm/test/Transforms/LoopVectorize/tail-folding-counting-down.ll |
Commit
0541a9d4e7f85c1f08f27fe0c0cae293bbb3903a
by pavel[DWARFDebugLoc] Tweak error message when resolving offset pairs with no base address The previous message mentioned DW_LLE_offset_pair, but this is incorrect/confusing because we can get this message even with DWARF4 (which does not use DW_LLE encodings). This happens because DWARF<=4 location entries are "upgraded" to DWARF v5 during parsing. The new error message refrains from referencing specific constants. Fixes pr44482.
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 | llvm/lib/DebugInfo/DWARF/DWARFDebugLoc.cpp |
Commit
1cba2612399eaf5ad67f173ab69db0b1b0328fcb
by sam.parkerRevert "[ARM][LowOverheadLoops] Update liveness info" This reverts commit e93e0d413f3afa1df5c5f88df546bebcd1183155. There's some ordering problems on some on the buildbots which needs investigating.
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 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/loop-guards.ll |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-in-vpt-2.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/dont-remove-loop-update2.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/dont-remove-loop-update3.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/move-def-before-start.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/while.mir |
 | llvm/lib/CodeGen/LivePhysRegs.cpp |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/disjoint-vcmp.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/move-start-after-def.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-in-vpt.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/mov-lr-terminator.mir |
 | llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/dont-remove-loop-update.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/unsafe-cpsr-loop-use.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/wlstp.mir |
Commit
459ad8e97e07c823181cd457f2c2ac08f3896e37
by flo[Matrix] Implement back-propagation of shape information. This patch extends the shape propagation for matrix operations to also propagate the shape of instructions to their operands. Reviewers: anemet, Gerolf, reames, hfinkel, andrew.w.kaylor Reviewed By: anemet Differential Revision: https://reviews.llvm.org/D70899
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 | llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp |
 | llvm/test/Transforms/LowerMatrixIntrinsics/propagate-backward.ll |
 | llvm/test/Transforms/LowerMatrixIntrinsics/propagate-backwards-unsupported.ll |
Commit
f0abe820eebf47a3e9b9d0daf9f995d65db186bc
by evgueni.brevnov[LoopUtils][NFC] Minor refactoring in getLoopEstimatedTripCount.
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 | llvm/lib/Transforms/Utils/LoopUtils.cpp |
 | llvm/include/llvm/Support/MathExtras.h |
Commit
00c6e98409f98c3093aab4b1bfbc25c5b54731d0
by simon.moll[VE] Target stub for NEC SX-Aurora Summary: This patch registers the 've' target: the NEC SX-Aurora TSUBASA Vector Engine. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D69103
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 | llvm/lib/Support/Triple.cpp |
 | llvm/lib/Target/VE/MCTargetDesc/VEMCTargetDesc.h |
 | llvm/lib/Target/VE/TargetInfo/VETargetInfo.cpp |
 | llvm/test/CodeGen/VE/target_support.ll |
 | llvm/lib/Target/VE/VETargetMachine.h |
 | llvm/lib/Target/VE/VETargetMachine.cpp |
 | llvm/lib/Target/VE/VE.h |
 | llvm/lib/Target/VE/TargetInfo/CMakeLists.txt |
 | llvm/lib/Target/VE/LLVMBuild.txt |
 | llvm/CODE_OWNERS.TXT |
 | llvm/lib/Target/VE/CMakeLists.txt |
 | llvm/lib/Target/VE/TargetInfo/LLVMBuild.txt |
 | llvm/unittests/ADT/TripleTest.cpp |
 | llvm/lib/Target/VE/MCTargetDesc/VEMCTargetDesc.cpp |
 | llvm/test/CodeGen/VE/lit.local.cfg |
 | llvm/lib/Target/VE/MCTargetDesc/LLVMBuild.txt |
 | llvm/include/llvm/ADT/Triple.h |
 | llvm/lib/Target/LLVMBuild.txt |
 | llvm/lib/Target/VE/MCTargetDesc/CMakeLists.txt |
Commit
7adf6644f50a60a25f81c976b0f3a08320a63665
by flo[Matrix] Propagate and use shape information for loads. This patch extends to shape propagation to also include load instructions and implements shape aware lowering for vector loads. Reviewers: anemet, Gerolf, reames, hfinkel, andrew.w.kaylor Reviewed By: anemet Differential Revision: https://reviews.llvm.org/D70900
|
 | llvm/test/Transforms/LowerMatrixIntrinsics/bigger-expressions-double.ll |
 | llvm/test/Transforms/LowerMatrixIntrinsics/propagate-backward.ll |
 | llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp |
Commit
287a874d1c460302677a1530a75d94bae4d4a348
by kadircet[clangd] Refurbish HoverInfo::present Summary: Improves basic hover presentation logic to include more info. Reviewers: sammccall Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D71555
|
 | clang-tools-extra/clangd/test/hover.test |
 | clang-tools-extra/clangd/unittests/HoverTests.cpp |
 | clang-tools-extra/clangd/Hover.cpp |
Commit
ccf24225e3f2356ebf0e73bb114a831bf1721222
by flo[Matrix] Update shape propagation to iterate until done. This patch updates the shape propagation to iterate until no new shape information is discovered. As initial seed for the forward propagation, we use the matrix intrinsic instructions. Both propagateShapeForward and propagateShapeBackward return new work lists, with the instructions to be used for the next iteration. When propagating forward, we record all instructions we added new shape information for. When propagating backward, we record all users of instructions we added new shape information for. Reviewers: anemet, Gerolf, reames, hfinkel, andrew.w.kaylor Reviewed By: anemet Differential Revision: https://reviews.llvm.org/D70901
|
 | llvm/test/Transforms/LowerMatrixIntrinsics/propagate-multiple-iterations.ll |
 | llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp |
Commit
782ad91cc423bf602718e2bf9ffc59e55350463f
by Raphael Isemann[lldb] Fix that TestNoSuchArch.py was passing for the wrong reason The command here failed due to the type in 'create' but the expect did not actually check for the error message. This fixes the typo and adds a check for the actuall error message we should see.
|
 | lldb/packages/Python/lldbsuite/test/commands/target/create-no-such-arch/TestNoSuchArch.py |
Commit
0d5407987a36445f21f122656edccbb0d9234f62
by llvm-devFix MSVC unhandled enum warning. NFCI.
|
 | clang/lib/CodeGen/CGOpenMPRuntime.cpp |
Commit
795c38eb4df636d434a9821efecbfeb41ecba843
by abpostelnicu[clang-tidy] For checker `readability-misleading-indentation` update tests. Summary: In D72333 we've introduced support for `if constexpr` but the test for uninstantiated template was not ready to land on windows platform since this target uses `-fdelayed-template-parsing` by default. This patch addresses this by passing `-fno-delayed-template-parsing` to the test. Reviewers: JonasToth Subscribers: xazax.hun, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D72438
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 | clang-tools-extra/test/clang-tidy/checkers/readability-misleading-indentation.cpp |
Commit
15c7fa4d11eeb50095ae571c645427b9a267bdee
by sam.parker[ARM][MVE] Don't unroll intrinsic loops. We don't unroll vector loops for MVE targets, but we miss the case when loops only contain intrinsic calls. So just move the logic a bit to catch this case. Differential Revision: https://reviews.llvm.org/D72440
|
 | llvm/test/Transforms/LoopUnroll/ARM/mve-nounroll.ll |
 | llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp |
Commit
e3e72a2619ccec9654ef9ad45e1e926841fbaa58
by llvm-devFix "pointer is null" static analyzer warnings. NFCI. Assert that the pointers are non-null before dereferencing them.
|
 | clang/lib/CodeGen/CGObjCGNU.cpp |
Commit
e315ce2bd3a5347ab58d50fab2d449e8a4e60e00
by llvm-devFix "pointer is null" static analyzer warnings. NFCI. Use castAs<> instead of getAs<> since the pointer is dereferenced immediately below and castAs will perform the null assertion for us.
|
 | clang/lib/Sema/SemaCoroutine.cpp |
Commit
9bb01efa49ca7f069bc7acba7e4c9bf64d972e79
by pavel[lldb/DWARF] Add is_dwo member to DWARFUnit Summary: A skeleton unit can easily be detected by checking the m_dwo_symbol_file member, but we cannot tell a split unit from a normal unit from the "inside", which is sometimes useful. This patch adds a m_is_dwo member to enable this, and align the code with llvm::DWARFUnit. Right now it's only used to avoid creating a split unit inside another split unit (which removes one override from SymbolFileDWARFDwo and brings us a step closer to deleting it), but my main motivation is fixing the handling of location lists in mixed v4&v5 files. This comes in a separate patch. Reviewers: JDevlieghere, aprantl, clayborg Subscribers: dblaikie, lldb-commits Tags: #lldb Differential Revision: https://reviews.llvm.org/D71750
|
 | lldb/source/Plugins/SymbolFile/DWARF/DWARFTypeUnit.h |
 | lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDwo.h |
 | lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.h |
 | lldb/source/Plugins/SymbolFile/DWARF/DWARFContext.h |
 | lldb/source/Plugins/SymbolFile/DWARF/DWARFCompileUnit.h |
 | lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp |
 | lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.h |
Commit
cd5da94d80b2b0f2bdb2d0157e24705a4cbd2a4e
by pavel[lldb/DWARF] Fix mixed v4+v5 location lists Summary: Our code was expecting that a single (symbol) file contains only one kind of location lists. This is not correct (on non-apple platforms, at least) as a file can compile units with different dwarf versions. This patch moves the deteremination of location list flavour down to the compile unit level, fixing this problem. I have also tried to rougly align the code with the llvm DWARFUnit. Fully matching the API is not possible because of how lldb's DWARFExpression lives separately from the rest of the DWARF code, but this is at least a step in the right direction. Reviewers: JDevlieghere, aprantl, clayborg Subscribers: dblaikie, lldb-commits Tags: #lldb Differential Revision: https://reviews.llvm.org/D71751
|
 | lldb/include/lldb/Expression/DWARFExpression.h |
 | lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.h |
 | lldb/source/Expression/DWARFExpression.cpp |
 | lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.cpp |
 | lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp |
 | lldb/test/Shell/SymbolFile/DWARF/debug_loc_and_loclists.s |
 | lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDwo.cpp |
 | lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp |
 | lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDwo.h |
 | lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.h |
Commit
d462185e8daa49889c31c8f5568749e379a5ddf9
by llvm-devFix "pointer is null" static analyzer warning. NFCI. Use cast<> instead of dyn_cast<> since we know that the pointer should be valid (and is dereferenced immediately below).
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 | clang/lib/Sema/SemaTemplateInstantiateDecl.cpp |
Commit
25dd99fab205619ef90d0da23bcfba3c9f762e5e
by llvm-devFix "pointer is null" static analyzer warning. NFCI. Use cast<> instead of dyn_cast<> since we know that the pointer should be valid (and is dereferenced immediately).
|
 | llvm/lib/IR/Verifier.cpp |
Commit
9c91d79dadc660cb6a0ec736389341debd8cd118
by sam.parker[NFC][ARM] LowOverheadLoop comments Add a comment describing the dependencies of the pass.
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 | llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp |
Commit
b65b1f322bd88513586a4539d2b5f18aeb698f3f
by saar[Concepts] Function trailing requires clauses Function trailing requires clauses now parsed, supported in overload resolution and when calling, referencing and taking the address of functions or function templates. Differential Revision: https://reviews.llvm.org/D43357
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 | clang/include/clang/AST/ASTLambda.h |
 | clang/include/clang/AST/DeclCXX.h |
 | clang/lib/Sema/SemaExpr.cpp |
 | clang/test/CXX/temp/temp.constr/temp.constr.constr/partial-specializations.cpp |
 | clang/lib/Sema/SemaLambda.cpp |
 | clang/lib/AST/ASTImporter.cpp |
 | clang/test/CXX/temp/temp.constr/temp.constr.order/class-template-partial-specializations.cpp |
 | clang/lib/AST/DeclCXX.cpp |
 | clang/test/CXX/temp/temp.constr/temp.constr.order/function-templates.cpp |
 | clang/include/clang/Sema/SemaConcept.h |
 | clang/test/CXX/temp/temp.constr/temp.constr.decl/func-template-decl.cpp |
 | clang/lib/Parse/ParseDecl.cpp |
 | clang/test/CXX/expr/expr.prim/expr.prim.lambda/expr.prim.lambda.closure/p3.cpp |
 | clang/include/clang/AST/ASTNodeTraverser.h |
 | clang/lib/Parse/ParseOpenMP.cpp |
 | clang/include/clang/Sema/Overload.h |
 | clang/lib/Parse/ParseTentative.cpp |
 | clang/include/clang/Basic/DiagnosticSemaKinds.td |
 | clang/lib/Sema/SemaOverload.cpp |
 | clang/test/CXX/dcl/dcl.decl/p3.cpp |
 | clang/test/CXX/temp/temp.explicit/p8.cpp |
 | clang/lib/Sema/SemaTemplateInstantiate.cpp |
 | clang/include/clang/AST/Decl.h |
 | clang/test/CXX/temp/temp.constr/temp.constr.constr/non-function-templates.cpp |
 | clang/lib/AST/Decl.cpp |
 | clang/test/SemaTemplate/instantiate-requires-clause.cpp |
 | clang/lib/Sema/SemaDeclCXX.cpp |
 | clang/lib/Serialization/ASTWriterDecl.cpp |
 | clang/include/clang/Sema/DeclSpec.h |
 | clang/lib/Sema/SemaDecl.cpp |
 | clang/lib/Parse/ParseExprCXX.cpp |
 | clang/lib/Sema/SemaTemplate.cpp |
 | clang/test/CXX/temp/temp.constr/temp.constr.order/var-template-partial-specializations.cpp |
 | clang/include/clang/AST/RecursiveASTVisitor.h |
 | clang/lib/Parse/ParseDeclCXX.cpp |
 | clang/lib/Sema/SemaCast.cpp |
 | clang/test/CXX/over/over.over/p4-2a.cpp |
 | clang/lib/Sema/SemaTemplateDeduction.cpp |
 | clang/lib/Sema/SemaDeclAttr.cpp |
 | clang/lib/Sema/SemaConcept.cpp |
 | clang/test/CXX/over/over.match/over.match.best/p1-2a.cpp |
 | clang/test/CXX/temp/temp.constr/temp.constr.constr/function-templates.cpp |
 | clang/include/clang/Basic/DiagnosticParseKinds.td |
 | clang/lib/AST/DeclTemplate.cpp |
 | clang/test/CXX/expr/expr.prim/expr.prim.id/p4.cpp |
 | clang/lib/AST/DeclPrinter.cpp |
 | clang/test/CXX/expr/expr.prim/expr.prim.id/mixed-constraints.cpp |
 | clang/include/clang/Parse/Parser.h |
 | clang/test/Parser/cxx-concepts-requires-clause.cpp |
 | clang/test/Parser/cxx-concepts-ambig-constraint-expr.cpp |
 | clang/lib/Serialization/ASTReaderDecl.cpp |
 | clang/lib/Sema/TreeTransform.h |
 | clang/lib/Sema/SemaTemplateInstantiateDecl.cpp |
 | clang/lib/Parse/ParseTemplate.cpp |
 | clang/test/CXX/class.derived/class.virtual/p6.cpp |
 | clang/test/CXX/temp/temp.constr/temp.constr.decl/class-template-decl.cpp |
 | clang/test/CXX/temp/temp.constr/temp.constr.decl/var-template-decl.cpp |
 | clang/include/clang/Sema/Sema.h |
 | clang/lib/Parse/ParseExpr.cpp |
 | clang/lib/Sema/SemaTemplateVariadic.cpp |
 | clang/test/CXX/over/over.match/over.match.viable/p3.cpp |
Commit
4a83f1e171b73b819bcdb486e363b409d25fc629
by inouehrs[mlir] fix test failure in EDSC/builder-api-test This patch fixes a test failure on a non-intel (PowerPC64) box. The two affine.load are independent and hence llvm may reorder them. The CHECK lines are modified for supporting reordered case. Differential Revision: https://reviews.llvm.org/D72435
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 | mlir/test/EDSC/builder-api-test.cpp |
Commit
5c4661b7784115cb330996b3a6461c5927339aef
by pavel[lldb] Modernize OptionValue::SetValueChangedCallback instead of a function pointer + void*, take a std::function. This removes a bunch of repetitive, unsafe void* casts.
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 | lldb/include/lldb/Interpreter/Property.h |
 | lldb/source/Interpreter/Property.cpp |
 | lldb/source/Target/Process.cpp |
 | lldb/include/lldb/Interpreter/OptionValueProperties.h |
 | lldb/include/lldb/Target/Target.h |
 | lldb/include/lldb/Target/Process.h |
 | lldb/source/Target/Target.cpp |
 | lldb/source/Interpreter/OptionValueProperties.cpp |
 | lldb/include/lldb/lldb-private-interfaces.h |
 | lldb/include/lldb/Interpreter/OptionValue.h |
Commit
032a9393a739a1ef8c30979e2493971207c3c397
by spatel[InstCombine] Use minimal FMF in testcase for Z / (1.0 / Y) => (Y * Z); NFC Patch by: @raghesh (Raghesh Aloor) Differential Revision: https://reviews.llvm.org/D72431
|
 | llvm/test/Transforms/InstCombine/fdiv.ll |
Commit
173b711e83d7b61a46f55eb44f03ea98f69a1dd6
by momchil.velikov[ARM][MVE] MVE-I should not be disabled by -mfpu=none Architecturally, it's allowed to have MVE-I without an FPU, thus -mfpu=none should not disable MVE-I, or moves to/from FP-registers. This patch removes `+/-fpregs` from features unconditionally added to target feature list, depending on FPU and moves the logic to Clang driver, where the negative form (`-fpregs`) is conditionally added to the target features list for the cases of `-mfloat-abi=soft`, or `-mfpu=none` without either `+mve` or `+mve.fp`. Only the negative form is added by the driver, the positive one is derived from other features in the backend. Differential Revision: https://reviews.llvm.org/D71843
|
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/fast-fp-loops.ll |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/dont-remove-loop-update3.mir |
 | llvm/test/Transforms/LoopVectorize/ARM/mve-shiftcost.ll |
 | llvm/test/CodeGen/ARM/softfp-constant-comparison.ll |
 | clang/test/CodeGen/arm-target-features.c |
 | clang/lib/Driver/ToolChains/Arch/ARM.cpp |
 | llvm/test/Transforms/LoopVectorize/ARM/mve-vldn.ll |
 | llvm/lib/Support/ARMTargetParser.cpp |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/dont-remove-loop-update2.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/mve-float-loops.ll |
 | clang/test/Driver/arm-mfpu.c |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/dont-remove-loop-update.mir |
Commit
f53b38d12a7b9c6754d5bc91483efab935b5c012
by spatel[InstSimplify] select Cond, true, false --> Cond This is step 1 of damage control assuming that we need to remove several over-reaching folds for select-of-booleans because they can cause miscompiles as shown in D72396. The scalar case seems obviously safe: https://rise4fun.com/Alive/jSj And I don't think there's any danger for vectors either - if the condition is poisoned, then the select must be poisoned too, so undef elements don't make any difference. Differential Revision: https://reviews.llvm.org/D72412
|
 | llvm/lib/Analysis/InstructionSimplify.cpp |
 | llvm/test/Transforms/InstSimplify/select.ll |
Commit
84ce46269cfda8800346706251ac3587b2d1c9f5
by saar[Concepts] Fix failing test on Windows Fix test failed by D43357 on Windows.
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 | clang/test/CXX/over/over.match/over.match.best/p1-2a.cpp |
Commit
cb5612e2df893728887bedd41aa2293f454c7845
by spatel[DAGCombiner] reduce extract subvector of concat If we are extracting a chunk of a vector that's a fraction of an operand of the concatenated vector operand, we can extract directly from one of those original operands. This is another suggestion from PR42024: https://bugs.llvm.org/show_bug.cgi?id=42024#c2 But I'm not sure yet if it will make any difference on those patterns. It seems to help a few existing AVX512 tests though. Differential Revision: https://reviews.llvm.org/D72361
|
 | llvm/test/CodeGen/X86/pr34657.ll |
 | llvm/test/CodeGen/X86/x86-interleaved-access.ll |
 | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp |
 | llvm/test/CodeGen/X86/avg.ll |
Commit
4c11703b3d9d936214b8ced70bd6475974c317d8
by a.bataev[OPENMP]Remove unused code, NFC.
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 | clang/lib/CodeGen/CGOpenMPRuntime.cpp |
 | clang/lib/CodeGen/CGOpenMPRuntime.h |
Commit
667e1f71b83c48b635b13b64bbff28b95e68265c
by Tim NorthoverIR: remove "else" after "return". NFCI.
|
 | llvm/lib/IR/Core.cpp |
Commit
d857e114b5e04f5143485a5aea7ad9b283768692
by simon.tatham[ARM,MVE] Fix valid immediate range for vsliq_n. In common with most MVE immediate shift instructions, the left shift takes an immediate in the range [0,n-1], while the right shift takes one in the range [1,n]. I had absent-mindedly made them both the latter. While I'm here, I've added a set of regression tests checking both ends of the immediate range for a representative sample of the immediate shifts.
|
 | clang/include/clang/Basic/arm_mve.td |
 | clang/test/Sema/arm-mve-immediates.c |
Commit
9704ba652a0062c53ec66b068766df5c0cd5c620
by simon.tatham[ARM,MVE] Add missing IntrNoMem flag on IR intrinsics. A lot of the IR-level intrinsics we've been defining for MVE recently accidentally had `props = []` instead of `props = [IntrNoMem]`, so that optimization would have been overcautious about reordering them. All the affected cases were due to instantiating the multiclasses `MVEPredicated` and `MVEMXPredicated` without filling in the `props` parameter, because I //thought// I remembered having set the defaults in those multiclasses to `[IntrNoMem]`. In fact I hadn't done that. Now I have. (The IR intrinsics that //do// read and write memory are all explicitly marked as `[IntrReadMem]` or `[IntrWriteMem]` already, so they will override these defaults.)
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 | llvm/include/llvm/IR/IntrinsicsARM.td |
Commit
db7c92077963195df0807e976cc916b5c6e29a05
by arsenm2AMDGPU: Add register class to DS_SWIZZLE_B32 pattern Reduces diff for a future patch.
|
 | llvm/lib/Target/AMDGPU/DSInstructions.td |
Commit
0274ed9dc75a0efb2b6130122226ee45f7e57dde
by arsenm2TableGen/GlobalISel: Fix slightly wrong generated comment
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 | llvm/utils/TableGen/GlobalISelEmitter.cpp |
 | llvm/test/TableGen/GlobalISelEmitter.td |
Commit
3952748ffdf017f83faddcb1240cb36cb4bb9c5b
by arsenm2AMDGPU/GlobalISel: Fix add of neg inline constant pattern
|
 | llvm/lib/Target/AMDGPU/AMDGPUGISel.td |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-add.mir |
 | llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp |
 | llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h |
 | llvm/lib/Target/AMDGPU/SIInstructions.td |
Commit
d964086c62422771c1d6dbe66ee8ea06e8f834b2
by arsenm2AMDGPU/GlobalISel: Add equiv xform for bitcast_fpimm_to_i32 Only partially fixes one pattern import.
|
 | llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h |
 | llvm/lib/Target/AMDGPU/AMDGPUGISel.td |
 | llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp |
Commit
79450a4ea26a0e9731eaf2629f6dd8c1ffd8f407
by arsenm2AMDGPU/GlobalISel: Add selectVOP3Mods_nnan This doesn't enable any new imports yet, but moves the fmed patterns from failing on this to hitting the "complex suboperand referenced more than once" limitation in tablegen.
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 | llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h |
 | llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp |
 | llvm/lib/Target/AMDGPU/AMDGPUGISel.td |
Commit
e71af775684a83f0d1d05ab5225d36830d5aa87e
by arsenm2AMDGPU/GlobalISel: Add IMMPopCount xform Partially fixes BFE pattern import.
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 | llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp |
 | llvm/lib/Target/AMDGPU/AMDGPUGISel.td |
 | llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h |
Commit
7d677421607cbfdd8d1e96275c613d3db8a0e51f
by arsenm2AMDGPU/GlobalISel: Fix import of zext of s16 op patterns
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 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.s16.mir |
 | llvm/lib/Target/AMDGPU/VOP2Instructions.td |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-add.s16.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.s16.mir |
 | llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.s16.mir |
Commit
c1d4963b447c9330c2ad50bb73bb93f9a42c9641
by arsenm2AMDGPU: Use new PatFrag system for d16 load nodes
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 | llvm/lib/Target/AMDGPU/SIInstrInfo.td |
Commit
3766f4baccac5cc17680ad4cefd1d5a0d3ba2870
by arsenm2AMDGPU: Use new PatFrag system for d16 stores
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 | llvm/lib/Target/AMDGPU/AMDGPUInstructions.td |
 | llvm/lib/Target/AMDGPU/DSInstructions.td |
Commit
c66b2e1c87ecde72eb37d3452ec9c1b8766ede30
by arsenm2AMDGPU: Eliminate more legacy codepred address space PatFrags These should now be limited to R600 code.
|
 | llvm/lib/Target/AMDGPU/AMDGPUInstructions.td |
 | llvm/lib/Target/AMDGPU/BUFInstructions.td |
 | llvm/lib/Target/AMDGPU/FLATInstructions.td |
 | llvm/lib/Target/AMDGPU/R600Instructions.td |
Commit
9ffd0ed838191247e0da7df5e28e54a5129e76a7
by arsenm2AMDGPU/GlobalISel: Fix import of integer med3 This isn't too useful now, since nothing is currently trying to form min/max from cmp+select.
|
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-umed3.mir |
 | llvm/lib/Target/AMDGPU/AMDGPUInstructions.td |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-smed3.s16.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-umed3.s16.mir |
 | llvm/lib/Target/AMDGPU/SIInstructions.td |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-smed3.mir |
Commit
de08244d3da52215b8c63bc70d0a3c9e07b620a3
by arsenm2TableGen: Remove unused code
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 | llvm/utils/TableGen/CodeGenDAGPatterns.h |
Commit
0fa8f701ccf6f29544394b358f38b748e3f7ab24
by sidneym[ELF][Hexagon] Add support for IE relocations Differential Revision: https://reviews.llvm.org/D71143
|
 | lld/ELF/Arch/Hexagon.cpp |
 | lld/test/ELF/hexagon-tls-ie.s |
 | lld/ELF/Relocations.cpp |
Commit
6c04ef472a8739a60a7935f77edfbacd2f50eb73
by spatel[InstCombine] Z / (1.0 / Y) => (Y * Z) This is a special case of Z / (X / Y) => (Y * Z) / X, with X = 1.0. The m_OneUse check is avoided because even in the case of the multiple uses for 1.0/Y, the number of instructions remain the same and a division is replaced by a multiplication. Differential Revision: https://reviews.llvm.org/D72319
|
 | llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp |
 | llvm/test/Transforms/InstCombine/fdiv.ll |
Commit
fb76c7934dce2ede7e04097edb455eba58f6ebfd
by jaskiewiczs[libcxxabi] Allow tests to link with static libc++abi/libc++ even if the shared version is present Summary: Right now the only way to force libc++abi tests to link with the static version of libc++abi is to set `LIBCXXABI_ENABLE_SHARED` to `OFF`. However, this doesn't work when libc++abi is built as standalone project because of [this](https://github.com/llvm/llvm-project/blob/54c522420347e58aa7bae1892cf5c5672b57c875/libcxxabi/CMakeLists.txt#L503-L519). This change allows specifying the version of the library for tests to link with. This is useful for remote testing, for example, with `SSHExecutor`, where we _have_ to link with libc++abi statically. Two new CMake options are introduced here: `LIBCXXABI_LINK_TESTS_WITH_SHARED_LIBCXXABI` and `LIBCXXABI_LINK_TESTS_WITH_SHARED_LIBCXX`. They can be set to `OFF` to tell the test utility to link tests with the static libraries. It shouldn't break anything, because the default values of these options are set such that the test utility will behave the same way. Reviewers: EricWF, mclow.lists, phosek, mehdi_amini, ldionne, jroelofs, bcraig Subscribers: mgorny, christof, ldionne, libcxx-commits Tags: #libc Differential Revision: https://reviews.llvm.org/D71894
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 | libcxxabi/CMakeLists.txt |
 | libcxxabi/test/lit.site.cfg.in |
 | libcxxabi/test/CMakeLists.txt |
Commit
ea9888b8f6f20887647b77ebf5864d647fd2ea44
by davg[clangd] Respect `--sysroot` argument if it is set Summary: - Since `--sysroot` is a superset of the `-isysroot` argument, we shouldn't add the `-isysroot` if we detect a `--sysroot` flag. Reviewers: sammccall Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, usaxena95, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D72415
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 | clang-tools-extra/clangd/CompileCommands.cpp |
Commit
93a1e9c90c96a9130352bf358d7777f0379ebb48
by Jonas Devlieghere[lldb/SWIG] Add missing '\' in macros again Making the string conversion operator a macro unintentionally dropped the backslash before '\n' and '\r' and was therefore incorrectly stripping 'n' and 'r' from the object description.
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 | lldb/scripts/macros.swig |
Commit
45c971f7eef18ef2b77a5f64133dbd7bd5939d5f
by Jonas Devlieghere[lldb/Lua] Make lldb.debugger et al available to Lua The Python script interpreter makes the current debugger, target, process, thread and frame available to interactive scripting sessions through convenience variables. This patch does the same for Lua. Differential revision: https://reviews.llvm.org/D71801
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 | lldb/test/Shell/ScriptInterpreter/Lua/Inputs/nested_sessions_2.in |
 | lldb/test/Shell/ScriptInterpreter/Lua/independent_state.test |
 | lldb/source/Plugins/ScriptInterpreter/Lua/ScriptInterpreterLua.cpp |
 | lldb/test/Shell/ScriptInterpreter/Lua/convenience_variables.test |
 | lldb/test/Shell/ScriptInterpreter/Lua/nested_sessions.test |
 | lldb/source/Plugins/ScriptInterpreter/Lua/Lua.cpp |
 | lldb/source/Plugins/ScriptInterpreter/Lua/Lua.h |
 | lldb/test/Shell/ScriptInterpreter/Lua/Inputs/nested_sessions.in |
 | lldb/test/Shell/ScriptInterpreter/Lua/Inputs/independent_state.in |
 | lldb/source/Plugins/ScriptInterpreter/Lua/ScriptInterpreterLua.h |
Commit
d27a15fed79c8e8484825ce6c3ce1682daeb1547
by whitneyt[NFCI][LoopUnrollAndJam] Changing LoopUnrollAndJamPass to a function pass. Summary: This patch changes LoopUnrollAndJamPass to a function pass, and keeps the loops traversal order same as defined in FunctionToLoopPassAdaptor LoopPassManager.h. The next patch will change the loop traversal to outer to inner order, so more loops can be transform. Discussion in llvm-dev mailing list: https://groups.google.com/forum/#!topic/llvm-dev/LF4rUjkVI2g Reviewer: dmgreen, jdoerfert, Meinersbur, kbarton, bmahjour, etiotto Reviewed By: dmgreen Subscribers: hiraditya, zzheng, llvm-commits Tag: LLVM Differential Revision: https://reviews.llvm.org/D72230
|
 | llvm/lib/Passes/PassRegistry.def |
 | llvm/include/llvm/Transforms/Scalar/LoopUnrollAndJamPass.h |
 | llvm/lib/Transforms/Scalar/LoopUnrollAndJamPass.cpp |
 | llvm/test/Transforms/LoopUnrollAndJam/dependencies.ll |
 | llvm/test/Transforms/LoopUnrollAndJam/disable.ll |
 | llvm/test/Transforms/LoopUnrollAndJam/pragma-explicit.ll |
 | llvm/lib/Passes/PassBuilder.cpp |
 | llvm/test/Transforms/LoopUnrollAndJam/unroll-and-jam.ll |
Commit
cee4a1c957426e9477c8579ff960c8c2bd4af9e2
by sgueltonImprove support of GNU mempcpy - Lower to the memcpy intrinsic - Raise warnings when size/bounds are known Differential Revision: https://reviews.llvm.org/D71374
|
 | clang/lib/CodeGen/CGBuiltin.cpp |
 | clang/test/Analysis/bstring.c |
 | clang/test/CodeGen/mempcpy-libcall.c |
 | clang/lib/AST/Decl.cpp |
 | clang/include/clang/Basic/Builtins.def |
 | clang/lib/Sema/SemaChecking.cpp |
Commit
241f335b268dc19a0dfb85686a7c82fb339421a8
by sven.vanhaastregt[OpenCL][Docs] Rename C++ for OpenCL label To avoid potential confusion with OpenCL C++.
|
 | clang/docs/UsersManual.rst |
Commit
6498aff249a1c3c6bad33137df3b90e2973722d6
by Jonas Devlieghere[lldb/Bindings] Move bindings into their own subdirectory All the code required to generate the language bindings for Python and Lua lives under scripts, even though the majority of this code aren't scripts at all, and surrounded by scripts that are totally unrelated. I've reorganized these files and moved everything related to the language bindings into a new top-level directory named bindings. This makes the corresponding files self contained and much more discoverable. Differential revision: https://reviews.llvm.org/D72437
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 | lldb/bindings/interface/SBInstructionList.i |
 | lldb/scripts/interface/SBTraceOptions.i |
 | lldb/bindings/interface/SBTraceOptions.i |
 | lldb/bindings/interface/SBLaunchInfo.i |
 | lldb/bindings/interface/SBTypeEnumMember.i |
 | lldb/bindings/interface/SBSymbolContext.i |
 | lldb/scripts/Python/createPythonInit.py |
 | lldb/scripts/lldb_lua.swig |
 | lldb/bindings/macros.swig |
 | lldb/bindings/interface/SBDeclaration.i |
 | lldb/bindings/interface/SBThreadPlan.i |
 | lldb/bindings/interface/SBTrace.i |
 | lldb/scripts/interface/SBProcessInfo.i |
 | lldb/bindings/interface/SBQueueItem.i |
 | lldb/scripts/lldb.swig |
 | lldb/source/API/CMakeLists.txt |
 | lldb/bindings/interface/SBCommunication.i |
 | lldb/bindings/interface/SBSourceManager.i |
 | lldb/bindings/interface/SBLineEntry.i |
 | lldb/bindings/interface/SBTypeSynthetic.i |
 | lldb/scripts/interface/SBTypeNameSpecifier.i |
 | lldb/scripts/interface/SBValue.i |
 | lldb/bindings/interface/SBVariablesOptions.i |
 | lldb/bindings/interface/SBTypeCategory.i |
 | lldb/bindings/python/python-typemaps.swig |
 | lldb/scripts/interface/SBTypeFilter.i |
 | lldb/scripts/interface/SBWatchpoint.i |
 | lldb/scripts/interface/SBCommunication.i |
 | lldb/bindings/interface/SBFileSpec.i |
 | lldb/scripts/interface/SBCompileUnit.i |
 | lldb/bindings/interface/SBTypeFormat.i |
 | lldb/bindings/interface/SBAddress.i |
 | lldb/bindings/interface/SBAttachInfo.i |
 | lldb/bindings/interface/SBExecutionContext.i |
 | lldb/scripts/interfaces.swig |
 | lldb/bindings/interface/SBMemoryRegionInfo.i |
 | lldb/scripts/interface/SBExecutionContext.i |
 | lldb/scripts/interface/SBAddress.i |
 | lldb/bindings/interface/SBThread.i |
 | lldb/scripts/interface/SBTypeSynthetic.i |
 | lldb/scripts/interface/SBStream.i |
 | lldb/scripts/interface/SBInstruction.i |
 | lldb/bindings/interface/SBTypeNameSpecifier.i |
 | lldb/scripts/interface/SBBroadcaster.i |
 | lldb/scripts/interface/SBSection.i |
 | lldb/bindings/interface/SBQueue.i |
 | lldb/scripts/interface/SBTrace.i |
 | lldb/bindings/python/createPythonInit.py |
 | lldb/bindings/interface/SBBreakpointLocation.i |
 | lldb/scripts/interface/SBCommandInterpreter.i |
 | lldb/bindings/lua.swig |
 | lldb/scripts/macros.swig |
 | lldb/bindings/interface/SBUnixSignals.i |
 | lldb/bindings/interface/SBFile.i |
 | lldb/scripts/interface/SBAttachInfo.i |
 | lldb/docs/CMakeLists.txt |
 | lldb/bindings/interface/SBBreakpoint.i |
 | lldb/scripts/interface/SBBlock.i |
 | lldb/scripts/interface/SBBreakpoint.i |
 | lldb/scripts/interface/SBLanguageRuntime.i |
 | lldb/bindings/interface/SBProcess.i |
 | lldb/bindings/python.swig |
 | lldb/bindings/interface/SBStream.i |
 | lldb/scripts/interface/SBModuleSpec.i |
 | lldb/bindings/interface/SBCommandReturnObject.i |
 | lldb/scripts/interface/SBMemoryRegionInfoList.i |
 | lldb/scripts/interface/SBTypeSummary.i |
 | lldb/scripts/interface/SBProcess.i |
 | lldb/scripts/interface/SBThreadCollection.i |
 | lldb/scripts/interface/SBType.i |
 | lldb/scripts/interface/SBFunction.i |
 | lldb/bindings/interface/SBMemoryRegionInfoList.i |
 | lldb/bindings/interface/SBStructuredData.i |
 | lldb/scripts/CMakeLists.txt |
 | lldb/bindings/interface/SBBreakpointName.i |
 | lldb/bindings/interface/SBThreadCollection.i |
 | lldb/bindings/interface/SBSymbol.i |
 | lldb/scripts/interface/SBThreadPlan.i |
 | lldb/scripts/Python/python-typemaps.swig |
 | lldb/scripts/interface/SBPlatform.i |
 | lldb/bindings/interface/SBValue.i |
 | lldb/scripts/headers.swig |
 | lldb/bindings/interface/SBInstruction.i |
 | lldb/scripts/interface/SBSymbol.i |
 | lldb/scripts/interface/SBSourceManager.i |
 | lldb/scripts/interface/SBTypeEnumMember.i |
 | lldb/scripts/interface/SBTarget.i |
 | lldb/scripts/interface/SBSymbolContext.i |
 | lldb/bindings/interface/SBModuleSpec.i |
 | lldb/scripts/interface/SBQueue.i |
 | lldb/bindings/interface/SBTarget.i |
 | lldb/scripts/Python/python-wrapper.swig |
 | lldb/scripts/interface/SBFileSpec.i |
 | lldb/scripts/interface/SBUnixSignals.i |
 | lldb/bindings/interface/SBCommandInterpreter.i |
 | lldb/scripts/interface/SBStructuredData.i |
 | lldb/scripts/Python/python-extensions.swig |
 | lldb/scripts/interface/SBMemoryRegionInfo.i |
 | lldb/bindings/interface/SBPlatform.i |
 | lldb/bindings/interface/SBDebugger.i |
 | lldb/bindings/interface/SBError.i |
 | lldb/scripts/interface/SBStringList.i |
 | lldb/bindings/interface/SBHostOS.i |
 | lldb/bindings/interface/SBExpressionOptions.i |
 | lldb/scripts/interface/SBExpressionOptions.i |
 | lldb/scripts/interface/SBFileSpecList.i |
 | lldb/scripts/interface/SBLaunchInfo.i |
 | lldb/bindings/interface/SBModule.i |
 | lldb/scripts/interface/SBEvent.i |
 | lldb/bindings/CMakeLists.txt |
 | lldb/scripts/interface/SBData.i |
 | lldb/bindings/interface/SBFunction.i |
 | lldb/scripts/interface/SBError.i |
 | lldb/scripts/interface/SBQueueItem.i |
 | lldb/bindings/headers.swig |
 | lldb/bindings/interfaces.swig |
 | lldb/bindings/interface/SBData.i |
 | lldb/scripts/interface/SBValueList.i |
 | lldb/bindings/interface/SBTypeFilter.i |
 | lldb/scripts/interface/SBFrame.i |
 | lldb/bindings/interface/SBFrame.i |
 | lldb/bindings/python/python-swigsafecast.swig |
 | lldb/scripts/interface/SBTypeFormat.i |
 | lldb/bindings/interface/SBTypeSummary.i |
 | lldb/scripts/interface/SBBreakpointLocation.i |
 | lldb/scripts/interface/SBDeclaration.i |
 | lldb/bindings/interface/SBStringList.i |
 | lldb/CMakeLists.txt |
 | lldb/scripts/interface/SBLineEntry.i |
 | lldb/scripts/interface/SBModule.i |
 | lldb/scripts/interface/SBCommandReturnObject.i |
 | lldb/bindings/interface/SBBlock.i |
 | lldb/bindings/interface/SBSymbolContextList.i |
 | lldb/bindings/interface/SBValueList.i |
 | lldb/scripts/interface/SBHostOS.i |
 | lldb/bindings/interface/SBListener.i |
 | lldb/scripts/interface/SBFile.i |
 | lldb/bindings/interface/SBType.i |
 | lldb/scripts/interface/SBBreakpointName.i |
 | lldb/bindings/interface/SBFileSpecList.i |
 | lldb/scripts/interface/SBListener.i |
 | lldb/scripts/interface/SBThread.i |
 | lldb/scripts/Python/python-swigsafecast.swig |
 | lldb/bindings/interface/SBBroadcaster.i |
 | lldb/bindings/interface/SBCompileUnit.i |
 | lldb/bindings/interface/SBLanguageRuntime.i |
 | lldb/scripts/interface/SBDebugger.i |
 | lldb/scripts/interface/SBTypeCategory.i |
 | lldb/bindings/interface/SBSection.i |
 | lldb/scripts/interface/SBInstructionList.i |
 | lldb/scripts/interface/SBSymbolContextList.i |
 | lldb/scripts/interface/SBVariablesOptions.i |
 | lldb/bindings/python/python-extensions.swig |
 | lldb/bindings/interface/SBProcessInfo.i |
 | lldb/bindings/python/python-wrapper.swig |
 | lldb/bindings/interface/SBWatchpoint.i |
 | lldb/bindings/interface/SBEvent.i |
Commit
189aa5b7a4584677ad628ecc2c369db61d4d2515
by kadircet[clangd] Adjust diagnostic range to be inside main file Summary: LSP requires diagnostics to lay inside main file. In clangd we keep diagnostics in three different cases: - already in main file - adjusted to a header included in main file - has a note covering some range in main file In the last case, we were not adjusting the diagnostics range to be in main file, therefore these diagnostics ended up pointing some arbitrary locations. This patch fixes that issue by adjusting the range of diagnostics to be the first note inside main file when converting to LSP. Reviewers: ilya-biryukov Subscribers: MaskRay, jkorous, arphaman, usaxena95, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D72458
|
 | clang-tools-extra/clangd/unittests/DiagnosticsTests.cpp |
 | clang-tools-extra/clangd/Diagnostics.cpp |
Commit
5e0bf6772e2ca450d3433fca8b47ce7bac5a6cc7
by Jonas Devlieghere[lldb/SWIG] Fix capitalization for case sensitive file systems. When moving the Python directory I renamed it to python (lowercase) but didn't update the python.swig file.
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 | lldb/bindings/python.swig |
Commit
06d07ec4a372b55e6fb77bf0b97964bde16a3184
by simon.tatham[Clang] Handle target-specific builtins returning aggregates. Summary: A few of the ARM MVE builtins directly return a structure type. This causes an assertion failure at code-gen time if you try to assign the result of the builtin to a variable, because the `RValue` created in `EmitBuiltinExpr` from the `llvm::Value` produced by codegen is always made by `RValue::get()`, which creates a non-aggregate `RValue` that will fail an assertion when `AggExprEmitter::withReturnValueSlot` calls `Src.getAggregatePointer()`. A similar failure occurs if you try to use the struct return value directly to extract one field, e.g. `vld2q(address).val[0]`. The existing code-gen tests for those MVE builtins pass the returned structure type directly to the C `return` statement, which apparently managed to avoid that particular code path, so we didn't notice the crash. Now `EmitBuiltinExpr` checks the evaluation kind of the builtin's return value, and does the necessary handling for aggregate returns. I've added two extra test cases, both of which crashed before this change. Reviewers: dmgreen, rjmccall Reviewed By: rjmccall Subscribers: kristof.beyls, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D72271
|
 | clang/test/CodeGen/arm-mve-intrinsics/vld24.c |
 | clang/lib/CodeGen/CGBuiltin.cpp |
Commit
ed6daa2e1d32e940ac4bd8c31ae05154c5ed9bd3
by riccibrun[Support][NFC] Add a comment about the semantics of MF_HUGE_HINT flag
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 | llvm/include/llvm/Support/Memory.h |
Commit
356b33516c2e0ef241066dded16d7ecc1f7aa8cc
by simon.moll[NFC,format] Sort switch cases alphabetically This patch brings the switch cases of `llvm/lib/Support/Triple.cpp` back into alphabetical order. This was noted during the the review of https://reviews.llvm.org/D69103 Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D72452
|
 | llvm/lib/Support/Triple.cpp |
Commit
2fe45e029ddfa65880cfe5c3501db12a81cdcbd2
by riccibrun[Support][NFC] Make some helper functions "static" in Memory.inc
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 | llvm/lib/Support/Windows/Memory.inc |
 | llvm/lib/Support/Unix/Memory.inc |
Commit
7bbd4076c1984165568c978ff15b77dbfe52b6f0
by Jonas Devlieghere[lldb/SWIG] Undo incorrect substitution The Python directory for the script interpreter is still capitalized.
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 | lldb/bindings/python.swig |
Commit
b51fa8670f3d9346cad068aa7300d63eb051069d
by ulrich.weigand[SystemZ] Fix matching another pattern for nxgrk (PR44496) SystemZDAGToDAGISel::Select will attempt to split logical instruction with a large immediate constant. This must not happen if the result matches one of the z15 combined operations, so the code checks for those. However, one of them was missed, causing invalid code to be generated in the test case for PR44496.
|
 | llvm/test/CodeGen/SystemZ/not-01.ll |
 | llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp |
Commit
460cbabe170e481d4468ef77de1fb08b02a0f2a3
by spatel[x86] add tests for 2-way splat copy; NFC Based on code in PR42024: https://bugs.llvm.org/show_bug.cgi?id=42024
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 | llvm/test/CodeGen/X86/vector-interleave.ll |
Commit
002be6cfa2b1de064d672dac6db53c01e9f150b0
by riccibrun[Support][NFC] Add an explicit unit test for Process::getPageSize() It turns out that it was only tested indirectly. For now test only on Linux X86-64 and aarch64.
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 | llvm/unittests/Support/ProcessTest.cpp |
Commit
b705fe5686a886e200fd57410c6bc9bad5c21c0e
by craig.topper[TargetLowering][X86] TeachSimplifyDemandedBits to handle cases where only the sign bit is demanded from a SETCC and can be passed through If we're doing a compare that only tests the sign bit and only the sign bit is demanded, we can just bypass the node. This removes one of the blend dependencies in our v2i64->v2f32 uint_to_fp codegen on pre-sse4.2 targets. Differential Revision: https://reviews.llvm.org/D72356
|
 | llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp |
 | llvm/test/CodeGen/X86/vec_int_to_fp.ll |
Commit
183b5d38d7cffc10ff9f4914b8879ed5b1976e40
by erik.pilkington[demangle] Copy back some NFC commits from LLVM
|
 | libcxxabi/src/demangle/Utility.h |
 | libcxxabi/src/demangle/ItaniumDemangle.h |
Commit
1a1dbea24df51e441f3517abb8e251df0029dad7
by sd.fertile[PowerPC] The VK_PLT symbolref modifier is only used on 32-bit ELF. [NFC] Fix a conditional that guarded code for execution only on 32-bit ELF by checking that the Subtarget was not 64-bit and not-Darwin. By adding a new target ABI (AIX), the condition is no longer correct. This code is dead for AIX, due to a 'report_fatal_error' for thread local storage usage earlier in the pipeline, but needs to be modifed as part of Darwins removal from the PowerPC backend.
|
 | llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp |
Commit
3408940f736955402b7676e3b8bab6906cc82637
by Ganesh.Gopalasubramanian[X86] AMD Znver2 (Rome) Scheduler enablement The patch gives out the details of the znver2 scheduler model. There are few improvements with respect to execution units, latencies and throughput when compared with znver1. The tests that were present for znver1 for llvm-mca tool were replicated. The latencies, execution units, timeline and throughput information are updated for znver2. Reviewers: craig.topper, Simon Pilgrim Differential Revision: https://reviews.llvm.org/D66088
|
 | llvm/test/tools/llvm-mca/X86/Generic/resources-clzero.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/resources-prefetchw.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/partial-reg-update-3.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/resources-sse1.s |
 | llvm/test/tools/llvm-mca/X86/bextr-read-after-ld.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/resources-lea.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/resources-clzero.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/partial-reg-update-7.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/resources-rdrand.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/resources-sse3.s |
 | llvm/test/tools/llvm-mca/X86/bzhi-read-after-ld.s |
 | llvm/test/tools/llvm-mca/X86/scheduler-queue-usage.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/partial-reg-update-2.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/resources-x86_32.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/partial-reg-update-5.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/resources-mwaitx.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/resources-avx2.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/resources-fsgsbase.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/resources-clflushopt.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/resources-sse42.s |
 | llvm/test/tools/llvm-mca/X86/read-after-ld-1.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/resources-sha.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/resources-bmi2.s |
 | llvm/lib/Target/X86/X86.td |
 | llvm/test/tools/llvm-mca/X86/Znver2/resources-x87.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/resources-avx1.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/resources-popcnt.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/resources-f16c.s |
 | llvm/lib/Target/X86/X86InstrInfo.td |
 | llvm/test/tools/llvm-mca/X86/sqrt-rsqrt-rcp-memop.s |
 | llvm/test/tools/llvm-mca/X86/register-file-statistics.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/partial-reg-update.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/resources-rdseed.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/resources-adx.s |
 | llvm/test/tools/llvm-mca/X86/cpus.s |
 | llvm/test/tools/llvm-mca/X86/fma3-read-after-ld-2.s |
 | llvm/lib/Target/X86/X86ScheduleZnver2.td |
 | llvm/test/tools/llvm-mca/X86/Znver2/resources-cmpxchg.s |
 | llvm/test/tools/llvm-mca/X86/variable-blend-read-after-ld-2.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/resources-sse41.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/resources-lzcnt.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/partial-reg-update-4.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/resources-x86_64.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/resources-mmx.s |
 | llvm/test/tools/llvm-mca/X86/read-after-ld-2.s |
 | llvm/test/MC/X86/x86_long_nop.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/resources-bmi1.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/resources-movbe.s |
 | llvm/test/tools/llvm-mca/X86/fma3-read-after-ld-1.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/resources-pclmul.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/resources-sse4a.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/resources-aes.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/partial-reg-update-6.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/resources-ssse3.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/resources-fma.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/resources-cmov.s |
 | llvm/test/tools/llvm-mca/X86/Znver2/resources-sse2.s |
 | llvm/test/tools/llvm-mca/X86/variable-blend-read-after-ld-1.s |
 | llvm/test/tools/llvm-mca/X86/Znver1/resources-clzero.s |
Commit
1c545f6dbcbb3ada2dfef2c6afbc1ca8939135cb
by epastor[ms] [X86] Use "P" modifier on all branch-target operands in inline X86 assembly. Summary: Extend D71677 to apply to all branch-target operands, rather than special-casing call instructions. Also add a regression test for llvm.org/PR44272, since this finishes fixing it. Reviewers: thakis, rnk Reviewed By: thakis Subscribers: merge_guards_bot, hiraditya, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D72417
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 | llvm/utils/TableGen/InstrInfoEmitter.cpp |
 | llvm/include/llvm/MC/MCParser/MCParsedAsmOperand.h |
 | llvm/include/llvm/MC/MCInstrDesc.h |
 | llvm/lib/MC/MCParser/AsmParser.cpp |
 | llvm/lib/Target/X86/X86InstrInfo.td |
 | llvm/lib/Target/X86/AsmParser/X86Operand.h |
 | llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp |
 | llvm/lib/Target/X86/X86InstrControl.td |
 | llvm/utils/TableGen/X86RecognizableInstr.cpp |
 | clang/test/CodeGen/ms-inline-asm-64.c |
Commit
b35f5d4914c979282010c0618a331d11a58493ac
by sguelton[clang] Enforce triple in mempcpy test Fixes http://lab.llvm.org:8011/builders/llvm-clang-win-x-armv7l/builds/2597
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 | clang/test/CodeGen/mempcpy-libcall.c |
Commit
9949b1a1753aa0f229c5b55ea01ec96f48164d9e
by Jessica Paquette[GlobalISel][AArch64] Import + select LDR*roW and STR*roW patterns This adds support for selecting a large chunk of the load/store *roW patterns. This is pretty much a straight port of AArch64DAGToDAGISel::SelectAddrModeWRO into GISel. The code is very similar to the XRO code. The main difference is that in the *roW patterns, we want to try and fold in an extend, and *possibly* a shift along with it. A good portion of this patch is refactoring the existing XRO code. - Add selectAddrModeWRO - Factor out the code from selectAddrModeShiftedExtendXReg which is used by both selectAddrModeXRO and selectAddrModeWRO into selectExtendedSHL. This is similar to the function of the same name in AArch64DAGToDAGISel. - Add support for extends to the factored out code in selectExtendedSHL. - Teach getExtendTypeForInst how to handle AND masks that are intended to be used in loads/stores (necessary for this addressing mode.) - Make getExtendTypeForInst not static because moving it made an annoying diff and I wanted to have the WRO/XRO functions close to each other while I was writing the code. Differential Revision: https://reviews.llvm.org/D72426
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 | llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp |
 | llvm/test/CodeGen/AArch64/GlobalISel/store-wro-addressing-modes.mir |
 | llvm/lib/Target/AArch64/AArch64InstrFormats.td |
 | llvm/test/CodeGen/AArch64/GlobalISel/load-wro-addressing-modes.mir |
Commit
4e003aad42d985dade66cd5928d64dd09edecceb
by craig.topper[X86] Add ueq/one fp128 quiet compare tests. NFC The ONE expansion calls OGT/OLT libcalls which will signal for QNAN. The UEQ expansion uses unord and eq libcalls which won't signal. We should probably use those libcalls for ONE with appropriate logic. Quiet OGT/OLT/OLE/OGE have similar issue, but not sure how to fix those yet.
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 | llvm/test/CodeGen/X86/fp128-libcalls-strict.ll |
 | llvm/test/CodeGen/X86/fp128-compare.ll |
Commit
1444e6e2e6f6b76cc9d5aab8b1877926aa6d5597
by Alexander.RichardsonRe-apply "[ELF] Allow getErrPlace() to work before Out::bufferStart is set" This time with a fix for the UBSAN failure. Differential Revision: https://reviews.llvm.org/D70659
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 | lld/ELF/Target.cpp |
 | lld/test/ELF/mips-jalr-non-functions.s |
Commit
646ca7d7e72e8408b3fa3472018eb9d1c2643ff5
by Alexander.RichardsonMipsDelaySlotFiller: Update registers def-uses for BUNDLE instructions Summary: In commit b91f239485fb7bb8d29be3e0b60660a2de7570a9 I updated the MipsDelaySlotFiller to skip BUNDLE instructions. However, in addition to not considering BUNDLE instructions for the delay slot, we also need to ensure that the register def-use information is updated. Not updating this information caused run-time crashes (when using the out-of-tree CHERI backend) since later definitions could be overwritten with earlier register values. Reviewers: atanasyan Reviewed By: atanasyan Differential Revision: https://reviews.llvm.org/D72254
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 | llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp |
 | llvm/test/CodeGen/Mips/delay-slot-filler-bundled-insts-def-use.mir |
Commit
fc3367dd5ed4698036c421b23cf4f52cf8aedcae
by riverriddle[mlir] NFC: Move the state for managing SSA value names out of OperationPrinter and into a new class SSANameState. Summary: This reduces the complexity of OperationPrinter and simplifies the code by quite a bit. The SSANameState is now held by ModuleState. This is in preparation for a future revision that molds ModuleState into something that can be used by users for caching the printer state, as well as for implementing printAsOperand style methods. Depends On D72292 Reviewed By: antiagainst Differential Revision: https://reviews.llvm.org/D72293
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 | mlir/lib/IR/AsmPrinter.cpp |
Commit
61bd19206f61ace4b007838a2ff8884a13ec0374
by eric[libc++] Explicitly enumerate std::string external instantiations. The external instantiation of std::string is a problem for libc++. Additions and removals of inline functions in string can cause ABI breakages, including introducing new symbols. This patch aims to: (1) Make clear which functions are explicitly instatiated. (2) Prevent new functions from being accidentally instantiated. (3) Allow a migration path for adding or removing functions from the explicit instantiation over time. Although this new formulation is uglier, it is preferable from a maintainability and readability standpoint because it explicitly enumerates the functions we've chosen to expose in our ABI. Changing this list is non-trivial and requires thought and planning. (3) is achieved by making it possible to control the extern template declaration separately from it's definition. Meaning we could add a new definition to the dylib, wait for it to roll out, then add the extern template declaration to the header. Similarly, we could remove existing extern template declarations while still keeping the definition to prevent ABI breakages.
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 | libcxx/include/__config |
 | libcxx/include/__string |
 | libcxx/include/string |
 | libcxx/src/string.cpp |
Commit
c348a2674b5753afde6842d5a6ee75db111167e3
by sledru[clang-tidy] Refresh the add_new_check.py now that we use a table + autofix Reviewers: alexfh Reviewed By: alexfh Subscribers: njames93, xazax.hun, mgorny, cfe-commits Tags: #clang, #clang-tools-extra Differential Revision: https://reviews.llvm.org/D72421
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 | clang-tools-extra/clang-tidy/add_new_check.py |
Commit
6a69d3c6b3da3d4e7709d11fd52b8e5540265280
by zeratul976[clangd] Handle DeducedTemplateSpecializationType in TargetFinder Summary: This is a workaround for https://bugs.llvm.org/show_bug.cgi?id=42914. Once that is fixed, the handling in VisitDeducedTyped() should be sufficient. Fixes https://github.com/clangd/clangd/issues/242 Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, usaxena95, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D72119
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 | clang-tools-extra/clangd/FindTarget.cpp |
 | clang-tools-extra/clangd/unittests/FindTargetTests.cpp |
Commit
004ae200a5a818ea87d71e4e686939dec4a8d757
by sledruphab doc: remove the svn section
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 | llvm/docs/Phabricator.rst |
Commit
dbfc516d1f1685b4d11910bceab6625ada4399a2
by sledruphab doc: also document 'arc land'
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 | llvm/docs/Phabricator.rst |
Commit
0c195ef7c62db1234e3854f8798e1ef413808b18
by sledruphab doc: Replace or remove references to svn
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 | llvm/docs/Phabricator.rst |
Commit
35ad66fae811c36823b2b91368f142c9d35b8414
by arsenm2AMDGPU/GlobalISel: Widen 16-bit shift amount sources This should be legal, but will require future selection work. 16-bit shift amounts were already removed from being legal, but this didn't adjust the transformation rules.
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 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir |
 | llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir |
Commit
767aa507a464e46b9a5aaed8cfec0a621f8fc599
by arsenm2AMDGPU/GlobalISel: Fix argument lowering for vectors of pointers When these arguments are broken down by the EVT based callbacks, the pointer information is lost. Hack around this by coercing the register types to be the expected pointer element type when building the remerge operations.
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 | llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll |
 | llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp |
Commit
fba1fbb9c7367990a0561a36dbf600fc51847246
by arsenm2GlobalISel: Don't assert on MoreElements creating vectors If the original type was a scalar, it should be valid to add elements to turn it into a vector. Tests included with following legalization change.
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 | llvm/lib/CodeGen/GlobalISel/LegalizerInfo.cpp |
Commit
f937b43fdb30b67facf616ad394976b08001ee89
by arsenm2TableGen/GlobalISel: Address fixme Don't call computeAvailableFunctionFeatures for every instruction.
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 | llvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h |
 | llvm/utils/TableGen/GlobalISelEmitter.cpp |
 | llvm/test/TableGen/GlobalISelEmitter.td |
Commit
595ac8c46ea54c6d5dc96e2f35a5759988a657be
by arsenm2GlobalISel: Move getLLTForMVT/getMVTForLLT As an intermediate step, some TLI functions can be converted to using LLT instead of MVT. Move this somewhere out of GlobalISel so DAG functions can use these.
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 | llvm/lib/CodeGen/LowLevelType.cpp |
 | llvm/include/llvm/CodeGen/LowLevelType.h |
 | llvm/lib/CodeGen/GlobalISel/Utils.cpp |
 | llvm/include/llvm/CodeGen/GlobalISel/Utils.h |
Commit
0f5f28d000f73b4d0282c579477a4e31402a863e
by csiggAdd gdb pretty printer for MutableArrayRef, remove ConstArrayRef. Reviewers: dblaikie Reviewed By: dblaikie Subscribers: merge_guards_bot, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72136
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 | llvm/utils/gdb-scripts/prettyprinters.py |
Commit
8c387cbea76b169f1f8ecc7693797e96567ed896
by Alexander.RichardsonAdd builtins for aligning and checking alignment of pointers and integers This change introduces three new builtins (which work on both pointers and integers) that can be used instead of common bitwise arithmetic: __builtin_align_up(x, alignment), __builtin_align_down(x, alignment) and __builtin_is_aligned(x, alignment). I originally added these builtins to the CHERI fork of LLVM a few years ago to handle the slightly different C semantics that we use for CHERI [1]. Until recently these builtins (or sequences of other builtins) were required to generate correct code. I have since made changes to the default C semantics so that they are no longer strictly necessary (but using them does generate slightly more efficient code). However, based on our experience using them in various projects over the past few years, I believe that adding these builtins to clang would be useful. These builtins have the following benefit over bit-manipulation and casts via uintptr_t: - The named builtins clearly convey the semantics of the operation. While checking alignment using __builtin_is_aligned(x, 16) versus ((x & 15) == 0) is probably not a huge win in readably, I personally find __builtin_align_up(x, N) a lot easier to read than (x+(N-1))&~(N-1). - They preserve the type of the argument (including const qualifiers). When using casts via uintptr_t, it is easy to cast to the wrong type or strip qualifiers such as const. - If the alignment argument is a constant value, clang can check that it is a power-of-two and within the range of the type. Since the semantics of these builtins is well defined compared to arbitrary bit-manipulation, it is possible to add a UBSAN checker that the run-time value is a valid power-of-two. I intend to add this as a follow-up to this change. - The builtins avoids int-to-pointer casts both in C and LLVM IR. In the future (i.e. once most optimizations handle it), we could use the new llvm.ptrmask intrinsic to avoid the ptrtoint instruction that would normally be generated. - They can be used to round up/down to the next aligned value for both integers and pointers without requiring two separate macros. - In many projects the alignment operations are already wrapped in macros (e.g. roundup2 and rounddown2 in FreeBSD), so by replacing the macro implementation with a builtin call, we get improved diagnostics for many call-sites while only having to change a few lines. - Finally, the builtins also emit assume_aligned metadata when used on pointers. This can improve code generation compared to the uintptr_t casts. [1] In our CHERI compiler we have compilation mode where all pointers are implemented as capabilities (essentially unforgeable 128-bit fat pointers). In our original model, casts from uintptr_t (which is a 128-bit capability) to an integer value returned the "offset" of the capability (i.e. the difference between the virtual address and the base of the allocation). This causes problems for cases such as checking the alignment: for example, the expression `if ((uintptr_t)ptr & 63) == 0` is generally used to check if the pointer is aligned to a multiple of 64 bytes. The problem with offsets is that any pointer to the beginning of an allocation will have an offset of zero, so this check always succeeds in that case (even if the address is not correctly aligned). The same issues also exist when aligning up or down. Using the alignment builtins ensures that the address is used instead of the offset. While I have since changed the default C semantics to return the address instead of the offset when casting, this offset compilation mode can still be used by passing a command-line flag. Reviewers: rsmith, aaron.ballman, theraven, fhahn, lebedev.ri, nlopes, aqjune Reviewed By: aaron.ballman, lebedev.ri Differential Revision: https://reviews.llvm.org/D71499
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 | clang/lib/CodeGen/CodeGenFunction.h |
 | clang/lib/CodeGen/CGBuiltin.cpp |
 | clang/include/clang/Basic/Builtins.def |
 | clang/test/SemaCXX/builtin-align-cxx.cpp |
 | clang/lib/AST/ExprConstant.cpp |
 | clang/test/CodeGen/builtin-align-assumption.c |
 | clang/include/clang/Basic/DiagnosticASTKinds.td |
 | clang/test/Sema/builtin-align.c |
 | clang/lib/Sema/SemaChecking.cpp |
 | clang/test/CodeGen/builtin-align-array.c |
 | clang/test/CodeGen/builtin-align.c |
 | clang/docs/LanguageExtensions.rst |
 | clang/include/clang/Basic/DiagnosticSemaKinds.td |
Commit
ea67737b166fc6cb5fd98874fbd2b4639b2d7ecd
by zinenko[mlir] mlir-cpu-runner test's cblas_interface should export functions on Windows This change fixes the build on Windows, so that cblas_interface.dll exports functions correctly and an implib is created and installed correctly. Currently, LLVM cannot be consumed on Windows after it has been installed in a location because cblas_interface.lib is not created/installed, thus failing the import check in `LLVMExports.cmake`. Differential Revision: https://reviews.llvm.org/D72384
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 | mlir/test/mlir-cpu-runner/CMakeLists.txt |
 | mlir/test/mlir-cpu-runner/include/cblas_interface.h |
 | mlir/test/mlir-cpu-runner/cblas_interface.cpp |
 | mlir/test/mlir-cpu-runner/include/mlir_runner_utils.h |
 | mlir/test/mlir-cpu-runner/include/cblas.h |
Commit
016bf03ef6fcd9dce43b0c17971f76323f07a684
by zinenko[mlir] add a missing dependency for Linalg conversion We were seeing some occasional build failures that would come and go. It appeared to be this missing dependence. Differential Revision: https://reviews.llvm.org/D72419
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 | mlir/lib/Conversion/LinalgToLLVM/CMakeLists.txt |
Commit
cc95bb1f57c674c0efdfc134eab8ed8c50f2a6e3
by Amara Emerson[AArch64][GlobalISel] Implement selection of <2 x float> vector splat. Also requires making G_IMPLICIT_DEF of v2s32 legal. Differential Revision: https://reviews.llvm.org/D72422
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 | llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp |
 | llvm/test/CodeGen/AArch64/arm64-rev.ll |
 | llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-undef.mir |
 | llvm/test/CodeGen/AArch64/GlobalISel/opt-shuffle-splat.mir |
Commit
255cc5a7603fef251192daab2a3336acbcd9aa1c
by arsenm2CodeGen: Use LLT instead of EVT in getRegisterByName Only PPC seems to be using it, and only checks some simple cases and doesn't distinguish between FP. Just switch to using LLT to simplify use from GlobalISel.
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 | llvm/lib/Target/ARM/ARMISelLowering.h |
 | llvm/lib/Target/Hexagon/HexagonISelLowering.cpp |
 | llvm/lib/Target/Lanai/LanaiISelLowering.h |
 | llvm/lib/Target/Sparc/SparcISelLowering.cpp |
 | llvm/lib/Target/Sparc/SparcISelLowering.h |
 | llvm/lib/Target/PowerPC/PPCISelLowering.h |
 | llvm/lib/Target/Mips/MipsISelLowering.h |
 | llvm/lib/Target/PowerPC/PPCISelLowering.cpp |
 | llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp |
 | llvm/lib/Target/ARM/ARMISelLowering.cpp |
 | llvm/lib/Target/AArch64/AArch64ISelLowering.h |
 | llvm/lib/Target/X86/X86ISelLowering.h |
 | llvm/lib/Target/RISCV/RISCVISelLowering.h |
 | llvm/lib/Target/RISCV/RISCVISelLowering.cpp |
 | llvm/lib/Target/AMDGPU/SIISelLowering.cpp |
 | llvm/lib/Target/Hexagon/HexagonISelLowering.h |
 | llvm/lib/Target/Lanai/LanaiISelLowering.cpp |
 | llvm/include/llvm/CodeGen/TargetLowering.h |
 | llvm/lib/Target/Mips/MipsISelLowering.cpp |
 | llvm/lib/Target/X86/X86ISelLowering.cpp |
 | llvm/lib/Target/AArch64/AArch64ISelLowering.cpp |
 | llvm/lib/Target/AMDGPU/SIISelLowering.h |
Commit
ac53a5f1dc21916f1072031703e0e1833e963454
by arsenm2GlobalISel: Fix else after return
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 | llvm/lib/CodeGen/LowLevelType.cpp |
Commit
f33f3d98e9e6322846c3b997260faf3e1165e0dd
by arsenm2DAG: Don't use unchecked dyn_cast
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 | llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp |
Commit
0ea3c7291fb8d463d9c7ae6aaec7a432ef366a51
by arsenm2GlobalISel: Handle llvm.read_register Compared to the attempt in bdcc6d3d2638b3a2c99ab3b9bfaa9c02e584993a, this uses intermediate generic instructions.
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 | llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/read_register.ll |
 | llvm/include/llvm/Target/GenericOpcodes.td |
 | llvm/include/llvm/Support/TargetOpcodes.def |
 | llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp |
 | llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp |
 | llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp |
Commit
b4a647449fa01bd4e29bce5afef51770cddec664
by arsenm2TableGen/GlobalISel: Add way for SDNodeXForm to work on timm The current implementation assumes there is an instruction associated with the transform, but this is not the case for timm/TargetConstant/immarg values. These transforms should directly operate on a specific MachineOperand in the source instruction. TableGen would assert if you attempted to define an equivalent GISDNodeXFormEquiv using timm when it failed to find the instruction matcher. Specially recognize SDNodeXForms on timm, and pass the operand index to the render function. Ideally this would be a separate render function type that looks like void renderFoo(MachineInstrBuilder, const MachineOperand&), but this proved to be somewhat mechanically painful. Add an optional operand index which will only be passed if the transform should only look at the one source operand. Theoretically it would also be possible to only ever pass the MachineOperand, and the existing renderers would check the parent. I think that would be somewhat ugly for the standard usage which may want to inspect other operands, and I also think MachineOperand should eventually not carry a pointer to the parent instruction. Use it in one sample pattern. This isn't a great example, since the transform exists to satisfy DAG type constraints. This could also be avoided by just changing the MachineInstr's arbitrary choice of operand type from i16 to i32. Other patterns have nontrivial uses, but this serves as the simplest example. One flaw this still has is if you try to use an SDNodeXForm defined for imm, but the source pattern uses timm, you still see the "Failed to lookup instruction" assert. However, there is now a way to avoid it.
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 | llvm/test/TableGen/GlobalISelEmitter-SDNodeXForm-timm.td |
 | llvm/test/TableGen/GlobalISelEmitter.td |
 | llvm/include/llvm/Target/GlobalISel/Target.td |
 | llvm/lib/Target/AMDGPU/AMDGPUGISel.td |
 | llvm/utils/TableGen/GlobalISelEmitter.cpp |
 | llvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h |
 | llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp |
 | llvm/lib/Target/AMDGPU/SIInstrInfo.td |
 | llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h |
 | llvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h |
 | llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp |
 | llvm/lib/Target/AMDGPU/DSInstructions.td |
 | llvm/lib/Target/ARM/ARMInstructionSelector.cpp |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.ds.swizzle.mir |
Commit
10edb1d0d4a15812a71f8953bba96a4f1fc9d0af
by arsenm2TableGen/GlobalISel: Fix pattern matching of immarg literals For arguments that are not expected to be materialized with G_CONSTANT, this was emitting predicates which could never match. It was first adding a meaningless LLT check, which would always fail due to the operand not being a register. Infer the cases where a literal should check for an immediate operand, instead of a register This avoids needing to invent a special way of representing timm literal values. Also handle immediate arguments in GIM_CheckLiteralInt. The comments stated it handled isImm() and isCImm(), but that wasn't really true. This unblocks work on the selection of all of the complicated AMDGPU intrinsics in future commits.
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 | llvm/test/TableGen/GlobalISelEmitter-immarg-literal-pattern.td |
 | llvm/utils/TableGen/CodeGenTarget.cpp |
 | llvm/utils/TableGen/CodeGenInstruction.h |
 | llvm/utils/TableGen/GlobalISelEmitter.cpp |
 | llvm/utils/TableGen/CodeGenInstruction.cpp |
 | llvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h |
 | llvm/test/TableGen/Common/GlobalISelEmitterCommon.td |
 | llvm/utils/TableGen/CodeGenIntrinsics.h |
Commit
58b3dec6c108eb9ae4af2cde5c831743d5605c79
by Jonas Devlieghere[lldb/Lua] Add lua typemaps for INOUT params
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 | lldb/bindings/lua/lua-typemaps.swig |
 | lldb/bindings/lua.swig |
Commit
68c8b6c4cd117cc962155298f0e1d45056ecc001
by riverriddle[mlir] Use getDenseElementBitwidth instead of Type::getElementTypeBitWidth. Summary: Some data values have a different storage width than the corresponding MLIR type, e.g. bfloat is currently stored as a double. Reviewed By: nicolasvasilache Differential Revision: https://reviews.llvm.org/D72478
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 | mlir/unittests/IR/AttributeTest.cpp |
 | mlir/lib/IR/Attributes.cpp |
Commit
25195541349b1d6dfc03bf7511483110bda69b29
by richardWhen diagnosing the lack of a viable conversion function, also list explicit functions that are not candidates. It's not always obvious that the reason a conversion was not possible is because the function you wanted to call is 'explicit', so explicitly say if that's the case. It would be nice to rank the explicit candidates higher in the diagnostic if an implicit conversion sequence exists for their arguments, but unfortunately we can't determine that without potentially triggering non-immediate-context errors that we're not permitted to produce.
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 | clang/test/SemaCXX/cxx2a-explicit-bool.cpp |
 | clang/test/CXX/over/over.match/over.match.funcs/over.match.copy/p1.cpp |
 | clang/test/PCH/cxx-explicit-specifier.cpp |
 | clang/test/CXX/drs/dr15xx.cpp |
 | clang/lib/Sema/SemaOverload.cpp |
 | clang/test/CXX/drs/dr1xx.cpp |
 | clang/test/SemaCXX/explicit.cpp |
 | clang/test/SemaCXX/default1.cpp |
 | clang/include/clang/Sema/Overload.h |
 | clang/test/SemaCXX/conversion-function.cpp |
 | clang/test/CXX/dcl.decl/dcl.init/dcl.init.ref/p5.cpp |
 | clang/include/clang/AST/DeclCXX.h |
 | clang/test/CXX/dcl.decl/dcl.init/p14-0x.cpp |
 | clang/test/CXX/special/class.inhctor/p3.cpp |
 | clang/include/clang/Basic/DiagnosticSemaKinds.td |
 | clang/test/SemaCXX/convert-to-bool.cpp |
 | clang/test/SemaCXX/converting-constructor.cpp |
 | clang/test/SemaCXX/copy-initialization.cpp |
 | clang/lib/Sema/SemaInit.cpp |
 | clang/test/CXX/expr/expr.prim/expr.prim.lambda/p11-1y.cpp |
 | clang/test/CXX/basic/basic.lookup/basic.lookup.qual/namespace.qual/p2.cpp |
Commit
5fe4679cc9cfb4941b766db07bf3cd928075d204
by arsenm2AVR: Update for getRegisterByName change
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 | llvm/lib/Target/AVR/AVRISelLowering.cpp |
 | llvm/lib/Target/AVR/AVRISelLowering.h |
Commit
b81c8c6976b987a25fc54fa2bf3524919759a898
by Jonas Devlieghere[lldb] Remove spurious file
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 | lldb/lldb/cmake/modules/FindPythonInterpAndLibs.cmake |
Commit
cd69e4c74c174101817c9f6b7c02374ac6a7476f
by Stanislav.Mekhanoshin[AMDGPU] Fix bundle scheduling Bundles coming to scheduler considered free, i.e. zero latency. Fixed. Differential Revision: https://reviews.llvm.org/D72487
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 | llvm/test/CodeGen/AMDGPU/uint_to_fp.ll |
 | llvm/lib/Target/AMDGPU/SIInstrInfo.cpp |
 | llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll |
 | llvm/test/CodeGen/AMDGPU/sint_to_fp.ll |
 | llvm/test/CodeGen/AMDGPU/sub.i16.ll |
 | llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll |
 | llvm/test/CodeGen/AMDGPU/min.ll |
 | llvm/test/CodeGen/AMDGPU/packed-op-sel.ll |
 | llvm/test/CodeGen/AMDGPU/zero_extend.ll |
 | llvm/test/CodeGen/AMDGPU/misched-killflags.mir |
 | llvm/lib/Target/AMDGPU/SIInstrInfo.h |
 | llvm/test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll |
 | llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll |
 | llvm/test/CodeGen/AMDGPU/scratch-simple.ll |
 | llvm/test/CodeGen/AMDGPU/setcc-opt.ll |
 | llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp |
 | llvm/test/CodeGen/AMDGPU/wave32.ll |
 | llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.init.ll |
 | llvm/test/CodeGen/AMDGPU/selectcc-opt.ll |
Commit
02113918ed6b5e514afd7d1e007131d36ac13f1d
by Jason MolendaWhen reading Aux file in chunks, read consecutive byte ranges qemu has a very small maximum packet size (4096) and it actually only uses half of that buffer for some implementation reason, so when lldb asks for the register target definitions, the x86_64 definition is larger than 4096/2 and we need to fetch it in two parts. This patch and test is fixing a bug in GDBRemoteCommunicationClient::ReadExtFeature when reading a target file in multiple parts. lldb was assuming that it would always get back the maximum packet size response (4096) instead of using the actual size received and asking for the next group of bytes. We now have two tests in gdb_remote_client for unique features of qemu - TestNestedRegDefinitions.py would test the ability of lldb to follow multiple levels of xml includes; I opted to create a separate TestRegDefinitionInParts.py test to test this wrinkle in qemu's gdb remote serial protocol stub implementation. Instead of combining both tests into a single test file. <rdar://problem/49537922>
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 | lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp |
 | lldb/packages/Python/lldbsuite/test/functionalities/gdb_remote_client/TestRegDefinitionInParts.py |
Commit
375371cc8bff7ba02d0a2203f80de5e640fcadf1
by maskray[ELF] Fix includeInDynsym() when an undefined weak is merged with a lazy definition An undefined weak does not fetch the lazy definition. A lazy weak symbol should be considered undefined, and thus preemptible if .dynsym exists. D71795 is not quite an NFC. It errors on an R_X86_64_PLT32 referencing an undefined weak symbol. isPreemptible is false (incorrect) => R_PLT_PC is optimized to R_PC => in isStaticLinkTimeConstant, an error is emitted when an R_PC is applied on an undefined weak (considered absolute).
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 | lld/ELF/Symbols.cpp |
 | lld/test/ELF/weak-undef-lib.s |
Commit
5cabb8357aeb3bbecaef4825c3a594f86ef94c8d
by arsenm2AMDGPU/GlobalISel: Fix G_EXTRACT_VECTOR_ELT mapping for s-v case If an SGPR vector is indexed with a VGPR, the actual indexing will be done on the SGPR and produce an SGPR. A copy needs to be inserted inside the waterwall loop to the VGPR result.
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 | llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-extract-vector-elt.mir |
 | llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp |
 | llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h |
Commit
35c3d101aee240f6c034f25ff6800fda22a89987
by arsenm2AMDGPU/GlobalISel: Select G_EXTRACT_VECTOR_ELT Doesn't try to do the fold into the base register of an add of a constant in the index like the DAG path does.
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 | llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h |
 | llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll |
 | llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp |
 | llvm/lib/Target/AMDGPU/SIISelLowering.cpp |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-extract-vector-elt.mir |
 | llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h |
Commit
3727ca313783e23696caeae53c688409555ab0fc
by douglas.yungRelax opcode checks in test for G_READCYCLECOUNTER to check for only a number instead of a specific number.
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 | llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir |
Commit
f041e9ad706aee7987c5299427c33424fcabbd0d
by richardCWG2352: Allow qualification conversions during reference binding. The language wording change forgot to update overload resolution to rank implicit conversion sequences based on qualification conversions in reference bindings. The anticipated resolution for that oversight is implemented here -- we order candidates based on qualification conversion, not only on top-level cv-qualifiers, including ranking reference bindings against non-reference bindings if they differ in non-top-level qualification conversions. For OpenCL/C++, this allows reference binding between pointers with differing (nested) address spaces. This makes the behavior of reference binding consistent with that of implicit pointer conversions, as is the purpose of this change, but that pre-existing behavior for pointer conversions is itself probably not correct. In any case, it's now consistently the same behavior and implemented in only one place. This reinstates commit de21704ba96fa80d3e9402f12c6505917a3885f4, reverted in commit d8018233d1ea4234de68d5b4593abd773db79484, with workarounds for some overload resolution ordering problems introduced by CWG2352.
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 | clang/test/SemaCXX/ref-init-ambiguous.cpp |
 | clang/lib/Sema/SemaInit.cpp |
 | clang/test/CXX/drs/dr23xx.cpp |
 | clang/test/SemaOpenCL/address-spaces-conversions-cl2.0.cl |
 | clang/lib/Sema/SemaExprCXX.cpp |
 | clang/include/clang/Sema/Sema.h |
 | clang/lib/Sema/SemaOverload.cpp |
 | clang/www/make_cxx_dr_status |
 | clang/include/clang/Basic/DiagnosticSemaKinds.td |
 | clang/test/SemaObjCXX/arc-overloading.mm |
 | clang/test/CXX/drs/dr4xx.cpp |
 | clang/www/cxx_dr_status.html |
Commit
02c5983310dcd627aecb521e03a16122f42e8a01
by shengchen.kan[NFC] Style cleanup
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 | llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp |
Commit
efabe427b27643839849ebb61fe2e5db37dff0de
by thakisfix a few typos to cycle the bots
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 | lld/docs/conf.py |
 | lld/docs/ld.lld.1 |
 | lld/docs/NewLLD.rst |
 | lld/docs/WebAssembly.rst |
Commit
01662aeb5d1fcef4f067caec633d0c85bb3062a7
by thakisfix another typo to cycle bots
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 | mlir/docs/Dialects/SPIR-V.md |
Commit
21a4710c67a97838dd75cf60ed24da11280800f8
by wmi[ThinLTO] Pass CodeGenOpts like UnrollLoops/VectorizeLoop/VectorizeSLP down to pass builder in ltobackend. Currently CodeGenOpts like UnrollLoops/VectorizeLoop/VectorizeSLP in clang are not passed down to pass builder in ltobackend when new pass manager is used. This is inconsistent with the behavior when new pass manager is used and thinlto is not used. Such inconsistency causes slp vectorization pass not being enabled in ltobackend for O3 + thinlto right now. This patch fixes that. Differential Revision: https://reviews.llvm.org/D72386
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 | clang/lib/CodeGen/BackendUtil.cpp |
 | llvm/tools/llvm-lto2/llvm-lto2.cpp |
 | lld/test/ELF/lto/slp-vectorize-pm.ll |
 | llvm/include/llvm/LTO/Config.h |
 | clang/test/CodeGen/thinlto-slp-vectorize-pm.c |
 | lld/COFF/CMakeLists.txt |
 | llvm/test/tools/llvm-lto2/X86/slp-vectorize-pm.ll |
 | lld/ELF/CMakeLists.txt |
 | llvm/lib/LTO/LTOBackend.cpp |
 | llvm/tools/gold/gold-plugin.cpp |
 | llvm/test/tools/gold/X86/slp-vectorize-pm.ll |
 | lld/ELF/LTO.cpp |
 | lld/wasm/CMakeLists.txt |
 | llvm/test/Other/new-pm-defaults.ll |
 | llvm/tools/llvm-lto2/CMakeLists.txt |
 | llvm/test/Other/new-pm-thinlto-defaults.ll |
 | llvm/lib/Passes/PassBuilder.cpp |
Commit
995c18fc5051850782b1c096233867b8e56e0dea
by smeenai[xray] Remove cl::sub from alias options Currently running the xray tools generates a number of errors: $ ./bin/llvm-xray : for the -k option: cl::alias must not have cl::sub(), aliased option's cl::sub() will be used! : for the -d option: cl::alias must not have cl::sub(), aliased option's cl::sub() will be used! : for the -o option: cl::alias must not have cl::sub(), aliased option's cl::sub() will be used! : for the -f option: cl::alias must not have cl::sub(), aliased option's cl::sub() will be used! : for the -s option: cl::alias must not have cl::sub(), aliased option's cl::sub() will be used! : for the -r option: cl::alias must not have cl::sub(), aliased option's cl::sub() will be used! : for the -p option: cl::alias must not have cl::sub(), aliased option's cl::sub() will be used! : for the -m option: cl::alias must not have cl::sub(), aliased option's cl::sub() will be used! <snip> Patch by Ryan Mansfield. Differential Revision: https://reviews.llvm.org/D69386
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 | llvm/tools/llvm-xray/xray-account.cpp |
 | llvm/tools/llvm-xray/xray-graph-diff.cpp |
 | llvm/tools/llvm-xray/xray-extract.cpp |
 | llvm/tools/llvm-xray/xray-converter.cpp |
 | llvm/tools/llvm-xray/xray-graph.cpp |
 | llvm/tools/llvm-xray/xray-stacks.cpp |
Commit
b38d0d5bdb353f8496a0fc38b9bbee419b41a321
by sylvestreclang-tidy doc - remove the widths
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 | clang-tools-extra/docs/clang-tidy/checks/list.rst |
Commit
759c90456d418ffe69e1a2b4bcea2792491a6b5a
by ibiryukov[Syntax] Update comment, remove stale FIXME. NFC
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 | clang/include/clang/Tooling/Syntax/Tokens.h |
Commit
8647a72c4a52e0386c0397ce3fbd38121c18b873
by gil.rapaport[LV] VPValues for memory operation pointers (NFCI) Memory instruction widening recipes use the pointer operand of their load/store ingredient for generating the needed GEPs, making it difficult to feed these recipes with pointers based on other ingredients or none at all. This patch modifies these recipes to use a VPValue for the pointer instead, in order to reduce ingredient def-use usage by ILV as a step towards full VPlan-based def-use relations. The recipes are constructed with VPValues bound to these ingredients, maintaining current behavior. Differential revision: https://reviews.llvm.org/D70865
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 | llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp |
 | llvm/lib/Transforms/Vectorize/LoopVectorize.cpp |
 | llvm/lib/Transforms/Vectorize/VPlan.h |
 | llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h |
 | llvm/lib/Transforms/Vectorize/VPlan.cpp |
Commit
164da673009ba6c100ce45b6fa9a5dfd3b0b8e38
by hansRestore order in clang-tidy section of release notes Major changes are introduction of subsubsections to prevent people putting new entries in wrong places. I also polished line length and highlighting. Patch by Eugene Zelenko!
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 | clang-tools-extra/docs/ReleaseNotes.rst |
Commit
921f871ac438175ca8fcfcafdfcfac4d7ddf3905
by sgueltonAllow system header to provide their own implementation of some builtin If a system header provides an (inline) implementation of some of their function, clang still matches on the function name and generate the appropriate llvm builtin, e.g. memcpy. This behavior is in line with glibc recommendation « users may not provide their own version of symbols » but doesn't account for the fact that glibc itself can provide inline version of some functions. It is the case for the memcpy function when -D_FORTIFY_SOURCE=1 is on. In that case an inline version of memcpy calls __memcpy_chk, a function that performs extra runtime checks. Clang currently ignores the inline version and thus provides no runtime check. This code fixes the issue by detecting functions whose name is a builtin name but also have an inline implementation. Differential Revision: https://reviews.llvm.org/D71082
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 | clang/include/clang/AST/Decl.h |
 | clang/lib/AST/Decl.cpp |
 | clang/test/CodeGen/memcpy-nobuiltin.inc |
 | clang/lib/CodeGen/CodeGenModule.cpp |
 | clang/test/CodeGen/memcpy-nobuiltin.c |
 | clang/lib/CodeGen/CGExpr.cpp |
Commit
45c4b08d8228f64b02b8a4df069aa37d5fa70829
by qiucofan[NFC] [PowerPC] Add isPredicable for basic instrs PowerPC uses a dedicated method to check if the machine instr is predicable by opcode. However, there's a bit `isPredicable` in instr definition. This patch removes the method and set the bit only to opcodes referenced in it. Differential Revision: https://reviews.llvm.org/D71921
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 | llvm/lib/Target/PowerPC/PPCInstr64Bit.td |
 | llvm/lib/Target/PowerPC/PPCInstrInfo.cpp |
 | llvm/lib/Target/PowerPC/PPCInstrInfo.h |
 | llvm/lib/Target/PowerPC/PPCInstrInfo.td |
Commit
ffd0f116754c36146bb21a01b047782ce8a01e2e
by kadircet[clangd] Improve type printing in hover Summary: Do not include tag keywords when printing types for symbol names, as it will come from SymbolKind. Also suppress them while printing definitions to prevent them occuring in template arguments. Make use of `getAsString`, instead of `print` in all places to have a consistent style across the file. Reviewers: sammccall Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D72450
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 | clang-tools-extra/clangd/Hover.cpp |
 | clang-tools-extra/clangd/unittests/HoverTests.cpp |
Commit
abfa27e4f04dd84774bcfe15783942e21be391a5
by kadircet[clangd] Fix markdown rendering in VSCode Summary: Eventough it is OK to have a new line without any preceding spaces in some markdown specifications, VSCode requires two spaces before a new line to break a line inside a paragraph. Reviewers: sammccall, ilya-biryukov Subscribers: MaskRay, jkorous, arphaman, usaxena95, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D72462
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 | clang-tools-extra/clangd/unittests/FormattedStringTests.cpp |
 | clang-tools-extra/clangd/FormattedString.cpp |
Commit
346de9b67228f42eb9b55fa3b426b5dedfdb1d40
by sgueltonFix several issues with compiler extensions - Update documentation now that the move to monorepo has been made - Do not tie compiler extension testing to LLVM_BUILD_EXAMPLES - No need to specify LLVM libraries for plugins - Add NO_MODULE option to match Polly specific requirements (i.e. building the module *and* linking it statically) - Issue a warning when building the compiler extension with LLVM_BYE_LINK_INTO_TOOLS=ON, as it modifies the behavior of clang, which only makes sense for testing purpose. Still mark llvm/test/Feature/load_extension.ll as XFAIL because of a ManagedStatic dependency that's going to be fixed in a seperate commit. Differential Revision: https://reviews.llvm.org/D72327
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 | llvm/test/lit.cfg.py |
 | polly/lib/CMakeLists.txt |
 | llvm/cmake/modules/AddLLVM.cmake |
 | llvm/examples/Bye/CMakeLists.txt |
Commit
67bf9a6154d4b82c6c01aad01141bf08c1bbd0f6
by sjoerd.meijer[SVEV] Recognise hardware-loop intrinsic loop.decrement.reg Teach SCEV about the @loop.decrement.reg intrinsic, which has exactly the same semantics as a sub expression. This allows us to query hardware-loops, which contain this @loop.decrement.reg intrinsic, so that we can calculate iteration counts, exit values, etc. of hardwareloops. This "int_loop_decrement_reg" intrinsic is defined as "IntrNoDuplicate". Thus, while hardware-loops and tripcounts now become analysable by SCEV, this prevents the usual loop transformations from applying transformations on hardware-loops, which is what we want at this point, for which I have added test cases for loopunrolling and IndVarSimplify and LFTR. Differential Revision: https://reviews.llvm.org/D71563
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 | llvm/unittests/Analysis/ScalarEvolutionTest.cpp |
 | llvm/lib/Analysis/ScalarEvolution.cpp |
 | llvm/test/Transforms/LoopUnroll/ARM/dont-unroll-loopdec.ll |
 | llvm/test/Transforms/IndVarSimplify/lftr.ll |
Commit
356685a1d8972180f472c1333e8e89dbcc704c1d
by sjoerd.meijerFollow up of 67bf9a6154d4b82c, minor fix in test case, removed duplicate option
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 | llvm/test/Transforms/LoopUnroll/ARM/dont-unroll-loopdec.ll |
Commit
41f4dfd63ea0fe995ddfba1838aa5ed972cc1377
by jaskiewiczs[libcxx] Force-cache LIBCXX_CXX_ABI_LIBRARY_PATH Summary: The `LIBCXX_CXX_ABI_LIBRARY_PATH` CMake variable is cached once in libcxx/cmake/Modules/HandleLibCXXABI.cmake in the `setup_abi_lib` macro, and then cached again in libcxx/test/CMakeLists.txt. There, if it is not set to a value, it is by default set to `LIBCXX_LIBRARY_DIR`. However, this new value is not actually cached, because the old (empty) value has been already cached. Use the `FORCE` CMake flag so that it is saved to the cache. This should not break anything, because the code changed here previously had no effect, when it should have. Reviewers: jroelofs, bcraig, ldionne, EricWF, mclow.lists, vvereschaka, eastig Reviewed By: vvereschaka Subscribers: mgorny, christof, dexonsmith, libcxx-commits Tags: #libc Differential Revision: https://reviews.llvm.org/D69169
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 | libcxx/test/CMakeLists.txt |
Commit
e44dedd3631c20bc4a1e62b68919a11168d39354
by jaskiewiczs[CMake] Support running libc++abi tests in CrossWinToARMLinux cache file Summary: Now that D71894 has landed, we're able to run libc++abi tests remotely. For that we can use the same CMake command as before. The tests can be run using `ninja check-cxxabi`. Reviewers: andreil99, vvereschaka, aorlov Reviewed By: vvereschaka, aorlov Subscribers: mgorny, kristof.beyls, ldionne, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D72459
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 | clang/cmake/caches/CrossWinToARMLinux.cmake |
Commit
a1cc19b581443c84fff4c6e6d4e341351ef3203c
by sgueltonXFAIL load_extension.ll test on macOS only Other setup have been fixed by 346de9b67228f42eb9b55fa3b426b5dedfdb1d40
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 | llvm/test/Feature/load_extension.ll |
Commit
cfd849840134c4632c2f4fa498dfb93c47825b24
by benny.kra[MIR] Fix cyclic dependency of MIR formatter Summary: Move MIR formatter pointer from TargetMachine to TargetInstrInfo to avoid cyclic dependency between target & codegen. Reviewers: dsanders, bkramer, arsenm Subscribers: wdng, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72485
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 | llvm/lib/Target/TargetMachine.cpp |
 | llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp |
 | llvm/lib/CodeGen/MachineOperand.cpp |
 | llvm/include/llvm/CodeGen/MachineMemOperand.h |
 | llvm/include/llvm/Target/TargetMachine.h |
 | llvm/lib/CodeGen/MachineInstr.cpp |
 | llvm/include/llvm/CodeGen/TargetInstrInfo.h |
 | llvm/lib/CodeGen/MIRPrinter.cpp |
 | llvm/lib/CodeGen/MIRParser/MIParser.cpp |
Commit
498856fca5b9306f545554aeec93c7c058f03eb3
by benny.kra[LV] Silence unused variable warning in Release builds. NFC.
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 | llvm/lib/Transforms/Vectorize/LoopVectorize.cpp |
Commit
2e66405d8d8ed818cb9310b6c33419bd8d803d96
by llvm-devDon't use dyn_cast_or_null if we know the pointer is nonnull. Fix clang static analyzer null dereference warning by using dyn_cast instead.
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 | llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp |
Commit
3804ac63d5d8443d0b6826b566e9cbb84d8898f3
by llvm-dev[X86][AVX] Add tests for v8f32/v8i32 089abcde and 0189abcd shuffles Mentioned in D66004
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 | llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll |
Commit
b2cd273416f82b6c5efeb6138276d9e6b6f8256e
by llvm-devFix Wdocumentation warning. NFCI.
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 | llvm/lib/CodeGen/MachineOutliner.cpp |
Commit
f3849f739e52510871d11361125f0ef239f11603
by llvm-devFix Wdocumentation warning. NFCI.
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 | clang/lib/Parse/ParseExpr.cpp |
Commit
902974277d507a149e33487d32e4ba58c41451b6
by Raphael IsemannData formatters: Look through array element typedefs Summary: Motivation: When formatting an array of typedefed chars, we would like to display the array as a string. The string formatter currently does not trigger because the formatter lookup does not resolve typedefs for array elements (this behavior is inconsistent with pointers, for those we do look through pointee typedefs). This patch tries to make the array formatter lookup somewhat consistent with the pointer formatter lookup. Reviewers: teemperor, clayborg Reviewed By: teemperor, clayborg Subscribers: clayborg, lldb-commits Tags: #lldb Differential Revision: https://reviews.llvm.org/D72133
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 | lldb/packages/Python/lldbsuite/test/functionalities/data-formatter/array_typedef/main.cpp |
 | lldb/source/API/SBType.cpp |
 | lldb/packages/Python/lldbsuite/test/functionalities/data-formatter/array_typedef/TestArrayTypedef.py |
 | lldb/source/DataFormatters/FormatManager.cpp |
 | lldb/source/Symbol/ClangASTContext.cpp |
 | lldb/packages/Python/lldbsuite/test/functionalities/data-formatter/array_typedef/Makefile |
Commit
870f6917936fdb8050be3ca3c67d9259390c4326
by llvm-devFix "pointer is null" static analyzer warnings. NFCI. Assert that the pointers are non-null before dereferencing them.
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 | llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp |
Commit
1ccee0e86386762bd742fd067391b6c4be089806
by simon.tatham[ARM,MVE] Make `vqrshrun` generate the right instruction. Summary: A copy-paste error in `arm_mve.td` meant that the MVE `vqrshrun` intrinsic family was generating the `vqshrun` machine instruction, because in the IR intrinsic call, the rounding flag argument was set to 0 rather than 1. Reviewers: dmgreen, MarkMurrayARM, miyuki, ostannard Reviewed By: dmgreen Subscribers: kristof.beyls, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D72496
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 | clang/include/clang/Basic/arm_mve.td |
 | clang/test/CodeGen/arm-mve-intrinsics/vector-shift-imm-dyadic.c |
Commit
8c12769f3046029e2a9b4e48e1645b1a77d28650
by diogo.sampaio[ARM][Thumb2] Fix ADD/SUB invalid writes to SP Summary: This patch fixes pr23772 [ARM] r226200 can emit illegal thumb2 instruction: "sub sp, r12, #80". The violation was that SUB and ADD (reg, immediate) instructions can only write to SP if the source register is also SP. So the above instructions was unpredictable. To enforce that the instruction t2(ADD|SUB)ri does not write to SP we now enforce the destination register to be rGPR (That exclude PC and SP). Different than the ARM specification, that defines one instruction that can read from SP, and one that can't, here we inserted one that can't write to SP, and other that can only write to SP as to reuse most of the hard-coded size optimizations. When performing this change, it uncovered that emitting Thumb2 Reg plus Immediate could not emit all variants of ADD SP, SP #imm instructions before so it was refactored to be able to. (see test/CodeGen/Thumb2/mve-stacksplot.mir where we use a subw sp, sp, Imm12 variant ) It also uncovered a disassembly issue of adr.w instructions, that were only written as SUBW instructions (see llvm/test/MC/Disassembler/ARM/thumb2.txt). Reviewers: eli.friedman, dmgreen, carwil, olista01, efriedma Reviewed By: efriedma Subscribers: john.brawn, efriedma, ostannard, kristof.beyls, hiraditya, dmgreen, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D70680
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 | llvm/test/MC/ARM/invalid-addsub.s |
 | llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp |
 | llvm/lib/Target/ARM/Thumb2InstrInfo.cpp |
 | llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp |
 | llvm/test/CodeGen/Thumb2/peephole-addsub.mir |
 | llvm/test/MC/ARM/thumb-diagnostics.s |
 | llvm/test/MC/ARM/negative-immediates.s |
 | llvm/lib/Target/ARM/ARMInstrThumb2.td |
 | llvm/test/MC/ARM/basic-thumb2-instructions.s |
 | llvm/test/MC/ARM/register-token-source-loc.s |
 | llvm/test/MC/Disassembler/ARM/thumb2-v8.txt |
 | llvm/test/MC/Disassembler/ARM/thumb-tests.txt |
 | llvm/test/CodeGen/ARM/GlobalISel/thumb-select-arithmetic-ops.mir |
 | llvm/test/CodeGen/ARM/GlobalISel/thumb-select-load-store.mir |
 | llvm/test/CodeGen/Thumb2/mve-stacksplot.mir |
 | llvm/test/MC/Disassembler/ARM/thumb2.txt |
 | llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp |
 | llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp |
 | llvm/test/MC/Disassembler/ARM/invalid-thumbv7.txt |
 | llvm/test/CodeGen/Thumb2/bug-subw.ll |
 | llvm/test/CodeGen/Thumb2/fp16-stacksplot.mir |
 | llvm/test/CodeGen/Thumb2/peephole-cmp.mir |
 | llvm/lib/Target/ARM/ARMAsmPrinter.cpp |
 | llvm/test/CodeGen/MIR/ARM/thumb2-sub-sp-t3.mir |
Commit
5b7612792aeb5b161fdd69997db2a64b08f075b6
by pavel[lldb/lua] Make convenience_variables.test compatible with lua-5.1
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 | lldb/test/Shell/ScriptInterpreter/Lua/convenience_variables.test |
Commit
e65282deca8455d1cc6d83b7016af9aa374f9f89
by pavel[lldb/DWARF] Don't automatically search dwo unit attributes This patch removes the code (deep inside DWARFDebugInfoEntry) which automagically returned the attributes of the dwo unit DIE when asking for the attributes of the skeleton unit. This is fairly hacky, and not consistent with how llvm DWARF parser operates. Instead, I change the code the explicitly request (via GetNonSkeletonUnit) the right unit to search (there were just two places that needed this). If it turns out we need this more often, we can create a utility function (external to DWARFUnit) for doing this.
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 | lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.h |
 | lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.cpp |
 | lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp |
 | lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp |
Commit
57a51b689e7b99c694a028104b0b5a69b80fd002
by ibiryukov[CodeComplete] Suggest 'return nullptr' in functions returning pointers Reviewers: kadircet Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D72497
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 | clang/lib/Sema/SemaCodeComplete.cpp |
 | clang/test/CodeCompletion/patterns.cpp |
Commit
c88e298b69409e35e35ab601592197f5a2bc1c30
by pavel[lldb] Surpress "bitfield too small" gcc warning Gcc produces this (technically correct) warning when storing an explicitly-sized enum in a bitfield. Surpress that by changing the type of the bitfield to an integer. The same approach is used elsewhere in llvm (e.g. 56b5eab12).
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 | lldb/include/lldb/Symbol/DebugMacros.h |
Commit
564481aebe18a723c9cfe9ea9ca5808771f7e9d8
by andrew.ng[Support] ThreadPoolExecutor fixes for Windows/MinGW Changed ThreadPoolExecutor to no longer use detached threads and instead to join threads on destruction. This is to prevent intermittent crashing on Windows when doing a normal full exit, e.g. via exit(). Changed ThreadPoolExecutor to be a ManagedStatic so that it can be stopped on llvm_shutdown(). Without this, it would only be stopped in the destructor when doing a full exit. This is required to avoid intermittent crashing on Windows due to a race condition between the ThreadPoolExecutor starting up threads and the process doing a fast exit, e.g. via _exit(). The Windows crashes appear to only occur with the MSVC static runtimes and are more frequent with the debug static runtime. These changes also prevent intermittent deadlocks on exit with the MinGW runtime. Differential Revision: https://reviews.llvm.org/D70447
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 | llvm/lib/Support/Parallel.cpp |
 | lld/Common/ErrorHandler.cpp |
Commit
e4d672971030fe26dbb8237038038c3ff9ae7541
by Tatyana Krasnukha[lldb][tests] Take into account all parent's categories when traverse folders upwards This is needed to not re-write parent's categories by categories of a nested folder, e.g. commands/expression/completion specify "cmdline" category, however it still belongs to parent's "expression" category. The sentinel ".categories" in the test-suite root directory is no longer needed. Differential Revision: https://reviews.llvm.org/D71905
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 | lldb/packages/Python/lldbsuite/test/test_result.py |
 | lldb/packages/Python/lldbsuite/test/.categories |
Commit
9ba151274869c377921a09ba0bd635412da755ef
by Tatyana Krasnukha[lldb][test] NFC, re-use _getTestPath() function
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 | lldb/packages/Python/lldbsuite/test/test_result.py |
Commit
76e9c2a9870e36415eb343d28942a42296f85597
by ulrich.weigand[FPEnv] Generate constrained FP comparisons from clang Update the IRBuilder to generate constrained FP comparisons in CreateFCmp when IsFPConstrained is true, similar to the other places in the IRBuilder. Also, add a new CreateFCmpS to emit signaling FP comparisons, and use it in clang where comparisons are supposed to be signaling (currently, only when emitting code for the <, <=, >, >= operators). Note that there is currently no way to add fast-math flags to a constrained FP comparison, since this is implemented as an intrinsic call that returns a boolean type, and FMF are only allowed for calls returning a floating-point type. However, given the discussion around https://bugs.llvm.org/show_bug.cgi?id=42179, it seems that FCmp itself really shouldn't have any FMF either, so this is probably OK. Reviewed by: craig.topper Differential Revision: https://reviews.llvm.org/D71467
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 | clang/test/CodeGen/fpconstrained-cmp-float.c |
 | llvm/include/llvm/IR/IRBuilder.h |
 | clang/test/CodeGen/fpconstrained-cmp-double.c |
 | clang/lib/CodeGen/CGExprScalar.cpp |
Commit
b3af8ab7f83c2a825c584ddedf5cc9207ca66b44
by Tatyana Krasnukha[lldb][tests] Cleanup '.categories'
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 | lldb/packages/Python/lldbsuite/test/functionalities/data-formatter/data-formatter-objc/.categories |
 | lldb/packages/Python/lldbsuite/test/commands/command/.categories |
 | lldb/packages/Python/lldbsuite/test/commands/command/history/.categories |
 | lldb/packages/Python/lldbsuite/test/commands/command/source/.categories |
 | lldb/packages/Python/lldbsuite/test/commands/command/script/.categories |
 | lldb/packages/Python/lldbsuite/test/commands/command/script_alias/.categories |
 | lldb/packages/Python/lldbsuite/test/commands/expression/no-deadlock/.categories |
Commit
b1bb5ce96d349689085eab38121c85737de1fcaa
by diogo.sampaioReverting, broke some bots. Need further investigation. Summary: This reverts commit 8c12769f3046029e2a9b4e48e1645b1a77d28650. Reviewers: Subscribers:
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 | llvm/test/CodeGen/ARM/GlobalISel/thumb-select-arithmetic-ops.mir |
 | llvm/test/CodeGen/Thumb2/peephole-cmp.mir |
 | llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp |
 | llvm/test/MC/Disassembler/ARM/thumb-tests.txt |
 | llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp |
 | llvm/test/CodeGen/Thumb2/fp16-stacksplot.mir |
 | llvm/test/MC/Disassembler/ARM/thumb2.txt |
 | llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp |
 | llvm/test/MC/ARM/invalid-addsub.s |
 | llvm/test/CodeGen/ARM/GlobalISel/thumb-select-load-store.mir |
 | llvm/lib/Target/ARM/ARMInstrThumb2.td |
 | llvm/lib/Target/ARM/ARMAsmPrinter.cpp |
 | llvm/test/MC/ARM/negative-immediates.s |
 | llvm/test/MC/Disassembler/ARM/invalid-thumbv7.txt |
 | llvm/test/CodeGen/MIR/ARM/thumb2-sub-sp-t3.mir |
 | llvm/test/CodeGen/Thumb2/peephole-addsub.mir |
 | llvm/test/CodeGen/Thumb2/mve-stacksplot.mir |
 | llvm/test/MC/ARM/basic-thumb2-instructions.s |
 | llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp |
 | llvm/lib/Target/ARM/Thumb2InstrInfo.cpp |
 | llvm/test/CodeGen/Thumb2/bug-subw.ll |
 | llvm/test/MC/Disassembler/ARM/thumb2-v8.txt |
 | llvm/test/MC/ARM/register-token-source-loc.s |
 | llvm/test/MC/ARM/thumb-diagnostics.s |
Commit
e49c3c8f2ef97bdf256ca76f3d001eeb79361d56
by benny.kraSprinkle some constexpr on default ctors so the compiler can diagnose unused instances. NFCI.
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 | mlir/include/mlir/IR/Attributes.h |
 | mlir/include/mlir/IR/Types.h |
 | mlir/include/mlir/IR/Value.h |
 | mlir/lib/Dialect/SPIRV/SPIRVOps.cpp |
 | mlir/lib/Dialect/VectorOps/VectorOps.cpp |
Commit
4569f63ae1cb520ce28f08f4800dfbcd5f255eed
by sjoerd.meijerARMLowOverheadLoops: a few more dbg msgs to better trace rejected TP loops. NFC.
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 | llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp |
Commit
2f2f41e12c5201b600d887d22ce5cb4afd2ff594
by jan.kratochvilRangeDataVector: Support custom sorting for D63540 As suggested by @labath extended RangeDataVector so that user can provide custom sorting of the Entry's `data' field for D63540. https://reviews.llvm.org/D63540 RangeData functions were used just by RangeDataVector (=after I removed them LLDB still builds fine) which no longer uses them so I removed them. Differential revision: https://reviews.llvm.org/D72460
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 | lldb/unittests/Utility/RangeMapTest.cpp |
 | lldb/include/lldb/Utility/RangeMap.h |
Commit
3772ea9dd9368cfdc73595854c143bc3f16a5ade
by sam.parker[ARM][MVE] Tail predicate VMAX,VMAXA,VMIN,VMINA Add the MVE min and max instructions to our tail predication whitelist. Differential Revision: https://reviews.llvm.org/D72502
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 | llvm/lib/Target/ARM/ARMInstrMVE.td |
 | llvm/unittests/Target/ARM/MachineInstrTest.cpp |
Commit
f0fd11df7d5488e2747f26a3bfcf62459fee54ad
by ulrich.weigand[FPEnv] Invert sense of MIFlag::FPExcept flag In D71841 we inverted the sense of the SDNode-level flag to ensure all nodes default to potentially raising FP exceptions unless otherwise specified -- i.e. if we forget to propagate the flag somewhere, the effect is now only lost performance, not incorrect code. However, the related flag at the MI level still defaults to nodes not raising FP exceptions unless otherwise specified. To be fully on the (conservatively) safe side, we should invert that flag as well. This patch does so by replacing MIFlag::FPExcept with MIFlag::NoFPExcept. (Note that this does also introduce an incompatible change in the MIR format.) Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D72466
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 | llvm/lib/CodeGen/MachineInstr.cpp |
 | llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics-flags.ll |
 | llvm/lib/Target/SystemZ/SystemZElimCompare.cpp |
 | llvm/lib/CodeGen/MIRParser/MILexer.h |
 | llvm/lib/CodeGen/MIRParser/MILexer.cpp |
 | llvm/lib/CodeGen/MIRParser/MIParser.cpp |
 | llvm/test/CodeGen/X86/fast-isel-select-sse.ll |
 | llvm/lib/CodeGen/MIRPrinter.cpp |
 | llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp |
 | llvm/test/CodeGen/X86/sqrt-fastmath-mir.ll |
 | llvm/include/llvm/CodeGen/MachineInstr.h |
 | llvm/test/CodeGen/X86/fp-intrinsics-flags.ll |
 | llvm/test/CodeGen/X86/fp-intrinsics-flags-x86_64.ll |
Commit
e20a3b9b6c028ef3fea92ddb19e98db45e3d0509
by Tatyana Krasnukha[lldb][tests][NFC] Unify variable naming convention
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 | lldb/packages/Python/lldbsuite/test/dotest.py |
 | lldb/packages/Python/lldbsuite/test/dotest_args.py |
 | lldb/packages/Python/lldbsuite/test/test_result.py |
 | lldb/packages/Python/lldbsuite/test/configuration.py |
 | lldb/packages/Python/lldbsuite/test/lldbtest.py |
Commit
3eea082535e232b35e6b2dab45dd81728b2ae7f4
by Tatyana Krasnukha[lldb][tests] Make it possible to expect failure for a whole category There already are decorators and "--excluded" option to mark test-cases/files as expected to fail. However, when a new test file is added and it which relates to a feature that a target doesn't support, this requires either adding decorators to that file or modifying the file provided as "--excluded" option value. The purpose of this patch is to avoid any modifications in such cases. E.g. if a target doesn't support "watchpoints" and passes "--xfail-category watchpoint" to dotest, a testing job will not fail after a new watchpoint-related test file is added. Differential Revision: https://reviews.llvm.org/D71906
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 | lldb/packages/Python/lldbsuite/test/test_result.py |
 | lldb/packages/Python/lldbsuite/test/dotest_args.py |
 | lldb/packages/Python/lldbsuite/test/configuration.py |
 | lldb/packages/Python/lldbsuite/test/dotest.py |
Commit
bac995d97896c1e785d709da24c55f0e050eb899
by arsenm2AMDGPU/GlobalISel: Clamp G_ZEXT source sizes Also clamps G_SEXT/G_ANYEXT, but the implementation is more limited so fewer cases actually work.
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 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-anyext.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ptrtoint.mir |
 | llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp |
Commit
b19c0810e56b552d31247dcff081643799fd97fb
by a.bataev[LIBOMPTARGET]Ignore empty target descriptors. Summary: If the dynamically loaded module has been compiled with -fopenmp-targets and has no target regions, it has empty target descriptor. It leads to a crash at the runtime if another module has at least one target region and at least one entry in its descriptor. The runtime library is unable to load the empty binary descriptor and terminates the execution. Caused by a clang-offload-wrapper. Reviewers: grokos, jdoerfert Subscribers: caomhin, kkwli0, openmp-commits Tags: #openmp Differential Revision: https://reviews.llvm.org/D72472
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 | openmp/libomptarget/src/rtl.cpp |
 | openmp/libomptarget/test/offloading/dynamic_module.c |
Commit
6e3ca962fafb3d2a31279c49f0cde60eb626a002
by jh7370[DebugInfo] Improve error message text Unlike most of our errors in the debug line parser, the "no end of sequence" message was missing any reference to which line table it refererred to. This change adds the offset to this message. Reviewed by: dblaikie Differential Revision: https://reviews.llvm.org/D72443
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 | llvm/test/tools/llvm-dwarfdump/X86/debug_line_invalid.test |
 | llvm/unittests/DebugInfo/DWARF/DWARFDebugLineTest.cpp |
 | llvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp |
 | lld/test/ELF/undef.s |
Commit
7e02406f6cf180a8c89ce64665660e7cc9dbc23e
by jh7370[DebugInfo][NFC] Remove unused variable/fix variable naming Reviewed by: MaskRay Differential Revision: https://reviews.llvm.org/D72159
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 | llvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp |
Commit
cdd05f2aea3b950a4e2c496175117e6b47b2a050
by development[NFC] format unittest for ExprMutAnalyzer This formatting is a preparation for review in https://reviews.llvm.org/D54943 to separate pure formatting changes from actual testing changes.
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 | clang/unittests/Analysis/ExprMutationAnalyzerTest.cpp |
Commit
d864d93496c5fd0cc473953ab825f07e3d4c4e86
by nemanja.i.ibm[PowerPC] Handle constant zero bits in BitPermutationSelector We currently crash when analyzing an AssertZExt node that has some bits that are constant zeros (i.e. as a result of an and with a constant). This issue was reported in https://bugs.llvm.org/show_bug.cgi?id=41088 and this patch fixes that. Differential revision: https://reviews.llvm.org/D72038
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 | llvm/test/CodeGen/PowerPC/pr41088.ll |
 | llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp |
Commit
bdd88b7ed3956534a0a71b1ea2bc88c69d48f9b7
by David.ChisnallAdd support for __declspec(guard(nocf)) Summary: Avoid using the `nocf_check` attribute with Control Flow Guard. Instead, use a new `"guard_nocf"` function attribute to indicate that checks should not be added on indirect calls within that function. Add support for `__declspec(guard(nocf))` following the same syntax as MSVC. Reviewers: rnk, dmajor, pcc, hans, aaron.ballman Reviewed By: aaron.ballman Subscribers: aaron.ballman, tomrittervg, hiraditya, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D72167
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 | clang/include/clang/Basic/AttrDocs.td |
 | clang/lib/Sema/SemaDeclAttr.cpp |
 | clang/lib/CodeGen/CGCall.cpp |
 | llvm/test/CodeGen/X86/cfguard-checks.ll |
 | clang/test/CodeGenCXX/guard_nocf.cpp |
 | llvm/test/CodeGen/AArch64/cfguard-checks.ll |
 | clang/test/Sema/attr-guard_nocf.c |
 | llvm/lib/Transforms/CFGuard/CFGuard.cpp |
 | clang/include/clang/Basic/Attr.td |
 | clang/test/CodeGen/guard_nocf.c |
 | llvm/test/CodeGen/ARM/cfguard-checks.ll |
Commit
e9331a56fead1823d528d6412828fb9e16fd62ff
by Adrian PrantlAdd missing nullptr checks. GetPersistentExpressionStateForLanguage() can return a nullptr if it cannot construct a typesystem. This patch adds missing nullptr checks at all uses. Inspired by rdar://problem/58317195 Differential Revision: https://reviews.llvm.org/D72413
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 | lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionDeclMap.cpp |
 | lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp |
 | lldb/source/Expression/REPL.cpp |
 | lldb/source/Expression/UserExpression.cpp |
 | lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionSourceCode.cpp |
 | lldb/source/Target/ABI.cpp |
 | lldb/source/Plugins/ExpressionParser/Clang/ClangUserExpression.cpp |
 | lldb/source/Plugins/ExpressionParser/Clang/ASTResultSynthesizer.cpp |
Commit
5e7beb0a4146267f1d65c57543e67ca158aca4aa
by gabor.marton[analyzer] Add PlacementNewChecker Summary: This checker verifies if default placement new is provided with pointers to sufficient storage capacity. Noncompliant Code Example: #include <new> void f() { short s; long *lp = ::new (&s) long; } Based on SEI CERT rule MEM54-CPP https://wiki.sei.cmu.edu/confluence/display/cplusplus/MEM54-CPP.+Provide+placement+new+with+properly+aligned+pointe This patch does not implement checking of the alignment. Reviewers: NoQ, xazax.hun Subscribers: mgorny, whisperity, xazax.hun, baloghadamsoftware, szepet, rnkovacs, a.sidorin, mikhail.ramalho, donat Tags: #clang Differential Revision: https://reviews.llvm.org/D71612
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 | clang/test/Analysis/placement-new.cpp |
 | clang/test/Analysis/placement-new-user-defined.cpp |
 | clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt |
 | clang/docs/analyzer/checkers.rst |
 | clang/lib/StaticAnalyzer/Checkers/CheckPlacementNew.cpp |
 | clang/include/clang/StaticAnalyzer/Checkers/Checkers.td |
Commit
0b032d7ba7157b62cd0d39f8d2dc0b0efa57a710
by antiagainst[mlir][spirv] Fix typos related to (de)serialization. Fix typos related to (de)serialization of spv.selection. Differential Revision: https://reviews.llvm.org/D72503
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 | mlir/lib/Dialect/SPIRV/Serialization/Serializer.cpp |
 | mlir/lib/Dialect/SPIRV/Serialization/Deserializer.cpp |
Commit
26cdaeb1f05ba140011a43ef1ea8a37d3cf416d9
by spatel[InstCombine] add tests for fsub; NFC Conflicting/missing canonicalizations are visible in PR44509: https://bugs.llvm.org/show_bug.cgi?id=44509
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 | llvm/test/Transforms/InstCombine/fsub.ll |
Commit
fbb64aa69835c8e3e9efe0afc8a73058b5a0fb3c
by yhs[BPF] extend BTF_KIND_FUNC to cover global, static and extern funcs Previously extern function is added as BTF_KIND_VAR. This does not work well with existing BTF infrastructure as function expected to use BTF_KIND_FUNC and BTF_KIND_FUNC_PROTO. This patch added extern function to BTF_KIND_FUNC. The two bits 0:1 of btf_type.info are used to indicate what kind of function it is: 0: static 1: global 2: extern Differential Revision: https://reviews.llvm.org/D71638
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 | llvm/test/CodeGen/BPF/CORE/offset-reloc-struct-anonymous.ll |
 | llvm/test/CodeGen/BPF/BTF/static-var-readonly-sec.ll |
 | llvm/lib/Target/BPF/BTF.h |
 | llvm/lib/Target/BPF/BTFDebug.cpp |
 | llvm/test/CodeGen/BPF/BTF/func-typedef.ll |
 | llvm/test/CodeGen/BPF/BTF/extern-func-arg.ll |
 | llvm/test/CodeGen/BPF/BTF/static-var-readonly.ll |
 | llvm/test/CodeGen/BPF/BTF/extern-builtin.ll |
 | llvm/test/CodeGen/BPF/CORE/offset-reloc-struct-array.ll |
 | llvm/test/CodeGen/BPF/CORE/offset-reloc-basic.ll |
 | llvm/test/CodeGen/BPF/BTF/extern-var-struct.ll |
 | llvm/test/CodeGen/BPF/BTF/local-var.ll |
 | llvm/test/CodeGen/BPF/CORE/offset-reloc-union.ll |
 | llvm/test/CodeGen/BPF/BTF/static-var-derived-type.ll |
 | llvm/test/CodeGen/BPF/BTF/func-void.ll |
 | llvm/test/CodeGen/BPF/BTF/static-var-inited.ll |
 | llvm/test/CodeGen/BPF/BTF/static-var-zerolen-array.ll |
 | llvm/test/CodeGen/BPF/BTF/extern-var-func.ll |
 | llvm/test/CodeGen/BPF/BTF/static-var-inited-sec.ll |
 | llvm/test/CodeGen/BPF/BTF/extern-var-func-weak.ll |
 | llvm/test/CodeGen/BPF/BTF/func-func-ptr.ll |
 | llvm/test/CodeGen/BPF/BTF/extern-var-func-weak-section.ll |
 | llvm/test/CodeGen/BPF/BTF/static-func.ll |
 | llvm/test/CodeGen/BPF/BTF/extern-var-weak-section.ll |
 | llvm/test/CodeGen/BPF/BTF/func-non-void.ll |
 | llvm/test/CodeGen/BPF/CORE/offset-reloc-multilevel.ll |
 | llvm/lib/Target/BPF/BTFDebug.h |
 | llvm/test/CodeGen/BPF/BTF/extern-var-section.ll |
 | llvm/test/CodeGen/BPF/BTF/extern-var-struct-weak.ll |
 | llvm/test/CodeGen/BPF/BTF/static-var-sec.ll |
 | llvm/test/CodeGen/BPF/BTF/func-source.ll |
 | llvm/test/CodeGen/BPF/BTF/filename.ll |
 | llvm/test/CodeGen/BPF/BTF/func-unused-arg.ll |
 | llvm/test/CodeGen/BPF/BTF/extern-global-var.ll |
 | llvm/test/CodeGen/BPF/BTF/binary-format.ll |
 | llvm/test/CodeGen/BPF/BTF/static-var.ll |
Commit
4c5a4514d14537cae5459e03d1fea422664b3bc2
by sam.mccall[clangd] Fix targetDecl() on certain usage of ObjC properties. Summary: In particular there's a common chain:
OpaqueValueExpr->PseudoObjectExpr->ObjCPropertyRefExpr->ObjCPropertyDecl and we weren't handling the first two edges Reviewers: dgoldman, kadircet Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, jfb, usaxena95, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D72494
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 | clang-tools-extra/clangd/FindTarget.cpp |
 | clang-tools-extra/clangd/unittests/FindTargetTests.cpp |
Commit
504b3fe5bfed7ea24c7c74f563ef6a8214e24223
by llvmgnsyncbot[gn build] Port 5e7beb0a414
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 | llvm/utils/gn/secondary/clang/lib/StaticAnalyzer/Checkers/BUILD.gn |
Commit
a5bdada09defc15d2b009314306f4fcb8fa8458d
by llvm-dev[X86][AVX] lowerShuffleAsLanePermuteAndShuffle - consistently normalize multi-input shuffle elements We only use lowerShuffleAsLanePermuteAndShuffle for unary shuffles at the moment, but we should consistently handle lane index calculations for multiple inputs in both the AVX1 and AVX2 paths. Minor (almost NFC) tidyup as I'm hoping to use lowerShuffleAsLanePermuteAndShuffle for binary shuffles soon.
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 | llvm/lib/Target/X86/X86ISelLowering.cpp |
Commit
cdc9592bf1acb6d8012a4867d2a22458945dcceb
by llvm-devFix "pointer is null" static analyzer warning. NFCI. Use cast<> instead of dyn_cast<> since we know that the pointer should be valid (and is dereferenced immediately).
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 | clang/lib/ARCMigrate/ObjCMT.cpp |
Commit
cce4676d6d78ba56e929bd37d65c2667390b68c7
by llvm-devFix "pointer is null" static analyzer warning. NFCI. Use castAs<> instead of getAs<> since the pointer is dereferenced immediately below and castAs will perform the null assertion for us.
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 | clang/lib/ARCMigrate/ObjCMT.cpp |
Commit
ff92e469caefff9f86e5e812c08b9bba582be5d3
by inouehrs[examples] Add missing dependency in llvm examples To fix build failure with BUILD_SHARED_LIBS=ON
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 | llvm/examples/Kaleidoscope/BuildingAJIT/Chapter5/Server/CMakeLists.txt |
 | llvm/examples/Kaleidoscope/BuildingAJIT/Chapter5/CMakeLists.txt |
 | llvm/examples/LLJITExamples/LLJITWithCustomObjectLinkingLayer/CMakeLists.txt |
Commit
dfed052fb3ecef53bf01612ec3fc7df73c2134b7
by jasonliu[AIX] Allow vararg calls when all arguments reside in registers Summary: This patch pushes the AIX vararg unimplemented error diagnostic later and allows vararg calls so long as all the arguments can be passed in register. This patch extends the AIX calling convention implementation to initialize GPR(s) for vararg float arguments. On AIX, both GPR(s) and FPR are allocated for floating point arguments. The GPR(s) are only initialized for vararg calls, otherwise the callee is expected to retrieve the float argument in the FPR. f64 in AIX PPC32 requires special handling in order to allocated and initialize 2 GPRs. This is performed with bitcast, SRL, truncation to initialize one GPR for the MSW and bitcast, truncations to initialize the other GPR for the LSW. A future patch will follow to add support for arguments passed on the stack. Patch provided by: cebowleratibm Reviewers: sfertile, ZarkoCA, hubert.reinterpretcast Differential Revision: https://reviews.llvm.org/D71013
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 | llvm/test/CodeGen/PowerPC/aix_cc_abi.ll |
 | llvm/test/CodeGen/PowerPC/aix-cc-abi.ll |
 | llvm/test/CodeGen/PowerPC/aix-cc-altivec.ll |
 | llvm/lib/Target/PowerPC/PPCISelLowering.cpp |
Commit
fd8ded99fe6e9fcae2c98ccad25d6562c5fa8a14
by llvm-devFix "pointer is null" static analyzer warning. NFCI. Use castAs<> instead of getAs<> since the pointer is dereferenced immediately below and castAs will perform the null assertion for us.
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 | clang/lib/CodeGen/CGVTables.cpp |
Commit
4d1e23e3b3cd7c72a8b24dc5acb7e13c58a8de37
by maskray[AArch64] Add function attribute "patchable-function-entry" to add NOPs at function entry The Linux kernel uses -fpatchable-function-entry to implement DYNAMIC_FTRACE_WITH_REGS for arm64 and parisc. GCC 8 implemented -fpatchable-function-entry, which can be seen as a generalized form of -mnop-mcount. The N,M form (function entry points before the Mth NOP) is currently only used by parisc. This patch adds N,0 support to AArch64 codegen. N is represented as the function attribute "patchable-function-entry". We will use a different function attribute for M, if we decide to implement it. The patch reuses the existing patchable-function pass, and TargetOpcode::PATCHABLE_FUNCTION_ENTER which is currently used by XRay. When the integrated assembler is used, __patchable_function_entries will be created for each text section with the SHF_LINK_ORDER flag to prevent --gc-sections (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93197) and COMDAT (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93195) issues. Retrospectively, __patchable_function_entries should use a PC-relative relocation type to avoid the SHF_WRITE flag and dynamic relocations. "patchable-function-entry"'s interaction with Branch Target Identification is still unclear (see https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92424 for GCC discussions). Reviewed By: peter.smith Differential Revision: https://reviews.llvm.org/D72215
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 | llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp |
 | llvm/include/llvm/CodeGen/AsmPrinter.h |
 | llvm/lib/IR/Verifier.cpp |
 | llvm/test/Verifier/invalid-patchable-function-entry.ll |
 | llvm/lib/CodeGen/PatchableFunction.cpp |
 | llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp |
 | llvm/test/CodeGen/AArch64/patchable-function-entry.ll |
Commit
a8fbdc576990653e92ce1d766659005678fd8514
by maskray[X86] Support function attribute "patchable-function-entry" For x86-64, we diverge from GCC -fpatchable-function-entry in that we emit multi-byte NOPs. Differential Revision: https://reviews.llvm.org/D72220
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 | llvm/test/CodeGen/X86/patchable-function-entry.ll |
 | llvm/lib/Target/X86/X86MCInstLower.cpp |
Commit
a44c434b68e515ce9f2627367c83ff6b22328261
by maskraySupport function attribute patchable_function_entry This feature is generic. Make it applicable for AArch64 and X86 because the backend has only implemented NOP insertion for AArch64 and X86. Reviewed By: nickdesaulniers, aaron.ballman Differential Revision: https://reviews.llvm.org/D72221
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 | clang/include/clang/Basic/Attr.td |
 | clang/test/Misc/pragma-attribute-supported-attributes-list.test |
 | clang/lib/Sema/SemaDeclAttr.cpp |
 | clang/test/Sema/patchable-function-entry-attr.c |
 | clang/test/Sema/patchable-function-entry-attr.cpp |
 | clang/test/CodeGen/patchable-function-entry.c |
 | clang/include/clang/Basic/AttrDocs.td |
 | clang/lib/CodeGen/CodeGenFunction.cpp |
Commit
f17ae668a96eeb69f0664f126cf672e1a05754d2
by maskray[Driver][CodeGen] Add -fpatchable-function-entry=N[,0] In the backend, this feature is implemented with the function attribute "patchable-function-entry". Both the attribute and XRay use TargetOpcode::PATCHABLE_FUNCTION_ENTER, so the two features are incompatible. Reviewed By: ostannard, MaskRay Differential Revision: https://reviews.llvm.org/D72222
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 | clang/lib/Driver/ToolChains/Clang.cpp |
 | clang/include/clang/Basic/DiagnosticDriverKinds.td |
 | clang/include/clang/Basic/CodeGenOptions.def |
 | clang/lib/Driver/XRayArgs.cpp |
 | clang/test/CodeGen/patchable-function-entry.c |
 | clang/lib/CodeGen/CodeGenFunction.cpp |
 | clang/test/Driver/fpatchable-function-entry.c |
 | clang/lib/Frontend/CompilerInvocation.cpp |
 | clang/include/clang/Driver/Options.td |
Commit
2d077d6dfa7909a21293ebdac81488367628e0fa
by maskray[ELF] Make TargetInfo::writeIgotPlt a no-op RELA targets don't read initial .got.plt entries. REL targets (ARM, x86-32) write the address of the IFUNC resolver to the entry (`write32le(buf, s.getVA())`). The default writeIgotPlt() is not meaningful. Make it a no-op. AArch64 and x86-64 will have 0 as initial .got.plt entries associated with IFUNC. Reviewed By: peter.smith Differential Revision: https://reviews.llvm.org/D72474
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 | lld/ELF/Target.h |
 | lld/test/ELF/gnu-ifunc-plt.s |
 | lld/ELF/Target.cpp |
 | lld/test/ELF/aarch64-gnu-ifunc-plt.s |
Commit
f678fc7660b36ce0ad6ce4f05eaa28f3e9fdedb5
by craig.topper[LegalizeVectorOps] Improve handling of multi-result operations. This system wasn't very well designed for multi-result nodes. As a consequence they weren't consistently registered in the LegalizedNodes map leading to nodes being revisited for different results. I've removed the "Result" variable from the main LegalizeOp method and used a SDNode* instead. The result number from the incoming Op SDValue is only used for deciding which result to return to the caller. When LegalizeOp is called it should always register a legalized result for all of its results. Future calls for any other result should be pulled for the LegalizedNodes map. Legal nodes will now register all of their results in the map instead of just the one we were called for. The Expand and Promote handling to use a vector of results similar to LegalizeDAG. Each of the new results is then re-legalized and logged in the LegalizedNodes map for all of the Results for the node being legalized. None of the handles register their own results now. And none call ReplaceAllUsesOfValueWith now. Custom handling now always passes result number 0 to LowerOperation. This matches what LegalizeDAG does. Since the introduction of STRICT nodes, I've encountered several issues with X86's custom handling being called with an SDValue pointing at the chain and our custom handlers using that to get a VT instead of result 0. This should prevent us from having any more of those issues. On return we will update the LegalizedNodes map for all results so we shouldn't call the custom handler again for each result number. I want to push SDNode* further into the Expand and Promote handlers, but I've left that for a follow to keep this patch size down. I've created a dummy SDValue(Node, 0) to keep the handlers working. Differential Revision: https://reviews.llvm.org/D72224
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 | llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp |
 | llvm/test/CodeGen/X86/avx512-cmp.ll |
Commit
ef239972614cc3c67006f9c298fcfa841818dc77
by Raphael Isemann[lldb] Remove FieldDecl stealing hack by rerouting indirect imports to the original AST Summary: This is a port of D67803 that was about preventing indirect importing to our scratch context when evaluating expressions. D67803 already has a pretty long explanation of how this works, but the idea is that instead of importing declarations indirectly over the expression AST (i.e., Debug info AST -> Expression AST -> scratch AST) we instead directly import the declaration from the debug info AST to the scratch AST. The difference from D67803 is that here we have to do this in the ASTImporterDelegate (which is our ASTImporter subclass we use in LLDB). It has the same information as the ExternalASTMerger in D67803 as it can access the ClangASTImporter (which also keeps track of where Decls originally came from). With this patch we can also delete the FieldDecl stealing hack in the ClangASTSource (this was only necessary as the indirect imports caused the creation of duplicate Record declarations but we needed the fields in the Record decl we originally found in the scratch ASTContext). This also fixes the current gmodules failures where we fail to find std::vector fields after an indirect import over the expression AST (where it seems even our FieldDecl stealing hack can't save us from). Reviewers: shafik, aprantl Reviewed By: shafik Subscribers: JDevlieghere, lldb-commits, mib, labath, friss Tags: #lldb Differential Revision: https://reviews.llvm.org/D72507
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 | lldb/source/Plugins/ExpressionParser/Clang/ClangASTSource.cpp |
 | lldb/source/Symbol/ClangASTImporter.cpp |
Commit
572b9f468ad6844795fec29a7e671ba64d82e8c2
by Jonas Devlieghere[lldb/Lua] Support loading Lua modules Implements the command script import command for Lua. Differential revision: https://reviews.llvm.org/D71825
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 | lldb/test/Shell/ScriptInterpreter/Lua/command_script_import.test |
 | lldb/source/Plugins/ScriptInterpreter/Lua/Lua.h |
 | lldb/source/Plugins/ScriptInterpreter/Lua/ScriptInterpreterLua.cpp |
 | lldb/source/Plugins/ScriptInterpreter/Lua/Lua.cpp |
 | lldb/source/Plugins/ScriptInterpreter/Lua/ScriptInterpreterLua.h |
 | lldb/test/Shell/ScriptInterpreter/Lua/Inputs/testmodule.lua |
Commit
a5230ac10b0dac9a1981838209b4cbc84870c08c
by daniel_l_sandersUpdate the attribution policy to use the 'Author' property of a git commit Summary: The older method of adding 'Patch by John Doe' is documented in the `Attribution of Changes` section to support correct attribution of commits that pre-date the adoption of git. Reviewers: hfinkel, aaron.ballman, mehdi_amini Subscribers: llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72468
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 | llvm/docs/DeveloperPolicy.rst |
Commit
13ec473b9d4bd4f7a558272932b7c0806171c666
by gabor.marton[analyzer] Move PlacementNewChecker to alpha
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 | clang/include/clang/StaticAnalyzer/Checkers/Checkers.td |
 | clang/test/Analysis/placement-new.cpp |
 | clang/test/Analysis/placement-new-user-defined.cpp |
Commit
b590e0fd810e4caf59ab83b04654d42e18faaafb
by craig.topper[TargetLowering][ARM][X86] Change softenSetCCOperands handling of ONE to avoid spurious exceptions for QNANs with strict FP quiet compares ONE is currently softened to OGT | OLT. But the libcalls for OGT and OLT libcalls will trigger an exception for QNAN. At least for X86 with libgcc. UEQ on the other hand uses UO | OEQ. The UO and OEQ libcalls will not trigger an exception for QNAN. This patch changes ONE to use the inverse of the UEQ lowering. So we now produce O & UNE. Technically the existing behavior was correct for a signalling ONE, but since I don't know how to generate one of those from clang that seemed like something we can deal with later as we would need to fix other predicates as well. Also removing spurious exceptions seemed better than missing an exception. There are also problems with quiet OGT/OLT/OLE/OGE, but those are harder to fix. Differential Revision: https://reviews.llvm.org/D72477
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 | llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp |
 | llvm/test/CodeGen/X86/fp128-compare.ll |
 | llvm/test/CodeGen/Thumb2/float-cmp.ll |
 | llvm/test/CodeGen/X86/fpcmp-soft-fp.ll |
 | llvm/test/CodeGen/X86/fp128-libcalls-strict.ll |
Commit
9cd985815abf88bd77bb67f7b9cc80f2032cbbc7
by sbc[lld][WebAssembly] Add libcall symbols to the link when LTO is being used. This code is copied almost verbatim from the equivalent change to the ELF linker: - https://reviews.llvm.org/D50017 - https://reviews.llvm.org/D50475 The upshot is that libraries containing libcall (such as compiler-rt and libc) can be compiled with LTO. Fixes PR41384 Differential Revision: https://reviews.llvm.org/D71738
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 | lld/wasm/Symbols.h |
 | lld/wasm/Symbols.cpp |
 | lld/wasm/Driver.cpp |
 | lld/test/wasm/lto/Inputs/libcall-archive.ll |
 | lld/test/wasm/lto/libcall-archive.ll |
 | lld/wasm/InputFiles.h |
Commit
815a3f54331c39f2b400776f448dd29b3b03243b
by Jonas Devlieghere[CMake] Fix modules build after DWARFLinker reorganization Create a dedicate module for the DWARFLinker and make it depend on intrinsics gen.
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 | llvm/include/llvm/module.modulemap |
 | llvm/lib/DWARFLinker/CMakeLists.txt |
Commit
f28972facc1fce9589feab9803e3e8cfad01891c
by Jan Korous[clang] Fix out-of-bounds memory access in ComputeLineNumbers Differential Revision: https://reviews.llvm.org/D72409
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 | clang/unittests/Basic/SourceManagerTest.cpp |
 | clang/lib/Basic/SourceManager.cpp |
Commit
ba91dffafe4d348b469d8ae2b7b1cd00754f72f1
by maskray[Driver][PowerPC] Move powerpcspe logic from cc1 to Driver Follow-up of D72014. It is more appropriate to use a target feature instead of a SubTypeArch to express the difference. Reviewed By: #powerpc, jhibbits Differential Revision: https://reviews.llvm.org/D72433
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 | clang/lib/Basic/Targets/PPC.cpp |
 | clang/lib/Driver/ToolChains/Arch/PPC.cpp |
 | clang/test/Driver/ppc-features.cpp |
 | clang/test/Preprocessor/init.c |
Commit
55d7b22277e1c5e710bac7d4d4dc09db3a22dad8
by steveire[ASTMatchers] Make test more clear about what it is verifying
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 | clang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp |
Commit
0c29d3ff2233696f663ae34a8aeda23c750ac68f
by listmail[Tests] Precommit tests showing default branch padding on skylake A follow up patch will change the default for the compiler, but not the assembler, just making sure we have testing for each in place.
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 | llvm/test/CodeGen/X86/align-branch-boundary-default.s |
 | llvm/test/CodeGen/X86/align-branch-boundary-default.ll |
Commit
77da826edad0a7b906c734c6bee3489ef495c746
by Raphael Isemann[lldb] Make CompleteTagDeclsScope completion order deterministic Summary: We iterate over `m_decls_to_complete` to complete declarations. As `m_decls_to_complete` is a set the iteration order can be non-deterministic. The order is currently only non-deterministic when we have a large set of decls that need to be completed (i.e. more than 32 decls, as otherwise the SmallPtrSet is just a linear-searched list). This doesn't really fix any specific bug or has any really observable change in behavior as the order in which we import should not influence any semantics. However the order we create decls/types is now always deterministic which should make debugging easier. Reviewers: labath, mib, shafik, davide Reviewed By: shafik, davide Subscribers: davide, abidh, JDevlieghere, lldb-commits, mgrang Tags: #lldb Differential Revision: https://reviews.llvm.org/D72495
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 | lldb/source/Symbol/ClangASTImporter.cpp |
Commit
9e13cff44d6b8b9c9c8420870132931c218707cb
by Raphael Isemann[lldb] Fix TestClangASTContext.TestFunctionTemplateInRecordConstruction in Debug builds Summary: In Debug builds we call VerifyDecl in ClangASTContext::CreateFunctionDeclaration which in turn calls `getAccess` on the created FunctionDecl. As we passed in a RecordDecl as the DeclContext for the FunctionDecl, we end up hitting the assert in `getAccess` that checks that we never have a Decl inside a Record without a valid AccessSpecifier. FunctionDecls are never in RecordDecls (that would be a CXXMethodDecl) so setting a access specifier would not be the correct way to fix this. Instead this patch does the same thing that DWARFASTParserClang::ParseSubroutine is doing: We pass in the FunctionDecl with the TranslationUnit as the DeclContext. That's not ideal but it is how we currently do it when creating our debug info AST, so the unit test should do the same. Reviewers: shafik Reviewed By: shafik Subscribers: aprantl, JDevlieghere, lldb-commits Tags: #lldb Differential Revision: https://reviews.llvm.org/D72359
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 | lldb/unittests/Symbol/TestClangASTContext.cpp |
Commit
4ffcec40acebae7161ac7426edc68290bbaca2b8
by aaronImplement new AST matcher hasAnyCapture to match on LambdaExpr captures. Accepts child matchers cxxThisExpr to match on capture of this and also on varDecl.
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 | clang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp |
 | clang/include/clang/ASTMatchers/ASTMatchers.h |
 | clang/lib/ASTMatchers/Dynamic/Registry.cpp |
 | clang/docs/LibASTMatchersReference.html |
Commit
f3db1aad2796c62f0d188a74f2901c18e51843c2
by sylvestreMakeUniqueCheck.cpp: explicit the fact that there is an autofix for this checker
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 | clang-tools-extra/clang-tidy/modernize/MakeUniqueCheck.cpp |
Commit
faeeb71a17344171f814144213ac4fbc93be28fd
by sylvestreclang-tidy doc: Refresh the list of checkers and polish the script
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 | clang-tools-extra/clang-tidy/add_new_check.py |
 | clang-tools-extra/docs/clang-tidy/checks/list.rst |
Commit
71cee218619033115f5e0c7656efc8cee93180e9
by craig.topper[TargetLowering] Use SelectionDAG::getSetCC and remove a repeated call to getSetCCResultType in softenSetCCOperands. NFCI
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 | llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp |
Commit
68cd283f3b074e3b64b9f65e93ceb2de6807c72d
by sylvestreclang-tidy doc: unbreak the CI
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 | clang-tools-extra/docs/clang-tidy/checks/list.rst |
Commit
a5a6fd3f95a9ecc3ef8732192ce0fd7749135311
by eugenisSummary: update macro for OFF_T so that sanitizer works on AARCH64. Reviewers: vitalybuka, eugenis, MaskRay Reviewed By: eugenis, MaskRay Subscribers: MaskRay, kristof.beyls, #sanitizers, llvm-commits, jkz, scw Tags: #sanitizers, #llvm Differential Revision: https://reviews.llvm.org/D72367
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 | compiler-rt/lib/sanitizer_common/sanitizer_posix.h |
 | compiler-rt/lib/sanitizer_common/sanitizer_linux_s390.cpp |
 | compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp |
 | compiler-rt/lib/sanitizer_common/symbolizer/sanitizer_wrappers.cpp |
 | compiler-rt/lib/sanitizer_common/sanitizer_netbsd.cpp |
Commit
1a8c996a8894a6ae2bf3b98780972bc7bdb6b8e6
by Jonas Devlieghere[lldb/Scripts] Remove buildbot.py This file is outdated and still references SVN. Buildbots are configured through the zorg repository.
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 | lldb/scripts/buildbot.py |
Commit
e6d219122d5a94fa8642c67c391aeb47fc032c89
by Jonas Devlieghere[lldb/Scripts] Remove remote-build.py With Xcode gone this is no longer relevant.
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 | lldb/scripts/Python/remote-build.py |
Commit
7c47a3719a9e587fdf993637dc09d97b5397483b
by Jonas Devlieghere[lldb/Scripts] Move android script from underneath Python dir The scripts root directory already contains python scripts. No need to keep this one nested under a dedicated Python directory.
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 | lldb/scripts/android/host_art_bt.py |
 | lldb/scripts/Python/use_lldb_suite.py |
 | lldb/scripts/Python/android/host_art_bt.py |
Commit
a9052b4dfc1b25bd58480668d221365495fa9101
by Vedant Kumar[AArch64] Add isAuthenticated predicate to MCInstDesc Add a predicate to MCInstDesc that allows tools to determine whether an instruction authenticates a pointer. This can be used by diagnostic tools to hint at pointer authentication failures. Differential Revision: https://reviews.llvm.org/D70329 rdar://55089604
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 | llvm/lib/Target/AArch64/AArch64InstrFormats.td |
 | llvm/utils/TableGen/InstrDocsEmitter.cpp |
 | llvm/include/llvm/MC/MCInstrDesc.h |
 | llvm/include/llvm/Target/Target.td |
 | llvm/unittests/Target/AArch64/InstSizes.cpp |
 | llvm/utils/TableGen/CodeGenInstruction.h |
 | llvm/lib/Target/AArch64/AArch64InstrInfo.td |
 | llvm/utils/TableGen/CodeGenInstruction.cpp |
 | llvm/utils/TableGen/InstrInfoEmitter.cpp |
Commit
7ce92dc0b4bcc1044052a06df3f07a94eb890823
by Jonas Devlieghere[lldb/Test] Bypass LLDB_TEST_COMMON_ARGS for certain dotest args (NFC) Rather than serializing every argument through LLDB_TEST_COMMON_ARGS, we can pass some of them directly using their CMake variable. Although this does introduce some code duplication between lit's site config and the lldb-dotest utility, it also means that it becomes easier to override these values (WIP).
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 | lldb/test/API/CMakeLists.txt |
 | lldb/utils/lldb-dotest/lldb-dotest.in |
 | lldb/test/API/lit.cfg.py |
 | lldb/test/API/lit.site.cfg.py.in |
Commit
c5adcdc5c88a89241b1150824fc44370c62c7132
by Jonas Devlieghere[lldb/Utils] Remove vim-lldb The vim-lldb plugin is unmaintained and doesn't work with a recent vim installation that uses Python 3. This removes it from the LLDB repository. The code is still available under lldb-tools on GitHub like we did with for lldb-mi. (https://github.com/lldb-tools/vim-lldb) Differential revision: https://reviews.llvm.org/D72541
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 | lldb/utils/vim-lldb/doc/lldb.txt |
 | lldb/utils/vim-lldb/python-vim-lldb/import_lldb.py |
 | lldb/utils/vim-lldb/plugin/lldb.vim |
 | lldb/utils/vim-lldb/python-vim-lldb/plugin.py |
 | lldb/utils/vim-lldb/python-vim-lldb/vim_signs.py |
 | lldb/utils/vim-lldb/README |
 | lldb/utils/vim-lldb/python-vim-lldb/vim_panes.py |
 | lldb/utils/vim-lldb/python-vim-lldb/lldb_controller.py |
 | lldb/utils/vim-lldb/python-vim-lldb/vim_ui.py |
Commit
4c00dbf22d7f0ad005444b412b450ee4b4779b6a
by Vedant Kumarlldbutil: Forward ASan launch info to test inferiors This allows an unsanitized test process which loads a sanitized DSO (the motivating example is a Swift runtime dylib) to launch on Darwin. rdar://57290132 Differential Revision: https://reviews.llvm.org/D71379
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 | lldb/test/API/lit.cfg.py |
 | lldb/packages/Python/lldbsuite/test/lldbutil.py |
Commit
987bf8b6c14613da907fa78330415e266b97a036
by Stanislav.MekhanoshinLet targets adjust operand latency of bundles This reverts the AMDGPU DAG mutation implemented in D72487 and gives a more general way of adjusting BUNDLE operand latency. It also replaces FixBundleLatencyMutation with adjustSchedDependency callback in the AMDGPU, fixing not only successor latencies but predecessors' as well. Differential Revision: https://reviews.llvm.org/D72535
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 | llvm/lib/Target/AMDGPU/SIInstrInfo.h |
 | llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h |
 | llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp |
 | llvm/lib/CodeGen/ScheduleDAGInstrs.cpp |
Commit
d3ba1e026dbc44e9097ce6ea1c92d065f1fe33e8
by Jonas Devlieghere[lldb/Reproducer] Add SBReproducer::Replay overload (again) I modified the SBAPI under the assumption that nobody was using the old API yet. However, that turns out to be false. So instead of adding the deafault argument I've reintroduced the old API and made the new one an overload.
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 | lldb/include/lldb/API/SBReproducer.h |
 | lldb/source/API/SBReproducer.cpp |
Commit
7a38468e34eeeb59e80b176b97213d205d8d9b41
by richardOnly destroy static locals if they have non-trivial destructors. This fixes a regression introduced in 2b4fa5348ee157b6b1a1af44d0137ca8c7a71573 that caused us to emit shutdown-time destruction for variables with ARC ownership, using C++-specific functions that don't exist in C implementations.
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 | clang/lib/CodeGen/CGDecl.cpp |
 | clang/test/CodeGenObjC/initialize-function-static.m |
Commit
e05e219926f90ccab927b7b1af6d14aa6dd52571
by Vedant Kumar[LockFileManager] Make default waitForUnlock timeout a parameter, NFC Patch by Xi Ge!
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 | llvm/lib/Support/LockFileManager.cpp |
 | llvm/include/llvm/Support/LockFileManager.h |
Commit
064087581ab98cca7254b4d0f12ecbed13da2692
by mtrofin[NFC][InlineCost] Factor cost modeling out of CallAnalyzer traversal. Summary: The goal is to simplify experimentation on the cost model. Today, CallAnalyzer decides 2 things: legality, and benefit. The refactoring keeps legality assessment in CallAnalyzer, and factors benefit evaluation out, as an extension. Reviewers: davidxl, eraman Reviewed By: davidxl Subscribers: kamleshbhalui, fedor.sergeev, hiraditya, baloghadamsoftware, haicheng, a.sidorin, Szelethus, donat.nagy, dkrupp, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D71733
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 | llvm/lib/Analysis/InlineCost.cpp |
Commit
ca4a55fabbbebef1752fd4e2913c28bb8b510621
by antiagainst[mlir] NFC: put C++ code emission classes in their own files This exposes thse classes so that they can be used in interfaces. Differential Revision: https://reviews.llvm.org/D72514
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 | mlir/lib/TableGen/OpClass.cpp |
 | mlir/include/mlir/TableGen/OpClass.h |
 | mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp |
 | mlir/lib/TableGen/CMakeLists.txt |
Commit
397215cc309df1171a198b11cab3b241db9441db
by antiagainst[mlir][ods] Support dialect specific content emission via hooks Thus far we can only generate the same set of methods even for operations in different dialects. This is problematic for dialects that want to generate additional operation class methods programmatically, e.g., a special builder method or attribute getter method. Apparently we cannot update the OpDefinitionsGen backend every time when such a need arises. So this CL introduces a hook into the OpDefinitionsGen backend to allow dialects to emit additional methods and traits to operation classes. Differential Revision: https://reviews.llvm.org/D72514
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 | mlir/include/mlir/TableGen/ODSDialectHook.h |
 | mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp |
 | mlir/include/mlir/TableGen/Operator.h |
Commit
1b8c84b8dd5a4a294943a6a6f0631d2d3a1f9f27
by richardImprove precision of documentation comment.
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 | clang/include/clang/AST/Decl.h |
Commit
ceb801612a678bdffe7e7bf163bd0eed9c9b73a2
by Jessica Paquette[AArch64] Don't generate libcalls for wide shifts on Darwin Similar to cff90f07cb5cc3. Darwin doesn't always use compiler-rt, and so we can't assume that these functions are available (at least on arm64).
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 | llvm/test/CodeGen/AArch64/shift_minsize.ll |
 | llvm/lib/Target/AArch64/AArch64ISelLowering.cpp |
Commit
f4df7f4701d80ce6a2f5674db50f87fbd2dad82f
by richardRemove redundant implicit cast creation. FindCompositePointerType has already cast the operands to the composite type for us in the case where it succeeds.
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 | clang/lib/Sema/SemaExpr.cpp |
Commit
fbf915f01d46e005146f01553a5d7c6619d19597
by richardAdd a FIXME and corresponding test coverage for some suspicious behavior forming composite ObjC pointer types in comparisons.
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 | clang/test/SemaObjC/arc.m |
 | clang/lib/Sema/SemaExpr.cpp |
 | clang/test/SemaObjCXX/arc-ptr-comparison.mm |
Commit
9a6f4d451ca7aa06b94a407015fbadb456bc09ef
by richardClean up and slightly generalize implementation of composite pointer type computation, in preparation for P0388R4, which adds another few cases here. We now properly handle forming multi-level composite pointer types involving nested Objective-C pointer types (as is consistent with including them as part of the notion of 'similar types' on which this rule is based). We no longer lose non-CVR qualifiers on nested pointer types.
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 | clang/test/SemaObjCXX/composite-objc-pointertype.mm |
 | clang/lib/Sema/SemaExprCXX.cpp |
 | clang/test/SemaOpenCLCXX/address-space-cond.cl |
Commit
44e0daf16e6985eb44ea9a629402852dbff9cb0b
by thakisdriver: Allow -fdebug-compilation-dir=foo in joined form. All 130+ f_Group flags that take an argument allow it after a '=', except for fdebug-complation-dir. Add a Joined<> alias so that it behaves consistently with all the other f_Group flags. (Keep the old Separate flag for backwards compat.)
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 | clang/test/CodeGen/debug-info-compilation-dir.c |
 | clang/test/Driver/clang_f_opts.c |
 | clang/include/clang/Driver/Options.td |
 | clang/test/Driver/cl-options.c |
 | clang/test/Driver/integrated-as.s |
 | clang/test/Driver/fembed-bitcode.c |
 | clang/lib/Driver/ToolChains/Clang.cpp |
Commit
1d2cd2c0b7d978e22a50e918af708ba67e87c2c1
by maskray[Driver] Fix OptionClass of -fconvergent-functions and -fms-volatile (Joined -> Flag)
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 | clang/include/clang/Driver/Options.td |
Commit
9b23407063ca41901e9e272bacf8b33eee8251c4
by saar[Concepts] Fix MarkUsedTemplateParameters for exprs D41910 introduced a recursive visitor to MarkUsedTemplateParameters, but disregarded the 'Depth' parameter, and had incorrect assertions. This fixes the visitor and removes the assertions.
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 | clang/lib/Sema/SemaTemplateDeduction.cpp |
Commit
de0a2247115729eade8249267a47f96f070a7666
by alexandre.ganeaRemove umask tests These tests were added in 18627115f4d2db5dc73207e0b5312f52536be7dd and e08b59f81d950bd5c8b8528fcb3ac4230c7b736c for validating a refactoring. Removing because they break on ACL-controlled folders on Ubuntu, and their added value is low. Differential Revision: https://reviews.llvm.org/D70854
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 | llvm/test/Other/umask.ll |
 | clang/test/Misc/permissions.cpp |
Commit
7c816492197aefbaa2ea3ba0e391f7c6905956bc
by Tom.Tan[COFF] Align ARM64 range extension thunks at instruction boundary RangeExtensionThunkARM64 is created for out-of-range branches on Windows ARM64 because branch instructions has limited bits to encode target address. Currently, RangeExtensionThunkARM64 is appended to its referencing COFF section from object file at link time without any alignment requirement, so if size of the preceding COFF section is not aligned to instruction boundary (4 bytes), RangeExtensionThunkARM64 will emit thunk instructions at unaligned address which is never a valid branch target on ARM64, and usually triggers invalid instruction exception when branching to it. This PR fixes it by requiring such thunks to align at 4 bytes. Differential revision: https://reviews.llvm.org/D72473
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 | lld/test/COFF/arm64-thunks.s |
 | lld/COFF/Chunks.h |
Commit
bb2553175ac3cc6223ff379b266ee1c23a468d66
by craig.topper[TargetLowering][ARM][Mips][WebAssembly] Remove the ordered FP compare from RunttimeLibcalls.def and all associated usages Summary: This always just used the same libcall as unordered, but the comparison predicate was different. This change appears to have been made when targets were given the ability to override the predicates. Before that they were hardcoded into the type legalizer. At that time we never inverted predicates and we handled ugt/ult/uge/ule compares by emitting an unordered check ORed with a ogt/olt/oge/ole checks. So only ordered needed an inverted predicate. Later ugt/ult/uge/ule were optimized to only call a single libcall and invert the compare. This patch removes the ordered entries and just uses the inverting logic that is now present. This removes some odd things in both the Mips and WebAssembly code. Reviewers: efriedma, ABataev, uweigand, cameron.mcinally, kpn Reviewed By: efriedma Subscribers: dschuff, sdardis, sbc100, arichardson, jgravelle-google, kristof.beyls, hiraditya, aheejin, sunfish, atanasyan, Petar.Avramovic, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72536
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 | llvm/include/llvm/IR/RuntimeLibcalls.def |
 | llvm/lib/Target/ARM/ARMISelLowering.cpp |
 | llvm/lib/Target/Mips/Mips16ISelLowering.cpp |
 | llvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp |
 | llvm/lib/CodeGen/TargetLoweringBase.cpp |
 | llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp |
 | llvm/lib/Target/ARM/ARMLegalizerInfo.cpp |
Commit
a701be8f036accef9a3dab62fa4baa70ea330a80
by czhengsz[SCEV] [NFC] add more test cases for range of addrecexpr with nsw flag
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 | llvm/test/Analysis/ScalarEvolution/range_nw_flag.ll |
Commit
4134d706d9bc48d1634e0d95a5c1698f5fcfd06e
by qiucofan[NFC] [PowerPC] Update mi-peephole-splat test Use script to re-generate the test case, for easier comparison with future patches.
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 | llvm/test/CodeGen/PowerPC/mi-peephole-splat.ll |
Commit
4a32cd11acd7c38f5e0b587d724935ab7a9938a6
by mjbedy[AMDGPU] Remove unnecessary v_mov from a register to itself in WQM lowering. Summary: - SI Whole Quad Mode phase is replacing WQM pseudo instructions with v_mov instructions. While this is necessary for the special handling of moving results out of WWM live ranges, it is not necessary for WQM live ranges. The result is a v_mov from a register to itself after every WQM operation. This change uses a COPY psuedo in these cases, which allows the register allocator to coalesce the moves away. Reviewers: tpr, dstuttard, foad, nhaehnle Reviewed By: nhaehnle Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D71386
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 | llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp |
 | llvm/test/CodeGen/AMDGPU/wqm.mir |
 | llvm/test/CodeGen/AMDGPU/wqm.ll |
Commit
695804508db048fe3403f2b8bc690633a471a40b
by Amara EmersonMark the test/Feature/load_extension.ll test as unsupported on Darwin. With plugins and examples enabled, this XPASSes. Mark it as unsupported until the owner investigates what's going on.
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 | llvm/test/Feature/load_extension.ll |
Commit
69806808b918adc9b24bee05654b1d6dad91ef74
by craig.topper[X86] Use ReplaceAllUsesWith instead of ReplaceAllUsesOfValueWith to simplify some code. NFCI
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 | llvm/lib/Target/X86/X86ISelDAGToDAG.cpp |
Commit
fcad5b298c7859d7f10908fab7b82983e286bb8d
by maskray[X86][Disassembler] Simplify readPrefixes
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 | llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp |
Commit
5fe5c0a60f9a5f32da4316ba0d1732a1e439703b
by craig.topper[X86] Preserve fpexcept property when turning strict_fp_extend and strict_fp_round into stack operations. We use the stack for X87 fp_round and for moving from SSE f32/f64 to X87 f64/f80. Or from X87 f64/f80 to SSE f32/f64. Note for the SSE<->X87 conversions the conversion always happens in the X87 domain. The load/store ops in the X87 instructions are able to signal exceptions.
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 | llvm/lib/Target/X86/X86InstrFPStack.td |
 | llvm/lib/Target/X86/X86ISelDAGToDAG.cpp |
Commit
c2ddfa876fa90008f1b4ff611256ad5dd4b36d96
by craig.topper[X86] Simplify code by removing an unreachable condition. NFCI For X87<->SSE conversions, the SSE type is always smaller than the X87 type. So we can always use the smallest type for the memory type.
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 | llvm/lib/Target/X86/X86ISelDAGToDAG.cpp |
Commit
60346bdbd73da9c944d50ea5dcecad71a05105ac
by csiggAdd test for GDB pretty printers. Reviewers: dblaikie, aprantl, davide, JDevlieghere Reviewed By: aprantl Subscribers: jmorse, aprantl, merge_guards_bot, mgorny, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72321
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 | debuginfo-tests/CMakeLists.txt |
 | debuginfo-tests/llvm-prettyprinters/gdb/lit.local.cfg |
 | debuginfo-tests/llvm-prettyprinters/gdb/prettyprinters.cpp |
 | debuginfo-tests/llvm-prettyprinters/gdb/prettyprinters.gdb |
 | debuginfo-tests/lit.cfg.py |
Commit
81a3d987ced0905bef2e3055bf77ec174bb631c7
by craig.topper[X86] Remove dead code from X86DAGToDAGISel::Select that is no longer needed now that we don't mutate strict fp nodes. NFC
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 | llvm/lib/Target/X86/X86ISelDAGToDAG.cpp |
Commit
0e322c8a1f20ab04ce4f6bc538846859707f2d69
by nikita.ppv[InstCombine] Preserve nuw on sub of geps (PR44419) Fix https://bugs.llvm.org/show_bug.cgi?id=44419 by preserving the nuw on sub of geps. We only do this if the offset has a multiplication as the final operation, as we can't be sure the operations is nuw in the other cases without more thorough analysis. Differential Revision: https://reviews.llvm.org/D72048
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 | llvm/lib/Transforms/InstCombine/InstCombineInternal.h |
 | llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp |
 | llvm/test/Transforms/InstCombine/sub-gep.ll |
Commit
ad36d29eaed62e33eabab8ffd2006b9ff5fbd719
by nikita.ppv[LoopSimplify] Regenerate test checks; NFC For D72519.
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 | llvm/test/Transforms/LoopSimplify/basictest.ll |
Commit
142ba7d76af4a66037fd180db371da19f35ef5f3
by nikita.ppv[LoopRotate] Add tests for rotate with switch; NFC For D72420.
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 | llvm/test/Transforms/LoopRotate/switch.ll |
Commit
87407fc03c82d880cc42330a8e230e7a48174e3c
by nunoplopesDSE: fix bug where we would only check libcalls for name rather than whole decl
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 | llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp |
 | llvm/test/Transforms/DeadStoreElimination/libcalls.ll |
 | llvm/test/Transforms/DeadStoreElimination/libcalls2.ll |
Commit
5d069f4314a0d8b124a563e61d161c3c3d3b0536
by flo[X86] Add more complex tests for vector masks used with AND/OR/XOR. Additional test cases for D72524.
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 | llvm/test/CodeGen/X86/v8i1-masks.ll |
Commit
ce35010d782cb5a69102ad7785eb747f6d747eb4
by llvm-dev[X86][AVX] Add lowerShuffleAsLanePermuteAndSHUFP lowering Add initial support for lowering v4f64 shuffles to SHUFPD(VPERM2F128(V1, V2), VPERM2F128(V1, V2)), eventually this could be used for v8f32 (and maybe v8f64/v16f32) but I'm being conservative for the initial implementation as only v4f64 can always succeed. This currently is only called from lowerShuffleAsLanePermuteAndShuffle so only gets used for unary shuffles, and we limit this to cases where we use upper elements as otherwise concating 2 xmm shuffles is probably the better case. Helps with poor shuffles mentioned in D66004.
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 | llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll |
 | llvm/lib/Target/X86/X86ISelLowering.cpp |
 | llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll |
Commit
08275a52d83e623f0347fd9396c18f4d21a15c90
by llvm-devFix copy+paste typo in shuffle test name
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 | llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll |
Commit
9c74fb402e1b7aad4a509a49ab4792154b8ba2c8
by koraq[Sema] Improve -Wrange-loop-analysis warnings. No longer generate a diagnostic when a small trivially copyable type is used without a reference. Before the test looked for a POD type and had no size restriction. Since the range-based for loop is only available in C++11 and POD types are trivially copyable in C++11 it's not required to test for a POD type. Since copying a large object will be expensive its size has been restricted. 64 bytes is a common size of a cache line and if the object is aligned the copy will be cheap. No performance impact testing has been done. Differential Revision: https://reviews.llvm.org/D72212
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 | clang/test/SemaCXX/warn-range-loop-analysis-trivially-copyable.cpp |
 | clang/lib/Sema/SemaStmt.cpp |
 | clang/test/SemaCXX/warn-range-loop-analysis.cpp |
Commit
24763734e7f45e3b60118b28987685d42e7a761f
by llvm-dev[X86] Fix outdated comment The generic saturated math opcodes are no longer widened inside X86TargetLowering
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 | llvm/lib/Target/X86/X86ISelLowering.cpp |
Commit
a8ed86b5c705cf1d2f3ca55b0640cf0f2fe01abc
by llvm-devmoveOperands - assert Src/Dst MachineOperands are non-null. Fixes static-analyzer warnings.
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 | llvm/lib/CodeGen/MachineInstr.cpp |
Commit
7c7ca515837305f5d14033aee1191c254b86063c
by benny.kraRemove copy ctors identical to the default one. NFC. Those do nothing but make the type no longer trivial to the compiler.
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 | mlir/include/mlir/IR/IntegerSet.h |
 | mlir/include/mlir/IR/AffineMap.h |
 | mlir/include/mlir/IR/AffineExpr.h |
Commit
2740b2d5d5f0f56c87024555bdcae4f91e595ddb
by llvm-devFix uninitialized value clang static analyzer warning. NFC.
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 | llvm/lib/Transforms/Utils/CodeExtractor.cpp |
Commit
ded237b58d56299f90ef44853ef79b039248b85e
by llvm-devFix "pointer is null" static analyzer warning. NFCI. Use castAs<> instead of getAs<> since the pointer is dereferenced immediately below and castAs will perform the null assertion for us.
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 | clang/lib/Sema/SemaDecl.cpp |
Commit
16c53ffcb9d040f0396bf1ab42ca366f7e1f1e4d
by llvm-devFix "pointer is null" static analyzer warnings. NFCI. Use castAs<> instead of getAs<> since the pointer is dereferenced immediately below and castAs will perform the null assertion for us.
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 | clang/lib/CodeGen/CGExprScalar.cpp |
 | clang/lib/CodeGen/CGExpr.cpp |
 | clang/lib/CodeGen/CGExprCXX.cpp |
Commit
d87a76c9dae38b2a1ef63584aee82e74490dc83b
by llvm-devFix "pointer is null" static analyzer warning. NFCI. Use castAs<> instead of getAs<> since the pointer is dereferenced immediately within mangleCallingConvention and castAs will perform the null assertion for us.
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 | clang/lib/AST/MicrosoftMangle.cpp |
Commit
93431f96a7b14ff03036bae77cc0197fdc98ad52
by llvm-devFix "pointer is null" static analyzer warning. NFCI. Use cast<> instead of dyn_cast<> since we know that the pointer should be valid (and is dereferenced immediately).
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 | clang/lib/CodeGen/CGStmtOpenMP.cpp |
Commit
bf03944d5d9a7e7c8105c69dfa0d7e0d345644df
by llvm-devFix "pointer is null" static analyzer warnings. NFCI. Use castAs<> instead of getAs<> since the pointers are dereferenced immediately and castAs will perform the null assertion for us.
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 | clang/lib/Sema/SemaCodeComplete.cpp |
Commit
fce887beb79780d0e0b19e8ab6176978a3dce9b8
by llvm-devGlobalModuleIndex - Fix use-after-move clang static analyzer warning. Shadow variable names meant we were referencing the Buffer input argument, not the GlobalModuleIndex member that its std::move()'d it.
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 | clang/lib/Serialization/GlobalModuleIndex.cpp |
Commit
6cb3957730e9085bb7c37d871c790f910efdd6a7
by listmail[X86AsmBackend] Be consistent about placing definitions out of line [NFC]
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 | llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp |
Commit
563d3e344452c8923db09b043b8db471fc413b1e
by listmail[X86AsmBackend] Move static function before sole use [NFC]
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 | llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp |
Commit
1d641daf260308815d014d1bf1b424a1ed1e7277
by listmail[X86] Adjust nop emission by compiler to consider target decode limitations The primary motivation of this change is to bring the code more closely in sync behavior wise with the assembler's version of nop emission. I'd like to eventually factor them into one, but that's hard to do when one has features the other doesn't. The longest encodeable nop on x86 is 15 bytes, but many processors - for instance all intel chips - can't decode the 15 byte form efficiently. On those processors, it's better to use either a 10 byte or 11 byte sequence depending.
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 | llvm/test/MC/X86/stackmap-nops.ll |
 | llvm/test/CodeGen/X86/stackmap-nops.ll |
 | llvm/lib/Target/X86/X86MCInstLower.cpp |
 | llvm/test/CodeGen/X86/align-branch-boundary-suppressions.ll |
Commit
2bdf33cc4c733342fc83081bc7410ac5e9a24f55
by riverriddle[mlir] NFC: Remove Value::operator* and Value::operator-> now that Value is properly value-typed. Summary: These were temporary methods used to simplify the transition. Reviewed By: antiagainst Differential Revision: https://reviews.llvm.org/D72548
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 | mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td |
 | mlir/lib/Transforms/Vectorize.cpp |
 | mlir/lib/Dialect/LoopOps/LoopOps.cpp |
 | mlir/lib/Analysis/Utils.cpp |
 | mlir/lib/Transforms/Utils/Utils.cpp |
 | mlir/examples/toy/Ch7/mlir/ToyCombine.td |
 | mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp |
 | mlir/lib/IR/Block.cpp |
 | mlir/lib/IR/Operation.cpp |
 | mlir/lib/Transforms/AffineLoopInvariantCodeMotion.cpp |
 | mlir/lib/Transforms/Utils/LoopFusionUtils.cpp |
 | mlir/lib/IR/Function.cpp |
 | mlir/lib/Quantizer/Support/ConstraintAnalysisGraph.cpp |
 | mlir/lib/Dialect/GPU/Transforms/KernelOutlining.cpp |
 | mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp |
 | mlir/examples/toy/Ch6/mlir/ToyCombine.td |
 | mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td |
 | mlir/lib/Conversion/LoopsToGPU/LoopsToGPU.cpp |
 | mlir/lib/Dialect/QuantOps/Transforms/ConvertConst.cpp |
 | mlir/include/mlir/EDSC/Builders.h |
 | mlir/lib/Analysis/AffineStructures.cpp |
 | mlir/test/lib/Transforms/TestVectorizationUtils.cpp |
 | mlir/test/lib/TestDialect/TestPatterns.cpp |
 | mlir/include/mlir/EDSC/Intrinsics.h |
 | mlir/lib/Conversion/StandardToLLVM/ConvertStandardToLLVM.cpp |
 | mlir/lib/IR/Region.cpp |
 | mlir/test/lib/TestDialect/TestOps.td |
 | mlir/lib/Analysis/LoopAnalysis.cpp |
 | mlir/examples/toy/Ch2/mlir/Dialect.cpp |
 | mlir/lib/Transforms/Utils/GreedyPatternRewriteDriver.cpp |
 | mlir/test/mlir-tblgen/op-result.td |
 | mlir/include/mlir/IR/Matchers.h |
 | mlir/include/mlir/IR/Value.h |
 | mlir/lib/IR/TypeUtilities.cpp |
 | mlir/include/mlir/Dialect/Linalg/Utils/Utils.h |
 | mlir/lib/Dialect/SPIRV/SPIRVOps.cpp |
 | mlir/include/mlir/Dialect/Linalg/Transforms/LinalgTransformPatterns.td |
 | mlir/lib/Dialect/FxpMathOps/Transforms/LowerUniformRealMath.cpp |
 | mlir/lib/IR/Value.cpp |
 | mlir/lib/Parser/Parser.cpp |
 | mlir/lib/Dialect/Linalg/Transforms/Promotion.cpp |
 | mlir/lib/Quantizer/Configurations/FxpMathConfig.cpp |
 | mlir/lib/Conversion/GPUCommon/OpToFuncCallLowering.h |
 | mlir/lib/Dialect/SPIRV/SPIRVDialect.cpp |
 | mlir/examples/toy/Ch4/mlir/ToyCombine.td |
 | mlir/lib/Dialect/Linalg/Utils/Utils.cpp |
 | mlir/examples/toy/Ch7/mlir/ToyCombine.cpp |
 | mlir/include/mlir/IR/OpDefinition.h |
 | mlir/examples/toy/Ch7/mlir/Dialect.cpp |
 | mlir/examples/toy/Ch5/mlir/ToyCombine.cpp |
 | mlir/include/mlir/Analysis/Dominance.h |
 | mlir/examples/toy/Ch4/mlir/ToyCombine.cpp |
 | mlir/lib/Dialect/VectorOps/VectorOps.cpp |
 | mlir/lib/Analysis/AffineAnalysis.cpp |
 | mlir/lib/Dialect/QuantOps/IR/QuantOps.cpp |
 | mlir/lib/Dialect/Linalg/Transforms/Tiling.cpp |
 | mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp |
 | mlir/examples/toy/Ch6/mlir/Dialect.cpp |
 | mlir/test/mlir-tblgen/predicate.td |
 | mlir/examples/toy/Ch3/mlir/ToyCombine.td |
 | mlir/include/mlir/IR/OpImplementation.h |
 | mlir/lib/Transforms/LoopFusion.cpp |
 | mlir/lib/Transforms/Utils/InliningUtils.cpp |
 | mlir/examples/toy/Ch3/mlir/ToyCombine.cpp |
 | mlir/lib/Transforms/LoopInvariantCodeMotion.cpp |
 | mlir/docs/OpDefinitions.md |
 | mlir/docs/DeclarativeRewrites.md |
 | mlir/examples/toy/Ch6/mlir/ToyCombine.cpp |
 | mlir/include/mlir/Dialect/VectorOps/VectorTransformPatterns.td |
 | mlir/lib/Transforms/Utils/LoopUtils.cpp |
 | mlir/lib/Transforms/LoopTiling.cpp |
 | mlir/lib/Dialect/FxpMathOps/Transforms/UniformKernelUtils.h |
 | mlir/lib/Dialect/SPIRV/Transforms/DecorateSPIRVCompositeTypeLayoutPass.cpp |
 | mlir/tools/mlir-tblgen/RewriterGen.cpp |
 | mlir/lib/Conversion/GPUToSPIRV/ConvertGPUToSPIRV.cpp |
 | mlir/lib/Analysis/Liveness.cpp |
 | mlir/lib/Dialect/StandardOps/Ops.cpp |
 | mlir/lib/IR/PatternMatch.cpp |
 | mlir/include/mlir/Dialect/VectorOps/VectorOps.td |
 | mlir/lib/Transforms/PipelineDataTransfer.cpp |
 | mlir/tools/mlir-tblgen/LLVMIRConversionGen.cpp |
 | mlir/lib/Analysis/Verifier.cpp |
 | mlir/include/mlir/Dialect/AffineOps/AffineOps.td |
 | mlir/lib/EDSC/Builders.cpp |
 | mlir/include/mlir/Dialect/Linalg/IR/LinalgTraits.h |
 | mlir/examples/toy/Ch3/mlir/Dialect.cpp |
 | mlir/include/mlir/Transforms/RegionUtils.h |
 | mlir/lib/Dialect/AffineOps/AffineOps.cpp |
 | mlir/lib/IR/AsmPrinter.cpp |
 | mlir/lib/Dialect/Linalg/Analysis/DependenceAnalysis.cpp |
 | mlir/include/mlir/Dialect/QuantOps/QuantOps.td |
 | mlir/lib/Dialect/VectorOps/VectorTransforms.cpp |
 | mlir/examples/toy/Ch4/mlir/Dialect.cpp |
 | mlir/lib/Analysis/SliceAnalysis.cpp |
 | mlir/lib/Dialect/SPIRV/Serialization/Serializer.cpp |
 | mlir/lib/Conversion/StandardToSPIRV/ConvertStandardToSPIRV.cpp |
 | mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp |
 | mlir/include/mlir/Dialect/StandardOps/Ops.h |
 | mlir/lib/Quantizer/Transforms/AddDefaultStatsTestPass.cpp |
 | mlir/docs/Tutorials/Toy/Ch-4.md |
 | mlir/lib/Transforms/LoopUnrollAndJam.cpp |
 | mlir/lib/IR/Builders.cpp |
 | mlir/include/mlir/Quantizer/Support/ConstraintAnalysisGraph.h |
 | mlir/lib/Dialect/Linalg/EDSC/Builders.cpp |
 | mlir/lib/Analysis/CallGraph.cpp |
 | mlir/lib/Dialect/GPU/IR/GPUDialect.cpp |
 | mlir/lib/Dialect/SPIRV/Serialization/Deserializer.cpp |
 | mlir/lib/Transforms/Utils/FoldUtils.cpp |
 | mlir/examples/toy/Ch5/mlir/Dialect.cpp |
 | mlir/lib/Dialect/Traits.cpp |
 | mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td |
 | mlir/include/mlir/IR/Operation.h |
 | mlir/lib/Dialect/Linalg/Transforms/LinalgTransforms.cpp |
 | mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp |
 | mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp |
 | mlir/docs/QuickstartRewrites.md |
 | mlir/lib/Conversion/StandardToSPIRV/LegalizeStandardForSPIRV.cpp |
 | mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp |
 | mlir/lib/Transforms/MemRefDataFlowOpt.cpp |
 | mlir/test/lib/Transforms/TestMemRefStrideCalculation.cpp |
 | mlir/lib/Transforms/Utils/RegionUtils.cpp |
 | mlir/lib/Target/LLVMIR/ModuleTranslation.cpp |
 | mlir/include/mlir/Dialect/AffineOps/AffineOps.h |
 | mlir/examples/toy/Ch5/mlir/ToyCombine.td |
 | mlir/include/mlir/Dialect/StandardOps/Ops.td |
 | mlir/lib/EDSC/Helpers.cpp |
 | mlir/lib/Quantizer/Transforms/InferQuantizedTypesPass.cpp |
 | mlir/examples/toy/Ch7/mlir/MLIRGen.cpp |
 | mlir/lib/Conversion/GPUToCUDA/ConvertLaunchFuncToCudaCalls.cpp |
 | mlir/test/lib/Transforms/TestInlining.cpp |
 | mlir/lib/Conversion/LinalgToLLVM/LinalgToLLVM.cpp |
 | mlir/test/lib/TestDialect/TestDialect.cpp |
 | mlir/lib/Analysis/VectorAnalysis.cpp |
 | mlir/include/mlir/IR/OpBase.td |
 | mlir/lib/Analysis/Dominance.cpp |
 | mlir/docs/Tutorials/Toy/Ch-3.md |
 | mlir/include/mlir/Dialect/Linalg/EDSC/Builders.h |
 | mlir/lib/Transforms/DialectConversion.cpp |
Commit
4c48ea68e491cb42f1b5d43ffba89f6a7f0dadc4
by development[ASTMatchers] extract public matchers from const-analysis into own patch Summary: The analysis for const-ness of local variables required a view generally useful matchers that are extracted into its own patch. They are `decompositionDecl` and `forEachArgumentWithParamType`, that works for calls through function pointers as well. Reviewers: aaron.ballman Reviewed By: aaron.ballman Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D72505
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 | clang/docs/LibASTMatchersReference.html |
 | clang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp |
 | clang/include/clang/ASTMatchers/ASTMatchers.h |
 | clang/lib/ASTMatchers/Dynamic/Registry.cpp |
Commit
23a799adf0abbe9a7be1494d5efd1ab3215ee4fb
by developmentRevert "[ASTMatchers] extract public matchers from const-analysis into own patch" This reverts commit 4c48ea68e491cb42f1b5d43ffba89f6a7f0dadc4. The powerpc buildbots had an internal compiler error after this patch. This requires some inspection.
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 | clang/include/clang/ASTMatchers/ASTMatchers.h |
 | clang/lib/ASTMatchers/Dynamic/Registry.cpp |
 | clang/docs/LibASTMatchersReference.html |
 | clang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp |
Commit
d2751f8fdf6c072045bab62f6035511e028f46ee
by Lang Hames[ExecutionEngine] Re-enable FastISel for non-iOS arm targets. Patch by Nicolas Capens. Thanks Nicolas! https://reviews.llvm.org/D65015
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 | llvm/lib/ExecutionEngine/TargetSelect.cpp |
Commit
dc422e968e73790178e500f506e8fb7cfa1e62ea
by koraqAdd -Wrange-loop-analysis changes to ReleaseNotes This reflects the recent changes done.
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 | clang/docs/ReleaseNotes.rst |
Commit
9cc9120969fd9f7f6a99321c7d94133a32927a3a
by craig.topper[X86] Turn FP_ROUND/STRICT_FP_ROUND into X86ISD::VFPROUND/STRICT_VFPROUND during PreprocessISelDAG to remove some duplicate isel patterns.
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 | llvm/lib/Target/X86/X86InstrAVX512.td |
 | llvm/lib/Target/X86/X86InstrSSE.td |
 | llvm/lib/Target/X86/X86ISelDAGToDAG.cpp |
Commit
a5994c789a2982a770254ae1607b5b4cb641f73c
by maskray[X86][Disassembler] Simplify and optimize reader functions llvm-objdump -d on clang is decreased from 8.2s to 7.8s.
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 | llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp |
 | llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h |
 | llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp |
Commit
9fe6f36c1a909e381275f897b780a9c878fab94a
by craig.topper[LegalizeVectorOps] Only pass SDNode* instead SDValue to all of the Expand* and Promote* methods. All the Expand* and Promote* function assume they are being called with result 0 anyway. Just hardcode result 0 into them.
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 | llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp |
Commit
5a9954c02a7d6e60da26b2feec0837695846aeed
by craig.topper[LegalizeVectorOps] Remove some of the simpler Expand methods. Pass Results vector to a couple. NFCI Some of the simplest handlers just call TLI and if that fails, they fall back to unrolling. For those just inline the TLI call and share the unrolling call with the default case of Expand. For ExpandFSUB and ExpandBITREVERSE so that its obvious they don't return results sometimes and want to defer to LegalizeDAG.
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 | llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp |
Commit
179abb091d8a1d67115d21b54001d10250756042
by maskray[X86][Disassembler] Replace custom logger with LLVM_DEBUG llvm-objdump -d on clang is decreased from 7.8s to 7.4s. The improvement is likely due to the elimination of logger setup and dbgprintf(), which has a large overhead.
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 | llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp |
 | llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp |
 | llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h |
Commit
a1f16998f371870ca4da8b3c00a093c607a36ddd
by alexandre.ganea[Support] Optionally call signal handlers when a function wrapped by the the CrashRecoveryContext fails This patch allows for handling a failure inside a CrashRecoveryContext in the same way as the global exception/signal handler. A failure will have the same side-effect, such as cleanup of temporarty file, printing callstack, calling relevant signal handlers, and finally returning an exception code. This is an optional feature, disabled by default. This is a support patch for D69825. Differential Revision: https://reviews.llvm.org/D70568
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 | llvm/lib/Support/CrashRecoveryContext.cpp |
 | llvm/include/llvm/Support/CrashRecoveryContext.h |
 | llvm/include/llvm/Support/Signals.h |
 | llvm/lib/Support/Windows/Signals.inc |
 | llvm/lib/Support/Unix/Signals.inc |
 | llvm/unittests/Support/CrashRecoveryTest.cpp |
Commit
2cdb18afda841392002feafda21af31854c195b3
by Lang Hames[ORC] Fix argv handling in runAsMain / lli. This fixes an off-by-one error in the argc value computed by runAsMain, and switches lli back to using the input bitcode (rather than the string "lli") as the effective program name. Thanks to Stefan Graenitz for spotting the bug.
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 | llvm/tools/lli/lli.cpp |
 | llvm/test/ExecutionEngine/OrcLazy/printargv.ll |
 | llvm/lib/ExecutionEngine/Orc/ExecutionUtils.cpp |
Commit
6fdd6a7b3f696972edc244488f59532d05136a27
by maskray[Disassembler] Delete the VStream parameter of MCDisassembler::getInstruction() The argument is llvm::null() everywhere except llvm::errs() in llvm-objdump in -DLLVM_ENABLE_ASSERTIONS=On builds. It is used by no target but X86 in -DLLVM_ENABLE_ASSERTIONS=On builds. If we ever have the needs to add verbose log to disassemblers, we can record log with a member function, instead of passing it around as an argument.
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 | llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp |
 | llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldChecker.cpp |
 | llvm/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp |
 | llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp |
 | llvm/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp |
 | llvm/tools/llvm-objdump/llvm-objdump.cpp |
 | lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp |
 | lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp |
 | llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.h |
 | llvm/lib/Target/BPF/Disassembler/BPFDisassembler.cpp |
 | llvm/lib/Target/MSP430/Disassembler/MSP430Disassembler.cpp |
 | llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp |
 | llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp |
 | llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp |
 | llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp |
 | llvm/lib/MC/MCDisassembler/MCDisassembler.cpp |
 | llvm/tools/llvm-objdump/MachODump.cpp |
 | llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp |
 | llvm/lib/Target/Lanai/Disassembler/LanaiDisassembler.cpp |
 | llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp |
 | llvm/tools/sancov/sancov.cpp |
 | llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h |
 | llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp |
 | llvm/tools/llvm-exegesis/lib/Analysis.cpp |
 | llvm/lib/Target/AVR/Disassembler/AVRDisassembler.cpp |
 | llvm/lib/MC/MCDisassembler/Disassembler.cpp |
 | llvm/tools/llvm-mc/Disassembler.cpp |
 | llvm/include/llvm/MC/MCDisassembler/MCDisassembler.h |
 | llvm/tools/llvm-cfi-verify/lib/FileAnalysis.cpp |
 | llvm/lib/Target/Lanai/Disassembler/LanaiDisassembler.h |
 | llvm/lib/Target/ARC/Disassembler/ARCDisassembler.cpp |
 | lldb/source/Plugins/Disassembler/llvm/DisassemblerLLVMC.cpp |
 | llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp |
Commit
1e8ce7492e91aa6db269334d12187c7ae854dccb
by maskray[X86][Disassembler] Optimize argument passing and immediate reading
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 | llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp |
 | llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp |
 | llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h |
Commit
f719c540bb09cb5bfe37bc6283ea68e31949b3f4
by maskray[X86][Disassembler] Shrink X86GenDisassemblerTables.inc from 36M to 6.1M In x86Disassembler{OneByte,TwoByte,...}Codes, "/* EmptyTable */" is very common. Omitting it saves lots of space. Also, there is no need to display a table entry in multiple lines. It is also common that the whole OpcodeDecision is { MODRM_ONEENTRY, 0}. Make use of zero-initialization.
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 | llvm/utils/TableGen/X86DisassemblerTables.cpp |
Commit
ddfcd82bdc219dd2dc04d6826c417cea3da65d12
by craig.topper[LegalizeVectorOps] Expand vector MERGE_VALUES immediately. Custom legalization can produce MERGE_VALUES to return multiple results. We can expand them immediately instead of leaving them around for DAG combine to clean up.
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 | llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp |
Commit
ed679804d5e34dcb1046c5087acaf5d1dbb9b582
by craig.topper[TargetLowering][X86] Connect the chain from STRICT_FSETCC in TargetLowering::expandFP_TO_UINT and X86TargetLowering::FP_TO_INTHelper.
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 | llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp |
 | llvm/lib/Target/X86/X86ISelLowering.cpp |
Commit
efb674ac2f2b0f06adc3f00df3134dadf1c875df
by craig.topper[LegalizeVectorOps] Parallelize the lo/hi part of STRICT_UINT_TO_FLOAT legalization. The lo and hi computation are independent. Give them the same input chain and TokenFactor the results together.
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 | llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp |
Commit
569ccfc384a5434c35c09adba8c44c46014297e6
by czhengsz[SCEV] more accurate range for addrecexpr with nsw flag. Reviewed By: nikic Differential Revision: https://reviews.llvm.org/D72436
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 | llvm/test/Analysis/ScalarEvolution/range_nw_flag.ll |
 | llvm/lib/Analysis/ScalarEvolution.cpp |
Commit
d692f0f6c8c12316d559b9a638a2cb9fbd0c263d
by craig.topper[X86] Don't call LowerSETCC from LowerSELECT for STRICT_FSETCC/STRICT_FSETCCS nodes. This causes the STRICT_FSETCC/STRICT_FSETCCS nodes to lowered early while lowering SELECT, but the output chain doesn't get connected. Then we visit the node again when it is its turn because we haven't replaced the use of the chain result. In the case of the fp128 libcall lowering, after D72341 this will cause the libcall to be emitted twice.
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 | llvm/lib/Target/X86/X86ISelLowering.cpp |
Commit
f33fd43a7c91f1774a9512bbdb78c367cd23d233
by qiucofan[NFC] Refactor memory ops cluster method Current implementation of BaseMemOpsClusterMutation is a little bit obscure. This patch directly uses a map from store chain ID to set of memory instrs to make it simpler, so that future improvements are easier to read, update and review. Reviewed By: evandro Differential Revision: https://reviews.llvm.org/D72070
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 | llvm/lib/CodeGen/MachineScheduler.cpp |
Commit
c5b94ea265133a4a28006929643155fc8fbeafe6
by maskray[profile] Support merge pool size >= 10 The executable acquires an advisory record lock (`fcntl(fd, F_SETLKW, *)`) on a profile file. Merge pool size >= 10 may be beneficial when the concurrency is large. Also fix a small problem about snprintf. It can cause the filename to be truncated after %m. Reviewed By: davidxl Differential Revision: https://reviews.llvm.org/D71970
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 | compiler-rt/lib/profile/InstrProfilingFile.c |
 | compiler-rt/test/profile/instrprof-basic.c |
Commit
51c1d7c4bec025f70679284060b82c05242759b2
by maskray[X86][Disassembler] Simplify
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 | llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp |
 | llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp |
 | llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h |
Commit
60cc095ecc34d72a9ac6947f39c6e2a0cdf5449f
by maskray[X86][Disassembler] Merge X86DisassemblerDecoder.cpp into X86Disassembler.cpp and refactor
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 | llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp |
 | llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp |
 | llvm/utils/gn/secondary/llvm/lib/Target/X86/Disassembler/BUILD.gn |
 | llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h |
 | llvm/lib/Target/X86/Disassembler/CMakeLists.txt |
Commit
b375f28b0ec1129a4b94770a9c55ba49222ea1dd
by llvm-dev[X86][AVX] lowerShuffleAsLanePermuteAndSHUFP - only set the demanded elements of the lane mask. Fixes an cyclic dependency issue with an upcoming patch where getVectorShuffle canonicalizes masks with splat build vector sources.
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 | llvm/lib/Target/X86/X86ISelLowering.cpp |