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Changes

Summary

  1. Add `bugprone-reserved-identifier` (details)
  2. [gn build] Port 42a0355816d (details)
  3. [SelectionDAG] ComputeKnownBits - assert we're computing the 0'th (details)
  4. [X86] Split X87/SSE compare classes into WriteFCom + WriteFComX (details)
  5. [clang-tidy] Disable Checks on If constexpr statements in template (details)
  6. Fix a compile error to get bots back to green. (details)
  7. Another speculative fix for the Windows bots. (details)
  8. [Hexagon] Add prev65 subtarget feature (details)
  9. [Hexagon] Improve HVX version checks (details)
  10. [x86] try harder to form 256-bit unpck* (details)
Commit 42a0355816d3bc125d59cbd07052c8886e78ca86 by aaron
Add `bugprone-reserved-identifier`
This patch adds bugprone-reserved-identifier, which flags uses of
__names _Like
::_this, which are reserved for the implementation. The check can
optionally be inverted, i.e. configured to flag any names that are _not_
reserved, which may be useful for e.g. standard library implementors.
The file was addedclang-tools-extra/docs/clang-tidy/checks/cert-dcl37-c.rst
The file was modifiedclang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
The file was addedclang-tools-extra/test/clang-tidy/checkers/bugprone-reserved-identifier-invert.cpp
The file was addedclang-tools-extra/docs/clang-tidy/checks/cert-dcl51-cpp.rst
The file was addedclang-tools-extra/test/clang-tidy/checkers/Inputs/bugprone-reserved-identifier/user-header.h
The file was addedclang-tools-extra/test/clang-tidy/checkers/bugprone-reserved-identifier-c.c
The file was modifiedclang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
The file was modifiedclang-tools-extra/clang-tidy/cert/CERTTidyModule.cpp
The file was addedclang-tools-extra/test/clang-tidy/checkers/bugprone-reserved-identifier.cpp
The file was addedclang-tools-extra/test/clang-tidy/checkers/Inputs/bugprone-reserved-identifier/system/system-header.h
The file was addedclang-tools-extra/clang-tidy/bugprone/ReservedIdentifierCheck.cpp
The file was addedclang-tools-extra/clang-tidy/bugprone/ReservedIdentifierCheck.h
The file was modifiedclang-tools-extra/docs/ReleaseNotes.rst
The file was addedclang-tools-extra/docs/clang-tidy/checks/bugprone-reserved-identifier.rst
Commit 73db4f6f11f0012a6bca0431b84eaa3afb9364c9 by llvmgnsyncbot
[gn build] Port 42a0355816d
The file was modifiedllvm/utils/gn/secondary/clang-tools-extra/clang-tidy/bugprone/BUILD.gn
Commit 1dc2f257903d3fcb323425eefb5d9b57a0cbdd96 by llvm-dev
[SelectionDAG] ComputeKnownBits - assert we're computing the 0'th
(difference) result for the SUB/SUBC cases
Matches what we already do for the ADD/ADDC/ADDE case.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Commit 8eb4d25a0943bce6e8a4859825dce4f67a4f6384 by llvm-dev
[X86] Split X87/SSE compare classes into WriteFCom + WriteFComX
Most X87 compare instructions write to the X87 status word, while the
SSE (U)COMI compares write to rFLAGS. These are often handled very
differently on CPUs (e.g. rFLAGS outputs typically involve a fpu2gpr
transfer), and we shouldn't be grouping all these instructions behind a
single class - so this patch splits off the SSE compares into a new
WriteFComX class (and currently keeps the same behaviours). If there's a
need to distinguish between X87 instructions more closely we can
investigate that in the future, but as we don't handle any of the X87
side effects at the moment its unlikely to have any notable effect.
The file was modifiedllvm/lib/Target/X86/X86SchedBroadwell.td
The file was modifiedllvm/lib/Target/X86/X86Schedule.td
The file was modifiedllvm/lib/Target/X86/X86SchedSkylakeClient.td
The file was modifiedllvm/lib/Target/X86/X86SchedSandyBridge.td
The file was modifiedllvm/lib/Target/X86/X86SchedSkylakeServer.td
The file was modifiedllvm/lib/Target/X86/X86ScheduleZnver2.td
The file was modifiedllvm/lib/Target/X86/X86SchedHaswell.td
The file was modifiedllvm/lib/Target/X86/X86InstrSSE.td
The file was modifiedllvm/lib/Target/X86/X86ScheduleBdVer2.td
The file was modifiedllvm/lib/Target/X86/X86ScheduleBtVer2.td
The file was modifiedllvm/lib/Target/X86/X86ScheduleAtom.td
The file was modifiedllvm/lib/Target/X86/X86ScheduleZnver1.td
The file was modifiedllvm/lib/Target/X86/X86InstrAVX512.td
The file was modifiedllvm/lib/Target/X86/X86ScheduleSLM.td
Commit f9c46229e4ac29053747c96e08c574c6c48d544b by nathan
[clang-tidy] Disable Checks on If constexpr statements in template
Instantiations for BugproneBranchClone and
ReadabilityBracesAroundStatements
Summary: fixes [[ https://bugs.llvm.org/show_bug.cgi?id=32203 |
readability-braces-around-statements broken for if constexpr]] and [[
https://bugs.llvm.org/show_bug.cgi?id=44229 | bugprone-branch-clone
false positive with template functions and constexpr ]] by disabling the
relevant checks on if constexpr statements while inside an instantiated
template. This is due to how the else branch of an if constexpr
statement is folded away to a null statement if the condition evaluates
to false
Reviewers: alexfh, hokein, aaron.ballman, xazax.hun
Reviewed By: aaron.ballman, xazax.hun
Subscribers: rnkovacs, JonasToth, Jim, lebedev.ri, xazax.hun,
cfe-commits
Tags: #clang-tools-extra, #clang
Differential Revision: https://reviews.llvm.org/D71980
The file was modifiedclang-tools-extra/clang-tidy/readability/BracesAroundStatementsCheck.cpp
The file was addedclang-tools-extra/test/clang-tidy/checkers/bugprone-branch-clone-if-constexpr-template.cpp
The file was addedclang-tools-extra/test/clang-tidy/checkers/readability-braces-around-statements-constexpr-if-templates.cpp
The file was modifiedclang-tools-extra/clang-tidy/bugprone/BranchCloneCheck.cpp
Commit bcda877b43093459dc52747d35abe0019f8e22e0 by aaron
Fix a compile error to get bots back to green.
Fixes
http://lab.llvm.org:8011/builders/clang-x64-windows-msvc/builds/13716
The file was modifiedclang-tools-extra/clang-tidy/bugprone/ReservedIdentifierCheck.cpp
Commit 7f4e744b90ec7a5cd8067cac7032ef36607aa4b8 by aaron
Another speculative fix for the Windows bots.
Hopefully fixes: http://45.33.8.238/win/6040/step_4.txt
The file was modifiedclang-tools-extra/clang-tidy/bugprone/ReservedIdentifierCheck.cpp
Commit 60aed6a4e5d936b87f5bed0c983be0bab55b1355 by kparzysz
[Hexagon] Add prev65 subtarget feature
There was a change to trap1 instruction between v62 and v65. This 
feature will allow the assembler/disassembler to handle different 
variants depending on the CPU version.
The file was modifiedllvm/test/MC/Hexagon/J2_trap1_dep.s
The file was modifiedllvm/lib/Target/Hexagon/HexagonSubtarget.h
The file was modifiedllvm/lib/Target/Hexagon/Hexagon.td
The file was modifiedllvm/lib/Target/Hexagon/HexagonDepInstrInfo.td
Commit 2d5bfc6eb15f28d87347aca95f05dfb25318d013 by kparzysz
[Hexagon] Improve HVX version checks
The file was modifiedllvm/lib/Target/Hexagon/Hexagon.td
The file was modifiedllvm/lib/Target/Hexagon/HexagonSubtarget.h
Commit 43f60e614a3d30e1ae805996d93b1b433a39cf9d by spatel
[x86] try harder to form 256-bit unpck*
This is another part of a problem noted in PR42024: 
https://bugs.llvm.org/show_bug.cgi?id=42024
The AVX2 code may use awkward 256-bit shuffles vs. the AVX code that
gets split into the expected 128-bit unpack instructions. We have to be
selective in matching the types where we try to do this though.
Otherwise, we can end up with more instructions (in the case of
v8x32/v4x64).
Differential Revision: https://reviews.llvm.org/D72575
The file was modifiedllvm/test/CodeGen/X86/vector-interleave.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.h
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-256-v8.ll