Changes

phab doc: Replace or remove references to svn

AMDGPU/GlobalISel: Widen 16-bit shift amount sources
This should be legal, but will require future selection work. 16-bit 
shift amounts were already removed from being legal, but this didn't 
adjust the transformation rules.

AMDGPU/GlobalISel: Fix argument lowering for vectors of pointers
When these arguments are broken down by the EVT based callbacks, the 
pointer information is lost. Hack around this by coercing the register 
types to be the expected pointer element type when building the remerge
operations.

GlobalISel: Don't assert on MoreElements creating vectors
If the original type was a scalar, it should be valid to add elements to
turn it into a vector.
Tests included with following legalization change.

TableGen/GlobalISel: Address fixme
Don't call computeAvailableFunctionFeatures for every instruction.

GlobalISel: Move getLLTForMVT/getMVTForLLT
As an intermediate step, some TLI functions can be converted to using 
LLT instead of MVT. Move this somewhere out of GlobalISel so DAG 
functions can use these.

Add gdb pretty printer for MutableArrayRef, remove ConstArrayRef.
Reviewers: dblaikie
Reviewed By: dblaikie
Subscribers: merge_guards_bot, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72136

Add builtins for aligning and checking alignment of pointers and
integers
This change introduces three new builtins (which work on both pointers 
and integers) that can be used instead of common bitwise arithmetic:
__builtin_align_up(x, alignment), __builtin_align_down(x, alignment) and
__builtin_is_aligned(x, alignment).
I originally added these builtins to the CHERI fork of LLVM a few years
ago to handle the slightly different C semantics that we use for CHERI
[1]. Until recently these builtins (or sequences of other builtins) were 
required to generate correct code. I have since made changes to the
default C semantics so that they are no longer strictly necessary (but
using them does generate slightly more efficient code). However, based
on our experience using them in various projects over the past few
years, I believe that adding these builtins to clang would be useful.
These builtins have the following benefit over bit-manipulation and
casts via uintptr_t:
- The named builtins clearly convey the semantics of the operation.
While
 checking alignment using __builtin_is_aligned(x, 16) versus
 ((x & 15) == 0) is probably not a huge win in readably, I personally
find
 __builtin_align_up(x, N) a lot easier to read than (x+(N-1))&~(N-1).
- They preserve the type of the argument (including const qualifiers).
When
 using casts via uintptr_t, it is easy to cast to the wrong type or
strip
 qualifiers such as const.
- If the alignment argument is a constant value, clang can check that it
is
 a power-of-two and within the range of the type. Since the semantics of
 these builtins is well defined compared to arbitrary bit-manipulation,
 it is possible to add a UBSAN checker that the run-time value is a
valid
 power-of-two. I intend to add this as a follow-up to this change.
- The builtins avoids int-to-pointer casts both in C and LLVM IR.
 In the future (i.e. once most optimizations handle it), we could use
the new
 llvm.ptrmask intrinsic to avoid the ptrtoint instruction that would
normally
 be generated.
- They can be used to round up/down to the next aligned value for both
 integers and pointers without requiring two separate macros.
- In many projects the alignment operations are already wrapped in
macros (e.g.
 roundup2 and rounddown2 in FreeBSD), so by replacing the macro
implementation
 with a builtin call, we get improved diagnostics for many call-sites
while
 only having to change a few lines.
- Finally, the builtins also emit assume_aligned metadata when used on
pointers.
 This can improve code generation compared to the uintptr_t casts.
[1] In our CHERI compiler we have compilation mode where all pointers
are implemented as capabilities (essentially unforgeable 128-bit fat
pointers). In our original model, casts from uintptr_t (which is a
128-bit capability) to an integer value returned the "offset" of the
capability (i.e. the difference between the virtual address and the base
of the allocation). This causes problems for cases such as checking the
alignment: for example, the expression `if ((uintptr_t)ptr & 63) == 0`
is generally used to check if the pointer is aligned to a multiple of 64
bytes. The problem with offsets is that any pointer to the beginning of
an allocation will have an offset of zero, so this check always succeeds
in that case (even if the address is not correctly aligned). The same
issues also exist when aligning up or down. Using the alignment builtins
ensures that the address is used instead of the offset. While I have
since changed the default C semantics to return the address instead of 
the offset when casting, this offset compilation mode can still be used
by passing a command-line flag.
Reviewers: rsmith, aaron.ballman, theraven, fhahn, lebedev.ri, nlopes,
aqjune Reviewed By: aaron.ballman, lebedev.ri Differential Revision:
https://reviews.llvm.org/D71499

[mlir] mlir-cpu-runner test's cblas_interface should export functions on
Windows
This change fixes the build on Windows, so that cblas_interface.dll 
exports functions correctly and an implib is created and installed 
correctly.
Currently, LLVM cannot be consumed on Windows after it has been 
installed in a location because cblas_interface.lib is not 
created/installed, thus failing the import check in `LLVMExports.cmake`.
Differential Revision: https://reviews.llvm.org/D72384

[mlir] add a missing dependency for Linalg conversion
We were seeing some occasional build failures that would come and go. It
appeared to be this missing dependence.
Differential Revision: https://reviews.llvm.org/D72419

[AArch64][GlobalISel] Implement selection of <2 x float> vector splat.
Also requires making G_IMPLICIT_DEF of v2s32 legal.
Differential Revision: https://reviews.llvm.org/D72422

CodeGen: Use LLT instead of EVT in getRegisterByName
Only PPC seems to be using it, and only checks some simple cases and 
doesn't distinguish between FP. Just switch to using LLT to simplify use
from GlobalISel.

GlobalISel: Fix else after return

DAG: Don't use unchecked dyn_cast

GlobalISel: Handle llvm.read_register
Compared to the attempt in bdcc6d3d2638b3a2c99ab3b9bfaa9c02e584993a, 
this uses intermediate generic instructions.

TableGen/GlobalISel: Add way for SDNodeXForm to work on timm
The current implementation assumes there is an instruction associated 
with the transform, but this is not the case for 
timm/TargetConstant/immarg values. These transforms should directly 
operate on a specific MachineOperand in the source instruction. TableGen
would assert if you attempted to define an equivalent GISDNodeXFormEquiv
using timm when it failed to find the instruction matcher.
Specially recognize SDNodeXForms on timm, and pass the operand index to
the render function.
Ideally this would be a separate render function type that looks like 
void renderFoo(MachineInstrBuilder, const MachineOperand&), but this 
proved to be somewhat mechanically painful. Add an optional operand 
index which will only be passed if the transform should only look at the
one source operand.
Theoretically it would also be possible to only ever pass the 
MachineOperand, and the existing renderers would check the parent. I 
think that would be somewhat ugly for the standard usage which may want
to inspect other operands, and I also think MachineOperand should 
eventually not carry a pointer to the parent instruction.
Use it in one sample pattern. This isn't a great example, since the 
transform exists to satisfy DAG type constraints. This could also be 
avoided by just changing the MachineInstr's arbitrary choice of operand
type from i16 to i32. Other patterns have nontrivial uses, but this
serves as the simplest example.
One flaw this still has is if you try to use an SDNodeXForm defined for
imm, but the source pattern uses timm, you still see the "Failed to
lookup instruction" assert. However, there is now a way to avoid it.

TableGen/GlobalISel: Fix pattern matching of immarg literals
For arguments that are not expected to be materialized with G_CONSTANT,
this was emitting predicates which could never match. It was first
adding a meaningless LLT check, which would always fail due to the
operand not being a register.
Infer the cases where a literal should check for an immediate operand, 
instead of a register This avoids needing to invent a special way of 
representing timm literal values.
Also handle immediate arguments in GIM_CheckLiteralInt. The comments 
stated it handled isImm() and isCImm(), but that wasn't really true.
This unblocks work on the selection of all of the complicated AMDGPU 
intrinsics in future commits.

[lldb/Lua] Add lua typemaps for INOUT params

[mlir] Use getDenseElementBitwidth instead of
Type::getElementTypeBitWidth.
Summary: Some data values have a different storage width than the
corresponding MLIR type, e.g. bfloat is currently stored as a double.
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D72478

When diagnosing the lack of a viable conversion function, also list
explicit functions that are not candidates.
It's not always obvious that the reason a conversion was not possible is 
because the function you wanted to call is 'explicit', so explicitly say 
if that's the case.
It would be nice to rank the explicit candidates higher in the 
diagnostic if an implicit conversion sequence exists for their 
arguments, but unfortunately we can't determine that without potentially 
triggering non-immediate-context errors that we're not permitted to 
produce.

AVR: Update for getRegisterByName change

[lldb] Remove spurious file

[AMDGPU] Fix bundle scheduling
Bundles coming to scheduler considered free, i.e. zero latency. Fixed.
Differential Revision: https://reviews.llvm.org/D72487

When reading Aux file in chunks, read consecutive byte ranges
qemu has a very small maximum packet size (4096) and it actually only
uses half of that buffer for some implementation reason, so when lldb
asks for the register target definitions, the x86_64 definition is
larger than 4096/2 and we need to fetch it in two parts.
This patch and test is fixing a bug in 
GDBRemoteCommunicationClient::ReadExtFeature when reading a target file
in multiple parts.  lldb was assuming that it would always get back the
maximum packet size response (4096) instead of using the actual size
received and asking for the next group of bytes.
We now have two tests in gdb_remote_client for unique features of qemu -
TestNestedRegDefinitions.py would test the ability of lldb to follow
multiple levels of xml includes; I opted to create a separate
TestRegDefinitionInParts.py test to test this wrinkle in qemu's gdb
remote serial protocol stub implementation. Instead of combining both
tests into a single test file.
<rdar://problem/49537922>

[ELF] Fix includeInDynsym() when an undefined weak is merged with a lazy
definition
An undefined weak does not fetch the lazy definition. A lazy weak symbol 
should be considered undefined, and thus preemptible if .dynsym exists.
D71795 is not quite an NFC. It errors on an R_X86_64_PLT32 referencing 
an undefined weak symbol. isPreemptible is false (incorrect) => R_PLT_PC 
is optimized to R_PC => in isStaticLinkTimeConstant, an error is emitted 
when an R_PC is applied on an undefined weak (considered absolute).

AMDGPU/GlobalISel: Fix G_EXTRACT_VECTOR_ELT mapping for s-v case
If an SGPR vector is indexed with a VGPR, the actual indexing will be 
done on the SGPR and produce an SGPR. A copy needs to be inserted inside
the waterwall loop to the VGPR result.

AMDGPU/GlobalISel: Select G_EXTRACT_VECTOR_ELT
Doesn't try to do the fold into the base register of an add of a 
constant in the index like the DAG path does.

Relax opcode checks in test for G_READCYCLECOUNTER to check for only a
number instead of a specific number.

CWG2352: Allow qualification conversions during reference binding.
The language wording change forgot to update overload resolution to rank 
implicit conversion sequences based on qualification conversions in 
reference bindings. The anticipated resolution for that oversight is 
implemented here -- we order candidates based on qualification 
conversion, not only on top-level cv-qualifiers, including ranking 
reference bindings against non-reference bindings if they differ in 
non-top-level qualification conversions.
For OpenCL/C++, this allows reference binding between pointers with 
differing (nested) address spaces. This makes the behavior of reference 
binding consistent with that of implicit pointer conversions, as is the 
purpose of this change, but that pre-existing behavior for pointer 
conversions is itself probably not correct. In any case, it's now 
consistently the same behavior and implemented in only one place.
This reinstates commit de21704ba96fa80d3e9402f12c6505917a3885f4, 
reverted in commit d8018233d1ea4234de68d5b4593abd773db79484, with 
workarounds for some overload resolution ordering problems introduced by 
CWG2352.

[NFC] Style cleanup

fix a few typos to cycle the bots

fix another typo to cycle bots

[ThinLTO] Pass CodeGenOpts like UnrollLoops/VectorizeLoop/VectorizeSLP
down to pass builder in ltobackend.
Currently CodeGenOpts like UnrollLoops/VectorizeLoop/VectorizeSLP in
clang are not passed down to pass builder in ltobackend when new pass
manager is used. This is inconsistent with the behavior when new pass
manager is used and thinlto is not used. Such inconsistency causes slp
vectorization pass not being enabled in ltobackend for O3 + thinlto
right now. This patch fixes that.
Differential Revision: https://reviews.llvm.org/D72386

[xray] Remove cl::sub from alias options
Currently running the xray tools generates a number of errors:
$ ./bin/llvm-xray
: for the   -k option: cl::alias must not have cl::sub(), aliased
option's cl::sub() will be used!
: for the   -d option: cl::alias must not have cl::sub(), aliased
option's cl::sub() will be used!
: for the   -o option: cl::alias must not have cl::sub(), aliased
option's cl::sub() will be used!
: for the   -f option: cl::alias must not have cl::sub(), aliased
option's cl::sub() will be used!
: for the   -s option: cl::alias must not have cl::sub(), aliased
option's cl::sub() will be used!
: for the   -r option: cl::alias must not have cl::sub(), aliased
option's cl::sub() will be used!
: for the   -p option: cl::alias must not have cl::sub(), aliased
option's cl::sub() will be used!
: for the   -m option: cl::alias must not have cl::sub(), aliased
option's cl::sub() will be used!
<snip>
Patch by Ryan Mansfield.
Differential Revision: https://reviews.llvm.org/D69386

clang-tidy doc - remove the widths

[Syntax] Update comment, remove stale FIXME. NFC

[LV] VPValues for memory operation pointers (NFCI)
Memory instruction widening recipes use the pointer operand of their
load/store ingredient for generating the needed GEPs, making it
difficult to feed these recipes with pointers based on other ingredients
or none at all. This patch modifies these recipes to use a VPValue for
the pointer instead, in order to reduce ingredient def-use usage by ILV
as a step towards full VPlan-based def-use relations. The recipes are
constructed with VPValues bound to these ingredients, maintaining
current behavior.
Differential revision: https://reviews.llvm.org/D70865

Restore order in clang-tidy section of release notes
Major changes are introduction of subsubsections to prevent people 
putting new entries in wrong places. I also polished line length and 
highlighting.
Patch by Eugene Zelenko!

Allow system header to provide their own implementation of some builtin
If a system header provides an (inline) implementation of some of their 
function, clang still matches on the function name and generate the
appropriate llvm builtin, e.g. memcpy. This behavior is in line with
glibc recommendation « users may not provide their own version of
symbols » but doesn't account for the fact that glibc itself can provide
inline version of some functions.
It is the case for the memcpy function when -D_FORTIFY_SOURCE=1 is on.
In that case an inline version of memcpy calls __memcpy_chk, a function
that performs extra runtime checks. Clang currently ignores the inline
version and thus provides no runtime check.
This code fixes the issue by detecting functions whose name is a builtin
name but also have an inline implementation.
Differential Revision: https://reviews.llvm.org/D71082

[NFC] [PowerPC] Add isPredicable for basic instrs
PowerPC uses a dedicated method to check if the machine instr is 
predicable by opcode. However, there's a bit `isPredicable` in instr 
definition. This patch removes the method and set the bit only to 
opcodes referenced in it.
Differential Revision: https://reviews.llvm.org/D71921

[clangd] Improve type printing in hover
Summary: Do not include tag keywords when printing types for symbol
names, as it will come from SymbolKind. Also suppress them while
printing definitions to prevent them occuring in template arguments. 
Make use of `getAsString`, instead of `print` in all places to have a
consistent style across the file.
Reviewers: sammccall
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95,
cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72450

[clangd] Fix markdown rendering in VSCode
Summary: Eventough it is OK to have a new line without any preceding
spaces in some markdown specifications, VSCode requires two spaces
before a new line to break a line inside a paragraph.
Reviewers: sammccall, ilya-biryukov
Subscribers: MaskRay, jkorous, arphaman, usaxena95, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72462

Fix several issues with compiler extensions
- Update documentation now that the move to monorepo has been made
- Do not tie compiler extension testing to LLVM_BUILD_EXAMPLES
- No need to specify LLVM libraries for plugins
- Add NO_MODULE option to match Polly specific requirements (i.e.
building the
 module *and* linking it statically)
- Issue a warning when building the compiler extension with
 LLVM_BYE_LINK_INTO_TOOLS=ON, as it modifies the behavior of clang,
which only
 makes sense for testing purpose.
Still mark llvm/test/Feature/load_extension.ll as XFAIL because of a 
ManagedStatic dependency that's going to be fixed in a seperate commit.
Differential Revision: https://reviews.llvm.org/D72327

[SVEV] Recognise hardware-loop intrinsic loop.decrement.reg
Teach SCEV about the @loop.decrement.reg intrinsic, which has exactly
the same semantics as a sub expression. This allows us to query
hardware-loops, which contain this @loop.decrement.reg intrinsic, so
that we can calculate iteration counts, exit values, etc. of
hardwareloops.
This "int_loop_decrement_reg" intrinsic is defined as "IntrNoDuplicate".
Thus, while hardware-loops and tripcounts now become analysable by SCEV,
this prevents the usual loop transformations from applying
transformations on hardware-loops, which is what we want at this point,
for which I have added test cases for loopunrolling and IndVarSimplify
and LFTR.
Differential Revision: https://reviews.llvm.org/D71563

Follow up of 67bf9a6154d4b82c, minor fix in test case, removed duplicate
option

[libcxx] Force-cache LIBCXX_CXX_ABI_LIBRARY_PATH
Summary: The `LIBCXX_CXX_ABI_LIBRARY_PATH` CMake variable is cached once
in libcxx/cmake/Modules/HandleLibCXXABI.cmake in the `setup_abi_lib`
macro, and then cached again in libcxx/test/CMakeLists.txt. There, if it
is not set to a value, it is by default set to `LIBCXX_LIBRARY_DIR`.
However, this new value is not actually cached, because the old (empty) 
value has been already cached. Use the `FORCE` CMake flag so that it is
saved to the cache.
This should not break anything, because the code changed here previously 
had no effect, when it should have.
Reviewers: jroelofs, bcraig, ldionne, EricWF, mclow.lists, vvereschaka,
eastig
Reviewed By: vvereschaka
Subscribers: mgorny, christof, dexonsmith, libcxx-commits
Tags: #libc
Differential Revision: https://reviews.llvm.org/D69169

[CMake] Support running libc++abi tests in CrossWinToARMLinux cache file
Summary: Now that D71894 has landed, we're able to run libc++abi tests
remotely.
For that we can use the same CMake command as before. The tests can be
run using `ninja check-cxxabi`.
Reviewers: andreil99, vvereschaka, aorlov
Reviewed By: vvereschaka, aorlov
Subscribers: mgorny, kristof.beyls, ldionne, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72459

XFAIL load_extension.ll test on macOS only
Other setup have been fixed by 346de9b67228f42eb9b55fa3b426b5dedfdb1d40

[MIR] Fix cyclic dependency of MIR formatter
Summary: Move MIR formatter pointer from TargetMachine to
TargetInstrInfo to avoid cyclic dependency between target & codegen.
Reviewers: dsanders, bkramer, arsenm
Subscribers: wdng, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72485

[LV] Silence unused variable warning in Release builds. NFC.

Don't use dyn_cast_or_null if we know the pointer is nonnull.
Fix clang static analyzer null dereference warning by using dyn_cast
instead.

[X86][AVX] Add tests for v8f32/v8i32 089abcde and 0189abcd shuffles
Mentioned in D66004

Fix Wdocumentation warning. NFCI.

Fix Wdocumentation warning. NFCI.

Data formatters: Look through array element typedefs
Summary: Motivation: When formatting an array of typedefed chars, we
would like to display the array as a string.
The string formatter currently does not trigger because the formatter
lookup does not resolve typedefs for array elements (this behavior is
inconsistent with pointers, for those we do look through pointee
typedefs). This patch tries to make the array formatter lookup somewhat
consistent with the pointer formatter lookup.
Reviewers: teemperor, clayborg
Reviewed By: teemperor, clayborg
Subscribers: clayborg, lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D72133

Fix "pointer is null" static analyzer warnings. NFCI.
Assert that the pointers are non-null before dereferencing them.

[ARM,MVE] Make `vqrshrun` generate the right instruction.
Summary: A copy-paste error in `arm_mve.td` meant that the MVE
`vqrshrun` intrinsic family was generating the `vqshrun` machine
instruction, because in the IR intrinsic call, the rounding flag
argument was set to 0 rather than 1.
Reviewers: dmgreen, MarkMurrayARM, miyuki, ostannard
Reviewed By: dmgreen
Subscribers: kristof.beyls, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72496

[ARM][Thumb2] Fix ADD/SUB invalid writes to SP
Summary: This patch fixes pr23772  [ARM] r226200 can emit illegal thumb2
instruction: "sub sp, r12, #80". The violation was that SUB and ADD
(reg, immediate) instructions can only write to SP if the source
register is also SP. So the above instructions was unpredictable. To
enforce that the instruction t2(ADD|SUB)ri does not write to SP we now
enforce the destination register to be rGPR (That exclude PC and SP). 
Different than the ARM specification, that defines one instruction that
can read from SP, and one that can't, here we inserted one that can't
write to SP, and other that can only write to SP as to reuse most of the
hard-coded size optimizations. When performing this change, it uncovered
that emitting Thumb2 Reg plus Immediate could not emit all variants of
ADD SP, SP #imm instructions before so it was refactored to be able to.
(see test/CodeGen/Thumb2/mve-stacksplot.mir where we use a subw sp, sp,
Imm12 variant ) It also uncovered a disassembly issue of adr.w
instructions, that were only written as SUBW instructions (see
llvm/test/MC/Disassembler/ARM/thumb2.txt).
Reviewers: eli.friedman, dmgreen, carwil, olista01, efriedma
Reviewed By: efriedma
Subscribers: john.brawn, efriedma, ostannard, kristof.beyls, hiraditya,
dmgreen, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70680

[lldb/lua] Make convenience_variables.test compatible with lua-5.1

[lldb/DWARF] Don't automatically search dwo unit attributes
This patch removes the code (deep inside DWARFDebugInfoEntry) which 
automagically returned the attributes of the dwo unit DIE when asking 
for the attributes of the skeleton unit.  This is fairly hacky, and not 
consistent with how llvm DWARF parser operates.
Instead, I change the code the explicitly request (via 
GetNonSkeletonUnit) the right unit to search (there were just two places 
that needed this). If it turns out we need this more often, we can 
create a utility function (external to DWARFUnit) for doing this.

[CodeComplete] Suggest 'return nullptr' in functions returning pointers
Reviewers: kadircet
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72497

[lldb] Surpress "bitfield too small" gcc warning
Gcc produces this (technically correct) warning when storing an 
explicitly-sized enum in a bitfield. Surpress that by changing the type 
of the bitfield to an integer. The same approach is used elsewhere in 
llvm (e.g. 56b5eab12).

[Support] ThreadPoolExecutor fixes for Windows/MinGW
Changed ThreadPoolExecutor to no longer use detached threads and instead 
to join threads on destruction. This is to prevent intermittent crashing 
on Windows when doing a normal full exit, e.g. via exit().
Changed ThreadPoolExecutor to be a ManagedStatic so that it can be 
stopped on llvm_shutdown(). Without this, it would only be stopped in 
the destructor when doing a full exit. This is required to avoid 
intermittent crashing on Windows due to a race condition between the 
ThreadPoolExecutor starting up threads and the process doing a fast 
exit, e.g. via _exit().
The Windows crashes appear to only occur with the MSVC static runtimes 
and are more frequent with the debug static runtime.
These changes also prevent intermittent deadlocks on exit with the MinGW 
runtime.
Differential Revision: https://reviews.llvm.org/D70447

[lldb][tests] Take into account all parent's categories when traverse
folders upwards
This is needed to not re-write parent's categories by categories of a
nested folder, e.g. commands/expression/completion specify "cmdline"
category, however it still belongs to parent's "expression" category.
The sentinel ".categories" in the test-suite root directory is no longer
needed.
Differential Revision: https://reviews.llvm.org/D71905

[lldb][test] NFC, re-use _getTestPath() function

[FPEnv] Generate constrained FP comparisons from clang
Update the IRBuilder to generate constrained FP comparisons in 
CreateFCmp when IsFPConstrained is true, similar to the other places in
the IRBuilder.
Also, add a new CreateFCmpS to emit signaling FP comparisons, and use it
in clang where comparisons are supposed to be signaling
(currently, only when emitting code for the <, <=, >, >= operators).
Note that there is currently no way to add fast-math flags to a 
constrained FP comparison, since this is implemented as an intrinsic 
call that returns a boolean type, and FMF are only allowed for calls 
returning a floating-point type. However, given the discussion around 
https://bugs.llvm.org/show_bug.cgi?id=42179, it seems that FCmp itself 
really shouldn't have any FMF either, so this is probably OK.
Reviewed by: craig.topper
Differential Revision: https://reviews.llvm.org/D71467

[lldb][tests] Cleanup '.categories'

Reverting, broke some bots. Need further investigation.
Summary: This reverts commit 8c12769f3046029e2a9b4e48e1645b1a77d28650.
Reviewers:
Subscribers:

Sprinkle some constexpr on default ctors so the compiler can diagnose
unused instances. NFCI.

ARMLowOverheadLoops: a few more dbg msgs to better trace rejected TP
loops. NFC.

RangeDataVector: Support custom sorting for D63540
As suggested by @labath extended RangeDataVector so that user can
provide custom sorting of the Entry's `data' field for D63540.
       https://reviews.llvm.org/D63540
RangeData functions were used just by RangeDataVector (=after I removed
them LLDB still builds fine) which no longer uses them so I removed
them.
Differential revision: https://reviews.llvm.org/D72460

[ARM][MVE] Tail predicate VMAX,VMAXA,VMIN,VMINA
Add the MVE min and max instructions to our tail predication whitelist.
Differential Revision: https://reviews.llvm.org/D72502

[FPEnv] Invert sense of MIFlag::FPExcept flag
In D71841 we inverted the sense of the SDNode-level flag to ensure all
nodes default to potentially raising FP exceptions unless otherwise
specified -- i.e. if we forget to propagate the flag somewhere, the
effect is now only lost performance, not incorrect code.
However, the related flag at the MI level still defaults to nodes not
raising FP exceptions unless otherwise specified. To be fully on the
(conservatively) safe side, we should invert that flag as well.
This patch does so by replacing MIFlag::FPExcept with
MIFlag::NoFPExcept.
(Note that this does also introduce an incompatible change in the MIR
format.)
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D72466

[lldb][tests][NFC] Unify variable naming convention

[lldb][tests] Make it possible to expect failure for a whole category
There already are decorators and "--excluded" option to mark
test-cases/files as expected to fail. However, when a new test file is
added and it which relates to a feature that a target doesn't support,
this requires either adding decorators to that file or modifying the
file provided as "--excluded" option value.
The purpose of this patch is to avoid any modifications in such cases. 
E.g. if a target doesn't support "watchpoints" and passes
"--xfail-category watchpoint" to dotest, a testing job will not fail
after a new watchpoint-related test file is added.
Differential Revision: https://reviews.llvm.org/D71906

AMDGPU/GlobalISel: Clamp G_ZEXT source sizes
Also clamps G_SEXT/G_ANYEXT, but the implementation is more limited so 
fewer cases actually work.

[LIBOMPTARGET]Ignore empty target descriptors.
Summary: If the dynamically loaded module has been compiled with
-fopenmp-targets and has no target regions, it has empty target
descriptor. It leads to a crash at the runtime if another module has at
least one target region and at least one entry in its descriptor. The
runtime library is unable to load the empty binary descriptor and
terminates the execution. Caused by a clang-offload-wrapper.
Reviewers: grokos, jdoerfert
Subscribers: caomhin, kkwli0, openmp-commits
Tags: #openmp
Differential Revision: https://reviews.llvm.org/D72472

[DebugInfo] Improve error message text
Unlike most of our errors in the debug line parser, the "no end of 
sequence" message was missing any reference to which line table it 
refererred to. This change adds the offset to this message.
Reviewed by: dblaikie
Differential Revision: https://reviews.llvm.org/D72443

[DebugInfo][NFC] Remove unused variable/fix variable naming
Reviewed by: MaskRay
Differential Revision: https://reviews.llvm.org/D72159

[NFC] format unittest for ExprMutAnalyzer
This formatting is a preparation for review in 
https://reviews.llvm.org/D54943 to separate pure formatting changes from 
actual testing changes.

[PowerPC] Handle constant zero bits in BitPermutationSelector
We currently crash when analyzing an AssertZExt node that has some bits
that are constant zeros (i.e. as a result of an and with a constant).
This issue was reported in https://bugs.llvm.org/show_bug.cgi?id=41088
and this patch fixes that.
Differential revision: https://reviews.llvm.org/D72038

Add support for __declspec(guard(nocf))
Summary: Avoid using the `nocf_check` attribute with Control Flow Guard.
Instead, use a new `"guard_nocf"` function attribute to indicate that
checks should not be added on indirect calls within that function. Add
support for
`__declspec(guard(nocf))` following the same syntax as MSVC.
Reviewers: rnk, dmajor, pcc, hans, aaron.ballman
Reviewed By: aaron.ballman
Subscribers: aaron.ballman, tomrittervg, hiraditya, cfe-commits,
llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D72167

Add missing nullptr checks.
GetPersistentExpressionStateForLanguage() can return a nullptr if it 
cannot construct a typesystem. This patch adds missing nullptr checks at
all uses.
Inspired by rdar://problem/58317195
Differential Revision: https://reviews.llvm.org/D72413

[analyzer] Add PlacementNewChecker
Summary: This checker verifies if default placement new is provided with
pointers to sufficient storage capacity.
Noncompliant Code Example:
 #include <new>
 void f() {
   short s;
   long *lp = ::new (&s) long;
 }
Based on SEI CERT rule MEM54-CPP 
https://wiki.sei.cmu.edu/confluence/display/cplusplus/MEM54-CPP.+Provide+placement+new+with+properly+aligned+pointe 
This patch does not implement checking of the alignment.
Reviewers: NoQ, xazax.hun
Subscribers: mgorny, whisperity, xazax.hun, baloghadamsoftware, szepet, 
rnkovacs, a.sidorin, mikhail.ramalho, donat
Tags: #clang
Differential Revision: https://reviews.llvm.org/D71612

[mlir][spirv] Fix typos related to (de)serialization.
Fix typos related to (de)serialization of spv.selection.
Differential Revision: https://reviews.llvm.org/D72503

[InstCombine] add tests for fsub; NFC
Conflicting/missing canonicalizations are visible in PR44509: 
https://bugs.llvm.org/show_bug.cgi?id=44509

[BPF] extend BTF_KIND_FUNC to cover global, static and extern funcs
Previously extern function is added as BTF_KIND_VAR. This does not work 
well with existing BTF infrastructure as function expected to use 
BTF_KIND_FUNC and BTF_KIND_FUNC_PROTO.
This patch added extern function to BTF_KIND_FUNC. The two bits 0:1 of
btf_type.info are used to indicate what kind of function it is:
 0: static
 1: global
 2: extern
Differential Revision: https://reviews.llvm.org/D71638

[clangd] Fix targetDecl() on certain usage of ObjC properties.
Summary: In particular there's a common chain:

OpaqueValueExpr->PseudoObjectExpr->ObjCPropertyRefExpr->ObjCPropertyDecl 
and we weren't handling the first two edges
Reviewers: dgoldman, kadircet
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, jfb, usaxena95,
cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72494

[gn build] Port 5e7beb0a414

[X86][AVX] lowerShuffleAsLanePermuteAndShuffle - consistently normalize
multi-input shuffle elements
We only use lowerShuffleAsLanePermuteAndShuffle for unary shuffles at
the moment, but we should consistently handle lane index calculations
for multiple inputs in both the AVX1 and AVX2 paths.
Minor (almost NFC) tidyup as I'm hoping to use
lowerShuffleAsLanePermuteAndShuffle for binary shuffles soon.

Fix "pointer is null" static analyzer warning. NFCI.
Use cast<> instead of dyn_cast<> since we know that the pointer should
be valid (and is dereferenced immediately).

Fix "pointer is null" static analyzer warning. NFCI.
Use castAs<> instead of getAs<> since the pointer is dereferenced
immediately below and castAs will perform the null assertion for us.

[examples] Add missing dependency in llvm examples
To fix build failure with BUILD_SHARED_LIBS=ON

[AIX] Allow vararg calls when all arguments reside in registers
Summary: This patch pushes the AIX vararg unimplemented error diagnostic
later and allows vararg calls so long as all the arguments can be passed
in register. This patch extends the AIX calling convention
implementation to initialize GPR(s) for vararg float arguments. On AIX,
both GPR(s) and FPR are allocated for floating point arguments. The
GPR(s) are only initialized for vararg calls, otherwise the callee is
expected to retrieve the float argument in the FPR.
f64 in AIX PPC32 requires special handling in order to allocated and 
initialize 2 GPRs. This is performed with bitcast, SRL, truncation to 
initialize one GPR for the MSW and bitcast, truncations to initialize 
the other GPR for the LSW.
A future patch will follow to add support for arguments passed on the
stack.
Patch provided by: cebowleratibm
Reviewers: sfertile, ZarkoCA, hubert.reinterpretcast
Differential Revision: https://reviews.llvm.org/D71013

Fix "pointer is null" static analyzer warning. NFCI.
Use castAs<> instead of getAs<> since the pointer is dereferenced
immediately below and castAs will perform the null assertion for us.

[AArch64] Add function attribute "patchable-function-entry" to add NOPs
at function entry
The Linux kernel uses -fpatchable-function-entry to implement
DYNAMIC_FTRACE_WITH_REGS for arm64 and parisc. GCC 8 implemented
-fpatchable-function-entry, which can be seen as a generalized form of
-mnop-mcount. The N,M form (function entry points before the Mth NOP) is 
currently only used by parisc.
This patch adds N,0 support to AArch64 codegen. N is represented as the 
function attribute "patchable-function-entry". We will use a different 
function attribute for M, if we decide to implement it.
The patch reuses the existing patchable-function pass, and 
TargetOpcode::PATCHABLE_FUNCTION_ENTER which is currently used by XRay.
When the integrated assembler is used, __patchable_function_entries will 
be created for each text section with the SHF_LINK_ORDER flag to prevent
--gc-sections (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93197) and 
COMDAT (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93195) issues.
Retrospectively, __patchable_function_entries should use a PC-relative 
relocation type to avoid the SHF_WRITE flag and dynamic relocations.
"patchable-function-entry"'s interaction with Branch Target 
Identification is still unclear (see 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92424 for GCC discussions).
Reviewed By: peter.smith
Differential Revision: https://reviews.llvm.org/D72215

[X86] Support function attribute "patchable-function-entry"
For x86-64, we diverge from GCC -fpatchable-function-entry in that we 
emit multi-byte NOPs.
Differential Revision: https://reviews.llvm.org/D72220

Support function attribute patchable_function_entry
This feature is generic. Make it applicable for AArch64 and X86 because 
the backend has only implemented NOP insertion for AArch64 and X86.
Reviewed By: nickdesaulniers, aaron.ballman
Differential Revision: https://reviews.llvm.org/D72221

[Driver][CodeGen] Add -fpatchable-function-entry=N[,0]
In the backend, this feature is implemented with the function attribute
"patchable-function-entry". Both the attribute and XRay use 
TargetOpcode::PATCHABLE_FUNCTION_ENTER, so the two features are 
incompatible.
Reviewed By: ostannard, MaskRay
Differential Revision: https://reviews.llvm.org/D72222

[ELF] Make TargetInfo::writeIgotPlt a no-op
RELA targets don't read initial .got.plt entries. REL targets (ARM,
x86-32) write the address of the IFUNC resolver to the entry
(`write32le(buf, s.getVA())`).
The default writeIgotPlt() is not meaningful. Make it a no-op. AArch64 
and x86-64 will have 0 as initial .got.plt entries associated with 
IFUNC.
Reviewed By: peter.smith
Differential Revision: https://reviews.llvm.org/D72474

[LegalizeVectorOps] Improve handling of multi-result operations.
This system wasn't very well designed for multi-result nodes. As a
consequence they weren't consistently registered in the LegalizedNodes
map leading to nodes being revisited for different results.
I've removed the "Result" variable from the main LegalizeOp method and
used a SDNode* instead. The result number from the incoming Op SDValue
is only used for deciding which result to return to the caller. When
LegalizeOp is called it should always register a legalized result for
all of its results. Future calls for any other result should be pulled
for the LegalizedNodes map.
Legal nodes will now register all of their results in the map instead of
just the one we were called for.
The Expand and Promote handling to use a vector of results similar to
LegalizeDAG. Each of the new results is then re-legalized and logged in
the LegalizedNodes map for all of the Results for the node being
legalized. None of the handles register their own results now. And none
call ReplaceAllUsesOfValueWith now.
Custom handling now always passes result number 0 to LowerOperation. 
This matches what LegalizeDAG does. Since the introduction of STRICT
nodes, I've encountered several issues with X86's custom handling being
called with an SDValue pointing at the chain and our custom handlers
using that to get a VT instead of result 0. This should prevent us from
having any more of those issues. On return we will update the
LegalizedNodes map for all results so we shouldn't call the custom
handler again for each result number.
I want to push SDNode* further into the Expand and Promote handlers, but
I've left that for a follow to keep this patch size down. I've created a
dummy SDValue(Node, 0) to keep the handlers working.
Differential Revision: https://reviews.llvm.org/D72224

[lldb] Remove FieldDecl stealing hack by rerouting indirect imports to
the original AST
Summary: This is a port of D67803 that was about preventing indirect
importing to our scratch context when evaluating expressions.
D67803 already has a pretty long explanation of how this works, but the
idea is that instead of importing declarations indirectly over the
expression AST (i.e., Debug info AST -> Expression AST -> scratch AST) 
we instead directly import the declaration from the debug info AST to
the scratch AST.
The difference from D67803 is that here we have to do this in the
ASTImporterDelegate (which is our ASTImporter subclass we use in LLDB).
It has the same information as the ExternalASTMerger in D67803 as it can
access the ClangASTImporter (which also keeps track of where Decls
originally came from).
With this patch we can also delete the FieldDecl stealing hack in the
ClangASTSource (this was only necessary as the indirect imports caused
the creation of duplicate Record declarations but we needed the fields
in the Record decl we originally found in the scratch ASTContext).
This also fixes the current gmodules failures where we fail to find
std::vector fields after an indirect import over the expression AST
(where it seems even our FieldDecl stealing hack can't save us from).
Reviewers: shafik, aprantl
Reviewed By: shafik
Subscribers: JDevlieghere, lldb-commits, mib, labath, friss
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D72507

[lldb/Lua] Support loading Lua modules
Implements the command script import command for Lua.
Differential revision: https://reviews.llvm.org/D71825

Update the attribution policy to use the 'Author' property of a git
commit
Summary: The older method of adding 'Patch by John Doe' is documented in
the
`Attribution of Changes` section to support correct attribution of
commits that pre-date the adoption of git.
Reviewers: hfinkel, aaron.ballman, mehdi_amini
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72468

[analyzer] Move PlacementNewChecker to alpha

[TargetLowering][ARM][X86] Change softenSetCCOperands handling of ONE to
avoid spurious exceptions for QNANs with strict FP quiet compares
ONE is currently softened to OGT | OLT. But the libcalls for OGT and OLT
libcalls will trigger an exception for QNAN. At least for X86 with
libgcc. UEQ on the other hand uses UO | OEQ. The UO and OEQ libcalls
will not trigger an exception for QNAN.
This patch changes ONE to use the inverse of the UEQ lowering. So we now
produce O & UNE. Technically the existing behavior was correct for a
signalling ONE, but since I don't know how to generate one of those from
clang that seemed like something we can deal with later as we would need
to fix other predicates as well. Also removing spurious exceptions
seemed better than missing an exception.
There are also problems with quiet OGT/OLT/OLE/OGE, but those are harder
to fix.
Differential Revision: https://reviews.llvm.org/D72477

[lld][WebAssembly] Add libcall symbols to the link when LTO is being
used.
This code is copied almost verbatim from the equivalent change to the 
ELF linker:
- https://reviews.llvm.org/D50017
- https://reviews.llvm.org/D50475
The upshot is that libraries containing libcall (such as compiler-rt and
libc) can be compiled with LTO.
Fixes PR41384
Differential Revision: https://reviews.llvm.org/D71738

[CMake] Fix modules build after DWARFLinker reorganization
Create a dedicate module for the DWARFLinker and make it depend on 
intrinsics gen.

[clang] Fix out-of-bounds memory access in ComputeLineNumbers
Differential Revision: https://reviews.llvm.org/D72409

[Driver][PowerPC] Move powerpcspe logic from cc1 to Driver
Follow-up of D72014. It is more appropriate to use a target feature
instead of a SubTypeArch to express the difference.
Reviewed By: #powerpc, jhibbits
Differential Revision: https://reviews.llvm.org/D72433

[ASTMatchers] Make test more clear about what it is verifying

[Tests] Precommit tests showing default branch padding on skylake
A follow up patch will change the default for the compiler, but not the
assembler, just making sure we have testing for each in place.

[lldb] Make CompleteTagDeclsScope completion order deterministic
Summary: We iterate over `m_decls_to_complete` to complete declarations.
As
`m_decls_to_complete` is a set the iteration order can be
non-deterministic. The order is currently only non-deterministic when we
have a large set of decls that need to be completed (i.e. more than 32
decls, as otherwise the SmallPtrSet is just a linear-searched list).
This doesn't really fix any specific bug or has any really observable 
change in behavior as the order in which we import should not influence 
any semantics. However the order we create decls/types is now always 
deterministic which should make debugging easier.
Reviewers: labath, mib, shafik, davide
Reviewed By: shafik, davide
Subscribers: davide, abidh, JDevlieghere, lldb-commits, mgrang
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D72495

[lldb] Fix TestClangASTContext.TestFunctionTemplateInRecordConstruction
in Debug builds
Summary: In Debug builds we call VerifyDecl in
ClangASTContext::CreateFunctionDeclaration which in turn calls
`getAccess` on the created FunctionDecl. As we passed in a RecordDecl as
the DeclContext for the FunctionDecl, we end up hitting the assert in
`getAccess` that checks that we never have a Decl inside a Record
without a valid AccessSpecifier. FunctionDecls are never in RecordDecls
(that would be a CXXMethodDecl) so setting a access specifier would not
be the correct way to fix this.
Instead this patch does the same thing that
DWARFASTParserClang::ParseSubroutine is doing: We pass in the
FunctionDecl with the TranslationUnit as the DeclContext. That's not
ideal but it is how we currently do it when creating our debug info AST,
so the unit test should do the same.
Reviewers: shafik
Reviewed By: shafik
Subscribers: aprantl, JDevlieghere, lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D72359

Implement new AST matcher hasAnyCapture to match on LambdaExpr captures.
Accepts child matchers cxxThisExpr to match on capture of this and also
on varDecl.

MakeUniqueCheck.cpp: explicit the fact that there is an autofix for this
checker

clang-tidy doc: Refresh the list of checkers and polish the script

[TargetLowering] Use SelectionDAG::getSetCC and remove a repeated call
to getSetCCResultType in softenSetCCOperands. NFCI

clang-tidy doc: unbreak the CI

Summary: update macro for OFF_T so that sanitizer works on AARCH64.
Reviewers: vitalybuka, eugenis, MaskRay
Reviewed By: eugenis, MaskRay
Subscribers: MaskRay, kristof.beyls, #sanitizers, llvm-commits, jkz, scw
Tags: #sanitizers, #llvm
Differential Revision: https://reviews.llvm.org/D72367

[lldb/Scripts] Remove buildbot.py
This file is outdated and still references SVN. Buildbots are configured 
through the zorg repository.

[lldb/Scripts] Remove remote-build.py
With Xcode gone this is no longer relevant.

[lldb/Scripts] Move android script from underneath Python dir
The scripts root directory already contains python scripts. No need to 
keep this one nested under a dedicated Python directory.

[AArch64] Add isAuthenticated predicate to MCInstDesc
Add a predicate to MCInstDesc that allows tools to determine whether an 
instruction authenticates a pointer. This can be used by diagnostic 
tools to hint at pointer authentication failures.
Differential Revision: https://reviews.llvm.org/D70329
rdar://55089604

[lldb/Test] Bypass LLDB_TEST_COMMON_ARGS for certain dotest args (NFC)
Rather than serializing every argument through LLDB_TEST_COMMON_ARGS, we 
can pass some of them directly using their CMake variable. Although this 
does introduce some code duplication between lit's site config and the 
lldb-dotest utility, it also means that it becomes easier to override 
these values (WIP).

[lldb/Utils] Remove vim-lldb
The vim-lldb plugin is unmaintained and doesn't work with a recent vim 
installation that uses Python 3. This removes it from the LLDB 
repository. The code is still available under lldb-tools on GitHub like 
we did with for lldb-mi. (https://github.com/lldb-tools/vim-lldb)
Differential revision: https://reviews.llvm.org/D72541

lldbutil: Forward ASan launch info to test inferiors
This allows an unsanitized test process which loads a sanitized DSO (the 
motivating example is a Swift runtime dylib) to launch on Darwin.
rdar://57290132
Differential Revision: https://reviews.llvm.org/D71379

Let targets adjust operand latency of bundles
This reverts the AMDGPU DAG mutation implemented in D72487 and gives a
more general way of adjusting BUNDLE operand latency.
It also replaces FixBundleLatencyMutation with adjustSchedDependency 
callback in the AMDGPU, fixing not only successor latencies but 
predecessors' as well.
Differential Revision: https://reviews.llvm.org/D72535

[lldb/Reproducer] Add SBReproducer::Replay overload (again)
I modified the SBAPI under the assumption that nobody was using the old 
API yet. However, that turns out to be false. So instead of adding the 
deafault argument I've reintroduced the old API and made the new one an 
overload.

Only destroy static locals if they have non-trivial destructors.
This fixes a regression introduced in 
2b4fa5348ee157b6b1a1af44d0137ca8c7a71573 that caused us to emit 
shutdown-time destruction for variables with ARC ownership, using 
C++-specific functions that don't exist in C implementations.

[LockFileManager] Make default waitForUnlock timeout a parameter, NFC
Patch by Xi Ge!

[NFC][InlineCost] Factor cost modeling out of CallAnalyzer traversal.
Summary: The goal is to simplify experimentation on the cost model.
Today, CallAnalyzer decides 2 things: legality, and benefit. The
refactoring keeps legality assessment in CallAnalyzer, and factors
benefit evaluation out, as an extension.
Reviewers: davidxl, eraman
Reviewed By: davidxl
Subscribers: kamleshbhalui, fedor.sergeev, hiraditya,
baloghadamsoftware, haicheng, a.sidorin, Szelethus, donat.nagy, dkrupp,
llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71733

[mlir] NFC: put C++ code emission classes in their own files
This exposes thse classes so that they can be used in interfaces.
Differential Revision: https://reviews.llvm.org/D72514

[mlir][ods] Support dialect specific content emission via hooks
Thus far we can only generate the same set of methods even for 
operations in different dialects. This is problematic for dialects that 
want to generate additional operation class methods programmatically, 
e.g., a special builder method or attribute getter method. Apparently we
cannot update the OpDefinitionsGen backend every time when such a need
arises. So this CL introduces a hook into the OpDefinitionsGen backend
to allow dialects to emit additional methods and traits to operation
classes.
Differential Revision: https://reviews.llvm.org/D72514

Improve precision of documentation comment.

[AArch64] Don't generate libcalls for wide shifts on Darwin
Similar to cff90f07cb5cc3.
Darwin doesn't always use compiler-rt, and so we can't assume that these 
functions are available (at least on arm64).

Remove redundant implicit cast creation.
FindCompositePointerType has already cast the operands to the composite 
type for us in the case where it succeeds.

Add a FIXME and corresponding test coverage for some suspicious behavior
forming composite ObjC pointer types in comparisons.

Clean up and slightly generalize implementation of composite pointer
type computation, in preparation for P0388R4, which adds another few
cases here.
We now properly handle forming multi-level composite pointer types 
involving nested Objective-C pointer types (as is consistent with 
including them as part of the notion of 'similar types' on which this 
rule is based). We no longer lose non-CVR qualifiers on nested pointer 
types.

driver: Allow -fdebug-compilation-dir=foo in joined form.
All 130+ f_Group flags that take an argument allow it after a '=', 
except for fdebug-complation-dir. Add a Joined<> alias so that it
behaves consistently with all the other f_Group flags.
(Keep the old Separate flag for backwards compat.)

[Driver] Fix OptionClass of -fconvergent-functions and -fms-volatile
(Joined -> Flag)

[Concepts] Fix MarkUsedTemplateParameters for exprs
D41910 introduced a recursive visitor to MarkUsedTemplateParameters, but 
disregarded the 'Depth' parameter, and had incorrect assertions. This
fixes the visitor and removes the assertions.

Remove umask tests
These tests were added in 18627115f4d2db5dc73207e0b5312f52536be7dd and
e08b59f81d950bd5c8b8528fcb3ac4230c7b736c for validating a refactoring. 
Removing because they break on ACL-controlled folders on Ubuntu, and
their added value is low.
Differential Revision: https://reviews.llvm.org/D70854

[COFF] Align ARM64 range extension thunks at instruction boundary
RangeExtensionThunkARM64 is created for out-of-range branches on Windows
ARM64 because branch instructions has limited bits to encode target
address. Currently, RangeExtensionThunkARM64 is appended to its
referencing COFF section from object file at link time without any
alignment requirement, so if size of the preceding COFF section is not
aligned to instruction boundary (4 bytes), RangeExtensionThunkARM64 will
emit thunk instructions at unaligned address which is never a valid
branch target on ARM64, and usually triggers invalid instruction
exception when branching to it.
This PR fixes it by requiring such thunks to align at 4 bytes.
Differential revision: https://reviews.llvm.org/D72473

[TargetLowering][ARM][Mips][WebAssembly] Remove the ordered FP compare
from RunttimeLibcalls.def and all associated usages
Summary: This always just used the same libcall as unordered, but the
comparison predicate was different. This change appears to have been
made when targets were given the ability to override the predicates.
Before that they were hardcoded into the type legalizer. At that time we
never inverted predicates and we handled ugt/ult/uge/ule compares by
emitting an unordered check ORed with a ogt/olt/oge/ole checks. So only
ordered needed an inverted predicate. Later ugt/ult/uge/ule were
optimized to only call a single libcall and invert the compare.
This patch removes the ordered entries and just uses the inverting logic
that is now present. This removes some odd things in both the Mips and
WebAssembly code.
Reviewers: efriedma, ABataev, uweigand, cameron.mcinally, kpn
Reviewed By: efriedma
Subscribers: dschuff, sdardis, sbc100, arichardson, jgravelle-google,
kristof.beyls, hiraditya, aheejin, sunfish, atanasyan, Petar.Avramovic,
llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72536

[SCEV] [NFC] add more test cases for range of addrecexpr with nsw flag

[NFC] [PowerPC] Update mi-peephole-splat test
Use script to re-generate the test case, for easier comparison with 
future patches.

[AMDGPU] Remove unnecessary v_mov from a register to itself in WQM
lowering.
Summary:
- SI Whole Quad Mode phase is replacing WQM pseudo instructions with
v_mov instructions. While this is necessary for the special handling of
moving results out of WWM live ranges, it is not necessary for WQM live
ranges. The result is a v_mov from a register to itself after every WQM
operation. This change uses a COPY psuedo in these cases, which allows
the register allocator to coalesce the moves away.
Reviewers: tpr, dstuttard, foad, nhaehnle
Reviewed By: nhaehnle
Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl,
dstuttard, tpr, t-tye, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71386

Mark the test/Feature/load_extension.ll test as unsupported on Darwin.
With plugins and examples enabled, this XPASSes. Mark it as unsupported
until the owner investigates what's going on.

[X86] Use ReplaceAllUsesWith instead of ReplaceAllUsesOfValueWith to
simplify some code. NFCI

[X86][Disassembler] Simplify readPrefixes

[X86] Preserve fpexcept property when turning strict_fp_extend and
strict_fp_round into stack operations.
We use the stack for X87 fp_round and for moving from SSE f32/f64 to X87
f64/f80. Or from X87 f64/f80 to SSE f32/f64.
Note for the SSE<->X87 conversions the conversion always happens in the 
X87 domain. The load/store ops in the X87 instructions are able to
signal exceptions.

[X86] Simplify code by removing an unreachable condition. NFCI
For X87<->SSE conversions, the SSE type is always smaller than the X87
type. So we can always use the smallest type for the memory type.

Add test for GDB pretty printers.
Reviewers: dblaikie, aprantl, davide, JDevlieghere
Reviewed By: aprantl
Subscribers: jmorse, aprantl, merge_guards_bot, mgorny, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72321

[X86] Remove dead code from X86DAGToDAGISel::Select that is no longer
needed now that we don't mutate strict fp nodes. NFC

[InstCombine] Preserve nuw on sub of geps (PR44419)
Fix https://bugs.llvm.org/show_bug.cgi?id=44419 by preserving the nuw on
sub of geps. We only do this if the offset has a multiplication as the
final operation, as we can't be sure the operations is nuw in the other
cases without more thorough analysis.
Differential Revision: https://reviews.llvm.org/D72048

[LoopSimplify] Regenerate test checks; NFC
For D72519.

[LoopRotate] Add tests for rotate with switch; NFC
For D72420.

DSE: fix bug where we would only check libcalls for name rather than
whole decl

[X86] Add more complex tests for vector masks used with AND/OR/XOR.
Additional test cases for D72524.

[X86][AVX] Add lowerShuffleAsLanePermuteAndSHUFP lowering
Add initial support for lowering v4f64 shuffles to SHUFPD(VPERM2F128(V1,
V2), VPERM2F128(V1, V2)), eventually this could be used for v8f32 (and
maybe v8f64/v16f32) but I'm being conservative for the initial
implementation as only v4f64 can always succeed.
This currently is only called from lowerShuffleAsLanePermuteAndShuffle
so only gets used for unary shuffles, and we limit this to cases where
we use upper elements as otherwise concating 2 xmm shuffles is probably
the better case.
Helps with poor shuffles mentioned in D66004.

Fix copy+paste typo in shuffle test name

[Sema] Improve -Wrange-loop-analysis warnings.
No longer generate a diagnostic when a small trivially copyable type is 
used without a reference. Before the test looked for a POD type and had
no size restriction. Since the range-based for loop is only available in 
C++11 and POD types are trivially copyable in C++11 it's not required to 
test for a POD type.
Since copying a large object will be expensive its size has been 
restricted. 64 bytes is a common size of a cache line and if the object
is aligned the copy will be cheap. No performance impact testing has
been done.
Differential Revision: https://reviews.llvm.org/D72212

[X86] Fix outdated comment
The generic saturated math opcodes are no longer widened inside
X86TargetLowering

moveOperands - assert Src/Dst MachineOperands are non-null.
Fixes static-analyzer warnings.

Remove copy ctors identical to the default one. NFC.
Those do nothing but make the type no longer trivial to the compiler.

Fix uninitialized value clang static analyzer warning. NFC.

Fix "pointer is null" static analyzer warning. NFCI.
Use castAs<> instead of getAs<> since the pointer is dereferenced
immediately below and castAs will perform the null assertion for us.

Fix "pointer is null" static analyzer warnings. NFCI.
Use castAs<> instead of getAs<> since the pointer is dereferenced
immediately below and castAs will perform the null assertion for us.

Fix "pointer is null" static analyzer warning. NFCI.
Use castAs<> instead of getAs<> since the pointer is dereferenced
immediately within mangleCallingConvention and castAs will perform the
null assertion for us.

Fix "pointer is null" static analyzer warning. NFCI.
Use cast<> instead of dyn_cast<> since we know that the pointer should
be valid (and is dereferenced immediately).

Fix "pointer is null" static analyzer warnings. NFCI.
Use castAs<> instead of getAs<> since the pointers are dereferenced
immediately and castAs will perform the null assertion for us.

GlobalModuleIndex - Fix use-after-move clang static analyzer warning.
Shadow variable names meant we were referencing the Buffer input
argument, not the GlobalModuleIndex member that its std::move()'d it.

[X86AsmBackend] Be consistent about placing definitions out of line
[NFC]

[X86AsmBackend] Move static function before sole use [NFC]

[X86] Adjust nop emission by compiler to consider target decode
limitations
The primary motivation of this change is to bring the code more closely
in sync behavior wise with the assembler's version of nop emission.  I'd
like to eventually factor them into one, but that's hard to do when one
has features the other doesn't.
The longest encodeable nop on x86 is 15 bytes, but many processors - for
instance all intel chips - can't decode the 15 byte form efficiently. 
On those processors, it's better to use either a 10 byte or 11 byte
sequence depending.

[mlir] NFC: Remove Value::operator* and Value::operator-> now that Value
is properly value-typed.
Summary: These were temporary methods used to simplify the transition.
Reviewed By: antiagainst
Differential Revision: https://reviews.llvm.org/D72548

[ASTMatchers] extract public matchers from const-analysis into own patch
Summary: The analysis for const-ness of local variables required a view
generally useful matchers that are extracted into its own patch.
They are `decompositionDecl` and `forEachArgumentWithParamType`, that
works for calls through function pointers as well.
Reviewers: aaron.ballman
Reviewed By: aaron.ballman
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72505

Revert "[ASTMatchers] extract public matchers from const-analysis into
own patch"
This reverts commit 4c48ea68e491cb42f1b5d43ffba89f6a7f0dadc4. The
powerpc buildbots had an internal compiler error after this patch. This
requires some inspection.

[ExecutionEngine] Re-enable FastISel for non-iOS arm targets.
Patch by Nicolas Capens. Thanks Nicolas!
https://reviews.llvm.org/D65015

Add -Wrange-loop-analysis changes to ReleaseNotes
This reflects the recent changes done.

[X86] Turn FP_ROUND/STRICT_FP_ROUND into
X86ISD::VFPROUND/STRICT_VFPROUND during PreprocessISelDAG to remove some
duplicate isel patterns.

[X86][Disassembler] Simplify and optimize reader functions
llvm-objdump -d on clang is decreased from 8.2s to 7.8s.

[LegalizeVectorOps] Only pass SDNode* instead SDValue to all of the
Expand* and Promote* methods.
All the Expand* and Promote* function assume they are being called with
result 0 anyway. Just hardcode result 0 into them.

[LegalizeVectorOps] Remove some of the simpler Expand methods. Pass
Results vector to a couple. NFCI
Some of the simplest handlers just call TLI and if that fails, they fall
back to unrolling. For those just inline the TLI call and share the
unrolling call with the default case of Expand.
For ExpandFSUB and ExpandBITREVERSE so that its obvious they don't
return results sometimes and want to defer to LegalizeDAG.

[X86][Disassembler] Replace custom logger with LLVM_DEBUG
llvm-objdump -d on clang is decreased from 7.8s to 7.4s.
The improvement is likely due to the elimination of logger setup and 
dbgprintf(), which has a large overhead.

[Support] Optionally call signal handlers when a function wrapped by the
the CrashRecoveryContext fails
This patch allows for handling a failure inside a CrashRecoveryContext
in the same way as the global exception/signal handler. A failure will
have the same side-effect, such as cleanup of temporarty file, printing
callstack, calling relevant signal handlers, and finally returning an
exception code. This is an optional feature, disabled by default. This
is a support patch for D69825.
Differential Revision: https://reviews.llvm.org/D70568

[ORC] Fix argv handling in runAsMain / lli.
This fixes an off-by-one error in the argc value computed by runAsMain,
and switches lli back to using the input bitcode (rather than the string
"lli") as the effective program name.
Thanks to Stefan Graenitz for spotting the bug.

[Disassembler] Delete the VStream parameter of
MCDisassembler::getInstruction()
The argument is llvm::null() everywhere except llvm::errs() in 
llvm-objdump in -DLLVM_ENABLE_ASSERTIONS=On builds. It is used by no 
target but X86 in -DLLVM_ENABLE_ASSERTIONS=On builds.
If we ever have the needs to add verbose log to disassemblers, we can 
record log with a member function, instead of passing it around as an 
argument.