Changes

Summary

  1. DWARFDie.cpp: Reduce indentation with early continue (details)
  2. DWARFDie:DWARFTypePrinter: Add common utility function for checking where parentheses are required (details)
  3. [RISCV] Optimize (add (shl x, c0), (shl y, c1)) with SH*ADD (details)
  4. llvm/cmake: fix a typo (details)
  5. [X86][Atom] Fix (U)COMISS/SD uops, latency and throughput (details)
  6. [mlir][emitc] Fix indent in CondBranchOp and block label (details)
  7. [ARM] Add VGETLANEu patterns for v4f16 and v8f16 (details)
  8. [InstCombine] add/adjust tests for min/max intrinsics; NFC (details)
  9. [X86] combineX86ShufflesRecursively(): call SimplifyMultipleUseDemandedVectorElts() on after finishing recursing (details)
  10. [NFC] combineX86ShufflesRecursively(): actually address nits for previous patch (details)
  11. [X86] lowerShuffleAsDecomposedShuffleMerge(): if both inputs are broadcastable/identities, canonicalize broadcasts as such (details)
  12. [X86][TLI] SimplifyDemandedVectorEltsForTargetNode(): don't break apart broadcasts from which not just the 0'th elt is demanded (details)
  13. [X86][Atom] Specific uops for all IMUL/IDIV instructions (details)
  14. llvm-dwarfdump: Refactor type pretty printing tests (details)
  15. [X86] Fold SHUFPS(shuffle(x),shuffle(y),mask) -> SHUFPS(x,y,mask') (details)
  16. [X86][Atom] Fix FP uops + port usage (details)
  17. DWARFDie: Improve type printing for function and array types - with qualifiers (cv/reference) and pointers to them (details)
  18. DWARFDie.cpp: Minor follow-up clang-format (details)
  19. [X86] Add test cases for pr51908. NFC (details)
  20. [X86] Remove Commutable flag from mpsadbw intrinsics. (details)
  21. llvm-dwarfdump: Pretty printing types including a space between const and parenthesized references/pointers to arrays (details)
  22. [DebugInfo][LSR] Emit shorter expressions from scev-based salvaging (details)
  23. [llvm] Use pop_back_val (NFC) (details)
  24. [X86] SimplifyDemandedBits - only narrow a broadcast source if we only have one use. (details)
  25. llvm-dwarfdump: Pretty print names qualified/with scopes (details)
  26. llvm-dwarfdump: Don't print even an empty string when a type is unprintable (details)
  27. llvm-dwarfdump: support for type printing "decltype(nullptr)" as "nullptr_t" (details)
  28. llvm-dwarfdump: pretty type printing: print fully qualified names in function type parameter types (details)
  29. [SCEV] Support negative values in signed/unsigned predicate reasoning (details)
  30. [libc] Add implementations of div, ldiv, lldiv and imaxdiv. (details)
  31. Revert "Revert "[IndVars] Replace PHIs if loop exits on 1st iteration"" (details)
  32. [NFC] Add assert and test showing that revert of D109596 wasn't justified (details)
  33. [libc][obvious] Make *abs and *div functions buildable in default mode. (details)
  34. [libc][obvious] Add inttypes.h and stdlib.h as deps to *div functions. (details)
  35. [lldb] Remove two #ifndef linux from Platform.cpp (details)
  36. [mlir][NFC] Add explicit "::mlir" namespace to tblgen generated code (details)
  37. [mlir] Fix bug in partial dialect conversion (details)
  38. [MLIR] Simplex::appendVariable: early return if count == 0 (details)
  39. [CMake] Add debuginfo-tests to LLVM_ALL_PROJECTS after D110016 (details)
  40. [CaptureTracking] Allow passing LI to PointerMayBeCapturedBefore (NFC). (details)
  41. [MLIR][Linalg] Make detensoring cost-model more flexible. (details)
  42. [lldb] [gdb-remote] Remove unused arg from GDBRemoteRegisterContext::ReadRegisterBytes() (details)
  43. [lldb] [gdb-remote] Recognize aarch64v type from gdbserver (details)
  44. Revert "[AArch64][SVE] Teach cost model that masked loads/stores are cheap" (details)
  45. [mlir] Fix integration tests failures introduced in D108505 (details)
  46. AArch64: use ldp/stp for 128-bit atomic load/store in v.84 onwards (details)
  47. [OpenCL] Supports optional writing to 3d images in C++ for OpenCL 2021 (details)
  48. Add myself as a code owner for SYCL support (details)
  49. [clang][NFC] Remove dead code (details)
  50. [NewPM] Make InlinerPass (aka 'inline') a parameterized pass (details)
  51. [GlobalISel] Improve elimination of dead instructions in legalizer (details)
  52. [lldb] [gdb-remote] Always send PID when detaching w/ multiprocess (details)
  53. [mlir][openacc] Make use of the second counter extension in DataOp translation (details)
  54. [MCA] InstructionTables::execute() - use const-ref iterator in for-range loop. NFCI. (details)
  55. [X86] X86TargetTransformInfo - remove unnecessary if-else after early exit. NFCI. (details)
  56. MachOObjectFile - checkOverlappingElement - use const-ref to avoid unnecessary copies. NFCI. (details)
  57. Fix CLANG_ENABLE_STATIC_ANALYZER=OFF building all analyzer source (details)
  58. pre-commit test for D109767 (details)
  59. [update_mir_test_checks.py] Use -NEXT FileCheck directories (details)
Commit d2373c04a7cbbc38221bbfb6120e5285c765785c by dblaikie
DWARFDie.cpp: Reduce indentation with early continue
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDie.cpp
Commit ae0873483d9393d35bd5bdbfcb2bfb843c335cd5 by dblaikie
DWARFDie:DWARFTypePrinter: Add common utility function for checking where parentheses are required
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDie.cpp
Commit dee5a8ca325f3c752534442233cb601910e918c4 by ben.shi
[RISCV] Optimize (add (shl x, c0), (shl y, c1)) with SH*ADD

Optimize (add (shl x, c0), (shl y, c1)) ->
         (SLLI (SH*ADD x, y), c1), if c0-c1 == 1/2/3.

Reviewed By: craig.topper, luismarques

Differential Revision: https://reviews.llvm.org/D108916
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rv32zba.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv64zba.ll
Commit b7ec8f3dcbcdf6d27902688c8eac0e6196061cb3 by sylvestre
llvm/cmake: fix a typo
The file was modifiedllvm/CMakeLists.txt
Commit e381d8b24329cae6408205f74d0d6d9eaa6b29cf by llvm-dev
[X86][Atom] Fix (U)COMISS/SD uops, latency and throughput

Both ports are required, for reg and mem variants - we can also use the WriteFComX class directly and remove the unnecessary InstRW overrides. Matches what Intel AoM / Agner / InstLatX64 report as well.
The file was modifiedllvm/test/tools/llvm-mca/X86/Atom/resources-sse2.s
The file was modifiedllvm/lib/Target/X86/X86ScheduleAtom.td
The file was modifiedllvm/test/tools/llvm-mca/X86/Atom/resources-sse1.s
Commit 9de88fc0eac1bfc719dfd63a32b7eb069489407e by xndchn
[mlir][emitc] Fix indent in CondBranchOp and block label

1. Add missing indent in CondBranchOp
2. Remove indent in block label

Differential Revision: https://reviews.llvm.org/D109805
The file was modifiedmlir/lib/Target/Cpp/TranslateToCpp.cpp
Commit 1da52ef2943b67c0ec1ccd3b8e459d0e57e67a6d by david.green
[ARM] Add VGETLANEu patterns for v4f16 and v8f16

These were apparently missing, having no pattern that could convert a
VGETLANEu of a v4f16 to an i32. Added bf16 whilst here, following the
same code.
The file was modifiedllvm/test/CodeGen/ARM/fp16-insert-extract.ll
The file was modifiedllvm/lib/Target/ARM/ARMInstrNEON.td
The file was modifiedllvm/test/CodeGen/ARM/bf16-getlane-with-fp16.ll
Commit 9555d1edb0d16f135ae57695fc2da55deaabf082 by spatel
[InstCombine] add/adjust tests for min/max intrinsics; NFC

If we transform these, we have to propagate no-wrap/undef carefully.
The file was modifiedllvm/test/Transforms/InstCombine/minmax-intrinsics.ll
Commit 1e72ca94e5796a744d0e1a8871c33b1b4edb0acb by lebedev.ri
[X86] combineX86ShufflesRecursively(): call SimplifyMultipleUseDemandedVectorElts() on after finishing recursing

This was suggested in https://reviews.llvm.org/D108382#inline-1039018,
and it avoids regressions in that patch.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D109065
The file was modifiedllvm/test/CodeGen/X86/oddshuffles.ll
The file was modifiedllvm/test/CodeGen/X86/vselect.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 0852313e47836152b00fb8b8fd62a7e12bf92abd by lebedev.ri
[NFC] combineX86ShufflesRecursively(): actually address nits for previous patch
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 07f1d8f0caa1516e0d97616adfea4aa94f7883a4 by lebedev.ri
[X86] lowerShuffleAsDecomposedShuffleMerge(): if both inputs are broadcastable/identities, canonicalize broadcasts as such

Split off from D108253.
Broadcast is simpler than any other shuffle we might produce
to do what we want to do here, so prefer it.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D108382
The file was modifiedllvm/test/CodeGen/X86/copy-low-subvec-elt-to-high-subvec-elt.ll
The file was modifiedllvm/test/CodeGen/X86/horizontal-sum.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 5f2fe48d06c742872804da8b3d86596ed2bb9acb by lebedev.ri
[X86][TLI] SimplifyDemandedVectorEltsForTargetNode(): don't break apart broadcasts from which not just the 0'th elt is demanded

Apparently this has no test coverage before D108382,
but D108382 itself shows a few regressions that this fixes.

It doesn't seem worthwhile breaking apart broadcasts,
assuming we want the broadcasted value to be preset in several elements,
not just the 0'th one.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D108411
The file was modifiedllvm/test/CodeGen/X86/horizontal-sum.ll
The file was modifiedllvm/test/CodeGen/X86/copy-low-subvec-elt-to-high-subvec-elt.ll
The file was modifiedllvm/test/CodeGen/X86/sse41.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit cf8fac7d07307bc6679d60c3ad3e7a7792a2caa6 by llvm-dev
[X86][Atom] Specific uops for all IMUL/IDIV instructions

Based off a mixture of llvm-exegesis captures (PR36895) and Intel AoM / Agner / InstLatX64 reports.
The file was modifiedllvm/test/tools/llvm-mca/X86/Atom/resources-x86_64.s
The file was modifiedllvm/lib/Target/X86/X86ScheduleAtom.td
Commit 2ca637c9769ff50e94ace3083075a97b50d147f0 by dblaikie
llvm-dwarfdump: Refactor type pretty printing tests

Move most type tests to a pre-generated assembly file to make it easier
to add more weird cases without having to hand craft more DWARF.

Move the novel array types that aren't reachable via clang-generated
DWARF to a separate file for easy maintenance.
The file was addedllvm/test/tools/llvm-dwarfdump/X86/prettyprint_types_handcrafted.s
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/prettyprint_types.s
Commit b7342e3137d8fa7c356a80c1ddecf1d410c27eef by llvm-dev
[X86] Fold SHUFPS(shuffle(x),shuffle(y),mask) -> SHUFPS(x,y,mask')

We can combine unary shuffles into either of SHUFPS's inputs and adjust the shuffle mask accordingly.

Unlike general shuffle combining, we can be more aggressive and handle multiuse cases as we're not going to accidentally create additional shuffles.
The file was modifiedllvm/test/CodeGen/X86/vselect.ll
The file was modifiedllvm/test/CodeGen/X86/horizontal-sum.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit f855ef260148df0f08c73a70b9425a5215232874 by llvm-dev
[X86][Atom] Fix FP uops + port usage

Both ports are required in most cases. Update the uops counts + port usage based off the most recent llvm-exegesis captures (PR36895) and what Intel AoM / Agner / InstLatX64 reports as well.

Noticed while trying to improve fp costs for vectorization via the D103695 helper script.
The file was modifiedllvm/test/tools/llvm-mca/X86/Atom/resources-x87.s
The file was modifiedllvm/test/tools/llvm-mca/X86/Atom/resources-sse3.s
The file was modifiedllvm/lib/Target/X86/X86ScheduleAtom.td
The file was modifiedllvm/test/tools/llvm-mca/X86/Atom/resources-sse1.s
The file was modifiedllvm/test/tools/llvm-mca/X86/Atom/resources-sse2.s
The file was modifiedllvm/test/tools/llvm-mca/X86/Atom/resources-ssse3.s
Commit f09ca5c6461b604113b6e1adb825be2d92575aff by dblaikie
DWARFDie: Improve type printing for function and array types - with qualifiers (cv/reference) and pointers to them
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/prettyprint_types.s
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDie.cpp
Commit a51fb58c557c2cd217eddc8a2332b245350118cf by dblaikie
DWARFDie.cpp: Minor follow-up clang-format
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDie.cpp
Commit 2bde3dcd32b3ce2c8855d13659c6708f4434a985 by craig.topper
[X86] Add test cases for pr51908. NFC
The file was modifiedllvm/test/CodeGen/X86/sse41-intrinsics-x86.ll
The file was modifiedllvm/test/CodeGen/X86/avx2-intrinsics-x86.ll
Commit 391fa371fdfbc5ea4d4a924aebb27cb77d483da4 by craig.topper
[X86] Remove Commutable flag from mpsadbw intrinsics.

Unlike psadbw, mpsadbw is not commutable because of how it operates
on blocks. We already marked as not commutable for MachineIR, but
had it commutable for the tablegened isel patterns.

Fixes PR51908.
The file was modifiedllvm/test/CodeGen/X86/sse41-intrinsics-x86.ll
The file was modifiedllvm/include/llvm/IR/IntrinsicsX86.td
The file was modifiedllvm/test/CodeGen/X86/avx2-intrinsics-x86.ll
Commit 372e2c24b6e17bbff8fe6ed488cff5f7b7abd2b7 by dblaikie
llvm-dwarfdump: Pretty printing types including a space between const and parenthesized references/pointers to arrays
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDie.cpp
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/prettyprint_types.s
Commit 5ba8020326a522c0dfa32f59a472fe20bee4908a by chris.jackson
[DebugInfo][LSR] Emit shorter expressions from scev-based salvaging

The scev-based salvaging for LSR can sometimes produce unnecessarily
verbose expressions. This patch adds logic to detect when the value to
be recovered and the induction variable differ by only a constant
offset. Then, the expression to derive the current iteration count can
be omitted from the dbg.value in favour of the offset.

Reviewed by: aprantl

Differential Revision: https://reviews.llvm.org/D109044
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/dbg-preserve-0.ll
The file was modifiedllvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
Commit 84b07c9b3aa79e073a97290bdd30d98b1941a536 by kazu
[llvm] Use pop_back_val (NFC)
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64StackTaggingPreRA.cpp
The file was modifiedllvm/lib/CodeGen/CodeGenPrepare.cpp
The file was modifiedllvm/lib/CodeGen/ReachingDefAnalysis.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
The file was modifiedllvm/lib/Analysis/MemorySSAUpdater.cpp
The file was modifiedllvm/lib/Target/ARM/A15SDOptimizer.cpp
The file was modifiedllvm/lib/CodeGen/LoopTraversal.cpp
The file was modifiedllvm/lib/CodeGen/TwoAddressInstructionPass.cpp
The file was modifiedllvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
The file was modifiedllvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
The file was modifiedllvm/lib/CodeGen/LiveRangeEdit.cpp
The file was modifiedllvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
The file was modifiedllvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmTypeCheck.cpp
The file was modifiedllvm/lib/IR/Value.cpp
The file was modifiedllvm/lib/Transforms/Coroutines/CoroFrame.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/ObjectLinkingLayer.cpp
The file was modifiedllvm/lib/Analysis/StackSafetyAnalysis.cpp
The file was modifiedllvm/lib/CodeGen/LiveVariables.cpp
Commit 0e89ff8195e994e5051f19669e1044d47120ac06 by llvm-dev
[X86] SimplifyDemandedBits - only narrow a broadcast source if we only have one use.

Helps with the regression noted on D109065 - don't truncate a broadcast source if the source has multiple uses.
The file was modifiedllvm/test/CodeGen/X86/oddshuffles.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 5bfe5207ef283194a76616e5693a67a14c158ae3 by dblaikie
llvm-dwarfdump: Pretty print names qualified/with scopes
The file was modifiedllvm/test/DebugInfo/X86/addr-tu-to-non-tu.ll
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDie.cpp
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/prettyprint_types.s
Commit 11e0b79b056a5f1ba1feb81872aee67709f34834 by dblaikie
llvm-dwarfdump: Don't print even an empty string when a type is unprintable
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDie.cpp
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/verify_debug_info.s
Commit 606ea0dd2a7308d4af222ddcf0ae66c6267cb90d by dblaikie
llvm-dwarfdump: support for type printing "decltype(nullptr)" as "nullptr_t"

This should probably be rendered as "std::nullptr_t" but for now clang
uses the unqualified name (which is ambiguous with possible user defined
name in the global namespace), so match that here.
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/prettyprint_types.s
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDie.cpp
Commit cb42bb355061235f1c4190c8a35e59e4cfb15163 by dblaikie
llvm-dwarfdump: pretty type printing: print fully qualified names in function type parameter types
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDie.cpp
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/prettyprint_types.s
Commit def15c5fb6a117c1b6d8b2835f6760f814410582 by mkazantsev
[SCEV] Support negative values in signed/unsigned predicate reasoning

There is a piece of logic that uses the fact that signed and unsigned
versions of the same predicate are equivalent when both values are
non-negative. It's also true when both of them are negative.

Differential Revision: https://reviews.llvm.org/D109957
Reviewed By: nikic
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was modifiedllvm/test/Transforms/IndVarSimplify/negative_ranges.ll
Commit 74670e79b0a00224c04dfc6a446ea4439f4cfca4 by sivachandra
[libc] Add implementations of div, ldiv, lldiv and imaxdiv.

Reviewed By: michaelrj

Differential Revision: https://reviews.llvm.org/D109952
The file was modifiedlibc/config/linux/x86_64/entrypoints.txt
The file was addedlibc/src/stdlib/lldiv.cpp
The file was addedlibc/src/stdlib/ldiv.cpp
The file was modifiedlibc/src/stdlib/CMakeLists.txt
The file was addedlibc/test/src/stdlib/div_test.cpp
The file was addedlibc/test/src/stdlib/ldiv_test.cpp
The file was modifiedlibc/src/inttypes/CMakeLists.txt
The file was addedlibc/src/stdlib/div.cpp
The file was addedlibc/src/stdlib/ldiv.h
The file was addedlibc/src/inttypes/imaxdiv.cpp
The file was addedlibc/src/inttypes/imaxdiv.h
The file was modifiedlibc/spec/stdc.td
The file was modifiedlibc/test/src/inttypes/CMakeLists.txt
The file was addedlibc/test/src/stdlib/DivTest.h
The file was addedlibc/test/src/stdlib/lldiv_test.cpp
The file was modifiedlibc/src/__support/integer_operations.h
The file was addedlibc/test/src/inttypes/imaxdiv_test.cpp
The file was addedlibc/src/stdlib/div.h
The file was addedlibc/src/stdlib/lldiv.h
The file was modifiedlibc/config/linux/aarch64/entrypoints.txt
The file was modifiedlibc/test/src/stdlib/CMakeLists.txt
The file was modifiedlibc/config/linux/api.td
Commit 471217cff8e5c827f2ee52175a1c94584699cab2 by mkazantsev
Revert "Revert "[IndVars] Replace PHIs if loop exits on 1st iteration""

This reverts commit 6fec6552f54885ae06bf76b35f9f1173a0561a4c.

The patch was reverted on incorrect claim that this patch may break LCSSA form
when the loop is not in a simplify form. All IndVars' transform insure that
the loop is in simplify and LCSSA form, so if it wasn't broken before this
transform, it will also not be broken after it.
The file was modifiedllvm/lib/Transforms/Scalar/IndVarSimplify.cpp
The file was modifiedllvm/test/Transforms/IndVarSimplify/floating-point-iv.ll
The file was modifiedllvm/test/Transforms/IndVarSimplify/eliminate-backedge.ll
The file was modifiedllvm/test/Transforms/IndVarSimplify/eliminate-exit-no-dl.ll
Commit e9d34c54290e277e075aed33036fddae77b5f582 by mkazantsev
[NFC] Add assert and test showing that revert of D109596 wasn't justified

All transforms of IndVars have prerequisite requirement of LCSSA and LoopSimplify
form and rely on it. Added test that shows that this actually stands.
The file was modifiedllvm/lib/Transforms/Scalar/IndVarSimplify.cpp
The file was modifiedllvm/test/Transforms/IndVarSimplify/eliminate-backedge.ll
Commit 5252aa2981ba19417b3ea68b22e8be33d5623368 by sivachandra
[libc][obvious] Make *abs and *div functions buildable in default mode.
The file was modifiedlibc/src/stdlib/CMakeLists.txt
Commit f5b8f1247cd9d1b18b7b95f6f197d4d654597529 by sivachandra
[libc][obvious] Add inttypes.h and stdlib.h as deps to *div functions.
The file was modifiedlibc/src/inttypes/CMakeLists.txt
The file was modifiedlibc/src/stdlib/CMakeLists.txt
Commit 966922320f09b8bf6e4a69a32f344b3acec36434 by pavel
[lldb] Remove two #ifndef linux from Platform.cpp

These have been here since r215992, guarding the calls to HostInfo, but
their purpose unclear -- HostInfoLinux provides these functions and they
work fine.
The file was modifiedlldb/source/Target/Platform.cpp
Commit 9a2255dfa012ad0334eacb2d09da7aa4db249c51 by vlad.vinogradov
[mlir][NFC] Add explicit "::mlir" namespace to tblgen generated code

Reviewed By: lattner, ftynse

Differential Revision: https://reviews.llvm.org/D109223
The file was modifiedmlir/include/mlir/IR/OpBase.td
Commit ec03bbe8a74ae593d0ea5d8bf55c337e395873d1 by vlad.vinogradov
[mlir] Fix bug in partial dialect conversion

The discussion on forum:
https://llvm.discourse.group/t/bug-in-partial-dialect-conversion/4115

The `applyPartialConversion` didn't handle the operations, that were
marked as illegal inside dynamic legality callback.
Instead of reporting error, if such operation was not converted to legal set,
the method just added it to `unconvertedSet` in the same way as unknown operations.

This patch fixes that and handle dynamically illegal operations as well.

The patch includes 2 fixes for existing passes:

* `tensor-bufferize` - explicitly mark `std.return` as legal.
* `convert-parallel-loops-to-gpu` - ugly fix with marking visited operations
  to avoid recursive legality checks.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D108505
The file was modifiedmlir/lib/Conversion/SCFToGPU/SCFToGPUPass.cpp
The file was modifiedmlir/include/mlir/Conversion/SCFToGPU/SCFToGPU.h
The file was modifiedmlir/test/Transforms/test-legalizer.mlir
The file was modifiedmlir/lib/Transforms/Utils/DialectConversion.cpp
The file was modifiedmlir/lib/Dialect/Tensor/Transforms/Bufferize.cpp
The file was modifiedmlir/test/lib/Dialect/Test/TestOps.td
The file was modifiedmlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp
The file was modifiedmlir/test/lib/Dialect/Test/TestPatterns.cpp
The file was modifiedmlir/test/Transforms/test-legalizer-full.mlir
Commit 76cb876563d0e2a3c850b14ca68638be9f6124a0 by arjunpitchanathan
[MLIR] Simplex::appendVariable: early return if count == 0
The file was modifiedmlir/unittests/Analysis/Presburger/SimplexTest.cpp
The file was modifiedmlir/lib/Analysis/Presburger/Simplex.cpp
Commit 4b80f0125adc876c8ef325f1c0ace4af023f2264 by i
[CMake] Add debuginfo-tests to LLVM_ALL_PROJECTS after D110016
The file was modifiedllvm/CMakeLists.txt
Commit 7f6a4826ac49e4c7075f80930480045bf983483c by flo
[CaptureTracking] Allow passing LI to PointerMayBeCapturedBefore (NFC).

isPotentiallyReachable can use LoopInfo to return earlier. This patch
allows passing an optional LI to PointerMayBeCapturedBefore. Used in
D109844.

Reviewed By: nikic, asbirlea

Differential Revision: https://reviews.llvm.org/D109978
The file was modifiedllvm/include/llvm/Analysis/CaptureTracking.h
The file was modifiedllvm/lib/Analysis/CaptureTracking.cpp
Commit bdcf4b9b9620afe24d17132027a7d12e2f1a598b by kareem.ergawy
[MLIR][Linalg] Make detensoring cost-model more flexible.

So far, the CF cost-model for detensoring was limited to discovering
pure CF structures. This means, if while discovering the CF component,
the cost-model found any op that is not detensorable, it gives up on
detensoring altogether. This patch makes it a bit more flexible by
cleaning-up the detensorable component from non-detensorable ops without
giving up entirely.

Reviewed By: silvas

Differential Revision: https://reviews.llvm.org/D109965
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Detensorize.cpp
The file was addedmlir/test/Dialect/Linalg/detensorize_while_impure_cf.mlir
The file was removedmlir/test/Dialect/Linalg/detensorize_while_failure.mlir
Commit 92904cc68fbc1d000387b30accc8b05b3fe95daa by mgorny
[lldb] [gdb-remote] Remove unused arg from GDBRemoteRegisterContext::ReadRegisterBytes()

Differential Revision: https://reviews.llvm.org/D110020
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.cpp
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.h
Commit f6e0edc23e6199bbb5fb4ef3b018b49a5b303183 by mgorny
[lldb] [gdb-remote] Recognize aarch64v type from gdbserver

Differential Revision: https://reviews.llvm.org/D109899
The file was modifiedlldb/test/API/functionalities/gdb_remote_client/TestGDBServerTargetXML.py
The file was modifiedlldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
Commit 92c9b28347c38cc15adf20223ed272abe8ec0227 by david.spickett
Revert "[AArch64][SVE] Teach cost model that masked loads/stores are cheap"

This reverts commit 734708e04f84b72f1ae7c8b35c002b8bf97dc064.

Due to build failures on the 2 stage SVE VLS bot.
https://lab.llvm.org/buildbot/#/builders/176/builds/908/steps/11/logs/stdio
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
The file was removedllvm/test/Analysis/CostModel/AArch64/masked_ldst_vls.ll
Commit 798e4bfbeda824551fa89a388969baa2abbc2411 by vlad.vinogradov
[mlir] Fix integration tests failures introduced in D108505
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Bufferize.cpp
The file was modifiedmlir/lib/Dialect/Tensor/Transforms/Bufferize.cpp
Commit 13aa102e07695297fd17f68913c343c95a7c56ad by Tim Northover
AArch64: use ldp/stp for 128-bit atomic load/store in v.84 onwards

v8.4 says that normal loads/stores of 128-bytes are single-copy atomic if
they're properly aligned (which all LLVM atomics are) so we no longer need to
do a full RMW operation to guarantee we got a clean read.
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64.td
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic-128.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64Subtarget.h
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/v8.4-atomic-128.ll
The file was modifiedllvm/test/CodeGen/AArch64/atomic-ops-lse.ll
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
The file was addedllvm/test/CodeGen/AArch64/v8.4-atomic-128.ll
Commit ca3bebd8440f9f88f1457dad9c12933b73d9590f by Justas.Janickas
[OpenCL] Supports optional writing to 3d images in C++ for OpenCL 2021

Adds support for a feature macro __opencl_c_3d_image_writes in
C++ for OpenCL 2021 enabling a respective optional core feature
from OpenCL 3.0.

This change aims to achieve compatibility between C++ for OpenCL
2021 and OpenCL 3.0.

Differential Revision: https://reviews.llvm.org/D109328
The file was modifiedclang/test/SemaOpenCL/unsupported-image.cl
The file was modifiedclang/test/Misc/opencl-c-3.0.incorrect_options.cl
The file was modifiedclang/lib/Sema/SemaType.cpp
Commit 15feaaa359c7245bb59ff0a2aa3b806682f44286 by alexey.bader
Add myself as a code owner for SYCL support
The file was modifiedclang/CODE_OWNERS.TXT
Commit eb3af1e77341e82249993a5a8a50779c48e1cb61 by wingo
[clang][NFC] Remove dead code

Remove code that has no effect in SemaType.cpp:processTypeAttrs.

Differential Revision: https://reviews.llvm.org/D108360
The file was modifiedclang/lib/Sema/SemaType.cpp
Commit c8cb7f611fdf4d96c4d23a75aa48c93cca38646f by bjorn.a.pettersson
[NewPM] Make InlinerPass (aka 'inline') a parameterized pass

In default pipelines the ModuleInlinerWrapperPass is adding the
InlinerPass to the pipeline twice, once due to MandatoryFirst (passing
true in the ctor) and then a second time with false as argument.

To make it possible to bisect and reduce opt test cases for this
part of the pipeline we need to be able to choose between the two
different variants of the InlinerPass when running opt. This patch is
changing 'inline' to a CGSCC_PASS_WITH_PARAMS in the PassRegistry,
making it possible run opt with both -passes=cgscc(inline) and
-passes=cgscc(inline<only-mandatory>).

Reviewed By: aeubanks, mtrofin

Differential Revision: https://reviews.llvm.org/D109877
The file was modifiedllvm/lib/Passes/PassRegistry.def
The file was modifiedllvm/lib/Passes/PassBuilder.cpp
The file was modifiedllvm/lib/Transforms/IPO/Inliner.cpp
The file was modifiedllvm/include/llvm/Transforms/IPO/Inliner.h
Commit e4c46ddd91eba5ec162225abc1e47aa3c6c13516 by petar.avramovic
[GlobalISel] Improve elimination of dead instructions in legalizer

Add eraseInstr(s) utility functions. Before deleting an instruction
collects its use instructions. After deletion deletes use instructions
that became trivially dead.
This patch clears all dead instructions in existing legalizer mir tests.

Differential Revision: https://reviews.llvm.org/D109154
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-zext.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcos.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smax.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-build-vector.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-freeze.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext-inreg.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-ssube.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umulo.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-usubo.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uadde.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssube.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sub.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fshr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memcpyinline.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-udiv.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-and.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.dim.a16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-xor.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-bswap.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubo.mir
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/legalizer/zext_and_sext.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-extracts.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/bug-legalization-artifact-combiner-dead-def.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umax.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-extload.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddsat.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-round.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubsat.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fneg.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubsat.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-saddsat.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsin.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ushlsat.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smulo.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sadde.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-saddo.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/legalizer/bitwise.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-inserts.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcanonicalize.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-sadde.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umulh.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-phi-insertpt-decrement.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-phi.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fma.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-extract.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-mul.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fdiv.mir
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/legalizer/zextLoad_and_sextLoad.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddsat.mir
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/legalizer/constants.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-ssubo.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
The file was modifiedllvm/test/CodeGen/X86/GlobalISel/legalize-shl-scalar.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddo.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-extract-vector-elt.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-brcond.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umin.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-ssubsat.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-uaddo.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-trunc.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-add.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-usube.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-concat-vectors.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-implicit-def.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.d16.ll
The file was modifiedllvm/lib/CodeGen/GlobalISel/Legalizer.cpp
The file was modifiedllvm/lib/CodeGen/GlobalISel/Utils.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-uadde.mir
The file was modifiedllvm/test/CodeGen/ARM/GlobalISel/arm-legalize-fp.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/artifact-find-value.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddo.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memmove.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ffloor.mir
The file was modifiedllvm/test/CodeGen/X86/GlobalISel/legalize-ashr-scalar.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usube.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-anyext.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-phi.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-and.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert-vector-elt.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/legalizer/trunc.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-merge-values.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fshl.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sdiv.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memset.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-unmerge-values.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.store.2d.d16.ll
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/Utils.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sshlsat.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz-zero-undef.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-unmerge-values.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsqrt.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memcpy.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
The file was modifiedllvm/test/CodeGen/X86/GlobalISel/legalize-lshr-scalar.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsub.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-implicit-def-s1025.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smin.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bswap.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract-vector-elt.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpext.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubo.mir
Commit b1099120ff963d0a0f1de12e3315b1ee4e4ed7e7 by mgorny
[lldb] [gdb-remote] Always send PID when detaching w/ multiprocess

Always send PID in the detach packet when multiprocess extensions are
enabled.  This is required by qemu's GDB server, as plain 'D' packet
results in an error and the emulated system is not resumed.

Differential Revision: https://reviews.llvm.org/D110033
The file was modifiedlldb/test/API/functionalities/gdb_remote_client/TestGDBRemoteClient.py
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
Commit d6929aaa67c7996a69451e301970408362af909e by clementval
[mlir][openacc] Make use of the second counter extension in DataOp translation

Make use of runtime extension for the second reference counter used in
structured data region. This extension is implemented in D106510 and D106509.

Differential Revision: https://reviews.llvm.org/D106517
The file was modifiedmlir/lib/Target/LLVMIR/Dialect/OpenACC/OpenACCToLLVMIRTranslation.cpp
The file was modifiedmlir/test/Target/LLVMIR/openacc-llvm.mlir
Commit ea17b15f2dcdc77881cc0183dce4dea1aff9bffa by llvm-dev
[MCA] InstructionTables::execute() - use const-ref iterator in for-range loop. NFCI.

Avoid unnecessary copies, reported by MSVC static analyzer.
The file was modifiedllvm/lib/MCA/Stages/InstructionTables.cpp
Commit 4ab7c0d3fa068fb0ce39b9f75c0253d45a99745e by llvm-dev
[X86] X86TargetTransformInfo - remove unnecessary if-else after early exit. NFCI.

(style) Break the if-else chain as they all return.
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
Commit 7fc12b822c5d1360780667af94c218733c3fc4e0 by llvm-dev
MachOObjectFile - checkOverlappingElement - use const-ref to avoid unnecessary copies. NFCI.

Reported by MSVC static analyzer.
The file was modifiedllvm/lib/Object/MachOObjectFile.cpp
Commit 6d7b3d6b3a8dbd62650b6c3dae1fe904a8ae9048 by Alexander.Richardson
Fix CLANG_ENABLE_STATIC_ANALYZER=OFF building all analyzer source

Since https://reviews.llvm.org/D87118, the StaticAnalyzer directory is
added unconditionally. In theory this should not cause the static analyzer
sources to be built unless they are referenced by another target. However,
the clang-cpp target (defined in clang/tools/clang-shlib) uses the
CLANG_STATIC_LIBS global property to determine which libraries need to
be included. To solve this issue, this patch avoids adding libraries to
that property if EXCLUDE_FROM_ALL is set.

In case something like this comes up again: `cmake --graphviz=targets.dot`
is quite useful to see why a target is included as part of `ninja all`.

Reviewed By: thakis

Differential Revision: https://reviews.llvm.org/D109611
The file was modifiedllvm/cmake/modules/AddLLVM.cmake
The file was modifiedclang/lib/StaticAnalyzer/CMakeLists.txt
The file was modifiedclang/cmake/modules/AddClang.cmake
Commit 7b68c0725d89ac9bd48b9b6a51d9cd0bc7146829 by Alexander.Richardson
pre-commit test for D109767

Differential Revision: https://reviews.llvm.org/D109765
The file was addedllvm/test/tools/UpdateTestChecks/update_mir_test_checks/x86-condbr.test
The file was addedllvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-condbr.mir
The file was addedllvm/test/tools/UpdateTestChecks/update_mir_test_checks/lit.local.cfg
The file was addedllvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-condbr.mir.expected
Commit 817e23d481be52e6e0fd779efce2beb105e8c7b6 by Alexander.Richardson
[update_mir_test_checks.py] Use -NEXT FileCheck directories

Previously the script emitted output using plain CHECK directives. This
can result in a test passing even if there are some instructions between
CHECK directives that should have been removed. It also makes debugging
tests that have the output in a different order more difficult since
FileCheck can match with a later line and then complain about the "wrong"
directive not being found.

This will cause quite large diffs when updating existing tests, but I'm not sure we need an opt-in flag here.

Depends on D109765 (pre-commit tests)

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D109767
The file was modifiedllvm/utils/update_mir_test_checks.py
The file was modifiedllvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-condbr.mir.expected
The file was modifiedllvm/test/CodeGen/X86/GlobalISel/select-phi.mir