Commit
d2373c04a7cbbc38221bbfb6120e5285c765785c
by dblaikieDWARFDie.cpp: Reduce indentation with early continue
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 | llvm/lib/DebugInfo/DWARF/DWARFDie.cpp |
Commit
ae0873483d9393d35bd5bdbfcb2bfb843c335cd5
by dblaikieDWARFDie:DWARFTypePrinter: Add common utility function for checking where parentheses are required
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 | llvm/lib/DebugInfo/DWARF/DWARFDie.cpp |
Commit
dee5a8ca325f3c752534442233cb601910e918c4
by ben.shi[RISCV] Optimize (add (shl x, c0), (shl y, c1)) with SH*ADD
Optimize (add (shl x, c0), (shl y, c1)) -> (SLLI (SH*ADD x, y), c1), if c0-c1 == 1/2/3.
Reviewed By: craig.topper, luismarques
Differential Revision: https://reviews.llvm.org/D108916
|
 | llvm/lib/Target/RISCV/RISCVISelLowering.cpp |
 | llvm/test/CodeGen/RISCV/rv32zba.ll |
 | llvm/test/CodeGen/RISCV/rv64zba.ll |
Commit
b7ec8f3dcbcdf6d27902688c8eac0e6196061cb3
by sylvestrellvm/cmake: fix a typo
|
 | llvm/CMakeLists.txt |
Commit
e381d8b24329cae6408205f74d0d6d9eaa6b29cf
by llvm-dev[X86][Atom] Fix (U)COMISS/SD uops, latency and throughput
Both ports are required, for reg and mem variants - we can also use the WriteFComX class directly and remove the unnecessary InstRW overrides. Matches what Intel AoM / Agner / InstLatX64 report as well.
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 | llvm/lib/Target/X86/X86ScheduleAtom.td |
 | llvm/test/tools/llvm-mca/X86/Atom/resources-sse1.s |
 | llvm/test/tools/llvm-mca/X86/Atom/resources-sse2.s |
Commit
9de88fc0eac1bfc719dfd63a32b7eb069489407e
by xndchn[mlir][emitc] Fix indent in CondBranchOp and block label
1. Add missing indent in CondBranchOp 2. Remove indent in block label
Differential Revision: https://reviews.llvm.org/D109805
|
 | mlir/lib/Target/Cpp/TranslateToCpp.cpp |
Commit
1da52ef2943b67c0ec1ccd3b8e459d0e57e67a6d
by david.green[ARM] Add VGETLANEu patterns for v4f16 and v8f16
These were apparently missing, having no pattern that could convert a VGETLANEu of a v4f16 to an i32. Added bf16 whilst here, following the same code.
|
 | llvm/test/CodeGen/ARM/bf16-getlane-with-fp16.ll |
 | llvm/lib/Target/ARM/ARMInstrNEON.td |
 | llvm/test/CodeGen/ARM/fp16-insert-extract.ll |
Commit
9555d1edb0d16f135ae57695fc2da55deaabf082
by spatel[InstCombine] add/adjust tests for min/max intrinsics; NFC
If we transform these, we have to propagate no-wrap/undef carefully.
|
 | llvm/test/Transforms/InstCombine/minmax-intrinsics.ll |
Commit
1e72ca94e5796a744d0e1a8871c33b1b4edb0acb
by lebedev.ri[X86] combineX86ShufflesRecursively(): call SimplifyMultipleUseDemandedVectorElts() on after finishing recursing
This was suggested in https://reviews.llvm.org/D108382#inline-1039018, and it avoids regressions in that patch.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D109065
|
 | llvm/test/CodeGen/X86/oddshuffles.ll |
 | llvm/lib/Target/X86/X86ISelLowering.cpp |
 | llvm/test/CodeGen/X86/vselect.ll |
Commit
0852313e47836152b00fb8b8fd62a7e12bf92abd
by lebedev.ri[NFC] combineX86ShufflesRecursively(): actually address nits for previous patch
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 | llvm/lib/Target/X86/X86ISelLowering.cpp |
Commit
07f1d8f0caa1516e0d97616adfea4aa94f7883a4
by lebedev.ri[X86] lowerShuffleAsDecomposedShuffleMerge(): if both inputs are broadcastable/identities, canonicalize broadcasts as such
Split off from D108253. Broadcast is simpler than any other shuffle we might produce to do what we want to do here, so prefer it.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D108382
|
 | llvm/lib/Target/X86/X86ISelLowering.cpp |
 | llvm/test/CodeGen/X86/copy-low-subvec-elt-to-high-subvec-elt.ll |
 | llvm/test/CodeGen/X86/horizontal-sum.ll |
Commit
5f2fe48d06c742872804da8b3d86596ed2bb9acb
by lebedev.ri[X86][TLI] SimplifyDemandedVectorEltsForTargetNode(): don't break apart broadcasts from which not just the 0'th elt is demanded
Apparently this has no test coverage before D108382, but D108382 itself shows a few regressions that this fixes.
It doesn't seem worthwhile breaking apart broadcasts, assuming we want the broadcasted value to be preset in several elements, not just the 0'th one.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D108411
|
 | llvm/lib/Target/X86/X86ISelLowering.cpp |
 | llvm/test/CodeGen/X86/sse41.ll |
 | llvm/test/CodeGen/X86/horizontal-sum.ll |
 | llvm/test/CodeGen/X86/copy-low-subvec-elt-to-high-subvec-elt.ll |
Commit
cf8fac7d07307bc6679d60c3ad3e7a7792a2caa6
by llvm-dev[X86][Atom] Specific uops for all IMUL/IDIV instructions
Based off a mixture of llvm-exegesis captures (PR36895) and Intel AoM / Agner / InstLatX64 reports.
|
 | llvm/lib/Target/X86/X86ScheduleAtom.td |
 | llvm/test/tools/llvm-mca/X86/Atom/resources-x86_64.s |
Commit
2ca637c9769ff50e94ace3083075a97b50d147f0
by dblaikiellvm-dwarfdump: Refactor type pretty printing tests
Move most type tests to a pre-generated assembly file to make it easier to add more weird cases without having to hand craft more DWARF.
Move the novel array types that aren't reachable via clang-generated DWARF to a separate file for easy maintenance.
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 | llvm/test/tools/llvm-dwarfdump/X86/prettyprint_types_handcrafted.s |
 | llvm/test/tools/llvm-dwarfdump/X86/prettyprint_types.s |
Commit
b7342e3137d8fa7c356a80c1ddecf1d410c27eef
by llvm-dev[X86] Fold SHUFPS(shuffle(x),shuffle(y),mask) -> SHUFPS(x,y,mask')
We can combine unary shuffles into either of SHUFPS's inputs and adjust the shuffle mask accordingly.
Unlike general shuffle combining, we can be more aggressive and handle multiuse cases as we're not going to accidentally create additional shuffles.
|
 | llvm/test/CodeGen/X86/horizontal-sum.ll |
 | llvm/test/CodeGen/X86/vselect.ll |
 | llvm/lib/Target/X86/X86ISelLowering.cpp |
Commit
f855ef260148df0f08c73a70b9425a5215232874
by llvm-dev[X86][Atom] Fix FP uops + port usage
Both ports are required in most cases. Update the uops counts + port usage based off the most recent llvm-exegesis captures (PR36895) and what Intel AoM / Agner / InstLatX64 reports as well.
Noticed while trying to improve fp costs for vectorization via the D103695 helper script.
|
 | llvm/test/tools/llvm-mca/X86/Atom/resources-sse1.s |
 | llvm/test/tools/llvm-mca/X86/Atom/resources-sse2.s |
 | llvm/test/tools/llvm-mca/X86/Atom/resources-sse3.s |
 | llvm/lib/Target/X86/X86ScheduleAtom.td |
 | llvm/test/tools/llvm-mca/X86/Atom/resources-ssse3.s |
 | llvm/test/tools/llvm-mca/X86/Atom/resources-x87.s |
Commit
f09ca5c6461b604113b6e1adb825be2d92575aff
by dblaikieDWARFDie: Improve type printing for function and array types - with qualifiers (cv/reference) and pointers to them
|
 | llvm/lib/DebugInfo/DWARF/DWARFDie.cpp |
 | llvm/test/tools/llvm-dwarfdump/X86/prettyprint_types.s |
Commit
a51fb58c557c2cd217eddc8a2332b245350118cf
by dblaikieDWARFDie.cpp: Minor follow-up clang-format
|
 | llvm/lib/DebugInfo/DWARF/DWARFDie.cpp |
Commit
2bde3dcd32b3ce2c8855d13659c6708f4434a985
by craig.topper[X86] Add test cases for pr51908. NFC
|
 | llvm/test/CodeGen/X86/sse41-intrinsics-x86.ll |
 | llvm/test/CodeGen/X86/avx2-intrinsics-x86.ll |
Commit
391fa371fdfbc5ea4d4a924aebb27cb77d483da4
by craig.topper[X86] Remove Commutable flag from mpsadbw intrinsics.
Unlike psadbw, mpsadbw is not commutable because of how it operates on blocks. We already marked as not commutable for MachineIR, but had it commutable for the tablegened isel patterns.
Fixes PR51908.
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 | llvm/test/CodeGen/X86/avx2-intrinsics-x86.ll |
 | llvm/test/CodeGen/X86/sse41-intrinsics-x86.ll |
 | llvm/include/llvm/IR/IntrinsicsX86.td |
Commit
372e2c24b6e17bbff8fe6ed488cff5f7b7abd2b7
by dblaikiellvm-dwarfdump: Pretty printing types including a space between const and parenthesized references/pointers to arrays
|
 | llvm/test/tools/llvm-dwarfdump/X86/prettyprint_types.s |
 | llvm/lib/DebugInfo/DWARF/DWARFDie.cpp |
Commit
5ba8020326a522c0dfa32f59a472fe20bee4908a
by chris.jackson[DebugInfo][LSR] Emit shorter expressions from scev-based salvaging
The scev-based salvaging for LSR can sometimes produce unnecessarily verbose expressions. This patch adds logic to detect when the value to be recovered and the induction variable differ by only a constant offset. Then, the expression to derive the current iteration count can be omitted from the dbg.value in favour of the offset.
Reviewed by: aprantl
Differential Revision: https://reviews.llvm.org/D109044
|
 | llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp |
 | llvm/test/Transforms/LoopStrengthReduce/dbg-preserve-0.ll |
Commit
84b07c9b3aa79e073a97290bdd30d98b1941a536
by kazu[llvm] Use pop_back_val (NFC)
|
 | llvm/lib/ExecutionEngine/Orc/ObjectLinkingLayer.cpp |
 | llvm/lib/CodeGen/TwoAddressInstructionPass.cpp |
 | llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp |
 | llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp |
 | llvm/lib/Transforms/Coroutines/CoroFrame.cpp |
 | llvm/lib/Target/ARM/A15SDOptimizer.cpp |
 | llvm/lib/CodeGen/LoopTraversal.cpp |
 | llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp |
 | llvm/lib/IR/Value.cpp |
 | llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmTypeCheck.cpp |
 | llvm/lib/CodeGen/ReachingDefAnalysis.cpp |
 | llvm/lib/CodeGen/LiveRangeEdit.cpp |
 | llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp |
 | llvm/lib/CodeGen/LiveVariables.cpp |
 | llvm/lib/Analysis/StackSafetyAnalysis.cpp |
 | llvm/lib/CodeGen/CodeGenPrepare.cpp |
 | llvm/lib/Analysis/MemorySSAUpdater.cpp |
 | llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp |
 | llvm/lib/Target/AArch64/AArch64StackTaggingPreRA.cpp |
Commit
0e89ff8195e994e5051f19669e1044d47120ac06
by llvm-dev[X86] SimplifyDemandedBits - only narrow a broadcast source if we only have one use.
Helps with the regression noted on D109065 - don't truncate a broadcast source if the source has multiple uses.
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 | llvm/test/CodeGen/X86/oddshuffles.ll |
 | llvm/lib/Target/X86/X86ISelLowering.cpp |
Commit
5bfe5207ef283194a76616e5693a67a14c158ae3
by dblaikiellvm-dwarfdump: Pretty print names qualified/with scopes
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 | llvm/lib/DebugInfo/DWARF/DWARFDie.cpp |
 | llvm/test/DebugInfo/X86/addr-tu-to-non-tu.ll |
 | llvm/test/tools/llvm-dwarfdump/X86/prettyprint_types.s |
Commit
11e0b79b056a5f1ba1feb81872aee67709f34834
by dblaikiellvm-dwarfdump: Don't print even an empty string when a type is unprintable
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 | llvm/test/tools/llvm-dwarfdump/X86/verify_debug_info.s |
 | llvm/lib/DebugInfo/DWARF/DWARFDie.cpp |
Commit
606ea0dd2a7308d4af222ddcf0ae66c6267cb90d
by dblaikiellvm-dwarfdump: support for type printing "decltype(nullptr)" as "nullptr_t"
This should probably be rendered as "std::nullptr_t" but for now clang uses the unqualified name (which is ambiguous with possible user defined name in the global namespace), so match that here.
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 | llvm/test/tools/llvm-dwarfdump/X86/prettyprint_types.s |
 | llvm/lib/DebugInfo/DWARF/DWARFDie.cpp |
Commit
cb42bb355061235f1c4190c8a35e59e4cfb15163
by dblaikiellvm-dwarfdump: pretty type printing: print fully qualified names in function type parameter types
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 | llvm/lib/DebugInfo/DWARF/DWARFDie.cpp |
 | llvm/test/tools/llvm-dwarfdump/X86/prettyprint_types.s |
Commit
def15c5fb6a117c1b6d8b2835f6760f814410582
by mkazantsev[SCEV] Support negative values in signed/unsigned predicate reasoning
There is a piece of logic that uses the fact that signed and unsigned versions of the same predicate are equivalent when both values are non-negative. It's also true when both of them are negative.
Differential Revision: https://reviews.llvm.org/D109957 Reviewed By: nikic
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 | llvm/test/Transforms/IndVarSimplify/negative_ranges.ll |
 | llvm/lib/Analysis/ScalarEvolution.cpp |
Commit
74670e79b0a00224c04dfc6a446ea4439f4cfca4
by sivachandra[libc] Add implementations of div, ldiv, lldiv and imaxdiv.
Reviewed By: michaelrj
Differential Revision: https://reviews.llvm.org/D109952
|
 | libc/test/src/inttypes/imaxdiv_test.cpp |
 | libc/src/__support/integer_operations.h |
 | libc/test/src/stdlib/lldiv_test.cpp |
 | libc/src/stdlib/CMakeLists.txt |
 | libc/test/src/stdlib/CMakeLists.txt |
 | libc/src/stdlib/lldiv.cpp |
 | libc/test/src/stdlib/div_test.cpp |
 | libc/src/stdlib/div.h |
 | libc/spec/stdc.td |
 | libc/src/stdlib/ldiv.h |
 | libc/src/stdlib/lldiv.h |
 | libc/config/linux/aarch64/entrypoints.txt |
 | libc/src/inttypes/CMakeLists.txt |
 | libc/src/inttypes/imaxdiv.h |
 | libc/config/linux/api.td |
 | libc/src/stdlib/div.cpp |
 | libc/src/stdlib/ldiv.cpp |
 | libc/test/src/stdlib/ldiv_test.cpp |
 | libc/test/src/stdlib/DivTest.h |
 | libc/src/inttypes/imaxdiv.cpp |
 | libc/config/linux/x86_64/entrypoints.txt |
 | libc/test/src/inttypes/CMakeLists.txt |
Commit
471217cff8e5c827f2ee52175a1c94584699cab2
by mkazantsevRevert "Revert "[IndVars] Replace PHIs if loop exits on 1st iteration""
This reverts commit 6fec6552f54885ae06bf76b35f9f1173a0561a4c.
The patch was reverted on incorrect claim that this patch may break LCSSA form when the loop is not in a simplify form. All IndVars' transform insure that the loop is in simplify and LCSSA form, so if it wasn't broken before this transform, it will also not be broken after it.
|
 | llvm/test/Transforms/IndVarSimplify/floating-point-iv.ll |
 | llvm/lib/Transforms/Scalar/IndVarSimplify.cpp |
 | llvm/test/Transforms/IndVarSimplify/eliminate-backedge.ll |
 | llvm/test/Transforms/IndVarSimplify/eliminate-exit-no-dl.ll |
Commit
e9d34c54290e277e075aed33036fddae77b5f582
by mkazantsev[NFC] Add assert and test showing that revert of D109596 wasn't justified
All transforms of IndVars have prerequisite requirement of LCSSA and LoopSimplify form and rely on it. Added test that shows that this actually stands.
|
 | llvm/lib/Transforms/Scalar/IndVarSimplify.cpp |
 | llvm/test/Transforms/IndVarSimplify/eliminate-backedge.ll |
Commit
5252aa2981ba19417b3ea68b22e8be33d5623368
by sivachandra[libc][obvious] Make *abs and *div functions buildable in default mode.
|
 | libc/src/stdlib/CMakeLists.txt |
Commit
f5b8f1247cd9d1b18b7b95f6f197d4d654597529
by sivachandra[libc][obvious] Add inttypes.h and stdlib.h as deps to *div functions.
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 | libc/src/stdlib/CMakeLists.txt |
 | libc/src/inttypes/CMakeLists.txt |
Commit
966922320f09b8bf6e4a69a32f344b3acec36434
by pavel[lldb] Remove two #ifndef linux from Platform.cpp
These have been here since r215992, guarding the calls to HostInfo, but their purpose unclear -- HostInfoLinux provides these functions and they work fine.
|
 | lldb/source/Target/Platform.cpp |
Commit
9a2255dfa012ad0334eacb2d09da7aa4db249c51
by vlad.vinogradov[mlir][NFC] Add explicit "::mlir" namespace to tblgen generated code
Reviewed By: lattner, ftynse
Differential Revision: https://reviews.llvm.org/D109223
|
 | mlir/include/mlir/IR/OpBase.td |
Commit
ec03bbe8a74ae593d0ea5d8bf55c337e395873d1
by vlad.vinogradov[mlir] Fix bug in partial dialect conversion
The discussion on forum: https://llvm.discourse.group/t/bug-in-partial-dialect-conversion/4115
The `applyPartialConversion` didn't handle the operations, that were marked as illegal inside dynamic legality callback. Instead of reporting error, if such operation was not converted to legal set, the method just added it to `unconvertedSet` in the same way as unknown operations.
This patch fixes that and handle dynamically illegal operations as well.
The patch includes 2 fixes for existing passes:
* `tensor-bufferize` - explicitly mark `std.return` as legal. * `convert-parallel-loops-to-gpu` - ugly fix with marking visited operations to avoid recursive legality checks.
Reviewed By: rriddle
Differential Revision: https://reviews.llvm.org/D108505
|
 | mlir/lib/Dialect/Tensor/Transforms/Bufferize.cpp |
 | mlir/test/lib/Dialect/Test/TestPatterns.cpp |
 | mlir/lib/Conversion/SCFToGPU/SCFToGPUPass.cpp |
 | mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp |
 | mlir/test/Transforms/test-legalizer-full.mlir |
 | mlir/include/mlir/Conversion/SCFToGPU/SCFToGPU.h |
 | mlir/test/Transforms/test-legalizer.mlir |
 | mlir/test/lib/Dialect/Test/TestOps.td |
 | mlir/lib/Transforms/Utils/DialectConversion.cpp |
Commit
76cb876563d0e2a3c850b14ca68638be9f6124a0
by arjunpitchanathan[MLIR] Simplex::appendVariable: early return if count == 0
|
 | mlir/unittests/Analysis/Presburger/SimplexTest.cpp |
 | mlir/lib/Analysis/Presburger/Simplex.cpp |
Commit
4b80f0125adc876c8ef325f1c0ace4af023f2264
by i[CMake] Add debuginfo-tests to LLVM_ALL_PROJECTS after D110016
|
 | llvm/CMakeLists.txt |
Commit
7f6a4826ac49e4c7075f80930480045bf983483c
by flo[CaptureTracking] Allow passing LI to PointerMayBeCapturedBefore (NFC).
isPotentiallyReachable can use LoopInfo to return earlier. This patch allows passing an optional LI to PointerMayBeCapturedBefore. Used in D109844.
Reviewed By: nikic, asbirlea
Differential Revision: https://reviews.llvm.org/D109978
|
 | llvm/include/llvm/Analysis/CaptureTracking.h |
 | llvm/lib/Analysis/CaptureTracking.cpp |
Commit
bdcf4b9b9620afe24d17132027a7d12e2f1a598b
by kareem.ergawy[MLIR][Linalg] Make detensoring cost-model more flexible.
So far, the CF cost-model for detensoring was limited to discovering pure CF structures. This means, if while discovering the CF component, the cost-model found any op that is not detensorable, it gives up on detensoring altogether. This patch makes it a bit more flexible by cleaning-up the detensorable component from non-detensorable ops without giving up entirely.
Reviewed By: silvas
Differential Revision: https://reviews.llvm.org/D109965
|
 | mlir/test/Dialect/Linalg/detensorize_while_failure.mlir |
 | mlir/test/Dialect/Linalg/detensorize_while_impure_cf.mlir |
 | mlir/lib/Dialect/Linalg/Transforms/Detensorize.cpp |
Commit
92904cc68fbc1d000387b30accc8b05b3fe95daa
by mgorny[lldb] [gdb-remote] Remove unused arg from GDBRemoteRegisterContext::ReadRegisterBytes()
Differential Revision: https://reviews.llvm.org/D110020
|
 | lldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.h |
 | lldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.cpp |
Commit
f6e0edc23e6199bbb5fb4ef3b018b49a5b303183
by mgorny[lldb] [gdb-remote] Recognize aarch64v type from gdbserver
Differential Revision: https://reviews.llvm.org/D109899
|
 | lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp |
 | lldb/test/API/functionalities/gdb_remote_client/TestGDBServerTargetXML.py |
Commit
92c9b28347c38cc15adf20223ed272abe8ec0227
by david.spickettRevert "[AArch64][SVE] Teach cost model that masked loads/stores are cheap"
This reverts commit 734708e04f84b72f1ae7c8b35c002b8bf97dc064.
Due to build failures on the 2 stage SVE VLS bot. https://lab.llvm.org/buildbot/#/builders/176/builds/908/steps/11/logs/stdio
|
 | llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp |
 | llvm/test/Analysis/CostModel/AArch64/masked_ldst_vls.ll |
Commit
798e4bfbeda824551fa89a388969baa2abbc2411
by vlad.vinogradov[mlir] Fix integration tests failures introduced in D108505
|
 | mlir/lib/Dialect/Linalg/Transforms/Bufferize.cpp |
 | mlir/lib/Dialect/Tensor/Transforms/Bufferize.cpp |
Commit
13aa102e07695297fd17f68913c343c95a7c56ad
by Tim NorthoverAArch64: use ldp/stp for 128-bit atomic load/store in v.84 onwards
v8.4 says that normal loads/stores of 128-bytes are single-copy atomic if they're properly aligned (which all LLVM atomics are) so we no longer need to do a full RMW operation to guarantee we got a clean read.
|
 | llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp |
 | llvm/lib/Target/AArch64/AArch64ISelLowering.cpp |
 | llvm/lib/Target/AArch64/AArch64Subtarget.h |
 | llvm/test/CodeGen/AArch64/v8.4-atomic-128.ll |
 | llvm/lib/Target/AArch64/AArch64ISelLowering.h |
 | llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp |
 | llvm/lib/Target/AArch64/AArch64.td |
 | llvm/test/CodeGen/AArch64/GlobalISel/v8.4-atomic-128.ll |
 | llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic-128.ll |
 | llvm/test/CodeGen/AArch64/atomic-ops-lse.ll |
Commit
ca3bebd8440f9f88f1457dad9c12933b73d9590f
by Justas.Janickas[OpenCL] Supports optional writing to 3d images in C++ for OpenCL 2021
Adds support for a feature macro __opencl_c_3d_image_writes in C++ for OpenCL 2021 enabling a respective optional core feature from OpenCL 3.0.
This change aims to achieve compatibility between C++ for OpenCL 2021 and OpenCL 3.0.
Differential Revision: https://reviews.llvm.org/D109328
|
 | clang/test/Misc/opencl-c-3.0.incorrect_options.cl |
 | clang/test/SemaOpenCL/unsupported-image.cl |
 | clang/lib/Sema/SemaType.cpp |
Commit
15feaaa359c7245bb59ff0a2aa3b806682f44286
by alexey.baderAdd myself as a code owner for SYCL support
|
 | clang/CODE_OWNERS.TXT |
Commit
eb3af1e77341e82249993a5a8a50779c48e1cb61
by wingo[clang][NFC] Remove dead code
Remove code that has no effect in SemaType.cpp:processTypeAttrs.
Differential Revision: https://reviews.llvm.org/D108360
|
 | clang/lib/Sema/SemaType.cpp |
Commit
c8cb7f611fdf4d96c4d23a75aa48c93cca38646f
by bjorn.a.pettersson[NewPM] Make InlinerPass (aka 'inline') a parameterized pass
In default pipelines the ModuleInlinerWrapperPass is adding the InlinerPass to the pipeline twice, once due to MandatoryFirst (passing true in the ctor) and then a second time with false as argument.
To make it possible to bisect and reduce opt test cases for this part of the pipeline we need to be able to choose between the two different variants of the InlinerPass when running opt. This patch is changing 'inline' to a CGSCC_PASS_WITH_PARAMS in the PassRegistry, making it possible run opt with both -passes=cgscc(inline) and -passes=cgscc(inline<only-mandatory>).
Reviewed By: aeubanks, mtrofin
Differential Revision: https://reviews.llvm.org/D109877
|
 | llvm/include/llvm/Transforms/IPO/Inliner.h |
 | llvm/lib/Passes/PassRegistry.def |
 | llvm/lib/Transforms/IPO/Inliner.cpp |
 | llvm/lib/Passes/PassBuilder.cpp |
Commit
e4c46ddd91eba5ec162225abc1e47aa3c6c13516
by petar.avramovic[GlobalISel] Improve elimination of dead instructions in legalizer
Add eraseInstr(s) utility functions. Before deleting an instruction collects its use instructions. After deletion deletes use instructions that became trivially dead. This patch clears all dead instructions in existing legalizer mir tests.
Differential Revision: https://reviews.llvm.org/D109154
|
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-uadde.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memcpy.mir |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-ssubsat.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fdiv.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smin.mir |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-extload.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir |
 | llvm/test/CodeGen/Mips/GlobalISel/legalizer/constants.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-mul.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fma.mir |
 | llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-fp.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-implicit-def-s1025.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-add.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract-vector-elt.mir |
 | llvm/lib/CodeGen/GlobalISel/Legalizer.cpp |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-anyext.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir |
 | llvm/test/CodeGen/X86/GlobalISel/legalize-ashr-scalar.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.ll |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector.mir |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-sadde.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddo.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-zext.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsub.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fneg.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-extract.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-build-vector.s16.mir |
 | llvm/test/CodeGen/Mips/GlobalISel/legalizer/zext_and_sext.mir |
 | llvm/test/CodeGen/X86/GlobalISel/legalize-lshr-scalar.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-trunc.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-unmerge-values.mir |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-bswap.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext.mir |
 | llvm/test/CodeGen/Mips/GlobalISel/legalizer/bitwise.mir |
 | llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memmove.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssube.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sub.mir |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-extracts.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memset.mir |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-usube.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubo.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsin.mir |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-and.mir |
 | llvm/test/CodeGen/Mips/GlobalISel/legalizer/trunc.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-round.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-phi.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddo.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sadde.mir |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-merge-values.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.s16.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umin.mir |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-unmerge-values.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/bug-legalization-artifact-combiner-dead-def.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert-vector-elt.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubsat.mir |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-ssube.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sshlsat.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-freeze.mir |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-uaddo.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sdiv.mir |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-ssubo.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bswap.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz-zero-undef.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umulh.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umulo.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fshr.mir |
 | llvm/lib/CodeGen/GlobalISel/Utils.cpp |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcanonicalize.mir |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.d16.ll |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsqrt.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memcpyinline.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-udiv.mir |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-xor.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usube.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-saddsat.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir |
 | llvm/test/CodeGen/X86/GlobalISel/legalize-shl-scalar.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpext.mir |
 | llvm/test/CodeGen/Mips/GlobalISel/legalizer/zextLoad_and_sextLoad.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ffloor.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-brcond.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-implicit-def.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smulo.mir |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-saddo.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fshl.mir |
 | llvm/test/CodeGen/AArch64/GlobalISel/artifact-find-value.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ushlsat.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smax.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddsat.mir |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-extract-vector-elt.mir |
 | llvm/include/llvm/CodeGen/GlobalISel/Utils.h |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubo.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcos.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umax.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-and.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uadde.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.dim.a16.ll |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-usubo.mir |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-inserts.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddsat.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubsat.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext-inreg.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-concat-vectors.mir |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-phi-insertpt-decrement.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.store.2d.d16.ll |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-phi.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz.mir |
Commit
b1099120ff963d0a0f1de12e3315b1ee4e4ed7e7
by mgorny[lldb] [gdb-remote] Always send PID when detaching w/ multiprocess
Always send PID in the detach packet when multiprocess extensions are enabled. This is required by qemu's GDB server, as plain 'D' packet results in an error and the emulated system is not resumed.
Differential Revision: https://reviews.llvm.org/D110033
|
 | lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp |
 | lldb/test/API/functionalities/gdb_remote_client/TestGDBRemoteClient.py |
Commit
d6929aaa67c7996a69451e301970408362af909e
by clementval[mlir][openacc] Make use of the second counter extension in DataOp translation
Make use of runtime extension for the second reference counter used in structured data region. This extension is implemented in D106510 and D106509.
Differential Revision: https://reviews.llvm.org/D106517
|
 | mlir/lib/Target/LLVMIR/Dialect/OpenACC/OpenACCToLLVMIRTranslation.cpp |
 | mlir/test/Target/LLVMIR/openacc-llvm.mlir |
Commit
ea17b15f2dcdc77881cc0183dce4dea1aff9bffa
by llvm-dev[MCA] InstructionTables::execute() - use const-ref iterator in for-range loop. NFCI.
Avoid unnecessary copies, reported by MSVC static analyzer.
|
 | llvm/lib/MCA/Stages/InstructionTables.cpp |
Commit
4ab7c0d3fa068fb0ce39b9f75c0253d45a99745e
by llvm-dev[X86] X86TargetTransformInfo - remove unnecessary if-else after early exit. NFCI.
(style) Break the if-else chain as they all return.
|
 | llvm/lib/Target/X86/X86TargetTransformInfo.cpp |
Commit
7fc12b822c5d1360780667af94c218733c3fc4e0
by llvm-devMachOObjectFile - checkOverlappingElement - use const-ref to avoid unnecessary copies. NFCI.
Reported by MSVC static analyzer.
|
 | llvm/lib/Object/MachOObjectFile.cpp |
Commit
6d7b3d6b3a8dbd62650b6c3dae1fe904a8ae9048
by Alexander.RichardsonFix CLANG_ENABLE_STATIC_ANALYZER=OFF building all analyzer source
Since https://reviews.llvm.org/D87118, the StaticAnalyzer directory is added unconditionally. In theory this should not cause the static analyzer sources to be built unless they are referenced by another target. However, the clang-cpp target (defined in clang/tools/clang-shlib) uses the CLANG_STATIC_LIBS global property to determine which libraries need to be included. To solve this issue, this patch avoids adding libraries to that property if EXCLUDE_FROM_ALL is set.
In case something like this comes up again: `cmake --graphviz=targets.dot` is quite useful to see why a target is included as part of `ninja all`.
Reviewed By: thakis
Differential Revision: https://reviews.llvm.org/D109611
|
 | clang/cmake/modules/AddClang.cmake |
 | clang/lib/StaticAnalyzer/CMakeLists.txt |
 | llvm/cmake/modules/AddLLVM.cmake |
Commit
7b68c0725d89ac9bd48b9b6a51d9cd0bc7146829
by Alexander.Richardsonpre-commit test for D109767
Differential Revision: https://reviews.llvm.org/D109765
|
 | llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-condbr.mir |
 | llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-condbr.mir.expected |
 | llvm/test/tools/UpdateTestChecks/update_mir_test_checks/lit.local.cfg |
 | llvm/test/tools/UpdateTestChecks/update_mir_test_checks/x86-condbr.test |
Commit
817e23d481be52e6e0fd779efce2beb105e8c7b6
by Alexander.Richardson[update_mir_test_checks.py] Use -NEXT FileCheck directories
Previously the script emitted output using plain CHECK directives. This can result in a test passing even if there are some instructions between CHECK directives that should have been removed. It also makes debugging tests that have the output in a different order more difficult since FileCheck can match with a later line and then complain about the "wrong" directive not being found.
This will cause quite large diffs when updating existing tests, but I'm not sure we need an opt-in flag here.
Depends on D109765 (pre-commit tests)
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D109767
|
 | llvm/test/CodeGen/X86/GlobalISel/select-phi.mir |
 | llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-condbr.mir.expected |
 | llvm/utils/update_mir_test_checks.py |
Commit
3f90df22f1b72932016102daf8e92e99252e5589
by david.green[ARM] MVE reverse shuffles.
The vectorizer can sometimes make reverse shuffles from indices that count down. In MVE, we don't have a 128bit rev instruction, but we can select this to a VREV64 with some lane movs to swap the two halfs.
Ideally this would use VMOVD's, but only gets as far as VMOVS's at the moment.
Differential Revision: https://reviews.llvm.org/D69510
|
 | llvm/test/CodeGen/Thumb2/mve-shufflemov.ll |
 | llvm/lib/Target/ARM/ARMISelLowering.cpp |
 | llvm/test/CodeGen/Thumb2/mve-shuffle.ll |
Commit
fae57a6a9795eccfa349270b110c09524e341abd
by shivam98.tkg[Clang] [Fix] Clang build fails when build directory contains space character
Clang build fails when build directory contains space character.
Error messages:
[ 95%] Linking CXX executable ../../../../bin/clang clang: error: no such file or directory: 'Space/Net/llvm/Build/tools/clang/tools/driver/Info.plist' make[2]: *** [bin/clang-14] Error 1 make[1]: *** [tools/clang/tools/driver/CMakeFiles/clang.dir/all] Error 2 make[1]: *** Waiting for unfinished jobs....
The path name is actually: 'Dev Space/Net/llvm/Build/tools/clang/tools/driver/Info.plist'
Bugzilla issue - https://bugs.llvm.org/show_bug.cgi?id=51884 Reporter and patch author - Brain Swift <bsp2bsp-llvm@yahoo.com>
Reviewed By: aaron.ballman
Differential Revision: https://reviews.llvm.org/D109979
|
 | clang/tools/driver/CMakeLists.txt |
Commit
4737dcbc83e05ac97c8695cf9a19bddb6446d71f
by mgorny[lldb] [test] Add unittest for DynamicRegisterInfo::Finalize()
Differential Revision: https://reviews.llvm.org/D109906
|
 | lldb/unittests/Process/Utility/DynamicRegisterInfoTest.cpp |
 | lldb/unittests/Process/Utility/CMakeLists.txt |
Commit
ec50d351ffdd4559ccce6013d3ab4a3f41c42cee
by mgorny[lldb] [DynamicRegisterInfo] Unset value_regs/invalidate_regs before Finalize()
Set value_regs and invalidate_regs in RegisterInfo pushed onto m_regs to nullptr, to ensure that the temporaries passed there are not accidentally used.
Differential Revision: https://reviews.llvm.org/D109879
|
 | lldb/unittests/Process/Utility/DynamicRegisterInfoTest.cpp |
 | lldb/source/Plugins/Process/Utility/DynamicRegisterInfo.h |
 | lldb/source/Plugins/Process/Utility/DynamicRegisterInfo.cpp |
Commit
6de19ea4b6264e64cea145e00ab66fe1530fc0a0
by aaron.puchertThread safety analysis: Drop special block handling
Previous changes like D101202 and D104261 have eliminated the special status that break and continue once had, since now we're making decisions purely based on the structure of the CFG without regard for the underlying source code constructs.
This means we don't gain anything from defering handling for these blocks. Dropping it moves some diagnostics, though arguably into a better place. We're working around a "quirk" in the CFG that perhaps wasn't visible before: while loops have an empty "transition block" where continue statements and the regular loop exit meet, before continuing to the loop entry. To get a source location for that, we slightly extend our handling for empty blocks. The source location for the transition ends up to be the loop entry then, but formally this isn't a back edge. We pretend it is anyway. (This is safe: we can always treat edges as back edges, it just means we allow less and don't modify the lock set. The other way around it wouldn't be safe.)
Reviewed By: aaron.ballman
Differential Revision: https://reviews.llvm.org/D106715
|
 | clang/test/PCH/thread-safety-attrs.cpp |
 | clang/test/SemaCXX/warn-thread-safety-analysis.cpp |
 | clang/lib/Analysis/ThreadSafety.cpp |
Commit
68914dc99083716d6e9868798c67e73ef35b021e
by Stefan Gränitz[JITLink] Adopt forEachRelocation() helper in ELF x86-64 backend (NFC)
Following D109516, this patch re-uses the new helper function for ELF relocation traversal in the x86-64 backend.
Reviewed By: StephenFan
Differential Revision: https://reviews.llvm.org/D109520
|
 | llvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp |
Commit
e8d81d80f6604b34e1495d3a68e2bbc60ce467f5
by Stefan Gränitz[JITLink] Adopt forEachRelocation() helper in ELF RISCV backend (NFC)
Following D109516, this patch re-uses the new helper function for ELF relocation traversal in the RISCV backend.
Reviewed By: StephenFan
Differential Revision: https://reviews.llvm.org/D109522
|
 | llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp |
Commit
680592b5d0a71502964f5568fdc953f8da495b16
by jay.foad[AMDGPU] Regenerate checks
|
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fma.s32.mir |
Commit
f988f680649ad38806897e7aa75e95e9fda88ffd
by david.sherwood[Analysis] Add support for vscale in computeKnownBitsFromOperator
In ValueTracking.cpp we use a function called computeKnownBitsFromOperator to determine the known bits of a value. For the vscale intrinsic if the function contains the vscale_range attribute we can use the maximum and minimum values of vscale to determine some known zero and one bits. This should help to improve code quality by allowing certain optimisations to take place.
Tests added here:
Transforms/InstCombine/icmp-vscale.ll
Differential Revision: https://reviews.llvm.org/D109883
|
 | llvm/test/Transforms/InstCombine/icmp-vscale.ll |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntb.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntd.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntw.c |
 | llvm/test/Transforms/InstSimplify/vscale.ll |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnth.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len-bfloat.c |
 | llvm/lib/Analysis/ValueTracking.cpp |
 | llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll |
Commit
5dee50111c13bbc4480401e2eaa67f6bca1b480a
by deep.majumder2019[analyzer] Move docs of SmartPtr to correct subcategory
The docs of alpha.cplusplus.SmartPtr was incorrectly placed under alpha.deadcode. Moved it to under alpha.cplusplus
Differential Revision: https://reviews.llvm.org/D110032
|
 | clang/docs/analyzer/checkers.rst |
Commit
6db928b8f31b17caf205eee9c95bb817e51a3f2c
by gysit[mlir][linalg] Fusion on tensors.
Add a new version of fusion on tensors that supports the following scenarios: - support input and output operand fusion - fuse a producer result passed in via tile loop iteration arguments (update the tile loop iteration arguments) - supports only linalg operations on tensors - supports only scf::for - cannot add an output to the tile loop nest
The LinalgTileAndFuseOnTensors pass tiles the root operation and fuses its producers.
Reviewed By: nicolasvasilache, mravishankar
Differential Revision: https://reviews.llvm.org/D109766
|
 | mlir/lib/Dialect/Linalg/Transforms/FusionOnTensors.cpp |
 | mlir/lib/Dialect/Linalg/Transforms/CMakeLists.txt |
 | mlir/include/mlir/Dialect/Linalg/Passes.h |
 | mlir/include/mlir/Dialect/Linalg/Utils/Utils.h |
 | mlir/test/Dialect/Linalg/tile-and-fuse-on-tensors.mlir |
 | mlir/include/mlir/Dialect/Linalg/Passes.td |
Commit
444a5f304f6c2c332f18392d2458d74664e98498
by kadircet[clangd] Bail-out when an empty compile flag is encountered
Fixes https://github.com/clangd/clangd/issues/865
Differential Revision: https://reviews.llvm.org/D109894
|
 | clang-tools-extra/clangd/unittests/CompilerTests.cpp |
 | clang-tools-extra/clangd/CompileCommands.cpp |
 | clang/lib/Frontend/CreateInvocationFromCommandLine.cpp |
 | clang-tools-extra/clangd/Compiler.cpp |
 | clang-tools-extra/clangd/unittests/CompileCommandsTests.cpp |
Commit
228dd20c3f1e619193c68b288e0d5e8525c3a618
by Justas.Janickas[OpenCL] Supports atomics in C++ for OpenCL 2021
Atomics in C++ for OpenCL 2021 are now handled the same way as in OpenCL C 3.0. This is a header-only change.
Differential Revision: https://reviews.llvm.org/D109424
|
 | clang/lib/Headers/opencl-c-base.h |
 | clang/lib/Headers/opencl-c.h |
Commit
5b47256fa5402a5f7f06513b0d168746d4c46df2
by pengfei.wang[X86] Add test to show the effect caused by D109607. NFC
|
 | clang/test/CodeGen/X86/va-arg-sse.c |
Commit
227673398c2d93d9db02fe5fdb1af10a74251995
by pengfei.wang[X86] Always check the size of SourceTy before getting the next type
D109607 results in a regression in llvm-test-suite. The reason is we didn't check the size of SourceTy, so that we will return wrong SSE type when SourceTy is overlapped.
Reviewed By: Meinersbur
Differential Revision: https://reviews.llvm.org/D110037
|
 | clang/test/CodeGen/X86/va-arg-sse.c |
 | clang/lib/CodeGen/TargetInfo.cpp |
Commit
5661317f864abf750cf893c6a4cc7a977be0995a
by pklausler[flang] Put intrinsic function table back into order
Some intrinsic functions weren't findable because the table wasn't strictly in order of names.
And complete a missing generalization of the extension DCONJG to accept any kind of complex argument, like DREAL and DIMAG were.
Differential Revision: https://reviews.llvm.org/D110002
|
 | flang/unittests/Evaluate/intrinsics.cpp |
 | flang/lib/Evaluate/intrinsics.cpp |
Commit
bc69dd62c04a70d29943c1c06c7effed150b70e1
by a.bataev[SLP]Improve graph reordering.
Reworked reordering algorithm. Originally, the compiler just tried to detect the most common order in the reordarable nodes (loads, stores, extractelements,extractvalues) and then fully rebuilding the graph in the best order. This was not effecient, since it required an extra memory and time for building/rebuilding tree, double the use of the scheduling budget, which could lead to missing vectorization due to exausted scheduling resources.
Patch provide 2-way approach for graph reodering problem. At first, all reordering is done in-place, it doe not required tree deleting/rebuilding, it just rotates the scalars/orders/reuses masks in the graph node.
The first step (top-to bottom) rotates the whole graph, similarly to the previous implementation. Compiler counts the number of the most used orders of the graph nodes with the same vectorization factor and then rotates the subgraph with the given vectorization factor to the most used order, if it is not empty. Then repeats the same procedure for the subgraphs with the smaller vectorization factor. We can do this because we still need to reshuffle smaller subgraph when buildiong operands for the graph nodes with lasrger vectorization factor, we can rotate just subgraph, not the whole graph.
The second step (bottom-to-top) scans through the leaves and tries to detect the users of the leaves which can be reordered. If the leaves can be reorder in the best fashion, they are reordered and their user too. It allows to remove double shuffles to the same ordering of the operands in many cases and just reorder the user operations instead. Plus, it moves the final shuffles closer to the top of the graph and in many cases allows to remove extra shuffle because the same procedure is repeated again and we can again merge some reordering masks and reorder user nodes instead of the operands.
Also, patch improves cost model for gathering of loads, which improves x264 benchmark in some cases.
Gives about +2% on AVX512 + LTO (more expected for AVX/AVX2) for {625,525}x264, +3% for 508.namd, improves most of other benchmarks. The compile and link time are almost the same, though in some cases it should be better (we're not doing an extra instruction scheduling anymore) + we may vectorize more code for the large basic blocks again because of saving scheduling budget.
Differential Revision: https://reviews.llvm.org/D105020
|
 | llvm/test/Transforms/SLPVectorizer/AArch64/transpose.ll |
 | llvm/test/Transforms/SLPVectorizer/X86/split-load8_2-unord.ll |
 | llvm/test/Transforms/SLPVectorizer/X86/vectorize-reorder-reuse.ll |
 | llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp |
 | llvm/test/Transforms/SLPVectorizer/X86/jumbled-load-multiuse.ll |
 | llvm/test/Transforms/SLPVectorizer/X86/jumbled_store_crash.ll |
 | llvm/include/llvm/Transforms/Vectorize/SLPVectorizer.h |
 | llvm/test/Transforms/SLPVectorizer/X86/vectorize-reorder-alt-shuffle.ll |
 | llvm/test/Transforms/SLPVectorizer/X86/reorder_repeated_ops.ll |
 | llvm/test/Transforms/SLPVectorizer/X86/extract.ll |
 | llvm/test/Transforms/SLPVectorizer/X86/crash_cmpop.ll |
 | llvm/test/Transforms/SLPVectorizer/X86/jumbled-load.ll |
 | llvm/test/Transforms/SLPVectorizer/X86/addsub.ll |
 | llvm/test/Transforms/SLPVectorizer/AArch64/transpose-inseltpoison.ll |
Commit
09100c75b52d6729e343964aa690efdd51cf913f
by gysit[mlir][linalg] Fix typo (NFC).
|
 | mlir/lib/Dialect/Linalg/Transforms/FusionOnTensors.cpp |
Commit
644b55d57ec76a18916d30f921781b99795f6e10
by morten_bp[MLIR][SCF] Add for-to-while loop transformation pass
This pass transforms SCF.ForOp operations to SCF.WhileOp. The For loop condition is placed in the 'before' region of the while operation, and indctuion variable incrementation + the loop body in the 'after' region. The loop carried values of the while op are the induction variable (IV) of the for-loop + any iter_args specified for the for-loop. Any 'yield' ops in the for-loop are rewritten to additionally yield the (incremented) induction variable.
This transformation is useful for passes where we want to consider structured control flow solely on the basis of a loop body and the computation of a loop condition. As an example, when doing high-level synthesis in CIRCT, the incrementation of an IV in a for-loop is "just another part" of a circuit datapath, and what we really care about is the distinction between our datapath and our control logic (the condition variable).
Differential Revision: https://reviews.llvm.org/D108454
|
 | mlir/test/Dialect/SCF/for-loop-to-while-loop.mlir |
 | mlir/lib/Dialect/SCF/Transforms/CMakeLists.txt |
 | mlir/lib/Dialect/SCF/Transforms/ForToWhile.cpp |
 | mlir/include/mlir/Dialect/SCF/Passes.td |
 | mlir/include/mlir/Dialect/SCF/Passes.h |
Commit
7be28d82b4ce810ef662239a9dba7a1409c1ad49
by gysit[mlir][linalg] Add IndexOp support to fusion on tensors.
This revision depends on https://reviews.llvm.org/D109761 and https://reviews.llvm.org/D109766.
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D109774
|
 | mlir/lib/Dialect/Linalg/Transforms/FusionOnTensors.cpp |
 | mlir/test/Dialect/Linalg/tile-and-fuse-on-tensors.mlir |
Commit
963d3a22b34de33fc41a9e3e9ac733e9b6d241be
by flo[DSE] Add additional tests to cover review comments.
Adds additional tests following comments from D109844.
Also removes unusued in.ptr arguments and places in the call tests that used loads instead of a getval call.
|
 | llvm/test/Transforms/DeadStoreElimination/captures-before-call.ll |
 | llvm/test/Transforms/DeadStoreElimination/captures-before-load.ll |
Commit
fe4b8467b5dca564b4859256b08ece5fa1eaa574
by Jonas Devlieghere[lldb] Fix whitespace in CommandObjectTarget (NFC)
|
 | lldb/source/Commands/CommandObjectTarget.cpp |
Commit
a89bfc61203d5c2071cddaff26345771716463ec
by Jonas Devlieghere[lldb] Extract adding symbols for UUID/File/Frame (NFC)
This moves the logic for adding symbols based on UUID, file and frame into little helper functions. This is in preparation for D110011.
Differential revision: https://reviews.llvm.org/D110010
|
 | lldb/source/Commands/CommandObjectTarget.cpp |
Commit
8700f2bd36bb9b7d7075ed4dac0aef92b9489237
by nikita.ppv[Verifier] Verify scoped noalias metadata
Verify that !noalias, !alias.scope and llvm.experimental.noalias.scope arguments have the format specified in https://llvm.org/docs/LangRef.html#noalias-and-alias-scope-metadata. I've fixed up a lot of broken metadata used by tests in advance. Especially using a scope instead of the expected scope list is a commonly made mistake.
Differential Revision: https://reviews.llvm.org/D110026
|
 | llvm/lib/IR/Verifier.cpp |
 | llvm/test/Verifier/alias-scope-metadata.ll |
Commit
d001ab82e410d0c6ccf14be9f507c8aca53abc67
by i[ELF] Don't fall back to .text for e_entry
We have the rule to simulate (https://sourceware.org/binutils/docs/ld/Entry-Point.html), but the behavior is questionable (https://sourceware.org/pipermail/binutils/2021-September/117929.html).
gold doesn't fall back to .text. The behavior is unlikely relied by projects (there is even a warning for executable links), so let's just delete this fallback path.
Reviewed By: jhenderson, peter.smith
Differential Revision: https://reviews.llvm.org/D110014
|
 | lld/docs/ReleaseNotes.rst |
 | lld/test/ELF/basic-ppc64.s |
 | lld/ELF/Writer.cpp |
 | lld/test/ELF/basic-ppc.s |
 | lld/test/ELF/entry.s |
Commit
d85e347a28dc9a329d7029987e4e062428985b41
by craig.topper[RISCV] Add a pass to recognize VLS strided loads/store from gather/scatter.
For strided accesses the loop vectorizer seems to prefer creating a vector induction variable with a start value of the form <i32 0, i32 1, i32 2, ...>. This value will be incremented each loop iteration by a splat constant equal to the length of the vector. Within the loop, arithmetic using splat values will be done on this vector induction variable to produce indices for a vector GEP.
This pass attempts to dig through the arithmetic back to the phi to create a new scalar induction variable and a stride. We push all of the arithmetic out of the loop by folding it into the start, step, and stride values. Then we create a scalar GEP to use as the base pointer for a strided load or store using the computed stride. Loop strength reduce will run after this pass and can do some cleanups to the scalar GEP and induction variable.
Reviewed By: frasercrmck
Differential Revision: https://reviews.llvm.org/D107790
|
 | llvm/lib/Target/RISCV/RISCVTargetMachine.cpp |
 | llvm/include/llvm/IR/IntrinsicsRISCV.td |
 | llvm/test/CodeGen/RISCV/rvv/fixed-vector-strided-load-store-negative.ll |
 | llvm/lib/Target/RISCV/CMakeLists.txt |
 | llvm/lib/Target/RISCV/RISCVGatherScatterLowering.cpp |
 | llvm/lib/Target/RISCV/RISCVISelLowering.cpp |
 | llvm/tools/opt/opt.cpp |
 | llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h |
 | llvm/test/CodeGen/RISCV/rvv/fixed-vector-strided-load-store.ll |
 | llvm/lib/Target/RISCV/RISCV.h |
 | llvm/lib/Target/RISCV/RISCVISelLowering.h |
Commit
93604c9711cd0325cf92b23529b55db161143a29
by llvmgnsyncbot[gn build] Port d85e347a28dc
|
 | llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn |
Commit
f3cfec9c9e6d90505baaef8ff25ed709e347b226
by kazu[MCA] Fix a warning
This patch fixes the warning
InstructionTables.cpp:27:56: error: loop variable 'Resource' of type 'const std::pair<const uint64_t, ResourceUsage> &' (aka 'const pair<const unsigned long, llvm::mca::ResourceUsage> &') binds to a temporary constructed from type 'const std::pair<unsigned long, llvm::mca::ResourceUsage> &' [-Werror,-Wrange-loop-construct]
Note that Resource is declared as:
SmallVector<std::pair<uint64_t, ResourceUsage>, 4> Resources;
without "const" for uint64_t.
|
 | llvm/lib/MCA/Stages/InstructionTables.cpp |
Commit
ecd52a5be9a1c9c0efe5a1d92aa2cde807758cac
by nikita.ppv[Verifier] Try to fix MSVC build
Some buildbots fail with:
> C:\a\llvm-clang-x86_64-expensive-checks-win\llvm-project\llvm\lib\IR\Verifier.cpp(4352): error C2678: binary '==': no operator found which takes a left-hand operand of type 'const llvm::MDOperand' (or there is no acceptable conversion)
Possibly the explicit MDOperand to Metadata* conversion will help?
|
 | llvm/lib/IR/Verifier.cpp |
Commit
a954bb18b14363e133217e7f19aa95fbde2c7488
by i[ELF] Add --why-extract= to query why archive members/lazy object files are extracted
Similar to D69607 but for archive member extraction unrelated to GC. This patch adds --why-extract=.
Prior art:
GNU ld -M prints ``` Archive member included to satisfy reference by file (symbol)
a.a(a.o) main.o (a) b.a(b.o) (b()) ```
-M is mainly for input section/symbol assignment <-> output section mapping (often huge output) and the information may appear ad-hoc.
Apple ld64 ``` __Z1bv forced load of b.a(b.o) _a forced load of a.a(a.o) ```
It doesn't say the reference file.
Arm's proprietary linker ``` Selecting member vsnprintf.o(c_wfu.l) to define vsnprintf. ... Loading member vsnprintf.o from c_wfu.l. definition: vsnprintf reference : _printf_a ```
---
--why-extract= gives the user the full data (which is much shorter than GNU ld -Map). It is easy to track a chain of references to one archive member with a one-liner, e.g.
``` % ld.lld main.o a_b.a b_c.a c.a -o /dev/null --why-extract=- | tee stdout reference extracted symbol main.o a_b.a(a_b.o) a a_b.a(a_b.o) b_c.a(b_c.o) b() b_c.a(b_c.o) c.a(c.o) c()
% ruby -ane 'BEGIN{p={}}; p[$F[1]]=[$F[0],$F[2]] if $.>1; END{x="c.a(c.o)"; while y=p[x]; puts "#{y[0]} extracts #{x} to resolve #{y[1]}"; x=y[0] end}' stdout b_c.a(b_c.o) extracts c.a(c.o) to resolve c() a_b.a(a_b.o) extracts b_c.a(b_c.o) to resolve b() main.o extracts a_b.a(a_b.o) to resolve a ```
Archive member extraction happens before --gc-sections, so this may not be a live path under --gc-sections, but I think it is a good approximation in practice.
* Specifying a file avoids output interleaving with --verbose. * Required `=` prevents accidental overwrite of an input if the user forgets `=`. (Most of compiler drivers' long options accept `=` but not ` `)
Differential Revision: https://reviews.llvm.org/D109572
|
 | lld/ELF/MapFile.cpp |
 | lld/test/ELF/why-extract.s |
 | lld/docs/ReleaseNotes.rst |
 | lld/ELF/Options.td |
 | lld/ELF/Symbols.cpp |
 | lld/ELF/Config.h |
 | lld/docs/ld.lld.1 |
 | lld/ELF/MapFile.h |
 | lld/ELF/Symbols.h |
 | lld/ELF/Writer.cpp |
 | lld/ELF/Driver.cpp |
Commit
6e994a833e8bfe616fdf40155eefbee033d427ec
by akhuang[lld] Remove timers.ll because inconsistent timers behavior causes the test to fail sometimes
See https://reviews.llvm.org/D109904
|
 | lld/test/COFF/timers.ll |
Commit
f4b5d597d86abafd61d4de6235f724d4f7b046e6
by gcmnAdd use_default_shell_env = True to ctx.actions.run
When building a tool in a non-standard environment (e.g. custom compiler path -> LD_LIBRARY_PATH set) then `use_default_shell_env = True` is required to run that tool in the same environment or otherwise the build will fail due to missing symbols. See https://github.com/google/jax/issues/7842 for this issue and https://github.com/tensorflow/tensorflow/pull/44549 for related fix in TF.
Reviewed By: GMNGeoffrey
Differential Revision: https://reviews.llvm.org/D109873
|
 | utils/bazel/llvm-project-overlay/mlir/tblgen.bzl |
Commit
f18f1ab4fd8c3b53834f874b2ec666af72bf0fe3
by joker.ephTemporarily XFAIL MLIR test that fails the LLVM verifier after 8700f2bd3
|
 | mlir/test/Target/LLVMIR/llvmir.mlir |
Commit
5edd79fc9725f4456f4bf53bf55633ef5938cdc3
by joker.ephRevert "[MLIR][SCF] Add for-to-while loop transformation pass"
This reverts commit 644b55d57ec76a18916d30f921781b99795f6e10.
The added test is failing the bots.
|
 | mlir/include/mlir/Dialect/SCF/Passes.h |
 | mlir/include/mlir/Dialect/SCF/Passes.td |
 | mlir/lib/Dialect/SCF/Transforms/CMakeLists.txt |
 | mlir/test/Dialect/SCF/for-loop-to-while-loop.mlir |
 | mlir/lib/Dialect/SCF/Transforms/ForToWhile.cpp |
Commit
3679d2001c87f37101e7f20c646b21e97d8a0867
by cchen[NCF][OpenMP] Fix metadirective test on SystemZ
|
 | clang/test/OpenMP/metadirective_ast_print.c |
Commit
e31b2d7d7be98cbbaa665b2702cd0ed2975da4cc
by Vedant Kumar[lldb][crashlog] Avoid specifying arch for image when a UUID is present
When adding an image to a target for crashlog purposes, avoid specifying the architecture of the image.
This has the effect of making SBTarget::AddModule infer the ArchSpec for the image based on the SBTarget's architecture, which LLDB puts serious effort into calculating correctly (in TargetList::CreateTargetInternal).
The status quo is that LLDB randomly guesses the ArchSpec for a module if its architecture is specified, via:
``` SBTarget::AddModule -> Platform::GetAugmentedArchSpec -> Platform::IsCompatibleArchitecture -> GetSupportedArchitectureAtIndex -> {ARM,x86}GetSupportedArchitectureAtIndex ```
... which means that the same crashlog can fail to load on an Apple Silicon Mac (due to the random guess of arm64e-apple-macosx for the module's ArchSpec not being compatible with the SBTarget's (correct) ArchSpec), while loading just fine on an Intel Mac.
I'm not sure how to add a test for this (it doesn't look like there's test coverage of this path in-tree). It seems like it would be pretty complicated to regression test: the host LLDB would need to be built for arm64e, we'd need a hand-crafted arm64e iOS crashlog, and we'd need a binary with an iOS deployment target. I'm open to other / simpler options.
rdar://82679400
Differential Revision: https://reviews.llvm.org/D110013
|
 | lldb/examples/python/symbolication.py |
Commit
890027b31433311515906633518e1295293ac15c
by craig.topper[RISCV] Add test cases showing failure to use .vf vector operations when splat is in another basic block. NFC
We should have CGP copy the splats into the same basic block as the FP operation so that SelectionDAG can fold them.
|
 | llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll |
Commit
04ab6c85ef74072c077717ca4b4eaede8db24823
by craig.topper[RISCV] Teach RISCVTargetLowering::shouldSinkOperands to sink splats for FAdd/FSub/FMul/FDiv.
|
 | llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll |
 | llvm/lib/Target/RISCV/RISCVISelLowering.cpp |
Commit
d7d7060127b7db8c4cb05edab2d5c0f18ec0d66b
by arthur.j.odwyerEliminate _LIBCPP_EQUAL_DELETE in favor of `=delete`.
All supported compilers have supported `=delete` as an extension in C++03 mode for many years at this point.
Differential Revision: https://reviews.llvm.org/D109942
|
 | libcxx/include/__config |
 | libcxx/include/map |
 | libcxx/include/__tree |
 | libcxx/include/__mutex_base |
Commit
a07727199db0525e9d2df41e466a2a1611b3c8e1
by iRevert code change of D63497 & D74399 for riscv64-*-linux GCC detection
This partially reverts commits 1fc2a47f0b6c415312593e43489cf9ea2507d902 and 9816e726e747d72e0c5ac92aa20e652031a10448.
See D109727. Replacing config.guess in favor of {gcc,clang} -dumpmachine can avoid the riscv64-{redhat,suse}-linux GCC detection.
Acked-by: LuÃs Marques <luismarques@lowrisc.org>
|
 | clang/lib/Driver/ToolChains/Gnu.cpp |
Commit
6cd382bf2894f87a6a68e2d962bdbfc2f0fb3d85
by iRevert "[CMake] Add debuginfo-tests to LLVM_ALL_PROJECTS after D110016"
This reverts commit 4b80f0125adc876c8ef325f1c0ace4af023f2264.
debuginfo-tests has been renamed to cross-project-tests.
|
 | llvm/CMakeLists.txt |
Commit
0b33890f4553c9255c0f44cee04a0d98843d6a5a
by ravishankarm[mlir][Linalg] Add ConvolutionOpInterface.
Add an interface that allows grouping together all covolution and pooling ops within Linalg named ops. The interface currently - the indexing map used for input/image access is valid - the filter and output are accessed using projected permutations - that all loops are charecterizable as one iterating over - batch dimension, - output image dimensions, - filter convolved dimensions, - output channel dimensions, - input channel dimensions, - depth multiplier (for depthwise convolutions)
Differential Revision: https://reviews.llvm.org/D109793
|
 | mlir/python/mlir/dialects/linalg/opdsl/ops/core_named_ops.py |
 | mlir/test/lib/Dialect/Test/TestOps.td |
 | mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.td |
 | mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.h |
 | mlir/lib/Dialect/Linalg/IR/LinalgInterfaces.cpp |
 | mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td |
 | mlir/python/mlir/dialects/linalg/opdsl/lang/comprehension.py |
 | mlir/test/Dialect/Linalg/invalid.mlir |
 | mlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOps.yaml |
 | mlir/test/Dialect/Linalg/conv-interface-invalid.mlir |
 | mlir/test/lib/Dialect/Test/TestDialect.h |
 | mlir/test/lib/Dialect/Test/CMakeLists.txt |
 | mlir/test/Dialect/Linalg/named-ops.mlir |
 | utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel |
Commit
63e0d038fc20c894a3d541effa1bc2b1fdea37b9
by Yuanfang ChenDiagnose -Wunused-value based on CFG reachability
While at it, add the diagnosis message "left operand of comma operator has no effect" (used by GCC) for comma operator.
This also makes Clang diagnose in the constant evaluation context which aligns with GCC/MSVC behavior. (https://godbolt.org/z/7zxb8Tx96)
Reviewed By: aaron.ballman
Differential Revision: https://reviews.llvm.org/D103938
|
 | clang/lib/Sema/SemaExprCXX.cpp |
 | clang/test/Sema/const-eval.c |
 | clang/test/Sema/warn-unused-value.c |
 | clang/test/Parser/cxx1z-init-statement.cpp |
 | clang/test/SemaTemplate/derived.cpp |
 | clang/test/CXX/temp/temp.constr/temp.constr.constr/partial-specializations.cpp |
 | clang/test/Sema/switch-1.c |
 | clang/test/SemaCXX/constant-expression.cpp |
 | clang/test/Parser/objc-try-catch-1.m |
 | clang/test/Parser/objcxx11-attributes.mm |
 | clang/test/Sema/vla-2.c |
 | clang/test/SemaCXX/sizeless-1.cpp |
 | clang/test/CXX/drs/dr20xx.cpp |
 | clang/test/CXX/drs/dr7xx.cpp |
 | clang/test/SemaCXX/attr-annotate.cpp |
 | clang/include/clang/Sema/Sema.h |
 | clang/lib/Sema/SemaExpr.cpp |
 | clang/test/Parser/objc-messaging-1.m |
 | clang/test/SemaCXX/builtin-constant-p.cpp |
 | clang/test/Sema/i-c-e.c |
 | clang/test/SemaCXX/overloaded-operator.cpp |
 | clang/test/CXX/basic/basic.link/p8.cpp |
 | clang/test/Analysis/dead-stores.c |
 | clang/test/Parser/cxx-ambig-decl-expr.cpp |
 | clang/include/clang/Basic/DiagnosticSemaKinds.td |
 | clang/test/CodeCompletion/pragma-macro-token-caching.c |
 | clang/test/PCH/cxx-explicit-specifier.cpp |
 | clang/test/SemaCXX/warn-comma-operator.cpp |
 | clang/test/Sema/warn-type-safety.c |
 | clang/test/Sema/exprs.c |
 | clang/test/SemaCXX/matrix-type-operators.cpp |
 | clang/test/SemaTemplate/lambda-capture-pack.cpp |
 | clang/test/SemaCXX/expression-traits.cpp |
 | clang/test/CXX/drs/dr14xx.cpp |
 | clang/test/SemaCXX/constant-expression-cxx2a.cpp |
 | clang/test/Sema/sizeless-1.c |
 | clang/test/Frontend/fixed_point_crash.c |
 | clang/lib/Sema/SemaStmt.cpp |
 | clang/test/SemaCXX/warn-unused-value.cpp |
 | clang/test/Parser/cxx0x-ambig.cpp |
 | clang/test/SemaCXX/vector.cpp |
Commit
01b097afd0eae593b3a11a88a34e8f50e845d3e7
by githubFix bad merge the removed switch case
When https://reviews.llvm.org/D109520 was landed, it reverted the addition of this switch case added in https://reviews.llvm.org/D109293. This caused `-Wswitch` failures (and presumably broke the functionality added in the latter patch).
|
 | llvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp |
Commit
1e45cd75dfb1df61892c1a26654c8997d8aeef66
by jonathan.l.peyton[OpenMP][host runtime] Fix indirect lock table race condition
The indirect lock table can exhibit a race condition during initializing and setting/unsetting locks. This occurs if the lock table is resized by one thread (during an omp_init_lock) and accessed (during an omp_set|unset_lock) by another thread.
The test runtime/test/lock/omp_init_lock.c test exposed this issue and will fail if run enough times.
This patch restructures the lock table so pointer/iterator validity is always kept. Instead of reallocating a single table to a larger size, the lock table begins preallocated to accommodate 8K locks. Each row of the table is allocated as needed with each row allowing 1K locks. If the 8K limit is reached for the initial table, then another table, capable of holding double the number of locks, is allocated and linked as the next table. The indices stored in the user's locks take this linked structure into account when finding the lock within the table.
Differential Revision: https://reviews.llvm.org/D109725
|
 | openmp/runtime/src/kmp_lock.cpp |
 | openmp/runtime/src/kmp_lock.h |
Commit
4cf9bf6c9f64cca1111134acc9f84efe8f27e8d1
by ravishankarm[mlir][MemRef] Compute unused dimensions of a rank-reducing subviews using strides as well.
For `memref.subview` operations, when there are more than one unit-dimensions, the strides need to be used to figure out which of the unit-dims are actually dropped.
Differential Revision: https://reviews.llvm.org/D109418
|
 | mlir/test/Dialect/MemRef/invalid.mlir |
 | mlir/test/Dialect/Linalg/loops.mlir |
 | mlir/test/Dialect/MemRef/fold-subview-ops.mlir |
 | mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td |
 | mlir/include/mlir/Interfaces/ViewLikeInterface.td |
 | mlir/lib/Conversion/MemRefToLLVM/MemRefToLLVM.cpp |
 | mlir/test/Dialect/MemRef/canonicalize.mlir |
 | mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp |
 | mlir/test/IR/invalid-ops.mlir |
 | mlir/lib/Dialect/MemRef/Transforms/FoldSubViewOps.cpp |
Commit
dd0226561e86e491f77464b1d3afe5bb53a2c54e
by nikita.ppv[IR] Add helper to convert offset to GEP indices
We implement logic to convert a byte offset into a sequence of GEP indices for that offset in a number of places. This patch adds a DataLayout::getGEPIndicesForOffset() method, which implements the core logic. I've updated SROA, ConstantFolding and InstCombine to use it, and there's a few more places where it looks relevant.
Differential Revision: https://reviews.llvm.org/D110043
|
 | llvm/test/Transforms/InstCombine/getelementptr.ll |
 | llvm/lib/Analysis/ConstantFolding.cpp |
 | llvm/lib/Transforms/Scalar/SROA.cpp |
 | llvm/lib/Transforms/InstCombine/InstructionCombining.cpp |
 | llvm/include/llvm/IR/DataLayout.h |
 | llvm/test/Transforms/SROA/scalable-vectors.ll |
 | llvm/lib/IR/DataLayout.cpp |
Commit
b64fdaa86b5b35fa982dd1f41d32b37a9d5208b6
by aeubanks[gn build] Don't pass -Wl,-z,defs for sanitizer builds
-Wl,-z,defs doesn't work with sanitizers. See https://clang.llvm.org/docs/AddressSanitizer.html
Reviewed By: thakis
Differential Revision: https://reviews.llvm.org/D110086
|
 | llvm/utils/gn/build/toolchain/BUILD.gn |
 | llvm/utils/gn/build/BUILDCONFIG.gn |
 | llvm/utils/gn/build/BUILD.gn |
Commit
c4a406bbd0fe3afa8366b72c49b1bc494a168624
by apl[lldb][NFC] Remove outdated FIXME
|
 | lldb/source/Symbol/DeclVendor.cpp |
Commit
df81bb71aa452c677984fbeb7c34e8a77ec3e83b
by arthur.j.odwyer[libc++] [LIBCXX-DEBUG-FIXME] Constexpr char_traits::copy mustn't compare unrelated pointers.
Now that __builtin_is_constant_evaluated() is present on all supported compilers, we can use it to skip the UB-inducing assert in cases where the computation might be happening at constexpr time.
Differential Revision: https://reviews.llvm.org/D101674
|
 | libcxx/test/std/strings/char.traits/char.traits.specializations/char.traits.specializations.char32_t/copy.pass.cpp |
 | libcxx/test/std/strings/string.view/string.view.ops/copy.pass.cpp |
 | libcxx/test/std/strings/char.traits/char.traits.specializations/char.traits.specializations.char/copy.pass.cpp |
 | libcxx/test/std/strings/char.traits/char.traits.specializations/char.traits.specializations.char16_t/copy.pass.cpp |
 | libcxx/test/std/strings/char.traits/char.traits.specializations/char.traits.specializations.char8_t/copy.pass.cpp |
 | libcxx/include/__string |
 | libcxx/test/std/strings/char.traits/char.traits.specializations/char.traits.specializations.wchar.t/copy.pass.cpp |
Commit
d5db71d19f11d7c31257066aea6bd41ef04f28b7
by arthur.j.odwyer[libc++] [P0919] Some belated review on D87171.
- Simplify the structure of the new tests. - Test const containers as well as non-const containers, since it's easy to do so. - Remove redundant enable-iffing of helper structs' member functions. (They're not instantiated unless they're called, and who would call them?) - Fix indentation and use more consistent SFINAE method in <unordered_map>. - Add _LIBCPP_INLINE_VISIBILITY on some swap functions.
Differential Revision: https://reviews.llvm.org/D109011
|
 | libcxx/test/std/containers/unord/unord.multiset/count.transparent.pass.cpp |
 | libcxx/test/std/containers/unord/unord.multiset/find_non_const.transparent.pass.cpp |
 | libcxx/test/std/containers/unord/unord.multimap/contains.transparent.pass.cpp |
 | libcxx/test/std/containers/unord/unord.multiset/contains.transparent.pass.cpp |
 | libcxx/include/map |
 | libcxx/test/std/containers/unord/unord.multiset/find_const.transparent.pass.cpp |
 | libcxx/test/std/containers/unord/unord.multimap/find.transparent.pass.cpp |
 | libcxx/test/std/containers/unord/unord.multiset/find.transparent.pass.cpp |
 | libcxx/test/std/containers/unord/unord.map/contains.transparent.pass.cpp |
 | libcxx/test/std/containers/unord/unord.map/equal_range_non_const.transparent.pass.cpp |
 | libcxx/test/std/containers/unord/unord.multimap/equal_range.transparent.pass.cpp |
 | libcxx/test/std/containers/unord/unord.multiset/equal_range_const.transparent.pass.cpp |
 | libcxx/test/std/containers/unord/unord.multimap/count.transparent.pass.cpp |
 | libcxx/test/std/containers/unord/unord.set/equal_range_non_const.transparent.pass.cpp |
 | libcxx/include/unordered_set |
 | libcxx/test/std/containers/unord/unord.multimap/equal_range_const.transparent.pass.cpp |
 | libcxx/include/unordered_map |
 | libcxx/test/std/containers/unord/unord.set/find.transparent.pass.cpp |
 | libcxx/test/std/containers/unord/unord.multiset/equal_range_non_const.transparent.pass.cpp |
 | libcxx/test/support/is_transparent.h |
 | libcxx/test/std/containers/unord/unord.map/equal_range.transparent.pass.cpp |
 | libcxx/test/std/containers/unord/unord.map/find.transparent.pass.cpp |
 | libcxx/test/std/containers/unord/unord.set/find_const.transparent.pass.cpp |
 | libcxx/test/support/test_transparent_unordered.h |
 | libcxx/test/std/containers/unord/unord.set/equal_range_const.transparent.pass.cpp |
 | libcxx/test/std/containers/unord/unord.set/contains.transparent.pass.cpp |
 | libcxx/test/std/containers/unord/unord.multimap/equal_range_non_const.transparent.pass.cpp |
 | libcxx/test/std/containers/unord/unord.map/count.transparent.pass.cpp |
 | libcxx/test/std/containers/unord/unord.set/equal_range.transparent.pass.cpp |
 | libcxx/test/std/containers/unord/unord.map/find_const.transparent.pass.cpp |
 | libcxx/test/std/containers/unord/unord.set/find_non_const.transparent.pass.cpp |
 | libcxx/test/std/containers/unord/unord.map/find_non_const.transparent.pass.cpp |
 | libcxx/test/std/containers/unord/unord.multiset/equal_range.transparent.pass.cpp |
 | libcxx/test/std/containers/unord/unord.map/equal_range_const.transparent.pass.cpp |
 | libcxx/test/std/containers/unord/unord.multimap/find_non_const.transparent.pass.cpp |
 | libcxx/test/std/containers/unord/unord.multimap/find_const.transparent.pass.cpp |
 | libcxx/test/std/containers/unord/unord.set/count.transparent.pass.cpp |
Commit
792101fff749191dfd4dadabe2ecd30a4d8cd973
by craig.topper[RISCV] Add test cases for missed opportunity to use vfmacc.vf. NFC
This is another case of a splat being in another basic block preventing SelectionDAG from optimizing it.
|
 | llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll |
Commit
a95ba8107359e17cb1669c01f416fd2723a23126
by craig.topper[RISCV] Teach RISCVTargetLowering::shouldSinkOperands to sink splats for FMA.
If either of the multiplicands is a splat, we can sink it to use vfmacc.vf or similar.
|
 | llvm/lib/Target/RISCV/RISCVISelLowering.cpp |
 | llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll |
Commit
55f0b337087136554122f942fea951a357bc4a49
by thakis[cmake] Put check from D110016 behind (default-on) flag
See discussion on https://reviews.llvm.org/D110016 for details.
|
 | llvm/CMakeLists.txt |
Commit
9197834535364efff505580ef940ad41cd293275
by thakisRevert "Fix CLANG_ENABLE_STATIC_ANALYZER=OFF building all analyzer source"
This reverts commit 6d7b3d6b3a8dbd62650b6c3dae1fe904a8ae9048. Breaks running cmake with `-DCLANG_ENABLE_STATIC_ANALYZER=OFF` without turning off CLANG_TIDY_ENABLE_STATIC_ANALYZER. See comments on https://reviews.llvm.org/D109611 for details.
|
 | clang/lib/StaticAnalyzer/CMakeLists.txt |
 | llvm/cmake/modules/AddLLVM.cmake |
 | clang/cmake/modules/AddClang.cmake |
Commit
fa822a2ee52f8243d29eb035d7002a9ab40788a0
by paul.robinson[DebugInfo] Add test for dumping DW_AT_defaulted
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 | llvm/test/tools/llvm-dwarfdump/X86/DW_AT_defaulted.s |
Commit
c6e52b1e85c6d633bda0e268fed16487fea084d1
by craig.topper[RISCV] Add test cases for missed opportunities to use vand/vor/vxor.vx. NFC
These are cases were the splat is in another basic block. CGP needs to sink it to expose the opportunity to SelectionDAG.
|
 | llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll |
Commit
16b5f4502c5b58c7f70afa8e1e1e33d170ba6089
by fmayer[NFC] [hwasan] Separate outline and inline instrumentation.
Reviewed By: eugenis
Differential Revision: https://reviews.llvm.org/D110067
|
 | llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp |
Commit
53720f74e4e32fe11a1688282f7d09dc1828b83a
by nikita.ppv[Polly] Partially fix scoped alias metadata
This partially addresses the verifier failures caused by D110026. In particular, it does not fix the "second level" alias metadata.
|
 | polly/test/Isl/CodeGen/MemAccess/codegen_address_space.ll |
 | polly/test/Isl/CodeGen/MemAccess/create_arrays.ll |
 | polly/test/ScheduleOptimizer/pattern-matching-based-opts_10.ll |
 | polly/test/Isl/CodeGen/MemAccess/different_types.ll |
 | polly/test/Isl/CodeGen/scev-backedgetaken.ll |
 | polly/test/Isl/CodeGen/non_affine_float_compare.ll |
 | polly/test/ScopInfo/int2ptr_ptr2int.ll |
 | polly/test/Isl/CodeGen/OpenMP/alias-metadata.ll |
 | polly/test/Isl/CodeGen/MemAccess/generate-all.ll |
 | polly/test/Isl/CodeGen/phi_loop_carried_float_escape.ll |
 | polly/test/Isl/CodeGen/invariant_load_alias_metadata.ll |
 | polly/test/CodeGen/stride_detection.ll |
 | polly/test/ScopInfo/int2ptr_ptr2int_2.ll |
 | polly/test/Isl/CodeGen/partial_write_full_write_that_appears_partial.ll |
 | polly/test/Isl/CodeGen/partial_write_array.ll |
 | polly/test/Isl/CodeGen/simple_vec_assign_scalar.ll |
 | polly/test/Isl/CodeGen/partial_write_impossible_restriction.ll |
 | polly/test/Isl/CodeGen/non-affine-phi-node-expansion-2.ll |
 | polly/test/Isl/CodeGen/invariant_loads_ignore_parameter_bounds.ll |
 | polly/test/Isl/CodeGen/getNumberOfIterations.ll |
 | polly/test/Isl/CodeGen/stmt_split_no_dependence.ll |
 | polly/lib/CodeGen/IRBuilder.cpp |
 | polly/test/Isl/CodeGen/annotated_alias_scopes.ll |
 | polly/test/Isl/CodeGen/OpenMP/new_multidim_access.ll |
 | polly/test/Isl/CodeGen/phi_loop_carried_float.ll |
Commit
49e976c9343253956a7de93f1d982537f9c240ab
by tianshilei1992[OpenMP][NVPTX] Fix a warning that data argument not used by format string
Reviewed By: jhuber6, grokos
Differential Revision: https://reviews.llvm.org/D110104
|
 | openmp/libomptarget/plugins/cuda/src/rtl.cpp |
Commit
96d3319d6f024b17ac725d9595548acc4787003c
by Saleem AbdulrasoolSema: relax va_start checking further for Windows AArch64
When building in C mode, the VC runtime assumes that it can use pointer aliasing through `char *` for the parameter to `__va_start`. Relax the checks further. In theory we could keep the tests strict for non-system header code, but this takes the less strict approach as the additional check doesn't particularly end up being too much more helpful for correctness. The C++ type system is a bit stricter and requires the explicit cast which we continue to verify.
|
 | clang/lib/Sema/SemaChecking.cpp |
 | clang/test/Sema/microsoft-varargs.c |
Commit
f9d69a0ab02567933302602238264a38468f9900
by Amara Emerson[GlobalISel] Implement support for the "trap-func-name" attribute.
This attribute calls a function instead of emitting a trap instruction.
Differential Revision: https://reviews.llvm.org/D110098
|
 | llvm/test/CodeGen/AArch64/debugtrap.ll |
 | llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp |
 | llvm/test/CodeGen/AArch64/arm64-trap.ll |
 | llvm/test/CodeGen/AArch64/ubsantrap.ll |
Commit
dc6e8dfdfe7efecfda318d43a06fae18b40eb498
by jacob.lambert[AMDGPU][NFC] Correct typos in lib/Target/AMDGPU/AMDGPU*.cpp files. Test commit for new contributor.
|
 | llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp |
 | llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp |
 | llvm/lib/Target/AMDGPU/AMDGPUPropagateAttributes.cpp |
 | llvm/lib/Target/AMDGPU/AMDGPURewriteOutArguments.cpp |
 | llvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp |
 | llvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp |
 | llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp |
 | llvm/lib/Target/AMDGPU/AMDGPULibFunc.cpp |
 | llvm/lib/Target/AMDGPU/AMDGPUReplaceLDSUseWithPointer.cpp |
 | llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp |
 | llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp |
 | llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp |
 | llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp |
 | llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp |
 | llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp |
 | llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp |
 | llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp |
 | llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp |
 | llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp |
 | llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp |
 | llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp |
 | llvm/lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp |
Commit
4edf46f72a8f3bd9d60628d0c852e8ff91921673
by rob.suderman[mlir][tosa] Remove the documentation requirement for elements of several binary elementwise ops to be of the same rank.
Reviewed By: rsuderman
Differential Revision: https://reviews.llvm.org/D110095
|
 | mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td |
Commit
f11917057923bce7f9c04282b4a3b15ef0aad0d6
by thakis[clang] Fix a few comment typos to cycle bots
|
 | clang/lib/Format/UnwrappedLineFormatter.cpp |
 | clang/lib/Format/ContinuationIndenter.cpp |
 | clang/lib/Format/Format.cpp |
 | clang/lib/Format/MacroExpander.cpp |
 | clang/lib/Format/WhitespaceManager.h |
 | clang/lib/Format/TokenAnnotator.cpp |
Commit
38ff7e11c04e760570e3cb517f8b78d554c65386
by rob.suderman[mlir][tosa] Add several binary elementwise to the list of broadcastable ops.
Reviewed By: rsuderman
Differential Revision: https://reviews.llvm.org/D110096
|
 | mlir/lib/Dialect/Tosa/Transforms/TosaMakeBroadcastable.cpp |
Commit
4ceea7740990f5b755a7bb911e92254dd5680921
by Amara Emerson[X86] Rename the X86WinAllocaExpander pass and related symbols to "DynAlloca". NFC.
For x86 Darwin, we have a stack checking feature which re-uses some of this machinery around stack probing on Windows. Renaming this to be more appropriate for a generic feature.
Differential Revision: https://reviews.llvm.org/D109993
|
 | llvm/test/CodeGen/X86/opt-pipeline.ll |
 | llvm/lib/Target/X86/CMakeLists.txt |
 | llvm/lib/Target/X86/X86.h |
 | llvm/lib/Target/X86/X86InstrCompiler.td |
 | llvm/lib/Target/X86/X86ISelLowering.cpp |
 | llvm/lib/Target/X86/X86WinAllocaExpander.cpp |
 | llvm/lib/Target/X86/X86MachineFunctionInfo.h |
 | llvm/lib/Target/X86/X86ISelLowering.h |
 | llvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn |
 | llvm/lib/Target/X86/X86TargetMachine.cpp |
 | llvm/lib/Target/X86/X86DynAllocaExpander.cpp |
 | llvm/lib/Target/X86/X86InstrInfo.td |
 | llvm/test/CodeGen/X86/O0-pipeline.ll |
Commit
4e7c0a37c9c92baa655d244f5bfde91d52b138d0
by joker.ephUpdate MLIR generate-test-checks.py to add the notice from the source into the generated file
Folks may not read the source of the tool and miss these instructions.
Differential Revision: https://reviews.llvm.org/D110082
|
 | mlir/utils/generate-test-checks.py |
Commit
bb2506061b06e9786b5eb9c458f52f9ba7e52a73
by chiahungduan[mlir-tblgen] Add DagNode StaticMatcher.
Some patterns may share the common DAG structures. Generate a static function to do the match logic to reduce the binary size.
Reviewed By: jpienaar
Differential Revision: https://reviews.llvm.org/D105797
|
 | mlir/test/mlir-tblgen/rewriter-static-matcher.td |
 | mlir/include/mlir/TableGen/Pattern.h |
 | mlir/lib/TableGen/Pattern.cpp |
 | mlir/tools/mlir-tblgen/RewriterGen.cpp |
Commit
bde305baf631004b8d00081f11e62b33e1665e45
by thakis[clang] Fix a few comment more typos to cycle bots
|
 | clang/lib/Sema/SemaConcept.cpp |
 | clang/lib/Sema/SemaType.cpp |
 | clang/lib/Sema/SemaTemplate.cpp |
 | clang/lib/Sema/SemaOpenMP.cpp |
 | clang/lib/Sema/SemaStmt.cpp |
 | clang/lib/Sema/SemaTemplateDeduction.cpp |
 | clang/lib/Sema/SemaLookup.cpp |
 | clang/lib/Sema/SemaInit.cpp |
 | clang/lib/Sema/SemaCodeComplete.cpp |
 | clang/lib/Sema/TreeTransform.h |
 | clang/lib/Sema/SemaDeclAttr.cpp |
 | clang/lib/Sema/SemaDeclObjC.cpp |
 | clang/lib/Sema/SemaTemplateInstantiateDecl.cpp |
 | clang/lib/Sema/SemaDeclCXX.cpp |
 | clang/lib/Sema/SemaChecking.cpp |
 | clang/lib/Sema/SemaCXXScopeSpec.cpp |
Commit
60ab6861ed13e4f1e2729f8add6366a7be223d80
by thakis[clang] Fix a few more comment typos to cycle bots
|
 | clang/lib/AST/RecordLayoutBuilder.cpp |
 | clang/lib/AST/CommentBriefParser.cpp |
 | clang/lib/AST/Interp/InterpState.h |
 | clang/lib/AST/MicrosoftMangle.cpp |
 | clang/lib/AST/Interp/Function.h |
 | clang/lib/AST/Interp/Program.cpp |
 | clang/lib/AST/Interp/InterpStack.h |
 | clang/lib/AST/ComparisonCategories.cpp |
 | clang/lib/AST/ExprConstant.cpp |
 | clang/lib/AST/Interp/Descriptor.h |
 | clang/lib/AST/ASTContext.cpp |
 | clang/lib/AST/ASTImporter.cpp |
 | clang/lib/AST/DeclTemplate.cpp |
 | clang/lib/AST/DeclCXX.cpp |
 | clang/lib/AST/Interp/Opcodes.td |
Commit
f417d9d821118ef330b263c4c7ad9d3cda30f406
by mnadeem[InstCombine] Eliminate vector reverse if all inputs/outputs to an instruction are reverses
Differential Revision: https://reviews.llvm.org/D109808
Change-Id: I1a10d2bc33acbe0ea353c6cb3d077851391fe73e
|
 | llvm/test/Transforms/InstCombine/vector-reverse.ll |
 | llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse-mask4.ll |
 | llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse.ll |
 | llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp |
Commit
1fb2e842a93ac862849f5081eb6fdf6f1447ef2a
by stellaraccident[mlir][python] Forward _OperationBase _CAPIPtr to the Operation.
* ODS generated operations extend _OperationBase and without this, cannot be marshalled to CAPI functions. * No test case updates: this kind of interop is quite hard to verify with in-tree tests.
Differential Revision: https://reviews.llvm.org/D110030
|
 | mlir/lib/Bindings/Python/IRCore.cpp |
Commit
4f21152af12b21ea8f04b322a29dc6ad9e79ef16
by riddleriver[mlir] Tighten verification of SparseElementsAttr
SparseElementsAttr currently does not perform any verfication on construction, with the only verification existing within the parser. This revision moves the parser verification to SparseElementsAttr, and also adds additional verification for when a sparse index is not valid.
Differential Revision: https://reviews.llvm.org/D109189
|
 | mlir/lib/Parser/AttributeParser.cpp |
 | mlir/include/mlir/IR/BuiltinAttributes.h |
 | mlir/test/Dialect/Tensor/canonicalize.mlir |
 | mlir/lib/Parser/TypeParser.cpp |
 | mlir/test/IR/invalid.mlir |
 | mlir/lib/Parser/Parser.h |
 | mlir/include/mlir/IR/BuiltinAttributes.td |
 | mlir/test/IR/parser.mlir |
 | mlir/test/CAPI/ir.c |
 | mlir/test/Target/LLVMIR/llvmir.mlir |
 | mlir/lib/IR/BuiltinAttributes.cpp |
 | mlir/test/IR/pretty-attributes.mlir |
 | mlir/test/Dialect/Quant/convert-const.mlir |
Commit
0cb5d7fc7fd3eeb40b6ecf9b34a497d46bcba6c6
by riddleriver[mlir] Add value_begin/value_end methods to DenseElementsAttr
Currently DenseElementsAttr only exposes the ability to get the full range of values for a given type T, but there are many situations where we just want the beginning/end iterator. This revision adds proper value_begin/value_end methods for all of the supported T types, and also cleans up a bit of the interface.
Differential Revision: https://reviews.llvm.org/D104173
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 | mlir/include/mlir/IR/BuiltinAttributes.h |
 | mlir/lib/IR/BuiltinAttributes.cpp |
 | mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp |
 | mlir/lib/IR/AsmPrinter.cpp |
 | mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp |
 | mlir/lib/IR/Operation.cpp |
 | mlir/examples/toy/Ch5/mlir/LowerToAffineLoops.cpp |
 | mlir/lib/Conversion/LinalgToSPIRV/LinalgToSPIRV.cpp |
 | mlir/examples/toy/Ch7/mlir/LowerToAffineLoops.cpp |
 | mlir/unittests/TableGen/StructsGenTest.cpp |
 | mlir/include/mlir/IR/BuiltinAttributes.td |
 | mlir/lib/Conversion/StandardToSPIRV/StandardToSPIRV.cpp |
 | mlir/lib/Dialect/GPU/IR/GPUDialect.cpp |
 | mlir/lib/Interfaces/InferTypeOpInterface.cpp |
 | mlir/examples/toy/Ch6/mlir/LowerToAffineLoops.cpp |
 | mlir/include/mlir/Dialect/CommonFolders.h |
 | mlir/lib/CAPI/IR/BuiltinAttributes.cpp |
 | mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp |
Commit
d80d3a358fffce430c94c7e9c716a5641010e4d0
by riddleriver[mlir] Refactor ElementsAttr into an AttrInterface
This revision refactors ElementsAttr into an Attribute Interface. This enables a common interface with which to interact with element attributes, without needing to modify the builtin dialect. It also removes a majority (if not all?) of the need for the current OpaqueElementsAttr, which was originally intended as a way to opaquely represent data that was not representable by the other builtin constructs.
The new ElementsAttr interface not only allows for users to natively represent their data in the way that best suits them, it also allows for efficient opaque access and iteration of the underlying data. Attributes using the ElementsAttr interface can directly expose support for interacting with the held elements using any C++ data type they claim to support. For example, DenseIntOrFpElementsAttr supports iteration using various native C++ integer/float data types, as well as APInt/APFloat, and more. ElementsAttr instances that refer to DenseIntOrFpElementsAttr can use all of these data types for iteration:
```c++ DenseIntOrFpElementsAttr intElementsAttr = ...;
ElementsAttr attr = intElementsAttr; for (uint64_t value : attr.getValues<uint64_t>()) ...; for (APInt value : attr.getValues<APInt>()) ...; for (IntegerAttr value : attr.getValues<IntegerAttr>()) ...; ```
ElementsAttr also supports failable range/iterator access, allowing for selective code paths depending on data type support:
```c++ ElementsAttr attr = ...; if (auto range = attr.tryGetValues<uint64_t>()) { for (uint64_t value : *range) ...; } ```
Differential Revision: https://reviews.llvm.org/D109190
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 | utils/bazel/llvm-project-overlay/mlir/BUILD.bazel |
 | mlir/include/mlir/IR/CMakeLists.txt |
 | mlir/lib/IR/CMakeLists.txt |
 | mlir/include/mlir/IR/BuiltinAttributeInterfaces.td |
 | mlir/test/lib/Dialect/Test/TestAttributes.cpp |
 | mlir/tools/mlir-opt/mlir-opt.cpp |
 | mlir/include/mlir/Support/InterfaceSupport.h |
 | mlir/test/lib/IR/TestBuiltinAttributeInterfaces.cpp |
 | mlir/lib/IR/BuiltinAttributeInterfaces.cpp |
 | mlir/test/lib/IR/CMakeLists.txt |
 | mlir/test/lib/Dialect/Test/TestAttrDefs.td |
 | mlir/include/mlir/IR/BuiltinAttributes.h |
 | mlir/lib/IR/BuiltinAttributes.cpp |
 | mlir/test/IR/elements-attr-interface.mlir |
 | utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel |
 | llvm/include/llvm/ADT/STLExtras.h |
 | mlir/include/mlir/IR/BuiltinAttributes.td |
 | mlir/include/mlir/IR/BuiltinAttributeInterfaces.h |
Commit
85b4b21c8bbad346d58a30154d2767c39cf3285a
by kazu[llvm] Use make_early_inc_range (NFC)
|
 | llvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp |
 | llvm/lib/Target/WebAssembly/WebAssemblyOptimizeLiveIntervals.cpp |
 | llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp |
 | llvm/lib/Target/X86/X86AvoidStoreForwardingBlocks.cpp |
 | llvm/lib/AsmParser/LLParser.cpp |
 | llvm/lib/Target/WebAssembly/WebAssemblyReplacePhysRegs.cpp |
 | llvm/lib/Target/WebAssembly/WebAssemblyMemIntrinsicResults.cpp |
 | llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp |
 | llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp |
 | llvm/lib/Target/X86/X86OptimizeLEAs.cpp |
 | llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp |
 | llvm/lib/Target/WebAssembly/WebAssemblyLowerBrUnless.cpp |
 | llvm/lib/Target/WebAssembly/WebAssemblyPrepareForLiveIntervals.cpp |
 | llvm/lib/Target/NVPTX/NVPTXGenericToNVVM.cpp |
Commit
a06db78fd99014993b62b99c305c7b374c1579fc
by mkazantsev[NFC] Rename Context->CtxI in SCEV for uniformity reasons
|
 | llvm/include/llvm/Analysis/ScalarEvolution.h |
 | llvm/lib/Analysis/ScalarEvolution.cpp |
Commit
cad9f98a2ad98fecf663e9ce39502b8e43676fc9
by llvm-project[Polly] Don't generate inter-iteration noalias metadata.
This metadata was intended to mark all accesses within an iteration to be pairwise non-aliasing, in this case because every memory of a base pointer is touched (read or write) at most once. This is typical for 'sweeps' over all data. The stated motivation from D30606 is to ensure that unrolled iterations are considered non-aliasing.
Rhe implemention had multiple issues:
* The structure of the noalias metadata was malformed. D110026 added check in the verifier for this metadata, and the tests were failing since then.
* This is not true for the outer loops of the BLIS matrix multiplication, where it was being inserted. Each element of A, B, C is accessed multiple times, as often as the loop not used as an index is iterating.
* Scopes were added to SecondLevelOtherAliasScopeList (used for the !noalias scop list) on-the-fly when another SCEV was seen. This meant that previously visited instructions would not be updated with alias scopes that are only seen later, missing out those SCEVs they should not be aliasing with.
* Since the !noalias scope list would ideally consists of all other SCEV for this base pointer, we might run quickly into scalability issues. Especially after unrolling there would probably at least once SCEV per instruction and unroll instance.
* The inter-iteration noalias base pointer was not removed after leaving the loop marked with it, effectively marking everything after it to noalias as well.
A solution I considered was to mark each instruction as non-aliasing with its own scope. The instruction itself would obviously alias itself, but such construction might also be considered invalid. Duplicating the instruction (e.g. due to speculation) would mark the instruction non-aliasing with its clone. I don't want to go into this territory, especially since the original motivation of determining unrolled instances as noalias based on SCEV is the what scev-aa does as well.
This effectively reverts D30606 and D35761.
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 | polly/include/polly/CodeGen/IRBuilder.h |
 | polly/lib/Transform/MatmulOptimizer.cpp |
 | polly/test/ScheduleOptimizer/pattern-matching-based-opts_10.ll |
 | polly/test/ScheduleOptimizer/pattern-matching-based-opts_13.ll |
 | polly/test/ScheduleOptimizer/pattern-matching-based-opts_5.ll |
 | polly/lib/CodeGen/IslNodeBuilder.cpp |
 | polly/lib/CodeGen/IRBuilder.cpp |
 | polly/test/ScheduleOptimizer/mat_mul_pattern_data_layout_2.ll |
 | polly/test/ScheduleOptimizer/pattern-matching-based-opts_3.ll |
 | polly/test/ScheduleOptimizer/pattern-matching-based-opts_14.ll |
 | polly/test/ScheduleOptimizer/ensure-correct-tile-sizes.ll |