Changes

Summary

  1. DWARFDie.cpp: Reduce indentation with early continue (details)
  2. DWARFDie:DWARFTypePrinter: Add common utility function for checking where parentheses are required (details)
  3. [RISCV] Optimize (add (shl x, c0), (shl y, c1)) with SH*ADD (details)
  4. llvm/cmake: fix a typo (details)
  5. [X86][Atom] Fix (U)COMISS/SD uops, latency and throughput (details)
  6. [mlir][emitc] Fix indent in CondBranchOp and block label (details)
  7. [ARM] Add VGETLANEu patterns for v4f16 and v8f16 (details)
  8. [InstCombine] add/adjust tests for min/max intrinsics; NFC (details)
  9. [X86] combineX86ShufflesRecursively(): call SimplifyMultipleUseDemandedVectorElts() on after finishing recursing (details)
  10. [NFC] combineX86ShufflesRecursively(): actually address nits for previous patch (details)
  11. [X86] lowerShuffleAsDecomposedShuffleMerge(): if both inputs are broadcastable/identities, canonicalize broadcasts as such (details)
  12. [X86][TLI] SimplifyDemandedVectorEltsForTargetNode(): don't break apart broadcasts from which not just the 0'th elt is demanded (details)
  13. [X86][Atom] Specific uops for all IMUL/IDIV instructions (details)
  14. llvm-dwarfdump: Refactor type pretty printing tests (details)
  15. [X86] Fold SHUFPS(shuffle(x),shuffle(y),mask) -> SHUFPS(x,y,mask') (details)
  16. [X86][Atom] Fix FP uops + port usage (details)
  17. DWARFDie: Improve type printing for function and array types - with qualifiers (cv/reference) and pointers to them (details)
  18. DWARFDie.cpp: Minor follow-up clang-format (details)
  19. [X86] Add test cases for pr51908. NFC (details)
  20. [X86] Remove Commutable flag from mpsadbw intrinsics. (details)
  21. llvm-dwarfdump: Pretty printing types including a space between const and parenthesized references/pointers to arrays (details)
  22. [DebugInfo][LSR] Emit shorter expressions from scev-based salvaging (details)
  23. [llvm] Use pop_back_val (NFC) (details)
  24. [X86] SimplifyDemandedBits - only narrow a broadcast source if we only have one use. (details)
  25. llvm-dwarfdump: Pretty print names qualified/with scopes (details)
  26. llvm-dwarfdump: Don't print even an empty string when a type is unprintable (details)
  27. llvm-dwarfdump: support for type printing "decltype(nullptr)" as "nullptr_t" (details)
  28. llvm-dwarfdump: pretty type printing: print fully qualified names in function type parameter types (details)
  29. [SCEV] Support negative values in signed/unsigned predicate reasoning (details)
  30. [libc] Add implementations of div, ldiv, lldiv and imaxdiv. (details)
  31. Revert "Revert "[IndVars] Replace PHIs if loop exits on 1st iteration"" (details)
  32. [NFC] Add assert and test showing that revert of D109596 wasn't justified (details)
  33. [libc][obvious] Make *abs and *div functions buildable in default mode. (details)
  34. [libc][obvious] Add inttypes.h and stdlib.h as deps to *div functions. (details)
  35. [lldb] Remove two #ifndef linux from Platform.cpp (details)
  36. [mlir][NFC] Add explicit "::mlir" namespace to tblgen generated code (details)
  37. [mlir] Fix bug in partial dialect conversion (details)
  38. [MLIR] Simplex::appendVariable: early return if count == 0 (details)
  39. [CMake] Add debuginfo-tests to LLVM_ALL_PROJECTS after D110016 (details)
  40. [CaptureTracking] Allow passing LI to PointerMayBeCapturedBefore (NFC). (details)
  41. [MLIR][Linalg] Make detensoring cost-model more flexible. (details)
  42. [lldb] [gdb-remote] Remove unused arg from GDBRemoteRegisterContext::ReadRegisterBytes() (details)
  43. [lldb] [gdb-remote] Recognize aarch64v type from gdbserver (details)
  44. Revert "[AArch64][SVE] Teach cost model that masked loads/stores are cheap" (details)
  45. [mlir] Fix integration tests failures introduced in D108505 (details)
  46. AArch64: use ldp/stp for 128-bit atomic load/store in v.84 onwards (details)
  47. [OpenCL] Supports optional writing to 3d images in C++ for OpenCL 2021 (details)
  48. Add myself as a code owner for SYCL support (details)
  49. [clang][NFC] Remove dead code (details)
  50. [NewPM] Make InlinerPass (aka 'inline') a parameterized pass (details)
  51. [GlobalISel] Improve elimination of dead instructions in legalizer (details)
  52. [lldb] [gdb-remote] Always send PID when detaching w/ multiprocess (details)
  53. [mlir][openacc] Make use of the second counter extension in DataOp translation (details)
  54. [MCA] InstructionTables::execute() - use const-ref iterator in for-range loop. NFCI. (details)
  55. [X86] X86TargetTransformInfo - remove unnecessary if-else after early exit. NFCI. (details)
  56. MachOObjectFile - checkOverlappingElement - use const-ref to avoid unnecessary copies. NFCI. (details)
  57. Fix CLANG_ENABLE_STATIC_ANALYZER=OFF building all analyzer source (details)
  58. pre-commit test for D109767 (details)
  59. [update_mir_test_checks.py] Use -NEXT FileCheck directories (details)
  60. [ARM] MVE reverse shuffles. (details)
  61. [Clang] [Fix] Clang build fails when build directory contains space character (details)
  62. [lldb] [test] Add unittest for DynamicRegisterInfo::Finalize() (details)
  63. [lldb] [DynamicRegisterInfo] Unset value_regs/invalidate_regs before Finalize() (details)
  64. Thread safety analysis: Drop special block handling (details)
  65. [JITLink] Adopt forEachRelocation() helper in ELF x86-64 backend (NFC) (details)
  66. [JITLink] Adopt forEachRelocation() helper in ELF RISCV backend (NFC) (details)
  67. [AMDGPU] Regenerate checks (details)
  68. [Analysis] Add support for vscale in computeKnownBitsFromOperator (details)
  69. [analyzer] Move docs of SmartPtr to correct subcategory (details)
  70. [mlir][linalg] Fusion on tensors. (details)
  71. [clangd] Bail-out when an empty compile flag is encountered (details)
  72. [OpenCL] Supports atomics in C++ for OpenCL 2021 (details)
  73. [X86] Add test to show the effect caused by D109607. NFC (details)
  74. [X86] Always check the size of SourceTy before getting the next type (details)
  75. [flang] Put intrinsic function table back into order (details)
  76. [SLP]Improve graph reordering. (details)
  77. [mlir][linalg] Fix typo (NFC). (details)
  78. [MLIR][SCF] Add for-to-while loop transformation pass (details)
  79. [mlir][linalg] Add IndexOp support to fusion on tensors. (details)
  80. [DSE] Add additional tests to cover review comments. (details)
  81. [lldb] Fix whitespace in CommandObjectTarget (NFC) (details)
  82. [lldb] Extract adding symbols for UUID/File/Frame (NFC) (details)
  83. [Verifier] Verify scoped noalias metadata (details)
  84. [ELF] Don't fall back to .text for e_entry (details)
  85. [RISCV] Add a pass to recognize VLS strided loads/store from gather/scatter. (details)
  86. [gn build] Port d85e347a28dc (details)
  87. [MCA] Fix a warning (details)
  88. [Verifier] Try to fix MSVC build (details)
  89. [ELF] Add --why-extract= to query why archive members/lazy object files are extracted (details)
  90. [lld] Remove timers.ll because inconsistent timers behavior causes the test to fail sometimes (details)
  91. Add use_default_shell_env = True to ctx.actions.run (details)
  92. Temporarily XFAIL MLIR test that fails the LLVM verifier after 8700f2bd3 (details)
  93. Revert "[MLIR][SCF] Add for-to-while loop transformation pass" (details)
  94. [NCF][OpenMP] Fix metadirective test on SystemZ (details)
  95. [lldb][crashlog] Avoid specifying arch for image when a UUID is present (details)
  96. [RISCV] Add test cases showing failure to use .vf vector operations when splat is in another basic block. NFC (details)
  97. [RISCV] Teach RISCVTargetLowering::shouldSinkOperands to sink splats for FAdd/FSub/FMul/FDiv. (details)
  98. Eliminate _LIBCPP_EQUAL_DELETE in favor of `=delete`. (details)
  99. Revert code change of D63497 & D74399 for riscv64-*-linux GCC detection (details)
  100. Revert "[CMake] Add debuginfo-tests to LLVM_ALL_PROJECTS after D110016" (details)
  101. [mlir][Linalg] Add ConvolutionOpInterface. (details)
  102. Diagnose -Wunused-value based on CFG reachability (details)
  103. Fix bad merge the removed switch case (details)
  104. [OpenMP][host runtime] Fix indirect lock table race condition (details)
  105. [mlir][MemRef] Compute unused dimensions of a rank-reducing subviews using strides as well. (details)
  106. [IR] Add helper to convert offset to GEP indices (details)
  107. [gn build] Don't pass -Wl,-z,defs for sanitizer builds (details)
  108. [lldb][NFC] Remove outdated FIXME (details)
  109. [libc++] [LIBCXX-DEBUG-FIXME] Constexpr char_traits::copy mustn't compare unrelated pointers. (details)
  110. [libc++] [P0919] Some belated review on D87171. (details)
  111. [RISCV] Add test cases for missed opportunity to use vfmacc.vf. NFC (details)
  112. [RISCV] Teach RISCVTargetLowering::shouldSinkOperands to sink splats for FMA. (details)
  113. [cmake] Put check from D110016 behind (default-on) flag (details)
  114. Revert "Fix CLANG_ENABLE_STATIC_ANALYZER=OFF building all analyzer source" (details)
  115. [DebugInfo] Add test for dumping DW_AT_defaulted (details)
  116. [RISCV] Add test cases for missed opportunities to use vand/vor/vxor.vx. NFC (details)
  117. [NFC] [hwasan] Separate outline and inline instrumentation. (details)
  118. [Polly] Partially fix scoped alias metadata (details)
  119. [OpenMP][NVPTX] Fix a warning that data argument not used by format string (details)
  120. Sema: relax va_start checking further for Windows AArch64 (details)
  121. [GlobalISel] Implement support for the "trap-func-name" attribute. (details)
  122. [AMDGPU][NFC] Correct typos in lib/Target/AMDGPU/AMDGPU*.cpp files. Test commit for new contributor. (details)
  123. [mlir][tosa] Remove the documentation requirement for elements of several binary elementwise ops to be of the same rank. (details)
  124. [clang] Fix a few comment typos to cycle bots (details)
  125. [mlir][tosa] Add several binary elementwise to the list of broadcastable ops. (details)
  126. [X86] Rename the X86WinAllocaExpander pass and related symbols to "DynAlloca". NFC. (details)
  127. Update MLIR generate-test-checks.py to add the notice from the source into the generated file (details)
  128. [mlir-tblgen] Add DagNode StaticMatcher. (details)
  129. [clang] Fix a few comment more typos to cycle bots (details)
  130. [clang] Fix a few more comment typos to cycle bots (details)
  131. [InstCombine] Eliminate vector reverse if all inputs/outputs to an instruction are reverses (details)
  132. [mlir][python] Forward _OperationBase _CAPIPtr to the Operation. (details)
  133. [mlir] Tighten verification of SparseElementsAttr (details)
  134. [mlir] Add value_begin/value_end methods to DenseElementsAttr (details)
  135. [mlir] Refactor ElementsAttr into an AttrInterface (details)
  136. [llvm] Use make_early_inc_range (NFC) (details)
  137. [NFC] Rename Context->CtxI in SCEV for uniformity reasons (details)
  138. [Polly] Don't generate inter-iteration noalias metadata. (details)
  139. [SimplifyCFG] Redirect switch cases that lead to UB into an unreachable block (details)
  140. [OpAsmParser] Add a parseCommaSeparatedList helper and beef up Delimeter. (details)
  141. BPF: make 32bit register spill with 64bit alignment (details)
  142. [SCEV] Generalize implication when signedness of FoundPred doesn't matter (details)
  143. [GlobalISel][Legalizer] Don't use eraseFromParentAndMarkDBGValuesForRemoval() for some artifacts. (details)
  144. [DSE][NFC] Rename Later->Killing, Earlier->Dead (details)
  145. [GlobalISel][Legalizer] Use ArtifactValueFinder first for unmerge combines before trying others. (details)
  146. [clangd] Deduplicate inlay hints (details)
  147. [MLIR] Add mergeLocalIds and mergeSymbolIds (details)
  148. [lldb] Speculative fix to TestGuiExpandThreadsTree (details)
  149. [MLIR][SCF] Add for-to-while loop transformation pass (details)
  150. [PowerPC] NFC: Remove unused tblgen template args (details)
  151. Add CMAKE_BUILD_TYPE to the list of BOOTSTRAP_DEFAULT_PASSTHROUGH variables (details)
  152. [flang][docs] Document plugin limitations (details)
  153. [MLIR] NFC. gpu.launch op argument const folder cleanup (details)
Commit d2373c04a7cbbc38221bbfb6120e5285c765785c by dblaikie
DWARFDie.cpp: Reduce indentation with early continue
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDie.cpp
Commit ae0873483d9393d35bd5bdbfcb2bfb843c335cd5 by dblaikie
DWARFDie:DWARFTypePrinter: Add common utility function for checking where parentheses are required
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDie.cpp
Commit dee5a8ca325f3c752534442233cb601910e918c4 by ben.shi
[RISCV] Optimize (add (shl x, c0), (shl y, c1)) with SH*ADD

Optimize (add (shl x, c0), (shl y, c1)) ->
         (SLLI (SH*ADD x, y), c1), if c0-c1 == 1/2/3.

Reviewed By: craig.topper, luismarques

Differential Revision: https://reviews.llvm.org/D108916
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rv32zba.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv64zba.ll
Commit b7ec8f3dcbcdf6d27902688c8eac0e6196061cb3 by sylvestre
llvm/cmake: fix a typo
The file was modifiedllvm/CMakeLists.txt
Commit e381d8b24329cae6408205f74d0d6d9eaa6b29cf by llvm-dev
[X86][Atom] Fix (U)COMISS/SD uops, latency and throughput

Both ports are required, for reg and mem variants - we can also use the WriteFComX class directly and remove the unnecessary InstRW overrides. Matches what Intel AoM / Agner / InstLatX64 report as well.
The file was modifiedllvm/lib/Target/X86/X86ScheduleAtom.td
The file was modifiedllvm/test/tools/llvm-mca/X86/Atom/resources-sse2.s
The file was modifiedllvm/test/tools/llvm-mca/X86/Atom/resources-sse1.s
Commit 9de88fc0eac1bfc719dfd63a32b7eb069489407e by xndchn
[mlir][emitc] Fix indent in CondBranchOp and block label

1. Add missing indent in CondBranchOp
2. Remove indent in block label

Differential Revision: https://reviews.llvm.org/D109805
The file was modifiedmlir/lib/Target/Cpp/TranslateToCpp.cpp
Commit 1da52ef2943b67c0ec1ccd3b8e459d0e57e67a6d by david.green
[ARM] Add VGETLANEu patterns for v4f16 and v8f16

These were apparently missing, having no pattern that could convert a
VGETLANEu of a v4f16 to an i32. Added bf16 whilst here, following the
same code.
The file was modifiedllvm/lib/Target/ARM/ARMInstrNEON.td
The file was modifiedllvm/test/CodeGen/ARM/bf16-getlane-with-fp16.ll
The file was modifiedllvm/test/CodeGen/ARM/fp16-insert-extract.ll
Commit 9555d1edb0d16f135ae57695fc2da55deaabf082 by spatel
[InstCombine] add/adjust tests for min/max intrinsics; NFC

If we transform these, we have to propagate no-wrap/undef carefully.
The file was modifiedllvm/test/Transforms/InstCombine/minmax-intrinsics.ll
Commit 1e72ca94e5796a744d0e1a8871c33b1b4edb0acb by lebedev.ri
[X86] combineX86ShufflesRecursively(): call SimplifyMultipleUseDemandedVectorElts() on after finishing recursing

This was suggested in https://reviews.llvm.org/D108382#inline-1039018,
and it avoids regressions in that patch.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D109065
The file was modifiedllvm/test/CodeGen/X86/oddshuffles.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/vselect.ll
Commit 0852313e47836152b00fb8b8fd62a7e12bf92abd by lebedev.ri
[NFC] combineX86ShufflesRecursively(): actually address nits for previous patch
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 07f1d8f0caa1516e0d97616adfea4aa94f7883a4 by lebedev.ri
[X86] lowerShuffleAsDecomposedShuffleMerge(): if both inputs are broadcastable/identities, canonicalize broadcasts as such

Split off from D108253.
Broadcast is simpler than any other shuffle we might produce
to do what we want to do here, so prefer it.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D108382
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/copy-low-subvec-elt-to-high-subvec-elt.ll
The file was modifiedllvm/test/CodeGen/X86/horizontal-sum.ll
Commit 5f2fe48d06c742872804da8b3d86596ed2bb9acb by lebedev.ri
[X86][TLI] SimplifyDemandedVectorEltsForTargetNode(): don't break apart broadcasts from which not just the 0'th elt is demanded

Apparently this has no test coverage before D108382,
but D108382 itself shows a few regressions that this fixes.

It doesn't seem worthwhile breaking apart broadcasts,
assuming we want the broadcasted value to be preset in several elements,
not just the 0'th one.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D108411
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/horizontal-sum.ll
The file was modifiedllvm/test/CodeGen/X86/copy-low-subvec-elt-to-high-subvec-elt.ll
The file was modifiedllvm/test/CodeGen/X86/sse41.ll
Commit cf8fac7d07307bc6679d60c3ad3e7a7792a2caa6 by llvm-dev
[X86][Atom] Specific uops for all IMUL/IDIV instructions

Based off a mixture of llvm-exegesis captures (PR36895) and Intel AoM / Agner / InstLatX64 reports.
The file was modifiedllvm/test/tools/llvm-mca/X86/Atom/resources-x86_64.s
The file was modifiedllvm/lib/Target/X86/X86ScheduleAtom.td
Commit 2ca637c9769ff50e94ace3083075a97b50d147f0 by dblaikie
llvm-dwarfdump: Refactor type pretty printing tests

Move most type tests to a pre-generated assembly file to make it easier
to add more weird cases without having to hand craft more DWARF.

Move the novel array types that aren't reachable via clang-generated
DWARF to a separate file for easy maintenance.
The file was addedllvm/test/tools/llvm-dwarfdump/X86/prettyprint_types_handcrafted.s
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/prettyprint_types.s
Commit b7342e3137d8fa7c356a80c1ddecf1d410c27eef by llvm-dev
[X86] Fold SHUFPS(shuffle(x),shuffle(y),mask) -> SHUFPS(x,y,mask')

We can combine unary shuffles into either of SHUFPS's inputs and adjust the shuffle mask accordingly.

Unlike general shuffle combining, we can be more aggressive and handle multiuse cases as we're not going to accidentally create additional shuffles.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/horizontal-sum.ll
The file was modifiedllvm/test/CodeGen/X86/vselect.ll
Commit f855ef260148df0f08c73a70b9425a5215232874 by llvm-dev
[X86][Atom] Fix FP uops + port usage

Both ports are required in most cases. Update the uops counts + port usage based off the most recent llvm-exegesis captures (PR36895) and what Intel AoM / Agner / InstLatX64 reports as well.

Noticed while trying to improve fp costs for vectorization via the D103695 helper script.
The file was modifiedllvm/lib/Target/X86/X86ScheduleAtom.td
The file was modifiedllvm/test/tools/llvm-mca/X86/Atom/resources-sse3.s
The file was modifiedllvm/test/tools/llvm-mca/X86/Atom/resources-sse1.s
The file was modifiedllvm/test/tools/llvm-mca/X86/Atom/resources-sse2.s
The file was modifiedllvm/test/tools/llvm-mca/X86/Atom/resources-x87.s
The file was modifiedllvm/test/tools/llvm-mca/X86/Atom/resources-ssse3.s
Commit f09ca5c6461b604113b6e1adb825be2d92575aff by dblaikie
DWARFDie: Improve type printing for function and array types - with qualifiers (cv/reference) and pointers to them
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/prettyprint_types.s
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDie.cpp
Commit a51fb58c557c2cd217eddc8a2332b245350118cf by dblaikie
DWARFDie.cpp: Minor follow-up clang-format
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDie.cpp
Commit 2bde3dcd32b3ce2c8855d13659c6708f4434a985 by craig.topper
[X86] Add test cases for pr51908. NFC
The file was modifiedllvm/test/CodeGen/X86/avx2-intrinsics-x86.ll
The file was modifiedllvm/test/CodeGen/X86/sse41-intrinsics-x86.ll
Commit 391fa371fdfbc5ea4d4a924aebb27cb77d483da4 by craig.topper
[X86] Remove Commutable flag from mpsadbw intrinsics.

Unlike psadbw, mpsadbw is not commutable because of how it operates
on blocks. We already marked as not commutable for MachineIR, but
had it commutable for the tablegened isel patterns.

Fixes PR51908.
The file was modifiedllvm/test/CodeGen/X86/sse41-intrinsics-x86.ll
The file was modifiedllvm/test/CodeGen/X86/avx2-intrinsics-x86.ll
The file was modifiedllvm/include/llvm/IR/IntrinsicsX86.td
Commit 372e2c24b6e17bbff8fe6ed488cff5f7b7abd2b7 by dblaikie
llvm-dwarfdump: Pretty printing types including a space between const and parenthesized references/pointers to arrays
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/prettyprint_types.s
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDie.cpp
Commit 5ba8020326a522c0dfa32f59a472fe20bee4908a by chris.jackson
[DebugInfo][LSR] Emit shorter expressions from scev-based salvaging

The scev-based salvaging for LSR can sometimes produce unnecessarily
verbose expressions. This patch adds logic to detect when the value to
be recovered and the induction variable differ by only a constant
offset. Then, the expression to derive the current iteration count can
be omitted from the dbg.value in favour of the offset.

Reviewed by: aprantl

Differential Revision: https://reviews.llvm.org/D109044
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/dbg-preserve-0.ll
The file was modifiedllvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
Commit 84b07c9b3aa79e073a97290bdd30d98b1941a536 by kazu
[llvm] Use pop_back_val (NFC)
The file was modifiedllvm/lib/CodeGen/LoopTraversal.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
The file was modifiedllvm/lib/CodeGen/TwoAddressInstructionPass.cpp
The file was modifiedllvm/lib/CodeGen/LiveRangeEdit.cpp
The file was modifiedllvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
The file was modifiedllvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmTypeCheck.cpp
The file was modifiedllvm/lib/CodeGen/ReachingDefAnalysis.cpp
The file was modifiedllvm/lib/Transforms/Coroutines/CoroFrame.cpp
The file was modifiedllvm/lib/Target/ARM/A15SDOptimizer.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/ObjectLinkingLayer.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64StackTaggingPreRA.cpp
The file was modifiedllvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
The file was modifiedllvm/lib/Analysis/MemorySSAUpdater.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
The file was modifiedllvm/lib/CodeGen/LiveVariables.cpp
The file was modifiedllvm/lib/Analysis/StackSafetyAnalysis.cpp
The file was modifiedllvm/lib/CodeGen/CodeGenPrepare.cpp
The file was modifiedllvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
The file was modifiedllvm/lib/IR/Value.cpp
Commit 0e89ff8195e994e5051f19669e1044d47120ac06 by llvm-dev
[X86] SimplifyDemandedBits - only narrow a broadcast source if we only have one use.

Helps with the regression noted on D109065 - don't truncate a broadcast source if the source has multiple uses.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/oddshuffles.ll
Commit 5bfe5207ef283194a76616e5693a67a14c158ae3 by dblaikie
llvm-dwarfdump: Pretty print names qualified/with scopes
The file was modifiedllvm/test/DebugInfo/X86/addr-tu-to-non-tu.ll
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDie.cpp
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/prettyprint_types.s
Commit 11e0b79b056a5f1ba1feb81872aee67709f34834 by dblaikie
llvm-dwarfdump: Don't print even an empty string when a type is unprintable
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDie.cpp
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/verify_debug_info.s
Commit 606ea0dd2a7308d4af222ddcf0ae66c6267cb90d by dblaikie
llvm-dwarfdump: support for type printing "decltype(nullptr)" as "nullptr_t"

This should probably be rendered as "std::nullptr_t" but for now clang
uses the unqualified name (which is ambiguous with possible user defined
name in the global namespace), so match that here.
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/prettyprint_types.s
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDie.cpp
Commit cb42bb355061235f1c4190c8a35e59e4cfb15163 by dblaikie
llvm-dwarfdump: pretty type printing: print fully qualified names in function type parameter types
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDie.cpp
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/prettyprint_types.s
Commit def15c5fb6a117c1b6d8b2835f6760f814410582 by mkazantsev
[SCEV] Support negative values in signed/unsigned predicate reasoning

There is a piece of logic that uses the fact that signed and unsigned
versions of the same predicate are equivalent when both values are
non-negative. It's also true when both of them are negative.

Differential Revision: https://reviews.llvm.org/D109957
Reviewed By: nikic
The file was modifiedllvm/test/Transforms/IndVarSimplify/negative_ranges.ll
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
Commit 74670e79b0a00224c04dfc6a446ea4439f4cfca4 by sivachandra
[libc] Add implementations of div, ldiv, lldiv and imaxdiv.

Reviewed By: michaelrj

Differential Revision: https://reviews.llvm.org/D109952
The file was addedlibc/test/src/stdlib/lldiv_test.cpp
The file was modifiedlibc/config/linux/api.td
The file was modifiedlibc/src/inttypes/CMakeLists.txt
The file was modifiedlibc/config/linux/x86_64/entrypoints.txt
The file was addedlibc/src/stdlib/lldiv.h
The file was modifiedlibc/src/__support/integer_operations.h
The file was addedlibc/src/inttypes/imaxdiv.cpp
The file was addedlibc/src/stdlib/ldiv.cpp
The file was modifiedlibc/spec/stdc.td
The file was addedlibc/src/stdlib/ldiv.h
The file was addedlibc/src/stdlib/lldiv.cpp
The file was addedlibc/test/src/stdlib/DivTest.h
The file was modifiedlibc/test/src/inttypes/CMakeLists.txt
The file was addedlibc/test/src/inttypes/imaxdiv_test.cpp
The file was addedlibc/src/inttypes/imaxdiv.h
The file was addedlibc/src/stdlib/div.h
The file was addedlibc/src/stdlib/div.cpp
The file was addedlibc/test/src/stdlib/div_test.cpp
The file was modifiedlibc/src/stdlib/CMakeLists.txt
The file was modifiedlibc/test/src/stdlib/CMakeLists.txt
The file was modifiedlibc/config/linux/aarch64/entrypoints.txt
The file was addedlibc/test/src/stdlib/ldiv_test.cpp
Commit 471217cff8e5c827f2ee52175a1c94584699cab2 by mkazantsev
Revert "Revert "[IndVars] Replace PHIs if loop exits on 1st iteration""

This reverts commit 6fec6552f54885ae06bf76b35f9f1173a0561a4c.

The patch was reverted on incorrect claim that this patch may break LCSSA form
when the loop is not in a simplify form. All IndVars' transform insure that
the loop is in simplify and LCSSA form, so if it wasn't broken before this
transform, it will also not be broken after it.
The file was modifiedllvm/lib/Transforms/Scalar/IndVarSimplify.cpp
The file was modifiedllvm/test/Transforms/IndVarSimplify/eliminate-exit-no-dl.ll
The file was modifiedllvm/test/Transforms/IndVarSimplify/floating-point-iv.ll
The file was modifiedllvm/test/Transforms/IndVarSimplify/eliminate-backedge.ll
Commit e9d34c54290e277e075aed33036fddae77b5f582 by mkazantsev
[NFC] Add assert and test showing that revert of D109596 wasn't justified

All transforms of IndVars have prerequisite requirement of LCSSA and LoopSimplify
form and rely on it. Added test that shows that this actually stands.
The file was modifiedllvm/test/Transforms/IndVarSimplify/eliminate-backedge.ll
The file was modifiedllvm/lib/Transforms/Scalar/IndVarSimplify.cpp
Commit 5252aa2981ba19417b3ea68b22e8be33d5623368 by sivachandra
[libc][obvious] Make *abs and *div functions buildable in default mode.
The file was modifiedlibc/src/stdlib/CMakeLists.txt
Commit f5b8f1247cd9d1b18b7b95f6f197d4d654597529 by sivachandra
[libc][obvious] Add inttypes.h and stdlib.h as deps to *div functions.
The file was modifiedlibc/src/stdlib/CMakeLists.txt
The file was modifiedlibc/src/inttypes/CMakeLists.txt
Commit 966922320f09b8bf6e4a69a32f344b3acec36434 by pavel
[lldb] Remove two #ifndef linux from Platform.cpp

These have been here since r215992, guarding the calls to HostInfo, but
their purpose unclear -- HostInfoLinux provides these functions and they
work fine.
The file was modifiedlldb/source/Target/Platform.cpp
Commit 9a2255dfa012ad0334eacb2d09da7aa4db249c51 by vlad.vinogradov
[mlir][NFC] Add explicit "::mlir" namespace to tblgen generated code

Reviewed By: lattner, ftynse

Differential Revision: https://reviews.llvm.org/D109223
The file was modifiedmlir/include/mlir/IR/OpBase.td
Commit ec03bbe8a74ae593d0ea5d8bf55c337e395873d1 by vlad.vinogradov
[mlir] Fix bug in partial dialect conversion

The discussion on forum:
https://llvm.discourse.group/t/bug-in-partial-dialect-conversion/4115

The `applyPartialConversion` didn't handle the operations, that were
marked as illegal inside dynamic legality callback.
Instead of reporting error, if such operation was not converted to legal set,
the method just added it to `unconvertedSet` in the same way as unknown operations.

This patch fixes that and handle dynamically illegal operations as well.

The patch includes 2 fixes for existing passes:

* `tensor-bufferize` - explicitly mark `std.return` as legal.
* `convert-parallel-loops-to-gpu` - ugly fix with marking visited operations
  to avoid recursive legality checks.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D108505
The file was modifiedmlir/include/mlir/Conversion/SCFToGPU/SCFToGPU.h
The file was modifiedmlir/test/Transforms/test-legalizer.mlir
The file was modifiedmlir/test/Transforms/test-legalizer-full.mlir
The file was modifiedmlir/lib/Conversion/SCFToGPU/SCFToGPUPass.cpp
The file was modifiedmlir/lib/Dialect/Tensor/Transforms/Bufferize.cpp
The file was modifiedmlir/test/lib/Dialect/Test/TestOps.td
The file was modifiedmlir/test/lib/Dialect/Test/TestPatterns.cpp
The file was modifiedmlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp
The file was modifiedmlir/lib/Transforms/Utils/DialectConversion.cpp
Commit 76cb876563d0e2a3c850b14ca68638be9f6124a0 by arjunpitchanathan
[MLIR] Simplex::appendVariable: early return if count == 0
The file was modifiedmlir/lib/Analysis/Presburger/Simplex.cpp
The file was modifiedmlir/unittests/Analysis/Presburger/SimplexTest.cpp
Commit 4b80f0125adc876c8ef325f1c0ace4af023f2264 by i
[CMake] Add debuginfo-tests to LLVM_ALL_PROJECTS after D110016
The file was modifiedllvm/CMakeLists.txt
Commit 7f6a4826ac49e4c7075f80930480045bf983483c by flo
[CaptureTracking] Allow passing LI to PointerMayBeCapturedBefore (NFC).

isPotentiallyReachable can use LoopInfo to return earlier. This patch
allows passing an optional LI to PointerMayBeCapturedBefore. Used in
D109844.

Reviewed By: nikic, asbirlea

Differential Revision: https://reviews.llvm.org/D109978
The file was modifiedllvm/lib/Analysis/CaptureTracking.cpp
The file was modifiedllvm/include/llvm/Analysis/CaptureTracking.h
Commit bdcf4b9b9620afe24d17132027a7d12e2f1a598b by kareem.ergawy
[MLIR][Linalg] Make detensoring cost-model more flexible.

So far, the CF cost-model for detensoring was limited to discovering
pure CF structures. This means, if while discovering the CF component,
the cost-model found any op that is not detensorable, it gives up on
detensoring altogether. This patch makes it a bit more flexible by
cleaning-up the detensorable component from non-detensorable ops without
giving up entirely.

Reviewed By: silvas

Differential Revision: https://reviews.llvm.org/D109965
The file was removedmlir/test/Dialect/Linalg/detensorize_while_failure.mlir
The file was addedmlir/test/Dialect/Linalg/detensorize_while_impure_cf.mlir
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Detensorize.cpp
Commit 92904cc68fbc1d000387b30accc8b05b3fe95daa by mgorny
[lldb] [gdb-remote] Remove unused arg from GDBRemoteRegisterContext::ReadRegisterBytes()

Differential Revision: https://reviews.llvm.org/D110020
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.h
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.cpp
Commit f6e0edc23e6199bbb5fb4ef3b018b49a5b303183 by mgorny
[lldb] [gdb-remote] Recognize aarch64v type from gdbserver

Differential Revision: https://reviews.llvm.org/D109899
The file was modifiedlldb/test/API/functionalities/gdb_remote_client/TestGDBServerTargetXML.py
The file was modifiedlldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
Commit 92c9b28347c38cc15adf20223ed272abe8ec0227 by david.spickett
Revert "[AArch64][SVE] Teach cost model that masked loads/stores are cheap"

This reverts commit 734708e04f84b72f1ae7c8b35c002b8bf97dc064.

Due to build failures on the 2 stage SVE VLS bot.
https://lab.llvm.org/buildbot/#/builders/176/builds/908/steps/11/logs/stdio
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
The file was removedllvm/test/Analysis/CostModel/AArch64/masked_ldst_vls.ll
Commit 798e4bfbeda824551fa89a388969baa2abbc2411 by vlad.vinogradov
[mlir] Fix integration tests failures introduced in D108505
The file was modifiedmlir/lib/Dialect/Tensor/Transforms/Bufferize.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Bufferize.cpp
Commit 13aa102e07695297fd17f68913c343c95a7c56ad by Tim Northover
AArch64: use ldp/stp for 128-bit atomic load/store in v.84 onwards

v8.4 says that normal loads/stores of 128-bytes are single-copy atomic if
they're properly aligned (which all LLVM atomics are) so we no longer need to
do a full RMW operation to guarantee we got a clean read.
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic-128.ll
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/v8.4-atomic-128.ll
The file was addedllvm/test/CodeGen/AArch64/v8.4-atomic-128.ll
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AArch64/atomic-ops-lse.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64.td
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64Subtarget.h
Commit ca3bebd8440f9f88f1457dad9c12933b73d9590f by Justas.Janickas
[OpenCL] Supports optional writing to 3d images in C++ for OpenCL 2021

Adds support for a feature macro __opencl_c_3d_image_writes in
C++ for OpenCL 2021 enabling a respective optional core feature
from OpenCL 3.0.

This change aims to achieve compatibility between C++ for OpenCL
2021 and OpenCL 3.0.

Differential Revision: https://reviews.llvm.org/D109328
The file was modifiedclang/test/Misc/opencl-c-3.0.incorrect_options.cl
The file was modifiedclang/test/SemaOpenCL/unsupported-image.cl
The file was modifiedclang/lib/Sema/SemaType.cpp
Commit 15feaaa359c7245bb59ff0a2aa3b806682f44286 by alexey.bader
Add myself as a code owner for SYCL support
The file was modifiedclang/CODE_OWNERS.TXT
Commit eb3af1e77341e82249993a5a8a50779c48e1cb61 by wingo
[clang][NFC] Remove dead code

Remove code that has no effect in SemaType.cpp:processTypeAttrs.

Differential Revision: https://reviews.llvm.org/D108360
The file was modifiedclang/lib/Sema/SemaType.cpp
Commit c8cb7f611fdf4d96c4d23a75aa48c93cca38646f by bjorn.a.pettersson
[NewPM] Make InlinerPass (aka 'inline') a parameterized pass

In default pipelines the ModuleInlinerWrapperPass is adding the
InlinerPass to the pipeline twice, once due to MandatoryFirst (passing
true in the ctor) and then a second time with false as argument.

To make it possible to bisect and reduce opt test cases for this
part of the pipeline we need to be able to choose between the two
different variants of the InlinerPass when running opt. This patch is
changing 'inline' to a CGSCC_PASS_WITH_PARAMS in the PassRegistry,
making it possible run opt with both -passes=cgscc(inline) and
-passes=cgscc(inline<only-mandatory>).

Reviewed By: aeubanks, mtrofin

Differential Revision: https://reviews.llvm.org/D109877
The file was modifiedllvm/lib/Passes/PassBuilder.cpp
The file was modifiedllvm/lib/Passes/PassRegistry.def
The file was modifiedllvm/include/llvm/Transforms/IPO/Inliner.h
The file was modifiedllvm/lib/Transforms/IPO/Inliner.cpp
Commit e4c46ddd91eba5ec162225abc1e47aa3c6c13516 by petar.avramovic
[GlobalISel] Improve elimination of dead instructions in legalizer

Add eraseInstr(s) utility functions. Before deleting an instruction
collects its use instructions. After deletion deletes use instructions
that became trivially dead.
This patch clears all dead instructions in existing legalizer mir tests.

Differential Revision: https://reviews.llvm.org/D109154
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddsat.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ushlsat.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssube.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umax.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bswap.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memcpyinline.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-round.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddo.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-uaddo.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smin.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-xor.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.store.2d.d16.ll
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-merge-values.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.d16.ll
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-unmerge-values.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memset.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-and.mir
The file was modifiedllvm/test/CodeGen/ARM/GlobalISel/arm-legalize-fp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fdiv.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubo.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-phi-insertpt-decrement.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcanonicalize.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-build-vector.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sdiv.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sub.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/legalizer/constants.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsqrt.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fneg.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-mul.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-usubo.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsub.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-saddsat.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddsat.mir
The file was modifiedllvm/lib/CodeGen/GlobalISel/Legalizer.cpp
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/legalizer/zextLoad_and_sextLoad.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-extracts.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fma.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umulh.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-ssubo.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert-vector-elt.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smax.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubo.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fshr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-udiv.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir
The file was modifiedllvm/test/CodeGen/X86/GlobalISel/legalize-ashr-scalar.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smulo.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-ssubsat.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umulo.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-uadde.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-saddo.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-trunc.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddo.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-zext.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-implicit-def-s1025.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-bswap.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-anyext.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.s16.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-extract-vector-elt.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.dim.a16.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-freeze.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sshlsat.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sadde.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uadde.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-brcond.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fshl.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-inserts.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-extract.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubsat.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-add.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext-inreg.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/artifact-find-value.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsin.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubsat.mir
The file was modifiedllvm/test/CodeGen/X86/GlobalISel/legalize-shl-scalar.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-usube.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-implicit-def.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memcpy.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ffloor.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/bug-legalization-artifact-combiner-dead-def.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract-vector-elt.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpext.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memmove.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-sadde.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-ssube.mir
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/legalizer/trunc.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-extload.mir
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/Utils.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcos.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
The file was modifiedllvm/lib/CodeGen/GlobalISel/Utils.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz-zero-undef.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-phi.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umin.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/legalizer/bitwise.mir
The file was modifiedllvm/test/CodeGen/X86/GlobalISel/legalize-lshr-scalar.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-unmerge-values.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-and.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-concat-vectors.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usube.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-phi.mir
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/legalizer/zext_and_sext.mir
Commit b1099120ff963d0a0f1de12e3315b1ee4e4ed7e7 by mgorny
[lldb] [gdb-remote] Always send PID when detaching w/ multiprocess

Always send PID in the detach packet when multiprocess extensions are
enabled.  This is required by qemu's GDB server, as plain 'D' packet
results in an error and the emulated system is not resumed.

Differential Revision: https://reviews.llvm.org/D110033
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
The file was modifiedlldb/test/API/functionalities/gdb_remote_client/TestGDBRemoteClient.py
Commit d6929aaa67c7996a69451e301970408362af909e by clementval
[mlir][openacc] Make use of the second counter extension in DataOp translation

Make use of runtime extension for the second reference counter used in
structured data region. This extension is implemented in D106510 and D106509.

Differential Revision: https://reviews.llvm.org/D106517
The file was modifiedmlir/lib/Target/LLVMIR/Dialect/OpenACC/OpenACCToLLVMIRTranslation.cpp
The file was modifiedmlir/test/Target/LLVMIR/openacc-llvm.mlir
Commit ea17b15f2dcdc77881cc0183dce4dea1aff9bffa by llvm-dev
[MCA] InstructionTables::execute() - use const-ref iterator in for-range loop. NFCI.

Avoid unnecessary copies, reported by MSVC static analyzer.
The file was modifiedllvm/lib/MCA/Stages/InstructionTables.cpp
Commit 4ab7c0d3fa068fb0ce39b9f75c0253d45a99745e by llvm-dev
[X86] X86TargetTransformInfo - remove unnecessary if-else after early exit. NFCI.

(style) Break the if-else chain as they all return.
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
Commit 7fc12b822c5d1360780667af94c218733c3fc4e0 by llvm-dev
MachOObjectFile - checkOverlappingElement - use const-ref to avoid unnecessary copies. NFCI.

Reported by MSVC static analyzer.
The file was modifiedllvm/lib/Object/MachOObjectFile.cpp
Commit 6d7b3d6b3a8dbd62650b6c3dae1fe904a8ae9048 by Alexander.Richardson
Fix CLANG_ENABLE_STATIC_ANALYZER=OFF building all analyzer source

Since https://reviews.llvm.org/D87118, the StaticAnalyzer directory is
added unconditionally. In theory this should not cause the static analyzer
sources to be built unless they are referenced by another target. However,
the clang-cpp target (defined in clang/tools/clang-shlib) uses the
CLANG_STATIC_LIBS global property to determine which libraries need to
be included. To solve this issue, this patch avoids adding libraries to
that property if EXCLUDE_FROM_ALL is set.

In case something like this comes up again: `cmake --graphviz=targets.dot`
is quite useful to see why a target is included as part of `ninja all`.

Reviewed By: thakis

Differential Revision: https://reviews.llvm.org/D109611
The file was modifiedclang/cmake/modules/AddClang.cmake
The file was modifiedclang/lib/StaticAnalyzer/CMakeLists.txt
The file was modifiedllvm/cmake/modules/AddLLVM.cmake
Commit 7b68c0725d89ac9bd48b9b6a51d9cd0bc7146829 by Alexander.Richardson
pre-commit test for D109767

Differential Revision: https://reviews.llvm.org/D109765
The file was addedllvm/test/tools/UpdateTestChecks/update_mir_test_checks/lit.local.cfg
The file was addedllvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-condbr.mir
The file was addedllvm/test/tools/UpdateTestChecks/update_mir_test_checks/x86-condbr.test
The file was addedllvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-condbr.mir.expected
Commit 817e23d481be52e6e0fd779efce2beb105e8c7b6 by Alexander.Richardson
[update_mir_test_checks.py] Use -NEXT FileCheck directories

Previously the script emitted output using plain CHECK directives. This
can result in a test passing even if there are some instructions between
CHECK directives that should have been removed. It also makes debugging
tests that have the output in a different order more difficult since
FileCheck can match with a later line and then complain about the "wrong"
directive not being found.

This will cause quite large diffs when updating existing tests, but I'm not sure we need an opt-in flag here.

Depends on D109765 (pre-commit tests)

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D109767
The file was modifiedllvm/utils/update_mir_test_checks.py
The file was modifiedllvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-condbr.mir.expected
The file was modifiedllvm/test/CodeGen/X86/GlobalISel/select-phi.mir
Commit 3f90df22f1b72932016102daf8e92e99252e5589 by david.green
[ARM] MVE reverse shuffles.

The vectorizer can sometimes make reverse shuffles from indices that
count down. In MVE, we don't have a 128bit rev instruction, but we can
select this to a VREV64 with some lane movs to swap the two halfs.

Ideally this would use VMOVD's, but only gets as far as VMOVS's at the
moment.

Differential Revision: https://reviews.llvm.org/D69510
The file was modifiedllvm/test/CodeGen/Thumb2/mve-shuffle.ll
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/mve-shufflemov.ll
Commit fae57a6a9795eccfa349270b110c09524e341abd by shivam98.tkg
[Clang] [Fix] Clang build fails when build directory contains space character

Clang build fails when build directory contains space character.

Error messages:

[ 95%] Linking CXX executable ../../../../bin/clang
clang: error: no such file or directory: 'Space/Net/llvm/Build/tools/clang/tools/driver/Info.plist'
make[2]: *** [bin/clang-14] Error 1
make[1]: *** [tools/clang/tools/driver/CMakeFiles/clang.dir/all] Error 2
make[1]: *** Waiting for unfinished jobs....

The path name is actually:
  'Dev Space/Net/llvm/Build/tools/clang/tools/driver/Info.plist'

Bugzilla issue - https://bugs.llvm.org/show_bug.cgi?id=51884
Reporter and patch author - Brain Swift <bsp2bsp-llvm@yahoo.com>

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D109979
The file was modifiedclang/tools/driver/CMakeLists.txt
Commit 4737dcbc83e05ac97c8695cf9a19bddb6446d71f by mgorny
[lldb] [test] Add unittest for DynamicRegisterInfo::Finalize()

Differential Revision: https://reviews.llvm.org/D109906
The file was addedlldb/unittests/Process/Utility/DynamicRegisterInfoTest.cpp
The file was modifiedlldb/unittests/Process/Utility/CMakeLists.txt
Commit ec50d351ffdd4559ccce6013d3ab4a3f41c42cee by mgorny
[lldb] [DynamicRegisterInfo] Unset value_regs/invalidate_regs before Finalize()

Set value_regs and invalidate_regs in RegisterInfo pushed onto m_regs
to nullptr, to ensure that the temporaries passed there are not
accidentally used.

Differential Revision: https://reviews.llvm.org/D109879
The file was modifiedlldb/source/Plugins/Process/Utility/DynamicRegisterInfo.cpp
The file was modifiedlldb/unittests/Process/Utility/DynamicRegisterInfoTest.cpp
The file was modifiedlldb/source/Plugins/Process/Utility/DynamicRegisterInfo.h
Commit 6de19ea4b6264e64cea145e00ab66fe1530fc0a0 by aaron.puchert
Thread safety analysis: Drop special block handling

Previous changes like D101202 and D104261 have eliminated the special
status that break and continue once had, since now we're making
decisions purely based on the structure of the CFG without regard for
the underlying source code constructs.

This means we don't gain anything from defering handling for these
blocks. Dropping it moves some diagnostics, though arguably into a
better place. We're working around a "quirk" in the CFG that perhaps
wasn't visible before: while loops have an empty "transition block"
where continue statements and the regular loop exit meet, before
continuing to the loop entry. To get a source location for that, we
slightly extend our handling for empty blocks. The source location for
the transition ends up to be the loop entry then, but formally this
isn't a back edge. We pretend it is anyway. (This is safe: we can always
treat edges as back edges, it just means we allow less and don't modify
the lock set. The other way around it wouldn't be safe.)

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D106715
The file was modifiedclang/lib/Analysis/ThreadSafety.cpp
The file was modifiedclang/test/SemaCXX/warn-thread-safety-analysis.cpp
The file was modifiedclang/test/PCH/thread-safety-attrs.cpp
Commit 68914dc99083716d6e9868798c67e73ef35b021e by Stefan Gränitz
[JITLink] Adopt forEachRelocation() helper in ELF x86-64 backend (NFC)

Following D109516, this patch re-uses the new helper function for ELF relocation traversal in the x86-64 backend.

Reviewed By: StephenFan

Differential Revision: https://reviews.llvm.org/D109520
The file was modifiedllvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp
Commit e8d81d80f6604b34e1495d3a68e2bbc60ce467f5 by Stefan Gränitz
[JITLink] Adopt forEachRelocation() helper in ELF RISCV backend (NFC)

Following D109516, this patch re-uses the new helper function for ELF relocation traversal in the RISCV backend.

Reviewed By: StephenFan

Differential Revision: https://reviews.llvm.org/D109522
The file was modifiedllvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp
Commit 680592b5d0a71502964f5568fdc953f8da495b16 by jay.foad
[AMDGPU] Regenerate checks
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fma.s32.mir
Commit f988f680649ad38806897e7aa75e95e9fda88ffd by david.sherwood
[Analysis] Add support for vscale in computeKnownBitsFromOperator

In ValueTracking.cpp we use a function called
computeKnownBitsFromOperator to determine the known bits of a value.
For the vscale intrinsic if the function contains the vscale_range
attribute we can use the maximum and minimum values of vscale to
determine some known zero and one bits. This should help to improve
code quality by allowing certain optimisations to take place.

Tests added here:

  Transforms/InstCombine/icmp-vscale.ll

Differential Revision: https://reviews.llvm.org/D109883
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntw.c
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len.c
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntb.c
The file was modifiedllvm/test/Transforms/InstSimplify/vscale.ll
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntd.c
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnth.c
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len-bfloat.c
The file was addedllvm/test/Transforms/InstCombine/icmp-vscale.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
The file was modifiedllvm/lib/Analysis/ValueTracking.cpp
Commit 5dee50111c13bbc4480401e2eaa67f6bca1b480a by deep.majumder2019
[analyzer] Move docs of SmartPtr to correct subcategory

The docs of alpha.cplusplus.SmartPtr was incorrectly placed under
alpha.deadcode. Moved it to under alpha.cplusplus

Differential Revision: https://reviews.llvm.org/D110032
The file was modifiedclang/docs/analyzer/checkers.rst
Commit 6db928b8f31b17caf205eee9c95bb817e51a3f2c by gysit
[mlir][linalg] Fusion on tensors.

Add a new version of fusion on tensors that supports the following scenarios:
- support input and output operand fusion
- fuse a producer result passed in via tile loop iteration arguments (update the tile loop iteration arguments)
- supports only linalg operations on tensors
- supports only scf::for
- cannot add an output to the tile loop nest

The LinalgTileAndFuseOnTensors pass tiles the root operation and fuses its producers.

Reviewed By: nicolasvasilache, mravishankar

Differential Revision: https://reviews.llvm.org/D109766
The file was addedmlir/lib/Dialect/Linalg/Transforms/FusionOnTensors.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/CMakeLists.txt
The file was modifiedmlir/include/mlir/Dialect/Linalg/Utils/Utils.h
The file was modifiedmlir/include/mlir/Dialect/Linalg/Passes.td
The file was modifiedmlir/include/mlir/Dialect/Linalg/Passes.h
The file was addedmlir/test/Dialect/Linalg/tile-and-fuse-on-tensors.mlir
Commit 444a5f304f6c2c332f18392d2458d74664e98498 by kadircet
[clangd] Bail-out when an empty compile flag is encountered

Fixes https://github.com/clangd/clangd/issues/865

Differential Revision: https://reviews.llvm.org/D109894
The file was modifiedclang-tools-extra/clangd/Compiler.cpp
The file was modifiedclang-tools-extra/clangd/CompileCommands.cpp
The file was modifiedclang-tools-extra/clangd/unittests/CompilerTests.cpp
The file was modifiedclang/lib/Frontend/CreateInvocationFromCommandLine.cpp
The file was modifiedclang-tools-extra/clangd/unittests/CompileCommandsTests.cpp
Commit 228dd20c3f1e619193c68b288e0d5e8525c3a618 by Justas.Janickas
[OpenCL] Supports atomics in C++ for OpenCL 2021

Atomics in C++ for OpenCL 2021 are now handled the same way as in
OpenCL C 3.0. This is a header-only change.

Differential Revision: https://reviews.llvm.org/D109424
The file was modifiedclang/lib/Headers/opencl-c.h
The file was modifiedclang/lib/Headers/opencl-c-base.h
Commit 5b47256fa5402a5f7f06513b0d168746d4c46df2 by pengfei.wang
[X86] Add test to show the effect caused by D109607. NFC
The file was addedclang/test/CodeGen/X86/va-arg-sse.c
Commit 227673398c2d93d9db02fe5fdb1af10a74251995 by pengfei.wang
[X86] Always check the size of SourceTy before getting the next type

D109607 results in a regression in llvm-test-suite.
The reason is we didn't check the size of SourceTy, so that we will
return wrong SSE type when SourceTy is overlapped.

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D110037
The file was modifiedclang/test/CodeGen/X86/va-arg-sse.c
The file was modifiedclang/lib/CodeGen/TargetInfo.cpp
Commit 5661317f864abf750cf893c6a4cc7a977be0995a by pklausler
[flang] Put intrinsic function table back into order

Some intrinsic functions weren't findable because the table
wasn't strictly in order of names.

And complete a missing generalization of the extension DCONJG
to accept any kind of complex argument, like DREAL and DIMAG
were.

Differential Revision: https://reviews.llvm.org/D110002
The file was modifiedflang/lib/Evaluate/intrinsics.cpp
The file was modifiedflang/unittests/Evaluate/intrinsics.cpp
Commit bc69dd62c04a70d29943c1c06c7effed150b70e1 by a.bataev
[SLP]Improve graph reordering.

Reworked reordering algorithm. Originally, the compiler just tried to
detect the most common order in the reordarable nodes (loads, stores,
extractelements,extractvalues) and then fully rebuilding the graph in
the best order. This was not effecient, since it required an extra
memory and time for building/rebuilding tree, double the use of the
scheduling budget, which could lead to missing vectorization due to
exausted scheduling resources.

Patch provide 2-way approach for graph reodering problem. At first, all
reordering is done in-place, it doe not required tree
deleting/rebuilding, it just rotates the scalars/orders/reuses masks in
the graph node.

The first step (top-to bottom) rotates the whole graph, similarly to the previous
implementation. Compiler counts the number of the most used orders of
the graph nodes with the same vectorization factor and then rotates the
subgraph with the given vectorization factor to the most used order, if
it is not empty. Then repeats the same procedure for the subgraphs with
the smaller vectorization factor. We can do this because we still need
to reshuffle smaller subgraph when buildiong operands for the graph
nodes with lasrger vectorization factor, we can rotate just subgraph,
not the whole graph.

The second step (bottom-to-top) scans through the leaves and tries to
detect the users of the leaves which can be reordered. If the leaves can
be reorder in the best fashion, they are reordered and their user too.
It allows to remove double shuffles to the same ordering of the operands in
many cases and just reorder the user operations instead. Plus, it moves
the final shuffles closer to the top of the graph and in many cases
allows to remove extra shuffle because the same procedure is repeated
again and we can again merge some reordering masks and reorder user nodes
instead of the operands.

Also, patch improves cost model for gathering of loads, which improves
x264 benchmark in some cases.

Gives about +2% on AVX512 + LTO (more expected for AVX/AVX2) for {625,525}x264,
+3% for 508.namd, improves most of other benchmarks.
The compile and link time are almost the same, though in some cases it
should be better (we're not doing an extra instruction scheduling
anymore) + we may vectorize more code for the large basic blocks again
because of saving scheduling budget.

Differential Revision: https://reviews.llvm.org/D105020
The file was modifiedllvm/test/Transforms/SLPVectorizer/AArch64/transpose.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/vectorize-reorder-reuse.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/jumbled-load.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/split-load8_2-unord.ll
The file was modifiedllvm/include/llvm/Transforms/Vectorize/SLPVectorizer.h
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/jumbled_store_crash.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/vectorize-reorder-alt-shuffle.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/AArch64/transpose-inseltpoison.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/addsub.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/extract.ll
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/crash_cmpop.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/reorder_repeated_ops.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/jumbled-load-multiuse.ll
Commit 09100c75b52d6729e343964aa690efdd51cf913f by gysit
[mlir][linalg] Fix typo (NFC).
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/FusionOnTensors.cpp
Commit 644b55d57ec76a18916d30f921781b99795f6e10 by morten_bp
[MLIR][SCF] Add for-to-while loop transformation pass

This pass transforms SCF.ForOp operations to SCF.WhileOp. The For loop condition is placed in the 'before' region of the while operation, and indctuion variable incrementation + the loop body in the 'after' region. The loop carried values of the while op are the induction variable (IV) of the for-loop + any iter_args specified for the for-loop.
Any 'yield' ops in the for-loop are rewritten to additionally yield the (incremented) induction variable.

This transformation is useful for passes where we want to consider structured control flow solely on the basis of a loop body and the computation of a loop condition. As an example, when doing high-level synthesis in CIRCT, the incrementation of an IV in a for-loop is "just another part" of a circuit datapath, and what we really care about is the distinction between our datapath and our control logic (the condition variable).

Differential Revision: https://reviews.llvm.org/D108454
The file was addedmlir/lib/Dialect/SCF/Transforms/ForToWhile.cpp
The file was modifiedmlir/lib/Dialect/SCF/Transforms/CMakeLists.txt
The file was addedmlir/test/Dialect/SCF/for-loop-to-while-loop.mlir
The file was modifiedmlir/include/mlir/Dialect/SCF/Passes.td
The file was modifiedmlir/include/mlir/Dialect/SCF/Passes.h
Commit 7be28d82b4ce810ef662239a9dba7a1409c1ad49 by gysit
[mlir][linalg] Add IndexOp support to fusion on tensors.

This revision depends on https://reviews.llvm.org/D109761 and https://reviews.llvm.org/D109766.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D109774
The file was modifiedmlir/test/Dialect/Linalg/tile-and-fuse-on-tensors.mlir
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/FusionOnTensors.cpp
Commit 963d3a22b34de33fc41a9e3e9ac733e9b6d241be by flo
[DSE] Add additional tests to cover review comments.

Adds additional tests following comments from D109844.

Also removes unusued in.ptr arguments and places in the call tests that
used loads instead of a getval call.
The file was modifiedllvm/test/Transforms/DeadStoreElimination/captures-before-load.ll
The file was modifiedllvm/test/Transforms/DeadStoreElimination/captures-before-call.ll
Commit fe4b8467b5dca564b4859256b08ece5fa1eaa574 by Jonas Devlieghere
[lldb] Fix whitespace in CommandObjectTarget (NFC)
The file was modifiedlldb/source/Commands/CommandObjectTarget.cpp
Commit a89bfc61203d5c2071cddaff26345771716463ec by Jonas Devlieghere
[lldb] Extract adding symbols for UUID/File/Frame (NFC)

This moves the logic for adding symbols based on UUID, file and frame
into little helper functions. This is in preparation for D110011.

Differential revision: https://reviews.llvm.org/D110010
The file was modifiedlldb/source/Commands/CommandObjectTarget.cpp
Commit 8700f2bd36bb9b7d7075ed4dac0aef92b9489237 by nikita.ppv
[Verifier] Verify scoped noalias metadata

Verify that !noalias, !alias.scope and llvm.experimental.noalias.scope
arguments have the format specified in
https://llvm.org/docs/LangRef.html#noalias-and-alias-scope-metadata.
I've fixed up a lot of broken metadata used by tests in advance.
Especially using a scope instead of the expected scope list is a
commonly made mistake.

Differential Revision: https://reviews.llvm.org/D110026
The file was modifiedllvm/lib/IR/Verifier.cpp
The file was addedllvm/test/Verifier/alias-scope-metadata.ll
Commit d001ab82e410d0c6ccf14be9f507c8aca53abc67 by i
[ELF] Don't fall back to .text for e_entry

We have the rule to simulate
(https://sourceware.org/binutils/docs/ld/Entry-Point.html),
but the behavior is questionable
(https://sourceware.org/pipermail/binutils/2021-September/117929.html).

gold doesn't fall back to .text.
The behavior is unlikely relied by projects (there is even a warning for
executable links), so let's just delete this fallback path.

Reviewed By: jhenderson, peter.smith

Differential Revision: https://reviews.llvm.org/D110014
The file was modifiedlld/test/ELF/basic-ppc.s
The file was modifiedlld/docs/ReleaseNotes.rst
The file was modifiedlld/ELF/Writer.cpp
The file was modifiedlld/test/ELF/basic-ppc64.s
The file was modifiedlld/test/ELF/entry.s
Commit d85e347a28dc9a329d7029987e4e062428985b41 by craig.topper
[RISCV] Add a pass to recognize VLS strided loads/store from gather/scatter.

For strided accesses the loop vectorizer seems to prefer creating a
vector induction variable with a start value of the form
<i32 0, i32 1, i32 2, ...>. This value will be incremented each
loop iteration by a splat constant equal to the length of the vector.
Within the loop, arithmetic using splat values will be done on this
vector induction variable to produce indices for a vector GEP.

This pass attempts to dig through the arithmetic back to the phi
to create a new scalar induction variable and a stride. We push
all of the arithmetic out of the loop by folding it into the start,
step, and stride values. Then we create a scalar GEP to use as the
base pointer for a strided load or store using the computed stride.
Loop strength reduce will run after this pass and can do some
cleanups to the scalar GEP and induction variable.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D107790
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
The file was modifiedllvm/lib/Target/RISCV/RISCV.h
The file was modifiedllvm/lib/Target/RISCV/RISCVTargetMachine.cpp
The file was addedllvm/test/CodeGen/RISCV/rvv/fixed-vector-strided-load-store-negative.ll
The file was modifiedllvm/include/llvm/IR/IntrinsicsRISCV.td
The file was addedllvm/lib/Target/RISCV/RISCVGatherScatterLowering.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.h
The file was modifiedllvm/tools/opt/opt.cpp
The file was modifiedllvm/lib/Target/RISCV/CMakeLists.txt
The file was addedllvm/test/CodeGen/RISCV/rvv/fixed-vector-strided-load-store.ll
Commit 93604c9711cd0325cf92b23529b55db161143a29 by llvmgnsyncbot
[gn build] Port d85e347a28dc
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
Commit f3cfec9c9e6d90505baaef8ff25ed709e347b226 by kazu
[MCA] Fix a warning

This patch fixes the warning

  InstructionTables.cpp:27:56: error: loop variable 'Resource' of type
  'const std::pair<const uint64_t, ResourceUsage> &' (aka 'const
  pair<const unsigned long, llvm::mca::ResourceUsage> &') binds to a
  temporary constructed from type 'const std::pair<unsigned long,
  llvm::mca::ResourceUsage> &' [-Werror,-Wrange-loop-construct]

Note that Resource is declared as:

   SmallVector<std::pair<uint64_t, ResourceUsage>, 4> Resources;

without "const" for uint64_t.
The file was modifiedllvm/lib/MCA/Stages/InstructionTables.cpp
Commit ecd52a5be9a1c9c0efe5a1d92aa2cde807758cac by nikita.ppv
[Verifier] Try to fix MSVC build

Some buildbots fail with:

> C:\a\llvm-clang-x86_64-expensive-checks-win\llvm-project\llvm\lib\IR\Verifier.cpp(4352): error C2678: binary '==': no operator found which takes a left-hand operand of type 'const llvm::MDOperand' (or there is no acceptable conversion)

Possibly the explicit MDOperand to Metadata* conversion will help?
The file was modifiedllvm/lib/IR/Verifier.cpp
Commit a954bb18b14363e133217e7f19aa95fbde2c7488 by i
[ELF] Add --why-extract= to query why archive members/lazy object files are extracted

Similar to D69607 but for archive member extraction unrelated to GC. This patch adds --why-extract=.

Prior art:

GNU ld -M prints
```
Archive member included to satisfy reference by file (symbol)

a.a(a.o)                      main.o (a)
b.a(b.o)                      (b())
```

-M is mainly for input section/symbol assignment <-> output section mapping
(often huge output) and the information may appear ad-hoc.

Apple ld64
```
__Z1bv forced load of b.a(b.o)
_a forced load of a.a(a.o)
```

It doesn't say the reference file.

Arm's proprietary linker
```
Selecting member vsnprintf.o(c_wfu.l) to define vsnprintf.
...
Loading member vsnprintf.o from c_wfu.l.
              definition:  vsnprintf
              reference :  _printf_a
```

---

--why-extract= gives the user the full data (which is much shorter than GNU ld
-Map). It is easy to track a chain of references to one archive member with a
one-liner, e.g.

```
% ld.lld main.o a_b.a b_c.a c.a -o /dev/null --why-extract=- | tee stdout
reference       extracted       symbol
main.o  a_b.a(a_b.o)    a
a_b.a(a_b.o)    b_c.a(b_c.o)    b()
b_c.a(b_c.o)    c.a(c.o)        c()

% ruby -ane 'BEGIN{p={}}; p[$F[1]]=[$F[0],$F[2]] if $.>1; END{x="c.a(c.o)"; while y=p[x]; puts "#{y[0]} extracts #{x} to resolve #{y[1]}"; x=y[0] end}' stdout
b_c.a(b_c.o) extracts c.a(c.o) to resolve c()
a_b.a(a_b.o) extracts b_c.a(b_c.o) to resolve b()
main.o extracts a_b.a(a_b.o) to resolve a
```

Archive member extraction happens before --gc-sections, so this may not be a live path
under --gc-sections, but I think it is a good approximation in practice.

* Specifying a file avoids output interleaving with --verbose.
* Required `=` prevents accidental overwrite of an input if the user forgets `=`. (Most of compiler drivers' long options accept `=` but not ` `)

Differential Revision: https://reviews.llvm.org/D109572
The file was modifiedlld/ELF/Config.h
The file was modifiedlld/ELF/MapFile.h
The file was modifiedlld/docs/ld.lld.1
The file was modifiedlld/ELF/MapFile.cpp
The file was modifiedlld/docs/ReleaseNotes.rst
The file was modifiedlld/ELF/Options.td
The file was modifiedlld/ELF/Symbols.h
The file was addedlld/test/ELF/why-extract.s
The file was modifiedlld/ELF/Driver.cpp
The file was modifiedlld/ELF/Symbols.cpp
The file was modifiedlld/ELF/Writer.cpp
Commit 6e994a833e8bfe616fdf40155eefbee033d427ec by akhuang
[lld] Remove timers.ll because inconsistent timers behavior causes the test to fail sometimes

See https://reviews.llvm.org/D109904
The file was removedlld/test/COFF/timers.ll
Commit f4b5d597d86abafd61d4de6235f724d4f7b046e6 by gcmn
Add use_default_shell_env = True to ctx.actions.run

When building a tool in a non-standard environment (e.g. custom
compiler path -> LD_LIBRARY_PATH set) then
`use_default_shell_env = True` is required to run that tool in the same
environment or otherwise the build will fail due to missing symbols.
See https://github.com/google/jax/issues/7842 for this issue and
https://github.com/tensorflow/tensorflow/pull/44549 for related fix in
TF.

Reviewed By: GMNGeoffrey

Differential Revision: https://reviews.llvm.org/D109873
The file was modifiedutils/bazel/llvm-project-overlay/mlir/tblgen.bzl
Commit f18f1ab4fd8c3b53834f874b2ec666af72bf0fe3 by joker.eph
Temporarily XFAIL MLIR test that fails the LLVM verifier after 8700f2bd3
The file was modifiedmlir/test/Target/LLVMIR/llvmir.mlir
Commit 5edd79fc9725f4456f4bf53bf55633ef5938cdc3 by joker.eph
Revert "[MLIR][SCF] Add for-to-while loop transformation pass"

This reverts commit 644b55d57ec76a18916d30f921781b99795f6e10.

The added test is failing the bots.
The file was removedmlir/test/Dialect/SCF/for-loop-to-while-loop.mlir
The file was modifiedmlir/include/mlir/Dialect/SCF/Passes.td
The file was modifiedmlir/include/mlir/Dialect/SCF/Passes.h
The file was modifiedmlir/lib/Dialect/SCF/Transforms/CMakeLists.txt
The file was removedmlir/lib/Dialect/SCF/Transforms/ForToWhile.cpp
Commit 3679d2001c87f37101e7f20c646b21e97d8a0867 by cchen
[NCF][OpenMP] Fix metadirective test on SystemZ
The file was modifiedclang/test/OpenMP/metadirective_ast_print.c
Commit e31b2d7d7be98cbbaa665b2702cd0ed2975da4cc by Vedant Kumar
[lldb][crashlog] Avoid specifying arch for image when a UUID is present

When adding an image to a target for crashlog purposes, avoid specifying
the architecture of the image.

This has the effect of making SBTarget::AddModule infer the ArchSpec for
the image based on the SBTarget's architecture, which LLDB puts serious
effort into calculating correctly (in TargetList::CreateTargetInternal).

The status quo is that LLDB randomly guesses the ArchSpec for a module
if its architecture is specified, via:

```
  SBTarget::AddModule -> Platform::GetAugmentedArchSpec -> Platform::IsCompatibleArchitecture ->
GetSupportedArchitectureAtIndex -> {ARM,x86}GetSupportedArchitectureAtIndex
```

... which means that the same crashlog can fail to load on an Apple
Silicon Mac (due to the random guess of arm64e-apple-macosx for the
module's ArchSpec not being compatible with the SBTarget's (correct)
ArchSpec), while loading just fine on an Intel Mac.

I'm not sure how to add a test for this (it doesn't look like there's
test coverage of this path in-tree). It seems like it would be pretty
complicated to regression test: the host LLDB would need to be built for
arm64e, we'd need a hand-crafted arm64e iOS crashlog, and we'd need a
binary with an iOS deployment target. I'm open to other / simpler
options.

rdar://82679400

Differential Revision: https://reviews.llvm.org/D110013
The file was modifiedlldb/examples/python/symbolication.py
Commit 890027b31433311515906633518e1295293ac15c by craig.topper
[RISCV] Add test cases showing failure to use .vf vector operations when splat is in another basic block. NFC

We should have CGP copy the splats into the same basic block as the
FP operation so that SelectionDAG can fold them.
The file was modifiedllvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
Commit 04ab6c85ef74072c077717ca4b4eaede8db24823 by craig.topper
[RISCV] Teach RISCVTargetLowering::shouldSinkOperands to sink splats for FAdd/FSub/FMul/FDiv.
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
Commit d7d7060127b7db8c4cb05edab2d5c0f18ec0d66b by arthur.j.odwyer
Eliminate _LIBCPP_EQUAL_DELETE in favor of `=delete`.

All supported compilers have supported `=delete` as an extension
in C++03 mode for many years at this point.

Differential Revision: https://reviews.llvm.org/D109942
The file was modifiedlibcxx/include/__mutex_base
The file was modifiedlibcxx/include/__config
The file was modifiedlibcxx/include/map
The file was modifiedlibcxx/include/__tree
Commit a07727199db0525e9d2df41e466a2a1611b3c8e1 by i
Revert code change of D63497 & D74399 for riscv64-*-linux GCC detection

This partially reverts commits 1fc2a47f0b6c415312593e43489cf9ea2507d902 and 9816e726e747d72e0c5ac92aa20e652031a10448.

See D109727. Replacing config.guess in favor of {gcc,clang} -dumpmachine
can avoid the riscv64-{redhat,suse}-linux GCC detection.

Acked-by: Luís Marques <luismarques@lowrisc.org>
The file was modifiedclang/lib/Driver/ToolChains/Gnu.cpp
Commit 6cd382bf2894f87a6a68e2d962bdbfc2f0fb3d85 by i
Revert "[CMake] Add debuginfo-tests to LLVM_ALL_PROJECTS after D110016"

This reverts commit 4b80f0125adc876c8ef325f1c0ace4af023f2264.

debuginfo-tests has been renamed to cross-project-tests.
The file was modifiedllvm/CMakeLists.txt
Commit 0b33890f4553c9255c0f44cee04a0d98843d6a5a by ravishankarm
[mlir][Linalg] Add ConvolutionOpInterface.

Add an interface that allows grouping together all covolution and
pooling ops within Linalg named ops. The interface currently
- the indexing map used for input/image access is valid
- the filter and output are accessed using projected permutations
- that all loops are charecterizable as one iterating over
  - batch dimension,
  - output image dimensions,
  - filter convolved dimensions,
  - output channel dimensions,
  - input channel dimensions,
  - depth multiplier (for depthwise convolutions)

Differential Revision: https://reviews.llvm.org/D109793
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.td
The file was modifiedmlir/test/lib/Dialect/Test/CMakeLists.txt
The file was addedmlir/test/Dialect/Linalg/conv-interface-invalid.mlir
The file was modifiedmlir/test/Dialect/Linalg/invalid.mlir
The file was modifiedutils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.h
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgInterfaces.cpp
The file was modifiedmlir/test/Dialect/Linalg/named-ops.mlir
The file was modifiedmlir/python/mlir/dialects/linalg/opdsl/ops/core_named_ops.py
The file was modifiedmlir/test/lib/Dialect/Test/TestOps.td
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOps.yaml
The file was modifiedmlir/python/mlir/dialects/linalg/opdsl/lang/comprehension.py
The file was modifiedmlir/test/lib/Dialect/Test/TestDialect.h
Commit 63e0d038fc20c894a3d541effa1bc2b1fdea37b9 by Yuanfang Chen
Diagnose -Wunused-value based on CFG reachability

While at it, add the diagnosis message "left operand of comma operator has no effect" (used by GCC) for comma operator.

This also makes Clang diagnose in the constant evaluation context which aligns with GCC/MSVC behavior. (https://godbolt.org/z/7zxb8Tx96)

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D103938
The file was modifiedclang/test/CXX/temp/temp.constr/temp.constr.constr/partial-specializations.cpp
The file was modifiedclang/test/Parser/cxx0x-ambig.cpp
The file was modifiedclang/test/CXX/drs/dr14xx.cpp
The file was modifiedclang/test/SemaTemplate/derived.cpp
The file was modifiedclang/test/SemaCXX/matrix-type-operators.cpp
The file was modifiedclang/test/PCH/cxx-explicit-specifier.cpp
The file was modifiedclang/test/Sema/i-c-e.c
The file was modifiedclang/test/SemaCXX/overloaded-operator.cpp
The file was modifiedclang/lib/Sema/SemaStmt.cpp
The file was modifiedclang/test/SemaCXX/warn-unused-value.cpp
The file was modifiedclang/lib/Sema/SemaExpr.cpp
The file was modifiedclang/test/Sema/const-eval.c
The file was modifiedclang/test/Parser/objcxx11-attributes.mm
The file was modifiedclang/test/Analysis/dead-stores.c
The file was modifiedclang/test/CXX/drs/dr20xx.cpp
The file was modifiedclang/test/SemaCXX/sizeless-1.cpp
The file was modifiedclang/test/SemaCXX/warn-comma-operator.cpp
The file was modifiedclang/test/Sema/warn-unused-value.c
The file was modifiedclang/test/SemaCXX/vector.cpp
The file was modifiedclang/test/SemaTemplate/lambda-capture-pack.cpp
The file was modifiedclang/test/Sema/sizeless-1.c
The file was modifiedclang/lib/Sema/SemaExprCXX.cpp
The file was modifiedclang/test/Frontend/fixed_point_crash.c
The file was modifiedclang/test/CodeCompletion/pragma-macro-token-caching.c
The file was modifiedclang/test/SemaCXX/builtin-constant-p.cpp
The file was modifiedclang/test/SemaCXX/expression-traits.cpp
The file was modifiedclang/test/Parser/objc-messaging-1.m
The file was modifiedclang/test/SemaCXX/constant-expression.cpp
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/test/Parser/cxx1z-init-statement.cpp
The file was modifiedclang/test/Sema/vla-2.c
The file was modifiedclang/test/Sema/warn-type-safety.c
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was modifiedclang/test/Parser/cxx-ambig-decl-expr.cpp
The file was modifiedclang/test/Sema/exprs.c
The file was modifiedclang/test/CXX/drs/dr7xx.cpp
The file was modifiedclang/test/Sema/switch-1.c
The file was modifiedclang/test/SemaCXX/constant-expression-cxx2a.cpp
The file was modifiedclang/test/CXX/basic/basic.link/p8.cpp
The file was modifiedclang/test/Parser/objc-try-catch-1.m
The file was modifiedclang/test/SemaCXX/attr-annotate.cpp
Commit 01b097afd0eae593b3a11a88a34e8f50e845d3e7 by noreply
Fix bad merge the removed switch case

When https://reviews.llvm.org/D109520 was landed, it reverted the addition of this switch
case added in https://reviews.llvm.org/D109293. This caused `-Wswitch` failures (and
presumably broke the functionality added in the latter patch).
The file was modifiedllvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp
Commit 1e45cd75dfb1df61892c1a26654c8997d8aeef66 by jonathan.l.peyton
[OpenMP][host runtime] Fix indirect lock table race condition

The indirect lock table can exhibit a race condition during initializing
and setting/unsetting locks. This occurs if the lock table is
resized by one thread (during an omp_init_lock) and accessed (during an
omp_set|unset_lock) by another thread.

The test runtime/test/lock/omp_init_lock.c test exposed this issue and
will fail if run enough times.

This patch restructures the lock table so pointer/iterator validity is
always kept. Instead of reallocating a single table to a larger size, the
lock table begins preallocated to accommodate 8K locks. Each row of the
table is allocated as needed with each row allowing 1K locks. If the 8K
limit is reached for the initial table, then another table, capable of
holding double the number of locks, is allocated and linked
as the next table. The indices stored in the user's locks take this
linked structure into account when finding the lock within the table.

Differential Revision: https://reviews.llvm.org/D109725
The file was modifiedopenmp/runtime/src/kmp_lock.h
The file was modifiedopenmp/runtime/src/kmp_lock.cpp
Commit 4cf9bf6c9f64cca1111134acc9f84efe8f27e8d1 by ravishankarm
[mlir][MemRef] Compute unused dimensions of a rank-reducing subviews using strides as well.

For `memref.subview` operations, when there are more than one
unit-dimensions, the strides need to be used to figure out which of
the unit-dims are actually dropped.

Differential Revision: https://reviews.llvm.org/D109418
The file was modifiedmlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
The file was modifiedmlir/test/Dialect/Linalg/loops.mlir
The file was modifiedmlir/lib/Conversion/MemRefToLLVM/MemRefToLLVM.cpp
The file was modifiedmlir/test/IR/invalid-ops.mlir
The file was modifiedmlir/test/Dialect/MemRef/canonicalize.mlir
The file was modifiedmlir/test/Dialect/MemRef/fold-subview-ops.mlir
The file was modifiedmlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
The file was modifiedmlir/test/Dialect/MemRef/invalid.mlir
The file was modifiedmlir/lib/Dialect/MemRef/Transforms/FoldSubViewOps.cpp
The file was modifiedmlir/include/mlir/Interfaces/ViewLikeInterface.td
Commit dd0226561e86e491f77464b1d3afe5bb53a2c54e by nikita.ppv
[IR] Add helper to convert offset to GEP indices

We implement logic to convert a byte offset into a sequence of GEP
indices for that offset in a number of places. This patch adds a
DataLayout::getGEPIndicesForOffset() method, which implements the
core logic. I've updated SROA, ConstantFolding and InstCombine to
use it, and there's a few more places where it looks relevant.

Differential Revision: https://reviews.llvm.org/D110043
The file was modifiedllvm/test/Transforms/InstCombine/getelementptr.ll
The file was modifiedllvm/lib/IR/DataLayout.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstructionCombining.cpp
The file was modifiedllvm/include/llvm/IR/DataLayout.h
The file was modifiedllvm/lib/Transforms/Scalar/SROA.cpp
The file was modifiedllvm/test/Transforms/SROA/scalable-vectors.ll
The file was modifiedllvm/lib/Analysis/ConstantFolding.cpp
Commit b64fdaa86b5b35fa982dd1f41d32b37a9d5208b6 by aeubanks
[gn build] Don't pass -Wl,-z,defs for sanitizer builds

-Wl,-z,defs doesn't work with sanitizers.
See https://clang.llvm.org/docs/AddressSanitizer.html

Reviewed By: thakis

Differential Revision: https://reviews.llvm.org/D110086
The file was modifiedllvm/utils/gn/build/BUILD.gn
The file was modifiedllvm/utils/gn/build/BUILDCONFIG.gn
The file was modifiedllvm/utils/gn/build/toolchain/BUILD.gn
Commit c4a406bbd0fe3afa8366b72c49b1bc494a168624 by apl
[lldb][NFC] Remove outdated FIXME
The file was modifiedlldb/source/Symbol/DeclVendor.cpp
Commit df81bb71aa452c677984fbeb7c34e8a77ec3e83b by arthur.j.odwyer
[libc++] [LIBCXX-DEBUG-FIXME] Constexpr char_traits::copy mustn't compare unrelated pointers.

Now that __builtin_is_constant_evaluated() is present on all supported
compilers, we can use it to skip the UB-inducing assert in cases where
the computation might be happening at constexpr time.

Differential Revision: https://reviews.llvm.org/D101674
The file was modifiedlibcxx/test/std/strings/string.view/string.view.ops/copy.pass.cpp
The file was modifiedlibcxx/test/std/strings/char.traits/char.traits.specializations/char.traits.specializations.wchar.t/copy.pass.cpp
The file was modifiedlibcxx/test/std/strings/char.traits/char.traits.specializations/char.traits.specializations.char/copy.pass.cpp
The file was modifiedlibcxx/test/std/strings/char.traits/char.traits.specializations/char.traits.specializations.char32_t/copy.pass.cpp
The file was modifiedlibcxx/include/__string
The file was modifiedlibcxx/test/std/strings/char.traits/char.traits.specializations/char.traits.specializations.char16_t/copy.pass.cpp
The file was modifiedlibcxx/test/std/strings/char.traits/char.traits.specializations/char.traits.specializations.char8_t/copy.pass.cpp
Commit d5db71d19f11d7c31257066aea6bd41ef04f28b7 by arthur.j.odwyer
[libc++] [P0919] Some belated review on D87171.

- Simplify the structure of the new tests.
- Test const containers as well as non-const containers,
    since it's easy to do so.
- Remove redundant enable-iffing of helper structs' member functions.
    (They're not instantiated unless they're called, and who would call them?)
- Fix indentation and use more consistent SFINAE method in <unordered_map>.
- Add _LIBCPP_INLINE_VISIBILITY on some swap functions.

Differential Revision: https://reviews.llvm.org/D109011
The file was addedlibcxx/test/std/containers/unord/unord.map/equal_range.transparent.pass.cpp
The file was removedlibcxx/test/std/containers/unord/unord.map/equal_range_const.transparent.pass.cpp
The file was modifiedlibcxx/test/std/containers/unord/unord.multimap/contains.transparent.pass.cpp
The file was addedlibcxx/test/std/containers/unord/unord.multimap/equal_range.transparent.pass.cpp
The file was modifiedlibcxx/test/support/test_transparent_unordered.h
The file was addedlibcxx/test/std/containers/unord/unord.multiset/find.transparent.pass.cpp
The file was modifiedlibcxx/test/std/containers/unord/unord.multimap/count.transparent.pass.cpp
The file was modifiedlibcxx/include/unordered_set
The file was removedlibcxx/test/std/containers/unord/unord.multiset/find_non_const.transparent.pass.cpp
The file was removedlibcxx/test/std/containers/unord/unord.set/equal_range_non_const.transparent.pass.cpp
The file was removedlibcxx/test/std/containers/unord/unord.multimap/equal_range_const.transparent.pass.cpp
The file was addedlibcxx/test/std/containers/unord/unord.set/find.transparent.pass.cpp
The file was removedlibcxx/test/std/containers/unord/unord.multiset/equal_range_non_const.transparent.pass.cpp
The file was modifiedlibcxx/test/std/containers/unord/unord.set/contains.transparent.pass.cpp
The file was addedlibcxx/test/std/containers/unord/unord.set/equal_range.transparent.pass.cpp
The file was removedlibcxx/test/std/containers/unord/unord.map/find_const.transparent.pass.cpp
The file was modifiedlibcxx/test/support/is_transparent.h
The file was modifiedlibcxx/test/std/containers/unord/unord.multiset/contains.transparent.pass.cpp
The file was modifiedlibcxx/test/std/containers/unord/unord.multiset/count.transparent.pass.cpp
The file was removedlibcxx/test/std/containers/unord/unord.map/equal_range_non_const.transparent.pass.cpp
The file was modifiedlibcxx/test/std/containers/unord/unord.set/count.transparent.pass.cpp
The file was removedlibcxx/test/std/containers/unord/unord.set/find_const.transparent.pass.cpp
The file was modifiedlibcxx/include/unordered_map
The file was removedlibcxx/test/std/containers/unord/unord.multimap/equal_range_non_const.transparent.pass.cpp
The file was modifiedlibcxx/test/std/containers/unord/unord.map/contains.transparent.pass.cpp
The file was addedlibcxx/test/std/containers/unord/unord.multimap/find.transparent.pass.cpp
The file was removedlibcxx/test/std/containers/unord/unord.set/equal_range_const.transparent.pass.cpp
The file was removedlibcxx/test/std/containers/unord/unord.multimap/find_const.transparent.pass.cpp
The file was removedlibcxx/test/std/containers/unord/unord.map/find_non_const.transparent.pass.cpp
The file was removedlibcxx/test/std/containers/unord/unord.set/find_non_const.transparent.pass.cpp
The file was addedlibcxx/test/std/containers/unord/unord.map/find.transparent.pass.cpp
The file was removedlibcxx/test/std/containers/unord/unord.multiset/equal_range_const.transparent.pass.cpp
The file was removedlibcxx/test/std/containers/unord/unord.multiset/find_const.transparent.pass.cpp
The file was modifiedlibcxx/test/std/containers/unord/unord.map/count.transparent.pass.cpp
The file was removedlibcxx/test/std/containers/unord/unord.multimap/find_non_const.transparent.pass.cpp
The file was addedlibcxx/test/std/containers/unord/unord.multiset/equal_range.transparent.pass.cpp
The file was modifiedlibcxx/include/map
Commit 792101fff749191dfd4dadabe2ecd30a4d8cd973 by craig.topper
[RISCV] Add test cases for missed opportunity to use vfmacc.vf. NFC

This is another case of a splat being in another basic block
preventing SelectionDAG from optimizing it.
The file was modifiedllvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
Commit a95ba8107359e17cb1669c01f416fd2723a23126 by craig.topper
[RISCV] Teach RISCVTargetLowering::shouldSinkOperands to sink splats for FMA.

If either of the multiplicands is a splat, we can sink it to use
vfmacc.vf or similar.
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
Commit 55f0b337087136554122f942fea951a357bc4a49 by thakis
[cmake] Put check from D110016 behind (default-on) flag

See discussion on https://reviews.llvm.org/D110016 for details.
The file was modifiedllvm/CMakeLists.txt
Commit 9197834535364efff505580ef940ad41cd293275 by thakis
Revert "Fix CLANG_ENABLE_STATIC_ANALYZER=OFF building all analyzer source"

This reverts commit 6d7b3d6b3a8dbd62650b6c3dae1fe904a8ae9048.
Breaks running cmake with `-DCLANG_ENABLE_STATIC_ANALYZER=OFF`
without turning off CLANG_TIDY_ENABLE_STATIC_ANALYZER.
See comments on https://reviews.llvm.org/D109611 for details.
The file was modifiedclang/cmake/modules/AddClang.cmake
The file was modifiedclang/lib/StaticAnalyzer/CMakeLists.txt
The file was modifiedllvm/cmake/modules/AddLLVM.cmake
Commit fa822a2ee52f8243d29eb035d7002a9ab40788a0 by paul.robinson
[DebugInfo] Add test for dumping DW_AT_defaulted
The file was addedllvm/test/tools/llvm-dwarfdump/X86/DW_AT_defaulted.s
Commit c6e52b1e85c6d633bda0e268fed16487fea084d1 by craig.topper
[RISCV] Add test cases for missed opportunities to use vand/vor/vxor.vx. NFC

These are cases were the splat is in another basic block. CGP
needs to sink it to expose the opportunity to SelectionDAG.
The file was modifiedllvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
Commit 16b5f4502c5b58c7f70afa8e1e1e33d170ba6089 by fmayer
[NFC] [hwasan] Separate outline and inline instrumentation.

Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D110067
The file was modifiedllvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
Commit 53720f74e4e32fe11a1688282f7d09dc1828b83a by nikita.ppv
[Polly] Partially fix scoped alias metadata

This partially addresses the verifier failures caused by D110026.
In particular, it does not fix the "second level" alias metadata.
The file was modifiedpolly/test/Isl/CodeGen/invariant_load_alias_metadata.ll
The file was modifiedpolly/test/Isl/CodeGen/scev-backedgetaken.ll
The file was modifiedpolly/test/Isl/CodeGen/simple_vec_assign_scalar.ll
The file was modifiedpolly/test/Isl/CodeGen/MemAccess/codegen_address_space.ll
The file was modifiedpolly/test/Isl/CodeGen/MemAccess/generate-all.ll
The file was modifiedpolly/test/Isl/CodeGen/partial_write_full_write_that_appears_partial.ll
The file was modifiedpolly/test/Isl/CodeGen/phi_loop_carried_float_escape.ll
The file was modifiedpolly/test/Isl/CodeGen/MemAccess/create_arrays.ll
The file was modifiedpolly/test/Isl/CodeGen/annotated_alias_scopes.ll
The file was modifiedpolly/test/Isl/CodeGen/phi_loop_carried_float.ll
The file was modifiedpolly/test/Isl/CodeGen/getNumberOfIterations.ll
The file was modifiedpolly/test/Isl/CodeGen/MemAccess/different_types.ll
The file was modifiedpolly/test/Isl/CodeGen/partial_write_impossible_restriction.ll
The file was modifiedpolly/test/ScopInfo/int2ptr_ptr2int_2.ll
The file was modifiedpolly/test/ScheduleOptimizer/pattern-matching-based-opts_10.ll
The file was modifiedpolly/lib/CodeGen/IRBuilder.cpp
The file was modifiedpolly/test/Isl/CodeGen/non-affine-phi-node-expansion-2.ll
The file was modifiedpolly/test/Isl/CodeGen/stmt_split_no_dependence.ll
The file was modifiedpolly/test/ScopInfo/int2ptr_ptr2int.ll
The file was modifiedpolly/test/Isl/CodeGen/OpenMP/alias-metadata.ll
The file was modifiedpolly/test/Isl/CodeGen/invariant_loads_ignore_parameter_bounds.ll
The file was modifiedpolly/test/Isl/CodeGen/OpenMP/new_multidim_access.ll
The file was modifiedpolly/test/Isl/CodeGen/non_affine_float_compare.ll
The file was modifiedpolly/test/Isl/CodeGen/partial_write_array.ll
The file was modifiedpolly/test/CodeGen/stride_detection.ll
Commit 49e976c9343253956a7de93f1d982537f9c240ab by tianshilei1992
[OpenMP][NVPTX] Fix a warning that data argument not used by format string

Reviewed By: jhuber6, grokos

Differential Revision: https://reviews.llvm.org/D110104
The file was modifiedopenmp/libomptarget/plugins/cuda/src/rtl.cpp
Commit 96d3319d6f024b17ac725d9595548acc4787003c by Saleem Abdulrasool
Sema: relax va_start checking further for Windows AArch64

When building in C mode, the VC runtime assumes that it can use pointer
aliasing through `char *` for the parameter to `__va_start`.  Relax the
checks further.  In theory we could keep the tests strict for non-system
header code, but this takes the less strict approach as the additional
check doesn't particularly end up being too much more helpful for
correctness.  The C++ type system is a bit stricter and requires the
explicit cast which we continue to verify.
The file was addedclang/test/Sema/microsoft-varargs.c
The file was modifiedclang/lib/Sema/SemaChecking.cpp
Commit f9d69a0ab02567933302602238264a38468f9900 by Amara Emerson
[GlobalISel] Implement support for the "trap-func-name" attribute.

This attribute calls a function instead of emitting a trap instruction.

Differential Revision: https://reviews.llvm.org/D110098
The file was modifiedllvm/test/CodeGen/AArch64/arm64-trap.ll
The file was modifiedllvm/test/CodeGen/AArch64/debugtrap.ll
The file was modifiedllvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
The file was modifiedllvm/test/CodeGen/AArch64/ubsantrap.ll
Commit dc6e8dfdfe7efecfda318d43a06fae18b40eb498 by jacob.lambert
[AMDGPU][NFC] Correct typos in lib/Target/AMDGPU/AMDGPU*.cpp files. Test commit for new contributor.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURewriteOutArguments.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUReplaceLDSUseWithPointer.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUPropagateAttributes.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULibFunc.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp
Commit 4edf46f72a8f3bd9d60628d0c852e8ff91921673 by rob.suderman
[mlir][tosa] Remove the documentation requirement for elements of several binary elementwise ops to be of the same rank.

Reviewed By: rsuderman

Differential Revision: https://reviews.llvm.org/D110095
The file was modifiedmlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
Commit f11917057923bce7f9c04282b4a3b15ef0aad0d6 by thakis
[clang] Fix a few comment typos to cycle bots
The file was modifiedclang/lib/Format/MacroExpander.cpp
The file was modifiedclang/lib/Format/UnwrappedLineFormatter.cpp
The file was modifiedclang/lib/Format/Format.cpp
The file was modifiedclang/lib/Format/WhitespaceManager.h
The file was modifiedclang/lib/Format/TokenAnnotator.cpp
The file was modifiedclang/lib/Format/ContinuationIndenter.cpp
Commit 38ff7e11c04e760570e3cb517f8b78d554c65386 by rob.suderman
[mlir][tosa] Add several binary elementwise to the list of broadcastable ops.

Reviewed By: rsuderman

Differential Revision: https://reviews.llvm.org/D110096
The file was modifiedmlir/lib/Dialect/Tosa/Transforms/TosaMakeBroadcastable.cpp
Commit 4ceea7740990f5b755a7bb911e92254dd5680921 by Amara Emerson
[X86] Rename the X86WinAllocaExpander pass and related symbols to "DynAlloca". NFC.

For x86 Darwin, we have a stack checking feature which re-uses some of this
machinery around stack probing on Windows. Renaming this to be more appropriate
for a generic feature.

Differential Revision: https://reviews.llvm.org/D109993
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.h
The file was modifiedllvm/test/CodeGen/X86/O0-pipeline.ll
The file was addedllvm/lib/Target/X86/X86DynAllocaExpander.cpp
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was removedllvm/lib/Target/X86/X86WinAllocaExpander.cpp
The file was modifiedllvm/test/CodeGen/X86/opt-pipeline.ll
The file was modifiedllvm/lib/Target/X86/X86InstrInfo.td
The file was modifiedllvm/lib/Target/X86/X86.h
The file was modifiedllvm/lib/Target/X86/X86MachineFunctionInfo.h
The file was modifiedllvm/lib/Target/X86/X86InstrCompiler.td
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn
The file was modifiedllvm/lib/Target/X86/CMakeLists.txt
The file was modifiedllvm/lib/Target/X86/X86TargetMachine.cpp
Commit 4e7c0a37c9c92baa655d244f5bfde91d52b138d0 by joker.eph
Update MLIR generate-test-checks.py to add the notice from the source into the generated file

Folks may not read the source of the tool and miss these instructions.

Differential Revision: https://reviews.llvm.org/D110082
The file was modifiedmlir/utils/generate-test-checks.py
Commit bb2506061b06e9786b5eb9c458f52f9ba7e52a73 by chiahungduan
[mlir-tblgen] Add DagNode StaticMatcher.

Some patterns may share the common DAG structures. Generate a static
function to do the match logic to reduce the binary size.

Reviewed By: jpienaar

Differential Revision: https://reviews.llvm.org/D105797
The file was modifiedmlir/include/mlir/TableGen/Pattern.h
The file was modifiedmlir/tools/mlir-tblgen/RewriterGen.cpp
The file was modifiedmlir/lib/TableGen/Pattern.cpp
The file was addedmlir/test/mlir-tblgen/rewriter-static-matcher.td
Commit bde305baf631004b8d00081f11e62b33e1665e45 by thakis
[clang] Fix a few comment more typos to cycle bots
The file was modifiedclang/lib/Sema/SemaChecking.cpp
The file was modifiedclang/lib/Sema/SemaLookup.cpp
The file was modifiedclang/lib/Sema/SemaTemplateInstantiateDecl.cpp
The file was modifiedclang/lib/Sema/SemaCodeComplete.cpp
The file was modifiedclang/lib/Sema/SemaStmt.cpp
The file was modifiedclang/lib/Sema/SemaInit.cpp
The file was modifiedclang/lib/Sema/SemaDeclCXX.cpp
The file was modifiedclang/lib/Sema/SemaCXXScopeSpec.cpp
The file was modifiedclang/lib/Sema/SemaDeclAttr.cpp
The file was modifiedclang/lib/Sema/SemaDeclObjC.cpp
The file was modifiedclang/lib/Sema/SemaOpenMP.cpp
The file was modifiedclang/lib/Sema/SemaTemplateDeduction.cpp
The file was modifiedclang/lib/Sema/SemaType.cpp
The file was modifiedclang/lib/Sema/SemaConcept.cpp
The file was modifiedclang/lib/Sema/SemaTemplate.cpp
The file was modifiedclang/lib/Sema/TreeTransform.h
Commit 60ab6861ed13e4f1e2729f8add6366a7be223d80 by thakis
[clang] Fix a few more comment typos to cycle bots
The file was modifiedclang/lib/AST/Interp/Descriptor.h
The file was modifiedclang/lib/AST/Interp/Function.h
The file was modifiedclang/lib/AST/MicrosoftMangle.cpp
The file was modifiedclang/lib/AST/CommentBriefParser.cpp
The file was modifiedclang/lib/AST/DeclCXX.cpp
The file was modifiedclang/lib/AST/Interp/InterpStack.h
The file was modifiedclang/lib/AST/Interp/InterpState.h
The file was modifiedclang/lib/AST/DeclTemplate.cpp
The file was modifiedclang/lib/AST/ASTImporter.cpp
The file was modifiedclang/lib/AST/ASTContext.cpp
The file was modifiedclang/lib/AST/Interp/Opcodes.td
The file was modifiedclang/lib/AST/RecordLayoutBuilder.cpp
The file was modifiedclang/lib/AST/ExprConstant.cpp
The file was modifiedclang/lib/AST/ComparisonCategories.cpp
The file was modifiedclang/lib/AST/Interp/Program.cpp
Commit f417d9d821118ef330b263c4c7ad9d3cda30f406 by mnadeem
[InstCombine] Eliminate vector reverse if all inputs/outputs to an instruction are reverses

Differential Revision: https://reviews.llvm.org/D109808

Change-Id: I1a10d2bc33acbe0ea353c6cb3d077851391fe73e
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse-mask4.ll
The file was addedllvm/test/Transforms/InstCombine/vector-reverse.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse.ll
Commit 1fb2e842a93ac862849f5081eb6fdf6f1447ef2a by stellaraccident
[mlir][python] Forward _OperationBase _CAPIPtr to the Operation.

* ODS generated operations extend _OperationBase and without this, cannot be marshalled to CAPI functions.
* No test case updates: this kind of interop is quite hard to verify with in-tree tests.

Differential Revision: https://reviews.llvm.org/D110030
The file was modifiedmlir/lib/Bindings/Python/IRCore.cpp
Commit 4f21152af12b21ea8f04b322a29dc6ad9e79ef16 by riddleriver
[mlir] Tighten verification of SparseElementsAttr

SparseElementsAttr currently does not perform any verfication on construction, with the only verification existing within the parser. This revision moves the parser verification to SparseElementsAttr, and also adds additional verification for when a sparse index is not valid.

Differential Revision: https://reviews.llvm.org/D109189
The file was modifiedmlir/test/Dialect/Quant/convert-const.mlir
The file was modifiedmlir/test/IR/pretty-attributes.mlir
The file was modifiedmlir/test/IR/invalid.mlir
The file was modifiedmlir/lib/Parser/Parser.h
The file was modifiedmlir/lib/Parser/TypeParser.cpp
The file was modifiedmlir/lib/Parser/AttributeParser.cpp
The file was modifiedmlir/include/mlir/IR/BuiltinAttributes.h
The file was modifiedmlir/test/IR/parser.mlir
The file was modifiedmlir/lib/IR/BuiltinAttributes.cpp
The file was modifiedmlir/include/mlir/IR/BuiltinAttributes.td
The file was modifiedmlir/test/Dialect/Tensor/canonicalize.mlir
The file was modifiedmlir/test/Target/LLVMIR/llvmir.mlir
The file was modifiedmlir/test/CAPI/ir.c
Commit 0cb5d7fc7fd3eeb40b6ecf9b34a497d46bcba6c6 by riddleriver
[mlir] Add value_begin/value_end methods to DenseElementsAttr

Currently DenseElementsAttr only exposes the ability to get the full range of values for a given type T, but there are many situations where we just want the beginning/end iterator. This revision adds proper value_begin/value_end methods for all of the supported T types, and also cleans up a bit of the interface.

Differential Revision: https://reviews.llvm.org/D104173
The file was modifiedmlir/examples/toy/Ch7/mlir/LowerToAffineLoops.cpp
The file was modifiedmlir/include/mlir/IR/BuiltinAttributes.td
The file was modifiedmlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
The file was modifiedmlir/examples/toy/Ch6/mlir/LowerToAffineLoops.cpp
The file was modifiedmlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp
The file was modifiedmlir/examples/toy/Ch5/mlir/LowerToAffineLoops.cpp
The file was modifiedmlir/lib/IR/Operation.cpp
The file was modifiedmlir/include/mlir/IR/BuiltinAttributes.h
The file was modifiedmlir/include/mlir/Dialect/CommonFolders.h
The file was modifiedmlir/unittests/TableGen/StructsGenTest.cpp
The file was modifiedmlir/lib/IR/AsmPrinter.cpp
The file was modifiedmlir/lib/Conversion/LinalgToSPIRV/LinalgToSPIRV.cpp
The file was modifiedmlir/lib/Interfaces/InferTypeOpInterface.cpp
The file was modifiedmlir/lib/CAPI/IR/BuiltinAttributes.cpp
The file was modifiedmlir/lib/Dialect/GPU/IR/GPUDialect.cpp
The file was modifiedmlir/lib/Conversion/StandardToSPIRV/StandardToSPIRV.cpp
The file was modifiedmlir/lib/IR/BuiltinAttributes.cpp
The file was modifiedmlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
Commit d80d3a358fffce430c94c7e9c716a5641010e4d0 by riddleriver
[mlir] Refactor ElementsAttr into an AttrInterface

This revision refactors ElementsAttr into an Attribute Interface.
This enables a common interface with which to interact with
element attributes, without needing to modify the builtin
dialect. It also removes a majority (if not all?) of the need for
the current OpaqueElementsAttr, which was originally intended as
a way to opaquely represent data that was not representable by
the other builtin constructs.

The new ElementsAttr interface not only allows for users to
natively represent their data in the way that best suits them,
it also allows for efficient opaque access and iteration of the
underlying data. Attributes using the ElementsAttr interface
can directly expose support for interacting with the held
elements using any C++ data type they claim to support. For
example, DenseIntOrFpElementsAttr supports iteration using
various native C++ integer/float data types, as well as
APInt/APFloat, and more. ElementsAttr instances that refer to
DenseIntOrFpElementsAttr can use all of these data types for
iteration:

```c++
DenseIntOrFpElementsAttr intElementsAttr = ...;

ElementsAttr attr = intElementsAttr;
for (uint64_t value : attr.getValues<uint64_t>())
  ...;
for (APInt value : attr.getValues<APInt>())
  ...;
for (IntegerAttr value : attr.getValues<IntegerAttr>())
  ...;
```

ElementsAttr also supports failable range/iterator access,
allowing for selective code paths depending on data type
support:

```c++
ElementsAttr attr = ...;
if (auto range = attr.tryGetValues<uint64_t>()) {
  for (uint64_t value : *range)
    ...;
}
```

Differential Revision: https://reviews.llvm.org/D109190
The file was addedmlir/include/mlir/IR/BuiltinAttributeInterfaces.h
The file was addedmlir/include/mlir/IR/BuiltinAttributeInterfaces.td
The file was modifiedmlir/include/mlir/Support/InterfaceSupport.h
The file was modifiedutils/bazel/llvm-project-overlay/mlir/BUILD.bazel
The file was modifiedmlir/include/mlir/IR/BuiltinAttributes.h
The file was addedmlir/lib/IR/BuiltinAttributeInterfaces.cpp
The file was modifiedmlir/test/lib/Dialect/Test/TestAttrDefs.td
The file was modifiedutils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
The file was modifiedmlir/include/mlir/IR/BuiltinAttributes.td
The file was modifiedmlir/test/lib/Dialect/Test/TestAttributes.cpp
The file was modifiedmlir/include/mlir/IR/CMakeLists.txt
The file was addedmlir/test/lib/IR/TestBuiltinAttributeInterfaces.cpp
The file was modifiedllvm/include/llvm/ADT/STLExtras.h
The file was modifiedmlir/lib/IR/CMakeLists.txt
The file was modifiedmlir/lib/IR/BuiltinAttributes.cpp
The file was modifiedmlir/test/lib/IR/CMakeLists.txt
The file was addedmlir/test/IR/elements-attr-interface.mlir
The file was modifiedmlir/tools/mlir-opt/mlir-opt.cpp
Commit 85b4b21c8bbad346d58a30154d2767c39cf3285a by kazu
[llvm] Use make_early_inc_range (NFC)
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyLowerBrUnless.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
The file was modifiedllvm/lib/Target/X86/X86OptimizeLEAs.cpp
The file was modifiedllvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
The file was modifiedllvm/lib/AsmParser/LLParser.cpp
The file was modifiedllvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
The file was modifiedllvm/lib/Target/NVPTX/NVPTXGenericToNVVM.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyOptimizeLiveIntervals.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyPrepareForLiveIntervals.cpp
The file was modifiedllvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp
The file was modifiedllvm/lib/Target/X86/X86AvoidStoreForwardingBlocks.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyMemIntrinsicResults.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyReplacePhysRegs.cpp
Commit a06db78fd99014993b62b99c305c7b374c1579fc by mkazantsev
[NFC] Rename Context->CtxI in SCEV for uniformity reasons
The file was modifiedllvm/include/llvm/Analysis/ScalarEvolution.h
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
Commit cad9f98a2ad98fecf663e9ce39502b8e43676fc9 by llvm-project
[Polly] Don't generate inter-iteration noalias metadata.

This metadata was intended to mark all accesses within an iteration to be pairwise non-aliasing, in this case because every memory of a base pointer is touched (read or write) at most once. This is typical for 'sweeps' over all data. The stated motivation from D30606 is to ensure that unrolled iterations are considered non-aliasing.

Rhe implemention had multiple issues:

* The structure of the noalias metadata was malformed. D110026 added check in the verifier for this metadata, and the tests were failing since then.

* This is not true for the outer loops of the BLIS matrix multiplication, where it was being inserted. Each element of A, B, C is accessed multiple times, as often as the loop not used as an index is iterating.

* Scopes were added to SecondLevelOtherAliasScopeList (used for the !noalias scop list) on-the-fly when another SCEV was seen. This meant that previously visited instructions would not be updated with alias scopes that are only seen later, missing out those SCEVs they should not be aliasing with.

* Since the !noalias scope list would ideally consists of all other SCEV for this base pointer, we might run quickly into scalability issues. Especially after unrolling there would probably at least once SCEV per instruction and unroll instance.

* The inter-iteration noalias base pointer was not removed after leaving the loop marked with it, effectively marking everything after it to noalias as well.

A solution I considered was to mark each instruction as non-aliasing with its own scope. The instruction itself would obviously alias itself, but such construction might also be considered invalid. Duplicating the instruction (e.g. due to speculation) would mark the instruction non-aliasing with its clone. I don't want to go into this territory, especially since the original motivation of determining unrolled instances as noalias based on SCEV is the what scev-aa does as well.

This effectively reverts D30606 and D35761.
The file was modifiedpolly/include/polly/CodeGen/IRBuilder.h
The file was modifiedpolly/lib/CodeGen/IslNodeBuilder.cpp
The file was modifiedpolly/lib/Transform/MatmulOptimizer.cpp
The file was modifiedpolly/test/ScheduleOptimizer/pattern-matching-based-opts_5.ll
The file was modifiedpolly/lib/CodeGen/IRBuilder.cpp
The file was modifiedpolly/test/ScheduleOptimizer/pattern-matching-based-opts_13.ll
The file was modifiedpolly/test/ScheduleOptimizer/mat_mul_pattern_data_layout_2.ll
The file was modifiedpolly/test/ScheduleOptimizer/ensure-correct-tile-sizes.ll
The file was removedpolly/test/ScheduleOptimizer/pattern-matching-based-opts_10.ll
The file was modifiedpolly/test/ScheduleOptimizer/pattern-matching-based-opts_3.ll
The file was modifiedpolly/test/ScheduleOptimizer/pattern-matching-based-opts_14.ll
Commit 073b254cffeffdef36ffbee0c9afdc0da9cd6ac3 by mkazantsev
[SimplifyCFG] Redirect switch cases that lead to UB into an unreachable block

When following a case of a switch instruction is guaranteed to lead to
UB, we can safely break these edges and redirect those cases into a newly
created unreachable block. As result, CFG will become simpler and we can
remove some of Phi inputs to make further analyzes easier.

Patch by Dmitry Bakunevich!

Differential Revision: https://reviews.llvm.org/D109428
Reviewed By: lebedev.ri
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
The file was modifiedllvm/test/CodeGen/AArch64/arm64-ccmp.ll
The file was modifiedllvm/test/Transforms/SimplifyCFG/switch_ub.ll
Commit 58abc8c34bde7021bbfa0a7bdfd2af9524cba263 by clattner
[OpAsmParser] Add a parseCommaSeparatedList helper and beef up Delimeter.

Lots of custom ops have hand-rolled comma-delimited parsing loops, as does
the MLIR parser itself.  Provides a standard interface for doing this that
is less error prone and less boilerplate.

While here, extend Delimiter to support <> and {} delimited sequences as
well (I have a use for <> in CIRCT specifically).

Differential Revision: https://reviews.llvm.org/D110122
The file was modifiedmlir/lib/Parser/TypeParser.cpp
The file was modifiedmlir/lib/Dialect/Async/IR/Async.cpp
The file was modifiedmlir/lib/Dialect/StandardOps/IR/Ops.cpp
The file was modifiedmlir/include/mlir/IR/OpImplementation.h
The file was modifiedmlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
The file was modifiedmlir/lib/Parser/AttributeParser.cpp
The file was modifiedmlir/lib/Parser/Parser.h
The file was modifiedmlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
The file was modifiedmlir/lib/Parser/LocationParser.cpp
The file was modifiedmlir/lib/Parser/AffineParser.cpp
The file was modifiedmlir/test/IR/invalid-affinemap.mlir
The file was modifiedmlir/test/IR/invalid.mlir
The file was modifiedmlir/lib/Parser/Parser.cpp
Commit ea72b0319d7b0f0c2fcf41d121afa5d031b319d5 by yhs
BPF: make 32bit register spill with 64bit alignment

In llvm, for non-alu32 mode, the stack alignment is 64bit so only one
64bit spill per 64bit slot. For alu32 mode, the stack alignment
is 32bit, so it is possible to have two 32bit spills per
64bit slot.

Currently, bpf kernel verifier does not preserve register states
for 32bit spills. That is, one 32bit register may hold a constant
value or a bounded range before spill. After reload from the
stack, the information is lost and sometimes this may cause
verifier failure. For 64bit register spill, the verifier
indeed tries to preserve the register state for reloading.

The current verifier can be modestly changed to handle one
32bit spill per 64bit stack slot with state-preserving reload.
Handling two 32bit spills per 64bit stack slot will require
substantial changes.

This patch changes stack alignment for alu32 to be 64bit.
This way, for any 64bit slot in alu32 mode, only one
32bit or 64bit register values can be saved. Together
with previous-mentioned verifier enhancement, 32bit
spill can be handled with state preserving.

Note that llvm stack slot coallescing
seems only doing adjacent packing which may leave some holes
in the stack. For example,
   stack slot 8   <== 8 bytes
   stack slot 4   <== 8 bytes with 4 byte hole
   stack slot 8   <== 8 bytes
   stack slot 4   <== 4 bytes

Differential Revision: https://reviews.llvm.org/D109073
The file was modifiedllvm/lib/Target/BPF/BPFRegisterInfo.td
The file was addedllvm/test/CodeGen/BPF/spill-alu32.ll
Commit 2c7d5fbc9ebf914f90acad8534289ea01e899ec8 by mkazantsev
[SCEV] Generalize implication when signedness of FoundPred doesn't matter

The implication logic for two values that are both negative or non-negative
says that it doesn't matter whether their predicate is signed and unsigned,
but only flips unsigned into signed for further inference. This patch adds
support for flipping a signed predicate into unsigned as well.

Differential Revision: https://reviews.llvm.org/D109959
Reviewed By: nikic
The file was modifiedllvm/test/Transforms/IndVarSimplify/negative_ranges.ll
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
Commit 7091a7f781c9889f109b6be7b07822bfd91094dc by Amara Emerson
[GlobalISel][Legalizer] Don't use eraseFromParentAndMarkDBGValuesForRemoval() for some artifacts.

For artifacts excluding G_TRUNC/G_SEXT, which have IR counterparts, we don't
seem to have debug users of defs. However, in the legalizer we're always calling
MachineInstr::eraseFromParentAndMarkDBGValuesForRemoval() which is expensive.
In some rare cases, this contributes significantly to unreasonably long compile
times when we have lots of artifact combiner activity.

To verify this, I added asserts to that function when it actually replaced a debug
use operand with undef for these artifacts. On CTMark with both -O0 and -Os and
debug info enabled, I didn't see a single case where it triggered.

In my measurements I saw around a 0.5% geomean compile-time improvement on -g -O0
for AArch64 with this change.

Differential Revision: https://reviews.llvm.org/D109750
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/bug-legalization-artifact-combiner-dead-def.mir
The file was modifiedllvm/lib/CodeGen/GlobalISel/Utils.cpp
Commit 129cf336041f0ed7454c0f6866401d2847dd3967 by ybrevnov
[DSE][NFC] Rename Later->Killing, Earlier->Dead

First (and biggest) change is to use "Killing/Dead" in place of "Later/Earlier" base for names in DSE. For example, [Maybe]DeadLoc - is a location killed by KillingI instruction. I believe such names are more descriptive and easy to understand than current ones.

Second, there are inconsistencies in naming where different names are used for the same thing. Fixed that too.

Third, reordered parameters of isPartialOverwrite, tryToMergePartialOverlappingStores, isOverwrite to make them consistent between each other. This greatly reduces potential mistakes.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D106947
The file was modifiedllvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
Commit cc65e08fe7e1402cd6549882879f50e5238e8178 by Amara Emerson
[GlobalISel][Legalizer] Use ArtifactValueFinder first for unmerge combines before trying others.

This is motivated by an pathological compile time issue during unmerge combining.

We should be able to use the AVF to do simplification. However AMDGPU
has a lot of codegen changes which I'm not sure how to evaluate.

Differential Revision: https://reviews.llvm.org/D109748
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.d16.ll
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-extract-vector-elt.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fshr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.d16.ll
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fshl.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert-vector-elt.mir
Commit d87d1aa07612116a5c2a660f678856d3bda94f46 by zeratul976
[clangd] Deduplicate inlay hints

Duplicates can sometimes appear due to e.g. explicit template
instantiations

Differential Revision: https://reviews.llvm.org/D110051
The file was modifiedclang-tools-extra/clangd/Protocol.cpp
The file was modifiedclang-tools-extra/clangd/InlayHints.cpp
The file was modifiedclang-tools-extra/clangd/unittests/InlayHintTests.cpp
The file was modifiedclang-tools-extra/clangd/Protocol.h
Commit 0d12c99191de5736a2a49e99121ed8059cb7afd3 by arjunpitchanathan
[MLIR] Add mergeLocalIds and mergeSymbolIds

This patch adds mergeLocalIds andmergeSymbolIds as public functions
for FlatAffineConstraints and FlatAffineValueConstraints respectively.

mergeLocalIds is also required to support divisions in intersection,
subtraction, equality checks, and complement for PresburgerSet.

This patch is part of a series of patches aimed at generalizing affine
dependence analysis.

Reviewed By: bondhugula

Differential Revision: https://reviews.llvm.org/D110045
The file was modifiedmlir/lib/Analysis/AffineStructures.cpp
The file was modifiedmlir/include/mlir/Analysis/AffineStructures.h
Commit 791b6ebc86680168d634103b67a92a354c075cc4 by pavel
[lldb] Speculative fix to TestGuiExpandThreadsTree

This test relies on being able to unwind from an arbitrary place inside
libc. While I am not sure this is the cause of the observed flakyness,
it is known that we are not able to unwind correctly from some places in
(linux) libc.

This patch adds additional synchronization to ensure that the inferior
is in the main function (instead of pthread guts) when lldb tries to
unwind it. At the very least, it should make the test runs more
predictable/repeatable.
The file was modifiedlldb/test/API/commands/gui/expand-threads-tree/Makefile
The file was addedlldb/test/API/commands/gui/expand-threads-tree/main.cpp
The file was removedlldb/test/API/commands/gui/expand-threads-tree/main.c
The file was modifiedlldb/test/API/commands/gui/expand-threads-tree/TestGuiExpandThreadsTree.py
Commit 032cb1650fe62f9c93b0a0857e21597b2d11a69f by morten_bp
[MLIR][SCF] Add for-to-while loop transformation pass

This pass transforms SCF.ForOp operations to SCF.WhileOp. The For loop condition is placed in the 'before' region of the while operation, and indctuion variable incrementation + the loop body in the 'after' region. The loop carried values of the while op are the induction variable (IV) of the for-loop + any iter_args specified for the for-loop.
Any 'yield' ops in the for-loop are rewritten to additionally yield the (incremented) induction variable.

This transformation is useful for passes where we want to consider structured control flow solely on the basis of a loop body and the computation of a loop condition. As an example, when doing high-level synthesis in CIRCT, the incrementation of an IV in a for-loop is "just another part" of a circuit datapath, and what we really care about is the distinction between our datapath and our control logic (the condition variable).

Differential Revision: https://reviews.llvm.org/D108454
The file was modifiedmlir/include/mlir/Dialect/SCF/Passes.td
The file was modifiedmlir/lib/Dialect/SCF/Transforms/CMakeLists.txt
The file was addedmlir/test/Dialect/SCF/for-loop-to-while-loop.mlir
The file was addedmlir/lib/Dialect/SCF/Transforms/ForToWhile.cpp
The file was modifiedmlir/include/mlir/Dialect/SCF/Passes.h
Commit b23d22f7d546a525e6fb0e3f32f835c459ac2746 by cullen.rhodes
[PowerPC] NFC: Remove unused tblgen template args

Identified in D109359.

Reviewed By: nemanjai

Differential Revision: https://reviews.llvm.org/D109715
The file was modifiedllvm/lib/Target/PowerPC/PPCInstr64Bit.td
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrPrefix.td
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrHTM.td
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrFormats.td
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.td
Commit eccd477ce312c54e317876ca714c661325f3e318 by sylvestre
Add CMAKE_BUILD_TYPE to the list of BOOTSTRAP_DEFAULT_PASSTHROUGH variables

When building clang in stage2, when -DCMAKE_BUILD_TYPE=RelWithDebInfo is set,
the developer can expect that the stage2 clang is built using the same mode.
Especially as the performances are much worst in debug mode.
(Principle of least astonishment)

Differential Revision: https://reviews.llvm.org/D53014
The file was modifiedclang/CMakeLists.txt
Commit 7e7484a816a53d557c3b2444d8e3daa60eabcc7b by andrzej.warzynski
[flang][docs] Document plugin limitations

This was extracted from the discussion on
https://reviews.llvm.org/D108283.

Co-authored-by: Kiran Chandramohan <kiran.chandramohan@arm.com>

Differential Revision: https://reviews.llvm.org/D109871
The file was modifiedflang/docs/FlangDriver.md
Commit 5c77ed0330c47ad8fa4b229bceb6c33c76536961 by uday
[MLIR] NFC. gpu.launch op argument const folder cleanup

NFC updates to gpu.launch op argument const folder.

Differential Revision: https://reviews.llvm.org/D110136
The file was modifiedmlir/lib/Dialect/GPU/IR/GPUDialect.cpp