Changes

Summary

  1. [LoopVectorize][X86] Add operands to make it more obvious what line the CHECK concerns (details)
  2. [SelectionDAG] Make WidenVecRes_Convert work for scalable vectors. (details)
  3. [hwasan] also omit safe mem[cpy|mov|set]. (details)
  4. Don't fold (select C, (gep Ptr, Idx), Ptr) if C is vector but Idx is scalar (details)
  5. Unbreak module builds by making InstructionWorklist.h non-modular (details)
  6. [ARM] Allow smaller VMOVL in tail predicated loops (details)
  7. [lldb] [Windows] Fix continuing from breakpoints and singlestepping on ARM/AArch64 (details)
  8. [Matrix] Emit assumption that matrix indices are valid. (details)
  9. Revert "[CodeGen] regenerate test checks; NFC" (details)
  10. Revert "[InstCombine] fold cast of right-shift if high bits are not demanded" (details)
  11. [Passes] Run vector-combine early with -fenable-matrix. (details)
  12. [gn build] (manually) port f8b1cc365786 (details)
  13. [gn build] Port 7a320b279d07 (details)
  14. [SelectionDAG] Add PromoteIntOp_INSERT_SUBVECTOR. (details)
  15. [lldb] JITLoaderGDB tests can use lli in ORC greedy mode (details)
  16. [SLP][NFC]Rename function in the test for better matching of the (details)
  17. [ELF][test] Restore important part of ICF alignment test (details)
  18. AArch64: use indivisible cmpxchg for 128-bit atomic loads at O0 (details)
  19. [SelectionDAG] Remove PromoteIntOp_EXTRACT_SUBVECTOR. (details)
  20. [AArch64][SVE] Add extract_subvector patterns for unpacked fp16 and bfloat types. (details)
  21. [mailmap] Add entry for myself (details)
  22. [OpenMP] Make sure the Thread ID function is not removed (details)
  23. [AArch64][SVE] NFC: Move extract_subvector tests around. (details)
  24. [InstCombine] Update InstCombine to use poison instead of undef for shufflevector's placeholder (1/3) (details)
  25. [Target][CodeGen] Remove default CostKind arguments on inner/impl TTI overrides (details)
  26. [Sanitizer] Add Windows header for _mkdir (details)
  27. [libc++][NFC] Add link to Discord channel from documentation (details)
  28. [InstCombine] Update InstCombine to use poison instead of undef for shufflevector's placeholder (2/3) (details)
  29. [OpenMP][Offloading] Use bitset to indicate execution mode instead of value (details)
  30. [libc++] Disallow volatile types in std::allocator (details)
  31. [InstCombine] Update InstCombine to use poison instead of undef for shufflevector's placeholder (3/3) (details)
  32. [SLP] getReductionCost - use explicit TTI::TCK_RecipThroughput CostKind. NFCI. (details)
  33. [ORC] Re-enable ELF DebugObjectManagerPlugin tests (details)
  34. [CodeGen] Remove redundant declaration MIRCanonicalizerID (NFC) (details)
  35. [SLP][NFC]Add a test to show an issue with incorrectly extracted (details)
  36. [CSSPGO] Set PseudoProbeInserter as a default pass. (details)
  37. [NFC] clang-format -i llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp (details)
  38. [RISCV] Optimize vp.store with an all ones mask to avoid a vmset. (details)
  39. [mlir][sparse] replace ad-hoc MemRef struct with CRunnerUtils definition (details)
  40. [OpenMP] Add function tracing debugging to device RTL (details)
  41. [ORC] DebugObjectManagerPlugin tests can use lli in ORC greedy mode (details)
  42. [HWASan] Use a single .weak binding in asm. (details)
  43. [libc] Add an implementation of bsearch. (details)
  44. [SimplifyCFG] Ignore free instructions when computing cost for folding branch to common dest (details)
Commit 41492d77ba65338b9eb2b7f401e47acf22e4ea19 by llvm-dev
[LoopVectorize][X86] Add operands to make it more obvious what line the CHECK concerns

As we're checking the cost debug analysis these should match the original IR line - so we shouldn't have any variable naming issues.

I'm investigating v4i32 mul -> PMADDDW costs handling (for PR47437) and these CHECK lines were proving tricky to keep track of
The file was modifiedllvm/test/Transforms/LoopVectorize/X86/mul_slm_16bit.ll
Commit 4ca1fbe361860976646ad09da26757bf32563145 by sander.desmalen
[SelectionDAG] Make WidenVecRes_Convert work for scalable vectors.

Most of the code wasn't yet scalable safe, although most of the
code conceptually just works for scalable vectors. This change
makes the algorithm work on ElementCount, where appropriate,
and leaves the fixed-width only code to use `getFixedNumElements`.

Reviewed By: david-arm

Differential Revision: https://reviews.llvm.org/D110058
The file was modifiedllvm/test/CodeGen/AArch64/sve-fcvt.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
Commit 36daf074d997a79f25a1de2a1b869170ea6c20cc by fmayer
[hwasan] also omit safe mem[cpy|mov|set].

Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D109816
The file was modifiedllvm/lib/Analysis/StackSafetyAnalysis.cpp
The file was modifiedllvm/test/Instrumentation/HWAddressSanitizer/stack-safety-analysis.ll
The file was modifiedllvm/test/Instrumentation/HWAddressSanitizer/mem-intrinsics.ll
The file was modifiedllvm/test/Analysis/StackSafetyAnalysis/ipa-alias.ll
The file was modifiedllvm/include/llvm/Analysis/StackSafetyAnalysis.h
The file was modifiedllvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
The file was modifiedllvm/test/Analysis/StackSafetyAnalysis/ipa.ll
The file was modifiedllvm/test/Analysis/StackSafetyAnalysis/local.ll
Commit d0746f2e9bbf08f52196ae12f25d0ef7edcbbe4c by yikong
Don't fold (select C, (gep Ptr, Idx), Ptr) if C is vector but Idx is scalar

The folding rule (select C, (gep Ptr, Idx), Ptr) -> (gep Ptr, (select C,
Idx, 0)) creates a malformed SELECT IR if C is a vector while Idx is scalar.

  SELECT VecC, ScalarIdx, 0

We could splat Idx to a vector but it defeats the purpose of
optimisation. Don't apply the folding rule in this case.

This fixes a regression from commit d561b6fbdbe6d1da05fd92003a4ac1e37bf4b8bc.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
The file was modifiedllvm/test/Transforms/InstCombine/select-gep.ll
Commit a5e1c746b870d79142419a07a8aecc471eacfed1 by Raphael Isemann
Unbreak module builds by making InstructionWorklist.h non-modular

This regressed in D110181 and apparently the header intentionally requires
DEBUG_TYPE to be defined by the including file. Just exclude the header from
the module to unbreak the build.
The file was modifiedllvm/include/llvm/module.modulemap
Commit 02cd8a6b915a9dab32fdd91167f875ce5f67ebd4 by david.green
[ARM] Allow smaller VMOVL in tail predicated loops

This allows VMOVL in tail predicated loops so long as the the vector
size the VMOVL is extending into is less than or equal to the size of
the VCTP in the tail predicated loop. These cases represent a
sign-extend-inreg (or zero-extend-inreg), which needn't block tail
predication as in https://godbolt.org/z/hdTsEbx8Y.

For this a vecsize has been added to the TSFlag bits of MVE
instructions, which stores the size of the elements that the MVE
instruction operates on. In the case of multiple size (such as a
MVE_VMOVLs8bh that extends from i8 to i16, the largest size was be
chosen). The sizes are encoded as 00 = i8, 01 = i16, 10 = i32 and 11 =
i64, which often (but not always) comes from the instruction encoding
directly. A unit test was added, and although only a subset of the
vecsizes are currently used, the rest should be useful for other cases.

Differential Revision: https://reviews.llvm.org/D109706
The file was modifiedllvm/lib/Target/ARM/ARMInstrMVE.td
The file was modifiedllvm/lib/Target/ARM/ARMInstrFormats.td
The file was modifiedllvm/lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vmovlloop.ll
The file was modifiedllvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
The file was modifiedllvm/unittests/Target/ARM/MachineInstrTest.cpp
Commit 9f34f75ff8f49b0efca6e20d916527a2c432d8b4 by martin
[lldb] [Windows] Fix continuing from breakpoints and singlestepping on ARM/AArch64

Based on suggestions by Eric Youngdale.

This fixes https://llvm.org/PR51673.

Differential Revision: https://reviews.llvm.org/D109777
The file was modifiedlldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.cpp
The file was modifiedlldb/source/Plugins/Process/Windows/Common/NativeThreadWindows.cpp
The file was modifiedlldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
The file was modifiedlldb/source/Plugins/Process/Windows/Common/TargetThreadWindows.cpp
The file was modifiedlldb/source/Plugins/Platform/Windows/PlatformWindows.cpp
The file was modifiedlldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.h
The file was modifiedlldb/source/Plugins/Platform/Windows/PlatformWindows.h
Commit ea21d688dc0a420b9fc385562a46017fb39b13e5 by flo
[Matrix] Emit assumption that matrix indices are valid.

The matrix extension requires the indices for matrix subscript
expression to be valid and it is UB otherwise.

extract/insertelement produce poison if the index is invalid, which
limits the optimizer to not be bale to scalarize load/extract pairs for
example, which causes very suboptimal code to be generated when using
matrix subscript expressions with variable indices for large matrixes.

This patch updates IRGen to emit assumes to for index expression to
convey the information that the index must be valid.

This also adjusts the order in which operations are emitted slightly, so
indices & assumes are added before the load of the matrix value.

Reviewed By: erichkeane

Differential Revision: https://reviews.llvm.org/D102478
The file was modifiedclang/test/CodeGenCXX/matrix-type-operators.cpp
The file was modifiedclang/test/CodeGenObjC/matrix-type-operators.m
The file was modifiedclang/lib/CodeGen/CGExpr.cpp
The file was modifiedclang/test/CodeGen/matrix-type-operators.c
The file was modifiedllvm/include/llvm/IR/MatrixBuilder.h
The file was modifiedclang/lib/CodeGen/CGExprScalar.cpp
Commit 1ee851c5859fdb36eca57a46347a1e7b8e1ff236 by spatel
Revert "[CodeGen] regenerate test checks; NFC"

This reverts commit 52832cd917af00e2b9c6a9d1476ba79754dcabff.
The motivating commit 2f6b07316f5 caused several bots to hit
an infinite loop at stage 2, so that needs to be reverted too
while figuring out how to fix that.
The file was modifiedclang/test/CodeGen/aapcs-bitfield.c
Commit c6013f71a4555f6d9ef9c60e6bc4376ad63f1c47 by spatel
Revert "[InstCombine] fold cast of right-shift if high bits are not demanded"

This reverts commit 2f6b07316f560a1f6d225919019dff2e5d6346e5.

This caused several bots to hit an infinite loop at stage 2,
so it needs to be reverted while figuring out how to fix that.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
The file was modifiedllvm/test/Transforms/InstCombine/trunc-demand.ll
Commit a7c6471a85380f5af644e50daf2951b41c82f1b2 by flo
[Passes] Run vector-combine early with -fenable-matrix.

IR with matrix intrinsics is likely to also contain large vector
operations, which can benefit from early simplifications.

This is the last step in a series of changes to improve code-gen for
code using matrix subscript operators with the C/C++ matrix extension in
CLang, like

    using matrix_t = double __attribute__((matrix_type(15, 15)));

    void foo(unsigned i, matrix_t &A, matrix_t &B) {
      for (unsigned j = 0; j < 4; ++j)
        for (unsigned k = 0; k < i; k++)
          B[k][j] -= A[k][j] * B[i][j];
    }

https://clang.godbolt.org/z/6dKxK1Ed7

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D102496
The file was modifiedllvm/lib/Passes/PassBuilderPipelines.cpp
The file was modifiedllvm/test/Transforms/PhaseOrdering/AArch64/matrix-extract-insert.ll
The file was modifiedllvm/test/Other/new-pm-defaults.ll
The file was modifiedllvm/lib/Transforms/IPO/PassManagerBuilder.cpp
Commit c828b93fb367b67d5e6342fee179a93970ba71ec by thakis
[gn build] (manually) port f8b1cc365786
The file was modifiedllvm/utils/gn/secondary/libcxxabi/src/BUILD.gn
Commit f099ac838e6bce8b743a71c2fc46c1699eae8dc3 by llvmgnsyncbot
[gn build] Port 7a320b279d07
The file was modifiedllvm/utils/gn/secondary/libcxx/include/BUILD.gn
Commit d5681f1d688a45c000dd1e2c4f4d3678e0440b94 by sander.desmalen
[SelectionDAG] Add PromoteIntOp_INSERT_SUBVECTOR.

This is required to codegen something like:
  <vscale x 8 x i16> @llvm.experimental.vector.insert(<vscale x 8 x i16> %vec,
                                                      <vscale x 2 x i16> %subvec,
                                                      i64 %idx)
where the output vector is legal, but the input vector needs promoting.

It implements this by performing the whole operation on the promoted type,
and then truncating the result.

Reviewed By: david-arm, craig.topper

Differential Revision: https://reviews.llvm.org/D110059
The file was modifiedllvm/test/CodeGen/AArch64/sve-insert-vector.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
Commit 9689c1b7bb77d65e8acc9a13e5e416803d38b02f by Stefan Gränitz
[lldb] JITLoaderGDB tests can use lli in ORC greedy mode

At first, lli only supported lazy mode for ORC. Greedy mode was added with e1579894d205 and is the default settings now. JITLoaderGDB tests don't rely on laziness, so we can switch them to greedy and remove some complexity.
The file was modifiedlldb/test/Shell/Breakpoint/jit-loader_jitlink_elf.test
The file was modifiedlldb/test/Shell/Breakpoint/jit-loader_rtdyld_elf.test
Commit b6d10beb505cbf17c21668cca0486f89ce35857c by a.bataev
[SLP][NFC]Rename function in the test for better matching of the
transformation.
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/tiny-tree.ll
Commit 05b130342143a0c93407cfbecf6d7cf30c6d1890 by andrew.ng
[ELF][test] Restore important part of ICF alignment test

Restore the checking of addresses in ICF test which was testing the
behaviour of ICF with regards to different alignments of otherwise
identical sections. Also make the test more robust to layout changes.

Differential Revision: https://reviews.llvm.org/D110090
The file was modifiedlld/test/ELF/icf7.s
Commit 3a00e58c2fca0c20d3792c897ef1ea54b6a168a0 by Tim Northover
AArch64: use indivisible cmpxchg for 128-bit atomic loads at O0

Like normal atomicrmw operations, at -O0 the simple register-allocator can
insert spills into the LL/SC loop if it's expanded and visible when regalloc
runs. This can cause the operation to never succeed by repeatedly clearing the
monitor. Instead expand to a cmpxchg, which has a pseudo-instruction for -O0.
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic-128.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Commit 3e8d2008f74245e9e1ca60bc97e4e619b0d42c6c by sander.desmalen
[SelectionDAG] Remove PromoteIntOp_EXTRACT_SUBVECTOR.

This code seems untested and is likely obsolete, because this case
should already be handled by the code that legalizes the result type
of EXTRACT_SUBVECTOR.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D110061
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
Commit 6375ca40590b9fea49a9d7d20f80d3da6af381f1 by sander.desmalen
[AArch64][SVE] Add extract_subvector patterns for unpacked fp16 and bfloat types.

Reviewed By: david-arm

Differential Revision: https://reviews.llvm.org/D110163
The file was modifiedllvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
The file was modifiedllvm/test/CodeGen/AArch64/sve-extract-vector.ll
Commit f7d1a60cac6b7bb3199e3aba083346bf0eb4a24f by JCTremoulet
[mailmap] Add entry for myself
The file was modified.mailmap
Commit 1cf86df8839ae2c8ebb7c68e1c355ec960a153cf by jhuber6
[OpenMP] Make sure the Thread ID function is not removed

Summary:
The thread ID function was reintroduced in D110195, but could
potentially be removed by the optimizer. Make the function noinline to
preserve the call sites and add it to the externalization RAII so its
definition is not removed by the attributor.
The file was modifiedopenmp/libomptarget/DeviceRTL/src/Mapping.cpp
The file was modifiedopenmp/libomptarget/DeviceRTL/include/Utils.h
The file was modifiedllvm/lib/Transforms/IPO/OpenMPOpt.cpp
Commit c97820c50d73d05d3ec5679253206d1ac39d10ee by sander.desmalen
[AArch64][SVE] NFC: Move extract_subvector tests around.

This patch splits up sve-extract-vector.ll into
  * sve-extract-fixed-vector.ll
  * sve-extract-scalable-vector.ll

For testing extracts of a fixed-width or scalable sub-vector from a
scalable source vector, respectively.
The file was addedllvm/test/CodeGen/AArch64/sve-extract-scalable-vector.ll
The file was addedllvm/test/CodeGen/AArch64/sve-extract-fixed-vector.ll
The file was removedllvm/test/CodeGen/AArch64/sve-extract-vector.ll
Commit e5aaf0332670577cc19ac67b07b10261da6fc1e1 by gusrb406
[InstCombine] Update InstCombine to use poison instead of undef for shufflevector's placeholder (1/3)

This patch is for fixing potential shufflevector-related bugs like D93818.
As D93818, this patch change shufflevector's default placeholder to poison.
To reduce risk, it was divided into several patches, and this patch is for InstCombineCasts.

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D110226
The file was modifiedllvm/test/Transforms/InstCombine/cast.ll
The file was modifiedllvm/test/Transforms/InstCombine/trunc.ll
The file was modifiedllvm/test/Transforms/InstCombine/vector-casts.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
The file was modifiedllvm/test/Transforms/InstCombine/X86/x86-f16c-inseltpoison.ll
The file was modifiedllvm/test/Transforms/InstCombine/shufflevec-bitcast-inseltpoison.ll
The file was modifiedllvm/test/Transforms/InstCombine/shuffle-cast-dist.ll
The file was modifiedclang/test/Headers/wasm.c
The file was modifiedllvm/test/Transforms/InstCombine/shufflevec-bitcast.ll
The file was modifiedllvm/test/Transforms/InstCombine/trunc-inseltpoison.ll
The file was modifiedllvm/test/Transforms/InstCombine/X86/x86-f16c.ll
Commit b1f38a27f0c95fdf5f81eac4812b781a9d612425 by llvm-dev
[Target][CodeGen] Remove default CostKind arguments on inner/impl TTI overrides

Based off a discussion on D110100, we should be avoiding default CostKinds whenever possible.

This initial patch removes them from the 'inner' target implementation callbacks - these should only be used by the main TTI calls, so this should guarantee that we don't cause changes in CostKind by missing it in an inner call. This exposed a few missing arguments in getGEPCost and reduction cost calls that I've cleaned up.

Differential Revision: https://reviews.llvm.org/D110242
The file was modifiedllvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetTransformInfo.h
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
The file was modifiedllvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h
The file was modifiedllvm/lib/Target/Lanai/LanaiTargetTransformInfo.h
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.h
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h
The file was modifiedllvm/lib/Target/BPF/BPFTargetTransformInfo.h
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.h
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h
Commit 1864976c967de36146eb5a5b86e6312d466e1031 by tejohnson
[Sanitizer] Add Windows header for _mkdir

This will hopefully fix the sanitizer_windows bot failure after D109794:
https://lab.llvm.org/buildbot/#/builders/127/builds/17222
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_win.cpp
Commit b034593c8719e42a56cf4e6cb2ffb762783b0d7f by Louis Dionne
[libc++][NFC] Add link to Discord channel from documentation
The file was modifiedlibcxx/docs/Contributing.rst
Commit ec8311444abec8ad68a9fd08e509ae2178b43ca3 by gusrb406
[InstCombine] Update InstCombine to use poison instead of undef for shufflevector's placeholder (2/3)

This patch is for fixing potential shufflevector-related bugs like D93818.
As D93818, this patch change shufflevector's default placeholder to poison.
To reduce risk, it was divided into several patches, and this patch is for InstCombineCompares and InstructionCombining.

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D110227
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/alternate-int.ll
The file was modifiedllvm/test/Transforms/InstCombine/vec-binop-select.ll
The file was modifiedllvm/test/Transforms/InstCombine/icmp-vec-inseltpoison.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstructionCombining.cpp
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/alternate-int-inseltpoison.ll
The file was modifiedllvm/test/Transforms/InstCombine/vec_shuffle-inseltpoison.ll
The file was modifiedllvm/test/Transforms/InstCombine/gep-inbounds-null.ll
The file was modifiedllvm/test/Transforms/InstCombine/broadcast-inseltpoison.ll
The file was modifiedllvm/test/Transforms/InstCombine/broadcast.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/X86/shuffle-inseltpoison.ll
The file was modifiedllvm/test/Transforms/InstCombine/icmp-vec.ll
The file was modifiedllvm/test/Transforms/InstCombine/shufflevector-div-rem.ll
The file was modifiedllvm/test/Transforms/InstCombine/vscale_cmp.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
The file was modifiedllvm/test/Transforms/InstCombine/vec-binop-select-inseltpoison.ll
The file was modifiedllvm/test/Transforms/InstCombine/vec_shuffle.ll
The file was modifiedllvm/test/Transforms/InstCombine/shufflevector-div-rem-inseltpoison.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/AArch64/transpose-inseltpoison.ll
The file was modifiedllvm/test/Transforms/InstCombine/getelementptr.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/X86/shuffle.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/AArch64/transpose.ll
Commit ca999f719117f916b333a794cc8c59984ae40dd2 by tianshilei1992
[OpenMP][Offloading] Use bitset to indicate execution mode instead of value

The execution mode of a kernel is stored in a global variable, whose value means:
- 0 - SPMD mode
- 1 - indicates generic mode
- 2 - SPMD mode execution with generic mode semantics

We are going to add support for SIMD execution mode. It will be come with another
execution mode, such as SIMD-generic mode. As a result, this value-based indicator
is not flexible.

This patch changes to bitset based solution to encode execution mode. Each
position is:
[0] - generic mode
[1] - SPMD mode
[2] - SIMD mode (will be added later)

In this way, `0x1` is generic mode, `0x2` is SPMD mode, and `0x3` is SPMD mode
execution with generic mode semantics. In the future after we add the support for
SIMD mode, `0b1xx` will be in SIMD mode.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D110029
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
The file was modifiedopenmp/libomptarget/plugins/cuda/src/rtl.cpp
The file was modifiedclang/test/OpenMP/nvptx_target_parallel_reduction_codegen.cpp
The file was modifiedclang/test/OpenMP/nvptx_target_teams_distribute_simd_codegen.cpp
The file was modifiedllvm/test/Transforms/OpenMP/spmdization_guarding.ll
The file was modifiedllvm/include/llvm/Frontend/OpenMP/OMPConstants.h
The file was modifiedllvm/lib/Transforms/IPO/OpenMPOpt.cpp
The file was modifiedllvm/test/Transforms/OpenMP/is_spmd_exec_mode_fold.ll
The file was modifiedclang/test/OpenMP/nvptx_target_parallel_proc_bind_codegen.cpp
The file was modifiedopenmp/libomptarget/plugins/cuda/CMakeLists.txt
The file was modifiedclang/test/OpenMP/nvptx_target_simd_codegen.cpp
The file was modifiedllvm/test/Transforms/OpenMP/spmdization.ll
The file was modifiedllvm/test/Transforms/OpenMP/get_hardware_num_threads_in_block_fold.ll
The file was modifiedllvm/test/Transforms/OpenMP/spmdization_assumes.ll
Commit 400b33e18d27d801ec5ad1cc52b34c6d8bed64aa by joeloser93
[libc++] Disallow volatile types in std::allocator

LWG 2447 is marked as `Complete`, but there is no `static_assert` to
reject volatile types in `std::allocator`. See the discussion at
https://reviews.llvm.org/D108856.

Add `static_assert` in `std::allocator` to disallow volatile types. Since this
is an implementation choice, mark the binding test as `libc++` only.

Remove tests that use containers backed by `std::allocator` that test
the container when used with a volatile type.

Reviewed By: ldionne, #libc

Differential Revision: https://reviews.llvm.org/D109056
The file was modifiedlibcxx/TODO.TXT
The file was addedlibcxx/test/libcxx/memory/allocator_volatile.verify.cpp
The file was modifiedlibcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.create/make_shared.pass.cpp
The file was modifiedlibcxx/test/std/concepts/concepts.lang/concept.default.init/default_initializable.compile.pass.cpp
The file was removedlibcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.create/make_shared.volatile.pass.cpp
The file was modifiedlibcxx/include/__memory/allocator.h
Commit 98e96663f6a77ee06c5db3f25cdcf19b56ac8f04 by gusrb406
[InstCombine] Update InstCombine to use poison instead of undef for shufflevector's placeholder (3/3)

This patch is for fixing potential shufflevector-related bugs like D93818.
As D93818, this patch change shufflevector's default placeholder to poison.
To reduce risk, it was divided into several patches, and this patch is for InstCombineVectorOps.

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D110230
The file was modifiedllvm/test/Transforms/InstCombine/vec_shuffle.ll
The file was modifiedllvm/test/Transforms/InstCombine/trunc-inseltpoison.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
The file was modifiedllvm/test/Transforms/InstCombine/X86/x86-f16c.ll
The file was modifiedclang/test/CodeGen/aarch64-neon-dot-product.c
The file was modifiedllvm/test/Transforms/InstCombine/X86/x86-avx512-inseltpoison.ll
The file was modifiedllvm/test/Transforms/InstCombine/broadcast.ll
The file was modifiedllvm/test/Transforms/InstCombine/vec_demanded_elts.ll
The file was modifiedllvm/test/Transforms/InstCombine/reduction-shufflevector.ll
The file was modifiedllvm/test/Transforms/InstCombine/broadcast-inseltpoison.ll
The file was modifiedllvm/test/Transforms/InstCombine/insert-extract-shuffle-inseltpoison.ll
The file was modifiedclang/test/CodeGen/aarch64-bf16-ldst-intrinsics.c
The file was modifiedllvm/test/Transforms/InstCombine/trunc.ll
The file was modifiedllvm/test/Transforms/InstCombine/vec_demanded_elts-inseltpoison.ll
The file was modifiedllvm/test/Transforms/InstCombine/obfuscated_splat.ll
The file was modifiedllvm/test/Transforms/InstCombine/obfuscated_splat-inseltpoison.ll
The file was modifiedllvm/test/Transforms/InstCombine/shuffle-cast-dist.ll
The file was modifiedllvm/test/Transforms/InstCombine/X86/x86-avx512.ll
The file was modifiedclang/test/CodeGen/arm-neon-dot-product.c
The file was modifiedllvm/test/Transforms/InstCombine/vec_shuffle-inseltpoison.ll
The file was modifiedllvm/test/Transforms/InstCombine/X86/x86-f16c-inseltpoison.ll
The file was modifiedllvm/test/Transforms/InstCombine/insert-extract-shuffle.ll
Commit 8a44281f478fb0b62ea2d09f10b13643f774cdab by llvm-dev
[SLP] getReductionCost - use explicit TTI::TCK_RecipThroughput CostKind. NFCI.

Avoid relying on the default cost kinds in TTI calls (we already do this in other places in SLP) - noticed while trying to see how much work it'd be to extend D110242 and remove all remaining uses of default CostKind arguments.
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Commit 506dbd88fe8f1d3ac43457a9bb960c4745368886 by Stefan Gränitz
[ORC] Re-enable ELF DebugObjectManagerPlugin tests

These tests were disabled by accident after D107640. Actually, REQUIRES lines don't support `x86_64` and so these tests stopped running on all targets.
`native && target-x86_64` should be the correct term to express "x86_64 host targeting native arch".
The file was modifiedllvm/test/ExecutionEngine/OrcLazy/debug-objects-elf-minimal.ll
The file was modifiedllvm/test/ExecutionEngine/OrcLazy/debug-descriptor-elf-minimal.ll
Commit 3c557cd7f9a5d71a763a12027f18de66f6360562 by kazu
[CodeGen] Remove redundant declaration MIRCanonicalizerID (NFC)

Note that MIRCanonicalizerID is declared in
llvm/include/llvm/CodeGen/Passes.h, which MIRCanonicalizerPass.cpp
includes.

Identified with readability-redundant-declaration.
The file was modifiedllvm/lib/CodeGen/MIRCanonicalizerPass.cpp
Commit 173dd896db976d1e975a2a5d844fc09238884277 by a.bataev
[SLP][NFC]Add a test to show an issue with incorrectly extracted
pointers.
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/extract_in_tree_user.ll
Commit d9b511d8e8c43f79e0e277be287656693dd6563f by hoy
[CSSPGO] Set PseudoProbeInserter as a default pass.

Currenlty PseudoProbeInserter is a pass conditioned on a target switch. It works well with a single clang invocation. It doesn't work so well when the backend is called separately (i.e, through the linker or llc), where user has always to pass -pseudo-probe-for-profiling explictly. I'm making the pass a default pass that requires no command line arg to trigger, but will be actually run depending on whether the CU comes with `llvm.pseudo_probe_desc` metadata.

Reviewed By: wenlei

Differential Revision: https://reviews.llvm.org/D110209
The file was modifiedlld/test/ELF/lto/pseudo-probe-lto.ll
The file was modifiedlld/ELF/Config.h
The file was modifiedllvm/include/llvm/Target/TargetOptions.h
The file was modifiedlld/ELF/LTO.cpp
The file was modifiedllvm/lib/CodeGen/PseudoProbeInserter.cpp
The file was modifiedclang/lib/CodeGen/BackendUtil.cpp
The file was modifiedllvm/include/llvm/CodeGen/CommandFlags.h
The file was modifiedllvm/lib/CodeGen/CommandFlags.cpp
The file was modifiedllvm/lib/CodeGen/TargetPassConfig.cpp
The file was modifiedllvm/lib/Target/X86/X86TargetMachine.cpp
The file was modifiedlld/ELF/Driver.cpp
The file was modifiedllvm/test/Transforms/SampleProfile/pseudo-probe-emit.ll
The file was modifiedlld/ELF/Options.td
The file was modifiedllvm/test/Transforms/SampleProfile/pseudo-probe-dangle.ll
The file was modifiedllvm/test/Transforms/SampleProfile/pseudo-probe-instsched.ll
The file was modifiedllvm/test/CodeGen/X86/opt-pipeline.ll
The file was modifiedllvm/test/Transforms/SampleProfile/pseudo-probe-emit-inline.ll
The file was modifiedllvm/test/CodeGen/X86/O0-pipeline.ll
The file was modifiedllvm/test/tools/llvm-profgen/truncated-pseudoprobe.test
Commit b205b3300b2f3b18bf82771f761eb8e6794f3e32 by tianshilei1992
[NFC] clang-format -i llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
The file was modifiedllvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Commit b33a1cc05b4800ae9e8c7df097c4a76c9da28c94 by craig.topper
[RISCV] Optimize vp.store with an all ones mask to avoid a vmset.

We can use riscv_vse intrinsic instead of riscv_vse_mask. The code here
is based on similar code for handling masked.scatter and vp.scatter.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D110206
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vpstore.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpstore.ll
Commit 56bddf3b1c035043c2568efaa8aa37f6fa87f9f1 by ajcbik
[mlir][sparse] replace ad-hoc MemRef struct with CRunnerUtils definition

This revision removes the ad-hoc MemRefs that were needed using the old
ABI (when we still passed by value) and replaces them with the shared
StridedMemRef definitions of CRunnerUtils (possible now that we pass by
pointer). This avoids code duplication and makes sure we have a consistent
view of strided memory references in all our support libraries.

Reviewed By: jsetoain

Differential Revision: https://reviews.llvm.org/D110221
The file was modifiedmlir/lib/ExecutionEngine/SparseUtils.cpp
Commit 277b681edec2ee4394c7e62a118ad21b2cbbb227 by jhuber6
[OpenMP] Add function tracing debugging to device RTL

This patch adds support for an RAII struct that will print function
traces when placed inside of a function declaration. Each successive
call will increase the indentation to make it easier to visually
inspect.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D110202
The file was modifiedopenmp/libomptarget/DeviceRTL/include/Configuration.h
The file was modifiedopenmp/libomptarget/DeviceRTL/include/Debug.h
The file was modifiedopenmp/libomptarget/DeviceRTL/src/Configuration.cpp
The file was modifiedopenmp/libomptarget/DeviceRTL/src/Debug.cpp
Commit 2131eb696386241e77f257ccc57e1a7955869971 by Stefan Gränitz
[ORC] DebugObjectManagerPlugin tests can use lli in ORC greedy mode

Initially, lli only supported lazy mode for ORC. Greedy mode was added with e1579894d205 and it's the default setting now. DebugObjectManagerPlugin tests don't rely on laziness, so we can switch them to greedy in order to avoid some unnecessary complexity.
The file was modifiedllvm/test/ExecutionEngine/OrcLazy/debug-objects-elf-minimal.ll
The file was modifiedllvm/test/ExecutionEngine/OrcLazy/debug-descriptor-elf-minimal.ll
Commit 1aedf77ece6bc9a1fc70453d4603280bde6ebf1f by mascasa
[HWASan] Use a single .weak binding in asm.

Specifying .global and .weak causes a compiler warning:

  warning: __sigsetjmp changed binding to STB_WEAK

Specifying only .weak should have the same effect without causing a
warning.

Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D110178
The file was modifiedcompiler-rt/lib/hwasan/hwasan_setjmp_aarch64.S
The file was modifiedcompiler-rt/lib/hwasan/hwasan_setjmp_x86_64.S
Commit 32a50078657dd8beead327a3478ede4e9d730432 by sivachandra
[libc] Add an implementation of bsearch.

Reviewed By: michaelrj

Differential Revision: https://reviews.llvm.org/D110222
The file was modifiedlibc/config/linux/aarch64/entrypoints.txt
The file was modifiedlibc/config/linux/x86_64/entrypoints.txt
The file was modifiedlibc/config/linux/api.td
The file was modifiedlibc/test/src/stdlib/CMakeLists.txt
The file was modifiedlibc/src/stdlib/CMakeLists.txt
The file was modifiedlibc/spec/spec.td
The file was addedlibc/src/stdlib/bsearch.h
The file was addedlibc/test/src/stdlib/bsearch_test.cpp
The file was modifiedlibc/spec/stdc.td
The file was addedlibc/src/stdlib/bsearch.cpp
Commit e7249e4acf3cf9438d6d9e02edecebd5b622a4dc by aeubanks
[SimplifyCFG] Ignore free instructions when computing cost for folding branch to common dest

When determining whether to fold branches to a common destination by
merging two blocks, SimplifyCFG will count the number of instructions to
be moved into the first basic block. However, there's no reason to count
free instructions like bitcasts and other similar instructions.

This resolves missed branch foldings with -fstrict-vtable-pointers in
llvm-test-suite's lambda benchmark.

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D108837
The file was modifiedllvm/test/Transforms/SimplifyCFG/fold-branch-to-common-dest-free-cost.ll
The file was modifiedllvm/test/CodeGen/AArch64/csr-split.ll
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp