1. [PowerPC] Add accumulator register class and instructions (details)
  2. Fix Assembler/disubprogram.ll after e17f52d623cc146b7d9bf5a2e02965043508b4c4 (details)
  3. [MLIR] Fix for updating function signature in normalizing memrefs (details)
  4. AArch64/GlobalISel: Narrow stack passed argument access size (details)
  5. Revert "Add a verifier check that rejects non-distinct DISubprogram function" (details)
  6. Move PassBuilder::registerParseTopLevelPipelineCallback out-of-line (details)
  7. [SCEV] Add another test using info from loop guards for BTC with NE. (details)
  8. [SCEV] Add support for `x != 0` to CollectCondition. (details)
  9. OpaquePtr: Add type to sret attribute (details)
  10. [flang][OpenMP] Place the insertion point to the start of the block (details)
  11. [NFC] Fix comment for DataOp (details)
  12. [lld-macho] Implement support for PIC (details)
  13. [lld-macho] Support -bundle (details)
  14. [lld-macho] Allow the entry symbol to be dynamically bound (details)
  15. [lld-macho] Support absolute symbols (details)
  16. [lld-macho] Always include custom syslibroot when running tests (details)
  17. [lld-macho] Ignore a few more undocumented flags (details)
  18. [Coroutine] Split PHI Nodes in `cleanuppad` blocks in a way that obeys EH pad rules (details)
  19. [WebAssembly] Check features before making SjLj vars thread-local (details)
  20. [lldb] Pass reference instead of pointer in protected SBAddress methods. (details)
  21. Add a verifier check that rejects non-distinct DISubprogram function (details)
  22. [LoopReroll][NewPM] Port -loop-reroll to NPM (details)
  23. [InstCombine] collectBitParts - add fshl/fshr handling (details)
  24. [IRSim] Adding basic implementation of llvm-sim. (details)
  25. [InstCombine] Fix test name to match type. NFCI. (details)
  26. [InstCombine] matchRotate - support (uniform) constant rotation amounts (PR46895) (details)
  27. Fix copy+paste typo in doxygen parameter name to fix Wdocumentation. NFCI. (details)
  28. Revert "[IRSim] Adding basic implementation of llvm-sim." (details)
  29. [lsan] Add interceptor for pthread_detach. (details)
  30. Add support for firmware/standalone LC_NOTE "main bin spec" corefiles (details)
  31. [msan] Skip memcpy interceptor called by gethostname (details)
  32. Sema: add support for `__attribute__((__swift_private__))` (details)
  33. Add the ability to write target stop-hooks using the ScriptInterpreter. (details)
  34. [AArch64][SVE] Drop "argmemonly" from gather/scatter with vector base. (details)
  35. [TRE][NFC] Refactor Basic Block Processing (details)
  36. C API: functions to get mask of a ShuffleVector (details)
  37. [LangRef] Clarify the behavior of memory access instructions when pointers/sizes aren't well-defined (details)
  38. [RISCV] Fix formatting (NFC) (details)
  39. [IR] Improve the description for Constant::isNormalFP to list all things that are not normal instead of just denormal. NFC (details)
  40. [Object][MachO] Refine the interface of Slice (details)
  41. [RISCV] Scheduler description for Bullet (details)
  42. [RISCV] Update driver tests (details)
  43. [lldb/bindings] Fix -Wformat after D88123 (details)
  44. [AArch64][GlobalISel] Add a few more vector type combinations for shift selection. (details)
  45. [LowerTypeTests][NewPM] Add constructor that uses command line flags (details)
  46. [AArch64][GlobalISel] If a G_BUILD_VECTOR operands are all G_CONSTANT then assign to gpr bank. (details)
Commit 9b86b7009430789d28d67bb1b630e74473f80fa2 by baptiste.saleil
[PowerPC] Add accumulator register class and instructions

This patch adds the xxmfacc, xxmtacc and xxsetaccz instructions to manipulate
accumulator registers. It also adds the ACC register class definition for the
accumulator registers.

Differential Revision: https://reviews.llvm.org/D84847
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrPrefix.td
The file was modifiedllvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h
The file was modifiedllvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCRegisterInfo.h
The file was modifiedllvm/test/MC/Disassembler/PowerPC/ppc64-encoding-ISA31.txt
The file was modifiedllvm/test/MC/PowerPC/ppc64-encoding-ISA31.s
The file was modifiedllvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCRegisterInfo.td
Commit 6caf3fb8178699ac14fb94fef99aaf1cf297264f by i
Fix Assembler/disubprogram.ll after e17f52d623cc146b7d9bf5a2e02965043508b4c4
The file was modifiedllvm/test/Assembler/disubprogram.ll
Commit c1f856803142a113fa094411fa4760512b919ef6 by uday
[MLIR] Fix for updating function signature in normalizing memrefs

Normalizing memrefs failed when a caller of symbolic use in a function
can not be casted to `CallOp`. This patch avoids the failure by checking
the result of the casting. If the caller can not be casted to `CallOp`,
it is skipped.

Differential Revision: https://reviews.llvm.org/D87746
The file was modifiedmlir/test/lib/Dialect/Test/TestDialect.h
The file was modifiedmlir/lib/Transforms/NormalizeMemRefs.cpp
The file was modifiedmlir/test/lib/Dialect/Test/TestOps.td
The file was modifiedmlir/test/Transforms/normalize-memrefs-ops.mlir
Commit 6cb0d23f2ea6fb25106b0380797ccbc2141d71e1 by Matthew.Arsenault
AArch64/GlobalISel: Narrow stack passed argument access size

This fixes a verifier error in the testcase from bug 47619.

The stack passed s3 value was widened to 4-bytes, and producing a
4-byte memory access with a < 1 byte result type. We need to either
widen the result type or narrow the access size. This copies the code
directly from the AMDGPU handling, which narrows the load size. I
don't like that every target has to handle this, but this is currently
broken on the 11 release branch and this is the simplest fix.

This reverts commit 42bfa7c63b85e76fe16521d1671afcafaf8f64ed.
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stack-evt-bug47619.ll
Commit 8055ae31f46b0a3fafd7b64f6cd77b78b34e6753 by Adrian Prantl
Revert "Add a verifier check that rejects non-distinct DISubprogram function"

This reverts commit e17f52d623cc146b7d9bf5a2e02965043508b4c4.

while investigating bot breakage.
The file was modifiedllvm/lib/IR/Verifier.cpp
The file was removedllvm/test/Verifier/unique-disubprogram.ll
The file was modifiedllvm/test/DebugInfo/Generic/2009-11-03-InsertExtractValue.ll
Commit 4f1897c6f0082ef968547458b1b7b2fba0bf1590 by hans
Move PassBuilder::registerParseTopLevelPipelineCallback out-of-line

For some mysterious reason it doesn't build with clang-cl when compiled
as part of the includes in clang's CodeGenAction.cpp
The file was modifiedllvm/include/llvm/Passes/PassBuilder.h
The file was modifiedllvm/lib/Passes/PassBuilder.cpp
Commit 3a69ebf0ad018561c79fc52d9d3986fdc21d8d5c by flo
[SCEV] Add another test using info from loop guards for BTC with NE.
The file was modifiedllvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info.ll
Commit 7d274aa9bed00cdf1197b2f05140635be90f3362 by flo
[SCEV] Add support for `x != 0` to CollectCondition.

Add support for NE predicates with 0 constants. Those can be translated
to UMaxExpr(x, 1).
The file was modifiedllvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info.ll
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
Commit 55c4ff91bd820d72014f63dcf7f3d5a0d3397986 by Matthew.Arsenault
OpaquePtr: Add type to sret attribute

Make the corresponding change that was made for byval in
b7141207a483d39b99c2b4da4eb3bb591eca9e1a. Like byval, this requires a
bulk update of the test IR tests to include the type before this can
be mandatory.
The file was modifiedllvm/test/Bitcode/compatibility-4.0.ll
The file was modifiedclang/test/CodeGenCXX/call-with-static-chain.cpp
The file was modifiedclang/test/CodeGen/ppc64-elf-abi.c
The file was modifiedllvm/include/llvm/IR/Attributes.h
The file was modifiedclang/test/CodeGen/riscv64-lp64d-abi.c
The file was modifiedclang/test/CodeGenCXX/trivial_abi.cpp
The file was modifiedclang/test/CodeGenObjCXX/objc-struct-cxx-abi.mm
The file was modifiedclang/test/CodeGen/riscv32-ilp32f-ilp32d-abi.c
The file was modifiedclang/test/CodeGen/arm-swiftcall.c
The file was modifiedllvm/test/Bitcode/compatibility-6.0.ll
The file was modifiedclang/test/CodeGenObjC/objc-non-trivial-struct-nrvo.m
The file was modifiedclang/test/CodeGen/ppc64-qpx-vector.c
The file was modifiedclang/test/CodeGenCXX/x86_64-arguments.cpp
The file was modifiedllvm/lib/IR/AttributeImpl.h
The file was modifiedclang/test/CodeGen/arm-vfp16-arguments.c
The file was modifiedllvm/lib/IR/Attributes.cpp
The file was modifiedclang/test/CodeGen/riscv64-lp64-lp64f-lp64d-abi.c
The file was modifiedclang/test/CodeGenObjC/nontrivial-c-struct-exception.m
The file was modifiedllvm/test/Bitcode/compatibility-3.7.ll
The file was modifiedclang/test/CodeGen/riscv64-lp64-abi.c
The file was modifiedclang/lib/CodeGen/CGCall.cpp
The file was modifiedllvm/test/Bitcode/attributes-3.3.ll
The file was modifiedllvm/lib/AsmParser/LLParser.h
The file was modifiedclang/test/CodeGenCXX/thunks.cpp
The file was modifiedllvm/lib/IR/AsmWriter.cpp
The file was modifiedclang/test/CodeGen/mips64-padding-arg.c
The file was modifiedclang/test/CodeGen/arm-vfp16-arguments2.cpp
The file was modifiedclang/test/CodeGen/riscv32-ilp32-abi.c
The file was modifiedclang/test/CodeGenCXX/microsoft-abi-sret-and-byval.cpp
The file was modifiedclang/test/CodeGen/ppc64le-f128Aggregates.c
The file was modifiedclang/test/CodeGen/X86/x86_32-arguments-iamcu.c
The file was modifiedclang/test/CodeGenCXX/conditional-gnu-ext.cpp
The file was modifiedclang/test/CodeGen/wasm-varargs.c
The file was modifiedclang/test/CodeGenCXX/exceptions.cpp
The file was modifiedclang/test/CodeGenObjC/direct-method.m
The file was modifiedclang/test/CodeGen/blocks.c
The file was modifiedclang/test/CodeGenCXX/cxx1z-copy-omission.cpp
The file was modifiedclang/test/CodeGen/c11atomics-ios.c
The file was modifiedclang/test/CodeGen/X86/x86_64-arguments-nacl.c
The file was modifiedclang/test/CodeGen/ppc64-align-struct.c
The file was modifiedclang/test/CodeGenCXX/cxx1z-lambda-star-this.cpp
The file was modifiedclang/test/CodeGen/le32-arguments.c
The file was modifiedclang/test/CodeGen/ppc64-vector.c
The file was modifiedllvm/test/Bitcode/compatibility-3.6.ll
The file was modifiedclang/test/CodeGenCXX/x86_32-arguments.cpp
The file was modifiedclang/test/CodeGen/arc/arguments.c
The file was modifiedclang/test/CodeGen/renderscript.c
The file was modifiedclang/test/CodeGen/systemz-abi.cpp
The file was modifiedclang/test/CodeGen/arm64_32.c
The file was modifiedclang/test/CodeGenCXX/microsoft-abi-unknown-arch.cpp
The file was modifiedclang/test/CodeGenCXX/pass-by-value-noalias.cpp
The file was modifiedclang/test/CodeGen/windows-struct-abi.c
The file was modifiedclang/test/CodeGenCoroutines/coro-await.cpp
The file was modifiedclang/test/CodeGen/arm-aapcs-vfp.c
The file was modifiedclang/test/CodeGen/X86/x86_64-arguments.c
The file was modifiedclang/test/CodeGen/2006-05-19-SingleEltReturn.c
The file was modifiedclang/test/CodeGenCXX/builtin-source-location.cpp
The file was modifiedclang/test/CodeGen/ppc32-and-aix-struct-return.c
The file was modifiedclang/test/CodeGenCXX/homogeneous-aggregates.cpp
The file was modifiedclang/test/CodeGen/arm64-microsoft-arguments.cpp
The file was modifiedclang/test/CodeGen/riscv32-ilp32f-abi.c
The file was modifiedclang/test/CodeGen/ppc-aggregate-abi.cpp
The file was modifiedclang/test/CodeGenCXX/thiscall-struct-return.cpp
The file was modifiedclang/test/CodeGen/arm-homogenous.c
The file was modifiedllvm/test/Bitcode/highLevelStructure.3.2.ll
The file was modifiedclang/test/CodeGen/riscv32-ilp32-ilp32f-ilp32d-abi.c
The file was modifiedclang/test/CodeGen/lanai-arguments.c
The file was modifiedclang/test/CodeGen/X86/x86_64-arguments-win32.c
The file was modifiedclang/test/CodeGenCXX/unknown-anytype.cpp
The file was modifiedclang/test/CodeGen/struct-passing.c
The file was modifiedclang/test/CodeGen/sparcv9-abi.c
The file was modifiedllvm/lib/Bitcode/Reader/BitcodeReader.cpp
The file was modifiedclang/test/CodeGenCoroutines/coro-gro-nrvo.cpp
The file was modifiedllvm/test/Transforms/Attributor/ArgumentPromotion/sret.ll
The file was modifiedclang/test/CodeGenObjC/stret_lookup.m
The file was modifiedclang/test/CodeGenCXX/temporaries.cpp
The file was modifiedclang/test/CodeGen/X86/x86_32-arguments-darwin.c
The file was modifiedclang/test/CodeGen/mips-zero-sized-struct.c
The file was modifiedclang/test/CodeGen/systemz-inline-asm.c
The file was modifiedclang/test/CodeGenOpenCL/addr-space-struct-arg.cl
The file was modifiedllvm/test/Transforms/Attributor/value-simplify.ll
The file was modifiedclang/test/CodeGen/ms_abi.c
The file was modifiedclang/test/CodeGenCXX/microsoft-abi-cdecl-method-sret.cpp
The file was modifiedclang/test/CodeGenCXX/wasm-args-returns.cpp
The file was modifiedllvm/test/Bitcode/compatibility-5.0.ll
The file was modifiedclang/test/CodeGenCXX/arm-cc.cpp
The file was modifiedclang/test/Modules/templates.mm
The file was modifiedllvm/include/llvm/IR/Attributes.td
The file was modifiedclang/test/CodeGen/systemz-abi-vector.c
The file was modifiedclang/test/CodeGen/ppc64-soft-float.c
The file was modifiedclang/test/CodeGenCXX/microsoft-abi-vmemptr-conflicts.cpp
The file was modifiedclang/test/CodeGen/arm64-arguments.c
The file was modifiedclang/test/CodeGen/aligned-sret.c
The file was modifiedclang/test/CodeGen/riscv32-ilp32d-abi.c
The file was modifiedllvm/include/llvm/IR/Function.h
The file was modifiedclang/test/CodeGen/ppc64le-aggregates.c
The file was modifiedclang/test/CodeGen/64bit-swiftcall.c
The file was modifiedclang/test/CodeGen/arm-neon-vld.c
The file was modifiedclang/test/CodeGenOpenCLCXX/addrspace-of-this.cl
The file was modifiedclang/test/CodeGen/windows-swiftcall.c
The file was modifiedclang/test/CodeGenCXX/matrix-type-builtins.cpp
The file was modifiedclang/test/CodeGenCXX/matrix-type.cpp
The file was modifiedclang/test/CodeGenCXX/lambda-expressions.cpp
The file was modifiedclang/test/CodeGen/arm_neon_intrinsics.c
The file was modifiedclang/test/CodeGenObjC/weak-in-c-struct.m
The file was modifiedllvm/lib/AsmParser/LLParser.cpp
The file was modifiedclang/test/CodeGen/systemz-abi.c
The file was modifiedclang/test/CodeGen/powerpc-c99complex.c
The file was modifiedclang/test/CodeGen/regparm-struct.c
The file was modifiedclang/test/CodeGen/vectorcall.c
The file was modifiedclang/test/CodeGen/c11atomics.c
The file was modifiedclang/test/CodeGenCXX/thunk-returning-memptr.cpp
The file was modifiedclang/test/CodeGen/wasm-arguments.c
The file was modifiedclang/test/CodeGen/aarch64-varargs.c
The file was modifiedclang/test/CodeGenObjC/arc.m
The file was modifiedllvm/test/Bitcode/compatibility-3.9.ll
The file was modifiedclang/test/CodeGen/arm-vector-arguments.c
The file was modifiedclang/test/CodeGenCXX/stack-reuse-miscompile.cpp
The file was modifiedclang/test/CodeGenCXX/microsoft-abi-byval-sret.cpp
The file was modifiedclang/test/CodeGenCXX/stack-reuse.cpp
The file was modifiedllvm/test/Bitcode/compatibility.ll
The file was modifiedllvm/test/Verifier/byref.ll
The file was addedllvm/test/Assembler/sret-type-attr.ll
The file was modifiedclang/test/CodeGenObjC/stret-1.m
The file was modifiedclang/test/CodeGen/arm-varargs.c
The file was modifiedclang/test/CodeGen/mcu-struct-return.c
The file was modifiedclang/test/CodeGenCXX/regcall.cpp
The file was modifiedllvm/test/Bitcode/attributes.ll
The file was modifiedclang/test/CodeGen/aggregate-assign-call.c
The file was modifiedclang/test/CodeGen/mingw-long-double.c
The file was modifiedclang/test/CodeGen/riscv64-lp64-lp64f-abi.c
The file was modifiedllvm/test/Bitcode/compatibility-3.8.ll
The file was modifiedllvm/docs/ReleaseNotes.rst
The file was modifiedclang/test/CodeGen/riscv32-ilp32-ilp32f-abi.c
The file was modifiedclang/test/CodeGenCXX/microsoft-abi-byval-thunks.cpp
The file was modifiedclang/test/CodeGenCXX/microsoft-abi-eh-cleanups.cpp
The file was modifiedllvm/docs/LangRef.rst
The file was modifiedclang/test/CodeGenOpenCL/amdgpu-abi-struct-coerce.cl
Commit d2f1f530430e9dbdd69c3ed173ced076f4bb933e by SourabhSingh.Tomar
[flang][OpenMP] Place the insertion point to the start of the block

After skeleton of the `Parallel Op` is created set the insertion point to start of the block. So that later `CodeGen` can proceed.

Note: This patch reflects the work that can be upstreamed from PR(merged)
PR: https://github.com/flang-compiler/f18-llvm-project/pull/424

Reviewed By: schweitz, kiranchandramohan

Differential Revision: https://reviews.llvm.org/D88221
The file was modifiedflang/lib/Lower/OpenMP.cpp
Commit 06104cb9f21d3f4b0f0feba7b35744284203164c by clementval
[NFC] Fix comment for DataOp
The file was modifiedmlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
Commit e4e673e75a067236c9c4ff2e1ab19d6a3a87003d by jezng
[lld-macho] Implement support for PIC

* Implement rebase opcodes. Rebase opcodes tell dyld where absolute
  addresses have been encoded in the binary. If the binary is not loaded
  at its preferred address, dyld has to rebase these addresses by adding
  an offset to them.
* Support `-pie` and use it to test rebase opcodes.

This is necessary for absolute address references in dylibs, bundles etc
to work.

Reviewed By: #lld-macho, gkm

Differential Revision: https://reviews.llvm.org/D87199
The file was modifiedlld/MachO/SyntheticSections.cpp
The file was modifiedlld/MachO/Config.h
The file was modifiedlld/MachO/Writer.cpp
The file was modifiedlld/MachO/Arch/X86_64.cpp
The file was modifiedlld/test/MachO/dylink-lazy.s
The file was addedlld/test/MachO/compact-unwind-pie.s
The file was modifiedlld/test/MachO/local-got.s
The file was modifiedlld/MachO/SyntheticSections.h
The file was modifiedlld/MachO/Driver.cpp
The file was modifiedlld/test/MachO/x86-64-reloc-unsigned.s
Commit f23f5126912b7da3f2a118a7cb1bcf6be3d8c1bc by jezng
[lld-macho] Support -bundle

Not 100% sure but it appears that bundles are almost identical to
dylibs, aside from the fact that they do not contain `LC_ID_DYLIB`. ld64's code
seems to treat bundles and dylibs identically in most places.

Supporting bundles allows us to run e.g. XCTests, as all test suites are
compiled into bundles which get dynamically loaded by the `xctest` test runner.

Reviewed By: #lld-macho, smeenai

Differential Revision: https://reviews.llvm.org/D87856
The file was modifiedlld/MachO/Writer.cpp
The file was modifiedlld/test/MachO/load-commands.s
The file was modifiedlld/MachO/Driver.cpp
Commit c7c9776f77712eb4311708d884c0c70ccaa7125b by jezng
[lld-macho] Allow the entry symbol to be dynamically bound

Apparently this is used in real programs. I've handled this by reusing
the logic we already have for branch (function call) relocations.

Reviewed By: #lld-macho, smeenai

Differential Revision: https://reviews.llvm.org/D87852
The file was modifiedlld/MachO/SyntheticSections.h
The file was modifiedlld/test/MachO/entry-symbol.s
The file was modifiedlld/MachO/Writer.cpp
The file was modifiedlld/MachO/SyntheticSections.cpp
The file was modifiedlld/MachO/Arch/X86_64.cpp
The file was modifiedlld/MachO/Driver.cpp
Commit 62a3f0c9844bb89a48173440145b26212be60f83 by jezng
[lld-macho] Support absolute symbols

They operate like Defined symbols but with no associated InputSection.

Note that `ld64` seems to treat the weak definition flag like a no-op for
absolute symbols, so I have replicated that behavior.

Reviewed By: #lld-macho, smeenai

Differential Revision: https://reviews.llvm.org/D87909
The file was addedlld/test/MachO/invalid/abs-duplicate.s
The file was modifiedlld/MachO/ExportTrie.cpp
The file was modifiedlld/test/MachO/invalid/dso-handle-duplicate.s
The file was modifiedlld/MachO/SymbolTable.cpp
The file was modifiedlld/MachO/SyntheticSections.cpp
The file was modifiedlld/MachO/Symbols.h
The file was addedlld/test/MachO/abs-symbols.s
The file was modifiedlld/MachO/Symbols.cpp
The file was modifiedlld/MachO/InputFiles.cpp
The file was modifiedlld/MachO/InputFiles.h
Commit 643ec67a64ad7a686361b1d309e5088ad8f228e9 by jezng
[lld-macho] Always include custom syslibroot when running tests

This greatly reduces the amount of boilerplate in our tests.

Reviewed By: #lld-macho, compnerd

Differential Revision: https://reviews.llvm.org/D87960
The file was modifiedlld/test/MachO/symbol-order.s
The file was modifiedlld/test/MachO/invalid/invalid-fat-narch.s
The file was modifiedlld/test/MachO/rpath.s
The file was modifiedlld/test/MachO/force-load.s
The file was modifiedlld/test/MachO/no-unneeded-dyld-info.s
The file was modifiedlld/test/MachO/invalid/missing-dylib.s
The file was modifiedlld/test/MachO/tlv-dylib.s
The file was modifiedlld/test/MachO/weak-definition-direct-fetch.s
The file was modifiedlld/test/MachO/common-symbol-coalescing.s
The file was modifiedlld/test/MachO/invalid/invalid-relocation-length.yaml
The file was modifiedlld/test/MachO/invalid/order-file-bad-arch.test
The file was modifiedlld/test/MachO/invalid/no-such-file.s
The file was modifiedlld/test/MachO/headerpad.s
The file was modifiedlld/test/MachO/sectcreate.s
The file was modifiedlld/test/MachO/nonweak-definition-override.s
The file was modifiedlld/test/MachO/invalid/dso-handle-duplicate.s
The file was modifiedlld/test/MachO/invalid/duplicate-symbol.s
The file was modifiedlld/test/MachO/section-merge.s
The file was modifiedlld/test/MachO/invalid/no-filelist.s
The file was modifiedlld/test/MachO/dylink-lazy.s
The file was modifiedlld/test/MachO/invalid/bad-tlv-def.s
The file was modifiedlld/test/MachO/load-commands.s
The file was modifiedlld/test/MachO/export-trie.s
The file was modifiedlld/test/MachO/invalid/abs-duplicate.s
The file was modifiedlld/test/MachO/invalid/stub-link.s
The file was modifiedlld/test/MachO/reexport-stub.s
The file was modifiedlld/test/MachO/subsections-section-relocs.s
The file was modifiedlld/test/MachO/arch.s
The file was modifiedlld/test/MachO/invalid/order-file-bad-objfile.test
The file was modifiedlld/test/MachO/framework.s
The file was modifiedlld/test/MachO/abs-symbols.s
The file was modifiedlld/test/MachO/static-link.s
The file was modifiedlld/test/MachO/invalid/reserved-section-name.s
The file was modifiedlld/test/MachO/subsections-symbol-relocs.s
The file was modifiedlld/test/MachO/filelist.s
The file was modifiedlld/test/MachO/resolution.s
The file was modifiedlld/test/MachO/syslibroot.test
The file was modifiedlld/test/MachO/weak-definition-over-dysym.s
The file was modifiedlld/test/MachO/weak-import.s
The file was modifiedlld/test/MachO/x86-64-reloc-unsigned.s
The file was modifiedlld/test/MachO/objc.s
The file was modifiedlld/test/MachO/sub-library.s
The file was modifiedlld/test/MachO/common-symbol-resolution.s
The file was modifiedlld/test/MachO/order-file.s
The file was modifiedlld/test/MachO/fat-arch.s
The file was modifiedlld/test/MachO/entry-symbol.s
The file was modifiedlld/test/MachO/bss.s
The file was modifiedlld/test/MachO/link-search-order.s
The file was modifiedlld/test/MachO/invalid/bad-tlv-relocation.s
The file was modifiedlld/test/MachO/invalid/invalid-fat-offset.s
The file was modifiedlld/test/MachO/invalid/bad-got-to-dylib-tlv-reference.s
The file was modifiedlld/test/MachO/weak-definition-order.s
The file was modifiedlld/test/MachO/compact-unwind-pie.s
The file was modifiedlld/test/MachO/compact-unwind.test
The file was modifiedlld/test/MachO/indirect-symtab.s
The file was modifiedlld/test/MachO/invalid/bad-archive.s
The file was modifiedlld/test/MachO/local-got.s
The file was modifiedlld/test/MachO/search-paths.test
The file was modifiedlld/test/MachO/weak-binding.s
The file was modifiedlld/test/MachO/lc-build-version.s
The file was addedlld/test/MachO/lit.local.cfg
The file was modifiedlld/test/MachO/invalid/invalid-stub.s
The file was modifiedlld/test/MachO/platform-version.s
The file was modifiedlld/test/MachO/relocations.s
The file was modifiedlld/test/MachO/segments.s
The file was modifiedlld/test/MachO/symtab.s
The file was modifiedlld/test/MachO/invalid/bad-got-to-tlv-reference.s
The file was modifiedlld/test/MachO/archive.s
The file was modifiedlld/test/MachO/x86-64-reloc-got-load.s
The file was modifiedlld/test/MachO/invalid/no-id-dylink.yaml
The file was modifiedlld/test/MachO/invalid/alignment-too-large.yaml
The file was modifiedlld/test/MachO/x86-64-reloc-signed.s
The file was modifiedlld/test/MachO/dylink.s
The file was modifiedlld/test/MachO/invalid/invalid-executable.s
The file was modifiedlld/test/MachO/stub-link.s
The file was modifiedlld/test/MachO/tlv.s
The file was modifiedlld/test/MachO/silent-ignore.test
The file was modifiedlld/test/MachO/dylib.s
The file was modifiedlld/test/MachO/stub-framework.s
The file was modifiedlld/test/MachO/dso-handle.s
The file was modifiedlld/test/MachO/invalid/bad-tlv-opcode.s
The file was modifiedlld/test/MachO/invalid/archive-no-index.s
The file was modifiedlld/test/MachO/invalid/invalid-relocation-pcrel.yaml
The file was modifiedlld/test/MachO/section-headers.s
The file was modifiedlld/test/MachO/invalid/undefined-symbol.s
The file was modifiedlld/test/MachO/linkedit-contiguity.s
The file was modifiedlld/test/MachO/weak-header-flags.s
The file was modifiedlld/test/MachO/weak-definition-indirect-fetch.s
The file was modifiedlld/test/MachO/no-exports-dylib.s
Commit 2c2a7494482133ecdd681869e1ccc53b71d27385 by jezng
[lld-macho] Ignore a few more undocumented flags

Reviewed By: #lld-macho, compnerd

Differential Revision: https://reviews.llvm.org/D88268
The file was modifiedlld/MachO/Options.td
The file was modifiedlld/test/MachO/silent-ignore.test
Commit d2166076b882e38becf3657ea830ffd2b6a5695e by xun
[Coroutine] Split PHI Nodes in `cleanuppad` blocks in a way that obeys EH pad rules

Issue Details:
In order to support coroutine splitting, any multi-value PHI node in a coroutine is split into multiple blocks with single-value PHI Nodes, which then allows a subsequent transform to generate `reload` instructions as required (i.e., to reload the value if required if the coroutine has been resumed). This causes issues with EH pads (`catchswitch` and `catchpad`) as all pads within a `catchswitch` must have the same unwind destination, but the coroutine splitting logic may modify them to each have a unique unwind destination if there is a PHI node in the unwind `cleanuppad` that is set from values in the `catchswitch` and `cleanuppad` blocks.

Fix Details:
During splitting, if such a PHI node is detected, then create a "dispatcher" `cleanuppad` as well as the blocks with single-value PHI Nodes: thus the "dispatcher" is the unwind destination and it will detect which predecessor called it and then branch to the appropriate single-value PHI node block, which will then branch back to the original `cleanuppad` block.

Reviewed By: GorNishanov, lxfind

Differential Revision: https://reviews.llvm.org/D88059
The file was modifiedllvm/lib/Transforms/Coroutines/CoroFrame.cpp
The file was addedllvm/test/Transforms/Coroutines/coro-catchswitch-cleanuppad.ll
Commit 89fe083c197951a1380ee70e9e36e2aa95659da5 by tlively
[WebAssembly] Check features before making SjLj vars thread-local

1c5a3c4d3823 updated the variables inserted by Emscripten SjLj lowering to be
thread-local, depending on the CoalesceFeaturesAndStripAtomics pass to downgrade
them to normal globals if the target features did not support TLS. However, this
had the unintended side effect of preventing all non-TLS-supporting objects from
being linked into modules with shared memory, because stripping TLS marks an
object as thread-unsafe. This patch fixes the problem by only making the SjLj
lowering variables thread-local if the target machine supports TLS so that it
never introduces new usage of TLS that will be stripped. Since SjLj lowering
works on Modules instead of Functions, this required that the
WebAssemblyTargetMachine have its feature string updated to reflect the
coalesced features collected from all the functions so that a
WebAssemblySubtarget can be created without using any particular function.

Differential Revision: https://reviews.llvm.org/D88323
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
The file was modifiedllvm/test/CodeGen/WebAssembly/lower-em-exceptions.ll
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h
The file was modifiedllvm/include/llvm/Target/TargetMachine.h
The file was modifiedllvm/test/CodeGen/WebAssembly/lower-em-sjlj.ll
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
Commit 6cd4a4cd02dba6aed33c447114587eebf6854c43 by Jonas Devlieghere
[lldb] Pass reference instead of pointer in protected SBAddress methods.

Every call to the protected SBAddress constructor and the SetAddress
method takes the address of a valid object which means we might as well
pass it as a const reference instead of a pointer and drop the null

Differential revision: https://reviews.llvm.org/D88249
The file was modifiedlldb/source/API/SBFrame.cpp
The file was modifiedlldb/source/API/SBValue.cpp
The file was modifiedlldb/source/API/SBLineEntry.cpp
The file was modifiedlldb/source/API/SBBreakpointLocation.cpp
The file was modifiedlldb/include/lldb/API/SBAddress.h
The file was modifiedlldb/source/API/SBSymbol.cpp
The file was modifiedlldb/source/API/SBFunction.cpp
The file was modifiedlldb/source/API/SBInstruction.cpp
The file was modifiedlldb/source/API/SBQueueItem.cpp
The file was modifiedlldb/source/API/SBAddress.cpp
Commit 137597d4f47854bb1701f6883d5c91e8a14d29a2 by Adrian Prantl
Add a verifier check that rejects non-distinct DISubprogram function
attachments. They would crash the backend, which expects all
DISubprograms that are not part of the type system to have a unit field.

Clang right before https://reviews.llvm.org/D79967 would generate this
kind of broken IR.


Thanks to Fangrui for fixing an assembler test I had missed!

The file was modifiedllvm/test/DebugInfo/Generic/2009-11-03-InsertExtractValue.ll
The file was addedllvm/test/Verifier/unique-disubprogram.ll
The file was modifiedllvm/lib/IR/Verifier.cpp
Commit d3f6972abb9c0ac06ddabf61697754c3c6f5d11b by aeubanks
[LoopReroll][NewPM] Port -loop-reroll to NPM

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D87957
The file was modifiedllvm/lib/Passes/PassRegistry.def
The file was addedllvm/include/llvm/Transforms/Scalar/LoopReroll.h
The file was modifiedllvm/include/llvm/InitializePasses.h
The file was modifiedllvm/lib/Passes/PassBuilder.cpp
The file was modifiedllvm/lib/Transforms/Scalar/LoopRerollPass.cpp
The file was modifiedllvm/lib/Transforms/Scalar/Scalar.cpp
The file was modifiedllvm/test/Transforms/LoopReroll/basic.ll
Commit 2a0ca17f66f7776ade251fd40dc9a4f981b2a673 by llvm-dev
[InstCombine] collectBitParts - add fshl/fshr handling

Pulled from D87452, this is a fixed version of the collectBitParts fshl/fshr handling which as @nikic noticed wasn't checking for different providers or had correct bit ordering (which was hid by only testing shift amounts of bitwidth/2).

Differential Revision: https://reviews.llvm.org/D88292
The file was modifiedllvm/lib/Transforms/Utils/Local.cpp
The file was modifiedllvm/test/Transforms/InstCombine/bswap.ll
Commit 15645d044bcfe2a0f63156048b302f997a717688 by andrew.litteken
[IRSim] Adding basic implementation of llvm-sim.

This is a similarity visualization tool that accepts a Module and
passes it to the IRSimilarityIdentifier.  The resulting SimilarityGroups
are output in a JSON file.

Tests are found in test/tools/llvm-sim and check for the file not found,
a bad module, and that the JSON is created correctly.

Reviewers: paquette, jroelofs

Differential Revision: https://reviews.llvm.org/D86974
The file was addedllvm/test/tools/llvm-sim/single-sim.test
The file was addedllvm/test/tools/llvm-sim/fail-cases.test
The file was addedllvm/test/tools/llvm-sim/single-sim-file.test
The file was addedllvm/tools/llvm-sim/llvm-sim.cpp
The file was addedllvm/tools/llvm-sim/CMakeLists.txt
The file was addedllvm/tools/llvm-sim/LLVMBuild.txt
The file was addedllvm/test/tools/llvm-sim/Inputs/sim1.ll
The file was modifiedllvm/tools/LLVMBuild.txt
Commit 994ef4e7bb22ccdc871ee876207e529ed118f114 by llvm-dev
[InstCombine] Fix test name to match type. NFCI.

We're testing a <2 x i36> not <2 x i16>
The file was modifiedllvm/test/Transforms/InstCombine/rotate.ll
Commit 9ff9c1d8ee1d412f088b0fc9ea1b5c2cffe95c88 by llvm-dev
[InstCombine] matchRotate - support (uniform) constant rotation amounts (PR46895)

This patch adds handling of rotation patterns with constant shift amounts - the next bit will be how we want to support non-uniform constant vectors.

Differential Revision: https://reviews.llvm.org/D87452
The file was modifiedllvm/test/Transforms/InstCombine/or-concat.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
The file was modifiedllvm/test/Transforms/InstCombine/rotate.ll
The file was modifiedllvm/test/Transforms/InstCombine/bswap.ll
The file was modifiedllvm/test/Transforms/InstCombine/fsh.ll
Commit 7fa464f33d723051850f1d5785a93d5d2d6cd58f by llvm-dev
Fix copy+paste typo in doxygen parameter name to fix Wdocumentation. NFCI.
The file was modifiedllvm/include/llvm/Analysis/IRSimilarityIdentifier.h
Commit 69c6f6be07e4db11f2aca91ad7bbc0db1e9044d6 by andrew.litteken
Revert "[IRSim] Adding basic implementation of llvm-sim."

This reverts commit 15645d044bcfe2a0f63156048b302f997a717688.
The file was removedllvm/test/tools/llvm-sim/fail-cases.test
The file was removedllvm/test/tools/llvm-sim/single-sim-file.test
The file was removedllvm/tools/llvm-sim/llvm-sim.cpp
The file was removedllvm/test/tools/llvm-sim/single-sim.test
The file was removedllvm/tools/llvm-sim/LLVMBuild.txt
The file was removedllvm/tools/llvm-sim/CMakeLists.txt
The file was modifiedllvm/tools/LLVMBuild.txt
The file was removedllvm/test/tools/llvm-sim/Inputs/sim1.ll
Commit a83eb048cb9a75da7a07a9d5318bbdbf54885c87 by mvanotti
[lsan] Add interceptor for pthread_detach.

This commit adds an interceptor for the pthread_detach function,
calling into ThreadRegistry::DetachThread, allowing for thread contexts
to be reused.

Without this change, programs may fail when they create more than 8K

Fixes: https://bugs.llvm.org/show_bug.cgi?id=47389

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D88184
The file was modifiedcompiler-rt/lib/lsan/lsan_thread.cpp
The file was addedcompiler-rt/test/lsan/TestCases/many_threads_detach.cpp
The file was modifiedcompiler-rt/lib/lsan/lsan_interceptors.cpp
The file was modifiedcompiler-rt/lib/lsan/lsan_thread.h
Commit 1bec6eb3f5cba594698bae5b2789744e0c8ee5f2 by Jason Molenda
Add support for firmware/standalone LC_NOTE "main bin spec" corefiles

When a Mach-O corefile has an LC_NOTE "main bin spec" for a
standalone binary / firmware, with only a UUID and no load
address, try to locate the binary and dSYM by UUID and if
found, load it at offset 0 for the user.

Add a test case that tests a firmware/standalone corefile
with both the "kern ver str" and "main bin spec" LC_NOTEs.


Differential Revision: https://reviews.llvm.org/D88282
The file was modifiedlldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
The file was addedlldb/test/API/macosx/lc-note/firmware-corefile/Makefile
The file was addedlldb/test/API/macosx/lc-note/firmware-corefile/TestFirmwareCorefiles.py
The file was modifiedlldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.h
The file was modifiedlldb/source/Plugins/Process/mach-core/ProcessMachCore.cpp
The file was addedlldb/test/API/macosx/lc-note/firmware-corefile/create-empty-corefile.cpp
The file was addedlldb/test/API/macosx/lc-note/firmware-corefile/bout.mk
The file was addedlldb/test/API/macosx/lc-note/firmware-corefile/main.c
The file was modifiedlldb/include/lldb/Symbol/ObjectFile.h
Commit 152ff3772c2bc4463555fb5dbb75f9b0dcc700f5 by Vitaly Buka
[msan] Skip memcpy interceptor called by gethostname

No test as reproducer requires particular glibc build.

Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D88284
The file was modifiedcompiler-rt/lib/msan/tests/msan_test.cpp
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_errno_codes.h
The file was modifiedcompiler-rt/lib/msan/msan_interceptors.cpp
Commit 58cdbf518b6ebaee59d0492375e2e8f7da87ca41 by Saleem Abdulrasool
Sema: add support for `__attribute__((__swift_private__))`

This attribute allows declarations to be restricted to the framework
itself, enabling Swift to remove the declarations when importing
libraries.  This is useful in the case that the functions can be
implemented in a more natural way for Swift.

This is based on the work of the original changes in

Differential Revision: https://reviews.llvm.org/D87720
Reviewed By: Aaron Ballman
The file was modifiedclang/include/clang/Basic/AttrDocs.td
The file was modifiedclang/include/clang/Basic/Attr.td
The file was modifiedclang/lib/Sema/SemaDeclAttr.cpp
The file was addedclang/test/AST/attr-swift_private.m
The file was addedclang/test/SemaObjC/attr-swift_private.m
Commit b65966cff65bfb66de59621347ffd97238d3f645 by jingham
Add the ability to write target stop-hooks using the ScriptInterpreter.

Differential Revision: https://reviews.llvm.org/D88123
The file was modifiedlldb/bindings/python/python-wrapper.swig
The file was modifiedlldb/source/Commands/CommandObjectTarget.cpp
The file was addedlldb/test/API/commands/target/stop-hooks/TestStopHookScripted.py
The file was modifiedlldb/source/Symbol/SymbolContext.cpp
The file was modifiedlldb/include/lldb/Target/Target.h
The file was modifiedlldb/docs/use/python-reference.rst
The file was modifiedlldb/include/lldb/Interpreter/ScriptInterpreter.h
The file was modifiedlldb/bindings/python/python-swigsafecast.swig
The file was addedlldb/test/Shell/Commands/Inputs/stop_hook.py
The file was addedlldb/test/Shell/Commands/command-stop-hook-output.test
The file was addedlldb/test/API/commands/target/stop-hooks/stop_hook.py
The file was modifiedlldb/unittests/ScriptInterpreter/Python/PythonTestSuite.cpp
The file was modifiedlldb/test/API/commands/target/stop-hooks/TestStopHooks.py
The file was modifiedlldb/include/lldb/Symbol/SymbolContext.h
The file was modifiedlldb/source/Target/Target.cpp
The file was modifiedlldb/source/Commands/Options.td
The file was modifiedlldb/test/API/commands/target/stop-hooks/main.c
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h
Commit 4600e210514281d2ac049e1c46d3f10bd17bf25c by efriedma
[AArch64][SVE] Drop "argmemonly" from gather/scatter with vector base.

The intrinsics don't have any pointer arguments, so "argmemonly" makes
optimizations think they don't write to memory at all.

Differential Revision: https://reviews.llvm.org/D88186
The file was modifiedllvm/include/llvm/IR/IntrinsicsAArch64.td
The file was modifiedllvm/test/Transforms/LICM/AArch64/sve-load-hoist.ll
Commit 48961ba0de3c556b092d434bd86583401495f101 by efriedma
[TRE][NFC] Refactor Basic Block Processing

Simplify and improve readability.

Differential Revision: https://reviews.llvm.org/D82269
The file was modifiedllvm/lib/Transforms/Scalar/TailRecursionElimination.cpp
Commit 51cad041e0cb26597c7ccc0fbfaa349b8fffbcda by efriedma
C API: functions to get mask of a ShuffleVector

This commit fixes a regression (from LLVM 10 to LLVM 11 RC3) in the LLVM

Previously, commit 1ee6ec2bf removed the mask operand from the
ShuffleVector instruction, storing the mask data separately in the
instruction instead; this reduced the number of operands of
ShuffleVector from 3 to 2. AFAICT, this change unintentionally caused
a regression in the LLVM C API. Specifically, it is no longer possible
to get the mask of a ShuffleVector instruction through the C API. This
patch introduces new functions which together allow a C API user to get
the mask of a ShuffleVector instruction, restoring the functionality
which was previously available through LLVMGetOperand().

This patch also adds tests for this change to the llvm-c-test
executable, which involved adding support for InsertElement,
ExtractElement, and ShuffleVector itself (as well as constant vectors)
to echo.cpp. Previously, vector operations weren't tested at all in

I also fixed some typos in comments and help-text nearby these changes,
which I happened to spot while developing this patch. Since the typo
fixes are technically unrelated other than being in the same files, I'm
happy to take them out if you'd rather they not be included in the patch.

Differential Revision: https://reviews.llvm.org/D88190
The file was modifiedllvm/include/llvm-c/Core.h
The file was modifiedllvm/lib/IR/Core.cpp
The file was modifiedllvm/tools/llvm-c-test/echo.cpp
The file was modifiedllvm/tools/llvm-c-test/main.c
The file was modifiedllvm/test/Bindings/llvm-c/echo.ll
Commit 8bd205bf1de486a32abd956390f6527da4c13e33 by aqjune
[LangRef] Clarify the behavior of memory access instructions when pointers/sizes aren't well-defined

This is a patch to LangRef that clarifies the behavior of load/store/memset/memcpy/memmove when the pointers or sizes are not well-defined
as well.

MSan detects a case when e.g., only lower bits of address are garbage when `-msan-check-access-address` is enabled, and it does not directly conflict with this patch because a C program should not use a pointer with undef bits and reasonable optimizations do not convert a well-defined pointer into a pointer with undef bits.

This patch contains a definition of a well-defined value as well.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D87994
The file was modifiedllvm/docs/LangRef.rst
Commit 0291c471aad4bf8422405586e2bf80cb8df25980 by ebahapo
[RISCV] Fix formatting (NFC)
The file was modifiedllvm/lib/Target/RISCV/RISCV.td
The file was modifiedllvm/lib/Target/RISCV/RISCVSchedRocket.td
The file was modifiedllvm/lib/Target/RISCV/RISCVSchedule.td
Commit b5f46534c4dd5ac32bc3b63685de1d66eec96595 by craig.topper
[IR] Improve the description for Constant::isNormalFP to list all things that are not normal instead of just denormal. NFC
The file was modifiedllvm/include/llvm/IR/Constant.h
Commit 97702c3d9234ddc7dd39d4d107c8bec8765746ce by alexshap
[Object][MachO] Refine the interface of Slice

This patch performs a minor cleanup of the class Slice:
static methods and constructors which take a pointer but assume that
it's not null now take the argument by reference.

Test plan: make check-all

Differential revision: https://reviews.llvm.org/D88320
The file was modifiedllvm/tools/llvm-lipo/llvm-lipo.cpp
The file was modifiedllvm/lib/Object/MachOUniversalWriter.cpp
The file was modifiedllvm/tools/llvm-libtool-darwin/llvm-libtool-darwin.cpp
The file was modifiedllvm/include/llvm/Object/MachOUniversalWriter.h
Commit 764c1b7a4db1606438c8daea13c9d2a18190a865 by ebahapo
[RISCV] Scheduler description for Bullet

Add the pipeline model for the RISC-V Bullet micro architecture.

Co-authored-by: Evandro Menezes <evandro.menezes@sifive.com>
The file was modifiedllvm/lib/Target/RISCV/RISCV.td
The file was addedllvm/lib/Target/RISCV/RISCVSchedBullet.td
The file was modifiedllvm/include/llvm/Support/RISCVTargetParser.def
Commit a000580a89718a1ff27a3129e34367b9a3fa1730 by ebahapo
[RISCV] Update driver tests

Add the RISC-V Bullet core to the driver tests.
The file was modifiedclang/test/Driver/riscv-cpus.c
The file was modifiedclang/test/Misc/target-invalid-cpu-note.c
Commit 67782a0f99c6a792c9d60267d42b21f7335814ba by i
[lldb/bindings] Fix -Wformat after D88123
The file was modifiedlldb/bindings/python/python-wrapper.swig
Commit 2dba5461be2d1b35e8461a60a2149281b42fea48 by Amara Emerson
[AArch64][GlobalISel] Add a few more vector type combinations for shift selection.
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/select-vector-shift.mir
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
Commit 83e3ea2cfce69d2b2b4b831ca78335c349df4fdd by aeubanks
[LowerTypeTests][NewPM] Add constructor that uses command line flags

This matches the legacy PM pass by having one constructor use command
line flags, and the other use parameters to the pass.

This fixes all tests under Transforms/LowerTypeTests using NPM.

Reviewed By: ychen, pcc

Differential Revision: https://reviews.llvm.org/D87845
The file was modifiedllvm/test/Transforms/LowerTypeTests/simple.ll
The file was modifiedllvm/include/llvm/Transforms/IPO/LowerTypeTests.h
The file was modifiedllvm/lib/Passes/PassRegistry.def
The file was modifiedllvm/lib/Transforms/IPO/LowerTypeTests.cpp
Commit 546e460a00a985ce6fca323fe509f7d4e893b621 by Amara Emerson
[AArch64][GlobalISel] If a G_BUILD_VECTOR operands are all G_CONSTANT then assign to gpr bank.

Even if the type is s8/s16, assigning to gpr is preferable with constants because
worst case we can select via a constant pool load, and without cross-bank copies
to the FPR bank more patterns can be imported later.
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
The file was modifiedllvm/test/CodeGen/AArch64/arm64-vabs.ll
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/regbankselect-build-vector.mir