Changes

Summary

  1. [zorg] Add buildbot for Synopsys ARC (details)
  2. [zorg] Build and test project depends on project enabled in LibcxxAndAbiBuilder (details)
  3. Fixed bug introduced by D100497 - local variable jobs_flag referenced before assignment. (details)
  4. [zorg] Fix AnnotatedBuilder.py extra_args bug (details)
  5. Bumped urllib3 from 1.26.3 to 1.26.4. (details)
  6. Added enable_runtimes and enable_projects to LLVMBuildFactory. (details)
  7. Added support for LLVM_ENABLE_RUNTIMES to UnifiedTreeBuilder. (details)
  8. Documentation builds do not support LLVM_ENABLE_RUNTIMES. (details)
  9. Added support for LLVM_ENABLE_RUNTIMES to ClangLTOBuilder. (details)
  10. Changed LibcxxAndAbiBuilder to use LLVMBuildFactory enable_projects and enable_runtimes. (details)
Commit 41979ca6ea64a4f9a46675af188634d4fb40fa75 by danila
[zorg] Add buildbot for Synopsys ARC

Create AWS worker for LLVM Experimental Target : ARC

Reviewed By: gkistanova

Differential Revision: https://reviews.llvm.org/D101345
The file was modifiedbuildbot/osuosl/master/config/builders.py (diff)
The file was modifiedbuildbot/osuosl/master/config/workers.py (diff)
The file was modifiedbuildbot/osuosl/master/config/status.py (diff)
Commit c5e33710b23442d929d6646c71e1e31d0de2f106 by Xiangling.Liao
[zorg] Build and test project depends on project enabled in LibcxxAndAbiBuilder

Build and test project depends on project enabled in LibcxxAndAbiBuilder;
Let all steps respect env passed in;

Differential Revision: https://reviews.llvm.org/D100497
The file was modifiedzorg/buildbot/builders/LibcxxAndAbiBuilder.py (diff)
Commit 9710f7832a344854c51248164a0a4c55f2b6c1d1 by gkistanova
Fixed bug introduced by D100497 - local variable jobs_flag referenced before assignment.
The file was modifiedzorg/buildbot/builders/LibcxxAndAbiBuilder.py (diff)
Commit b766b0b8afb3cf857a9b0314aa807786d00372ee by enye.shi
[zorg] Fix AnnotatedBuilder.py extra_args bug

Do not assign WithProperties("--jobs=%(jobs:-)s") to
extra_args, because extra_args_with_props will perform
WithProperties(...) on all of the args in extra_args.

Reviewed By: tra

Differential Revision: https://reviews.llvm.org/D101575
The file was modifiedzorg/buildbot/builders/AnnotatedBuilder.py (diff)
Commit de05587afe1c1f79810a27ad77e39c485995dd98 by gkistanova
Bumped urllib3 from 1.26.3 to 1.26.4.
The file was modifiedrequirements.txt (diff)
Commit 2ed0c6ae25a4da897f23770f9a4976c3e19fff10 by gkistanova
Added enable_runtimes and enable_projects to LLVMBuildFactory.
The file was modifiedzorg/buildbot/process/factory.py (diff)
Commit 90c0b74c2ee54639b417bbda061c45ba8967ed9f by gkistanova
Added support for LLVM_ENABLE_RUNTIMES to UnifiedTreeBuilder.
The file was modifiedzorg/buildbot/builders/UnifiedTreeBuilder.py (diff)
Commit 4762fe8e3c66b6ca574eb0b5f2cbe99db079e6c7 by gkistanova
Documentation builds do not support LLVM_ENABLE_RUNTIMES.
The file was modifiedzorg/buildbot/builders/SphinxDocsBuilder.py (diff)
The file was modifiedzorg/buildbot/builders/DoxygenDocsBuilder.py (diff)
Commit 1a77335dfe7cff35bc736523ae7d9f801a470739 by gkistanova
Added support for LLVM_ENABLE_RUNTIMES to ClangLTOBuilder.
The file was modifiedzorg/buildbot/builders/ClangLTOBuilder.py (diff)
Commit a138f265e7a4fd9a6bf7288ca50361b4d7c0860f by gkistanova
Changed LibcxxAndAbiBuilder to use LLVMBuildFactory enable_projects and enable_runtimes.
The file was modifiedzorg/buildbot/builders/LibcxxAndAbiBuilder.py (diff)

Summary

  1. [libc++] Support per-target __config_site in per-target runtime build (details)
  2. [LV] Consider Loop Unroll Hints When Making Interleave Decisions (details)
  3. NFC: Run clang-format over llvm-link. (details)
  4. Generalize getInvertibleOperand recurrence handling slightly (details)
  5. [clangd][NFC] Reserve storage when creating semantic token encoding. (details)
  6. [NFC][scudo] Add reference to a QEMU bug (details)
  7. [NFC][SimplifyCFG] SinkCommonCodeFromPredecessors(): reword comment about PR30244 (details)
  8. [NFC][SimplifyCFG] Common code sinking: check profitability once (details)
  9. [NFC][SimplifyCFG] Add test showing that profitability check for sinking is broken (details)
  10. [NFC][SimplifyCFG] Add test for sinking common code with multuple cond predecessors (details)
  11. [SimplifyCFG] Common code sinking: relax restriction on non-uncond predecessors (details)
  12. [analyzer] Wrong type cast occurs during pointer dereferencing after type punning (details)
  13. [BuildLibCalls] Remove inaccessiblememonly inference for calloc (details)
  14. [SimplifyCFG] Common code sinking: fixup variable name (details)
  15. [ConstantMerge] Don't merge thread_local constants with non-thread_local constants (details)
  16. [TableGen] Remove predicate filtering from GenerateVariants. (details)
  17. [llvm-objcopy][MachO] Add support for LC_THREAD/LC_UNIXTHREAD (details)
  18. [mlir] Move PyConcreteType to header. NFC. (details)
  19. [gwp_asan] Use __sanitizer_fast_backtrace on Fuchsia (details)
  20. [mlir][python] Add `destroy` method to PyOperation. (details)
  21. [NFC] Rename SanitizeAddressDtorKind codegen opt to not have `Kind` suffix. (details)
  22. [ASAN] NFC: Copy address space when creating globals with redzones (details)
  23. tsan: increase dense slab alloc capacity (details)
  24. [ASAN] NFC: Use addrspace cast for pointers in non-zero addrspace (details)
  25. tsan: fix warnings in tests (details)
  26. [ARM] Use just ARM::t2B in ARMBlockPlacementPass (details)
  27. [GlobalISel][IRTranslator] Move line zero DebugLoc creation to constant translation. NFC. (details)
  28. [clang-format] Add `SpacesInAngles: Leave` option to keep spacing inside angle brackets as is. (details)
  29. [mlir][Python][Linalg] Adding const, capture, and index support to the OpDSL. (details)
  30. [NewPM] Add an option to dump pass structure (details)
  31. [X32][CET] Fix handling of indirect branches (details)
  32. Follow up of rGddb3b26a1269: added 'requires asserts' to test case. (details)
  33. [mlir][Linalg] Generalize linalg vectorization (details)
  34. [clang-format] Fix build on gcc < 7 introduced in rG9363aa9. (details)
  35. [Utils][vim] Highlight 'vscale' constant (details)
  36. [GlobalISel] Bump CallLoweringInfo::OrigArgs initial size to 32. NFC. (details)
  37. [clang-format] Fix build on gcc < 7 introduced in rG9363aa9. (details)
  38. [MLIR][Shape] Fix `shape.broadcast` to standard lowering (details)
  39. [RISCV] Fix stack slot for argument types (Bug 49500) (details)
  40. [NFC][scudo] Suppress "division by zero" warning (details)
  41. [lldb][AArch64] Don't check for VmFlags in smaps files (details)
  42. [SPE] Support constrained float operations on SPE (details)
  43. Improve error messages for attributes in the wrong context. (details)
  44. [NVPTX] Fix unused var warning with asserts disabled (details)
  45. [mlir] Split out Python bindings entry point into a separate file (details)
  46. [Greedy RA] Replace ll to mir test to make more stable to check an error. (details)
  47. [mlir] Support complex numbers in Linalg promotion (details)
  48. [ARM] Ensure CSINC has one use in CSINV combine (details)
  49. [mlir] Add LinalgTransforms dependency on Complex (details)
  50. [RISCV][NFC] Combine identical RV32 and RV64 test checks (details)
  51. Try to fix bots. We shouldn't be setting the entrybuilder's DL to a null one. (details)
  52. [AMDGPU] Allow buildSpillLoadStore in empty bb (details)
  53. Update libstdc++ hack comment (details)
  54. [mlir] Fix top-level comments (NFC) (details)
  55. [mlir] Affine: parallelize affine loops with reductions (details)
  56. [mlir] support max/min lower/upper bounds in affine.parallel (details)
  57. [AArch64][SVE] Move convert.{from,to}.svbool optimization into InstCombine (details)
  58. [AArch64][SVE] Convert svdup(vec, SV_VL1, elm) to insertelement(vec, elm, 0) (details)
  59. [AArch64][SVE] Use SIMD variant of INSR when scalar is the result of a vector extract (details)
  60. [mlir] fix shared-lib build (details)
  61. [flang][OpenMP] Add semantic checks for strict nesting inside `teams` construct. (details)
  62. [VPlan] Add getVPSingleValue helper. (details)
  63. [OpenCL][Docs] Describe extension for legacy atomics with generic addr space. (details)
  64. [LLVM][OpenMP] Adding support for OpenMP sections construct in OpenMPIRBuilder (details)
  65. [OpenCL][Docs] Misc updates to C++ for OpenCL and offline compilation (details)
  66. Unbreak no-asserts testing (details)
  67. [Clang][OpenMP] Frontend work for sections - D89671 (details)
  68. [AMDGPU] Add a v_swap_b32 test case to be fixed (details)
  69. Revert "[LV] Calculate max feasible scalable VF." (details)
  70. [RISCV] Teach computeKnownBits that vsetvli returns number less than 2^31. (details)
  71. [RISCV] Enable SPLAT_VECTOR for fixed vXi64 types on RV32. (details)
  72. [ELF] Support .rela.eh_frame with unordered r_offset values (details)
  73. [AsmParser][SystemZ][z/OS] Reject "Dot" as current PC on z/OS (details)
  74. [ADT] fix typo in code block comment; NFC (details)
  75. [ConstantFolding] refactor helper for vector reductions; NFC (details)
  76. [ConstProp] add tests for vector reductions of poison; NFC (details)
  77. [DebugInfo] Add tests that we emit .eh_frame instead of .debug_frame (details)
  78. [unittest] Fix Frontend/OpenMPIRBuilderTest.cpp -Wsign-compare after D89671 (details)
  79. [COST] Improve shuffle kind detection if shuffle mask is provided. (details)
  80. [RISCV] Add test cases for D101485. NFC (details)
  81. [RISCV] Teach DAG combine to fold (and (select_cc lhs, rhs, cc, -1, c), x) -> (select_cc lhs, rhs, cc, x, (and, x, c)) (details)
  82. [scudo] Use require_constant_initialization (details)
  83. [libcxx] [test] Include more libraries that normally are linked automatically (details)
  84. [ConstantFolding] propagate poison through vector reduction intrinsics (details)
  85. Revert "[scudo] Use require_constant_initialization" (details)
  86. Revert "[X86] Support AMX fast register allocation" (details)
  87. [gn build] Port df323ba445f7 (details)
  88. [lldb] Make the NSSet formatter faster and less prone to infinite recursion (details)
  89. [CMake] Set correct CXX_FLAGS for relative-vtables variants (details)
  90. [libc++] Fixes std::to_chars for bases != 10. (details)
  91. [lld][WebAssembly] Add `--export-if-defined` (details)
  92. [SimplifyCFG] Common code sinking: fix application of profitability check (details)
  93. [AIX][TLS] Add ASM portion changes to support TLSGD relocations to XCOFF objects (details)
  94. RegAlloc: do not consider liveins to EH-pad successors as liveout. (details)
  95. [ASan] Rename `-fsanitize-address-destructor-kind=` to drop the `-kind` suffix. (details)
  96. AMDGPU/GlobalISel: Fix selection of image intrinsics with unused return (details)
  97. Revert "RegAlloc: do not consider liveins to EH-pad successors as liveout." (details)
  98. [InstCombine] add tests for popcount with zext operand; NFC (details)
  99. [InstCombine] narrow popcount with zext operand (details)
  100. [mlir][sparse] migrate sparse operations into new sparse tensor dialect (details)
  101. [lld-macho] Make everything PIE by default (details)
  102. [lld-macho][nfc] Clean up header.s test (details)
  103. Basic block sections for functions with implicit-section-name attribute (details)
  104. [lld-macho] Remove stray file (details)
  105. Revert "[COST] Improve shuffle kind detection if shuffle mask is provided." (details)
  106. [COST] Improve shuffle kind detection if shuffle mask is provided. (details)
  107. [AMDGPU] Fix v_swap_b32 formation on physical registers (details)
  108. [mlir] Fix lowering of multi-dimensional vector log1p to LLVM (details)
  109. Revert "Generalize getInvertibleOperand recurrence handling slightly" (details)
  110. [flang][OpenMP][FIX] Fix the worksharing nesting check with inclusion of more constructs to cover combined constructs. (details)
  111. [LLD] [COFF] Fix the mingw --export-all-symbols behaviour with comdat symbols (details)
  112. [llvm-readobj] [ARMWinEH] Fix handling of relocations and symbol offsets (details)
  113. Revert "[mlir][sparse] migrate sparse operations into new sparse tensor dialect" (details)
  114. [AArch64][GlobalISel] Simplify out of range rotate amount. (details)
  115. Revert "[llvm-readobj] [ARMWinEH] Fix handling of relocations and symbol offsets" (details)
  116. [ORC] JITDylib::addDependencies should be run under the session lock. (details)
  117. [CMake] Stop using c++ subdirectory for libc++ on Win to ARM Linux cross builds. NFC (details)
  118. [GlobalISel][Legalizer] Bump up a smallvector size that was found to be too small. NFC. (details)
  119. [libcxx][ranges] Fix tests for stdlib types that conform to sized_sentinel_for. (details)
  120. Recommit "[clang][driver] Use the provided arch name for a Darwin target triple (details)
  121. [XCOFF] Handle the case when personality routine is an alias (details)
  122. [mlir][tosa] Remove constant-0 dim expr values from TOSA lowerings (details)
  123. [CodeGen] don't emit addrsig symbol if it's used only by metadata (details)
  124. [mlir][sparse] migrate sparse operations into new sparse tensor dialect (details)
  125. Reland "[lld-link] Enable addrsig table in COFF lto" (details)
  126. [ObjC][ARC] Don't enter the cleanup scope if the initializer expression (details)
  127. [msan] Remove dead function/fields (details)
  128. [Sema] Don't set BlockDecl's DoesNotEscape bit if the parameter type of (details)
  129. [AMDGPU] Remove dead early-out in GCNHazardRecognizer (details)
  130. [AMDGPU][NFC] Refactor hazard recognition IsHazardFn and IsExpiredFn (details)
  131. AMDGPU: Add missing runline to test (details)
  132. VirtRegMap: Add pass option to not clear virt regs (details)
  133. [lldb-vscode] Follow up of D99989 - store some strings more safely (details)
  134. VirtRegMap: Support partially allocated virtual registers (details)
  135. [AArch64][GlobalISel] Fix width value for G_SBFX/G_UBFX (details)
  136. [MS] Preserve base register %rbx around cpuid (details)
  137. [CMake][compiler-rt] avoid conflict with builtin check_linker_flag (details)
  138. [RISCV] Precommit a test case that test accessing a fixed object when has rvv vector object existed (details)
  139. [RISCV] Fix StackOffset calculation when using sp to access the fixed stack object in the case of rvv vector objects existed (details)
  140. [AMDGPU] Skip promote-alloca for insertelement/insertvalue users (details)
  141. [InlineCost] Remove visitUnaryInstruction() (details)
  142. Pre-commit test for PPC vector extraction test (details)
  143. [msan] Add static to some msan allocator functions (details)
  144. [debugserver] Use add_lldb_library instead of add_library (details)
  145. tsan: refactor fork handling (details)
  146. Reapply [llvm-readobj] [ARMWinEH] Fix handling of relocations and symbol offsets (details)
  147. Fix -fdebug-pass-structure test case (details)
  148. [cmake] Use -ffunction-sections and -Wl,--gc-sections on MinGW targets (details)
  149. [AMDGPU] Simplify getWaitStatesSince. NFC. (details)
Commit ea12d779bc238c387511fe7462020f4ecf4a8246 by phosek
[libc++] Support per-target __config_site in per-target runtime build

When using the per-target runtime build, it may be desirable to have
different __config_site headers for each target where all targets cannot
share a single configuration.

The layout used for libc++ headers after this change is:

```
include/
  c++/
    v1/
      <libc++ headers except for __config_site>
  <target1>/
    c++/
      v1/
        __config_site
  <target2>/
    c++/
      v1/
        __config_site
  <other targets>
```

This is the most optimal layout since it avoids duplication, the only
headers that's per-target is __config_site, all other headers are
shared across targets. This also means that we no need two
-isystem flags: one for the target-agnostic headers and one for
the target specific headers.

Differential Revision: https://reviews.llvm.org/D89013
The file was addedclang/test/Driver/Inputs/basic_fuchsia_tree/include/riscv64-unknown-fuchsia/c++/v1/.keep
The file was modifiedlibcxx/benchmarks/CMakeLists.txt
The file was addedclang/test/Driver/Inputs/basic_linux_libcxx_tree/usr/include/x86_64-unknown-linux-gnu/c++/v1/.keep
The file was modifiedclang/lib/Driver/ToolChains/Fuchsia.cpp
The file was modifiedlibcxxabi/test/libcxxabi/test/config.py
The file was modifiedclang/test/Driver/fuchsia.cpp
The file was modifiedclang/test/Driver/linux-header-search.cpp
The file was addedclang/test/Driver/Inputs/basic_fuchsia_tree/include/aarch64-unknown-fuchsia/c++/v1/.keep
The file was modifiedlibcxx/utils/libcxx/test/config.py
The file was modifiedlibcxx/include/CMakeLists.txt
The file was modifiedlibcxx/CMakeLists.txt
The file was addedclang/test/Driver/Inputs/basic_linux_libstdcxx_libcxxv2_tree/usr/include/x86_64-unknown-linux-gnu/c++/v2/.keep
The file was modifiedclang/lib/Driver/ToolChains/Gnu.cpp
The file was addedclang/test/Driver/Inputs/basic_fuchsia_tree/include/x86_64-unknown-fuchsia/c++/v1/.keep
The file was addedclang/test/Driver/Inputs/basic_linux_libcxxv2_tree/usr/include/x86_64-unknown-linux-gnu/c++/v2/.keep
Commit ddb3b26a12694a61611223eb3a84532762cbe4b8 by bmahjour
[LV] Consider Loop Unroll Hints When Making Interleave Decisions

This patch causes the loop vectorizer to not interleave loops that have
nounroll loop hints (llvm.loop.unroll.disable and llvm.loop.unroll_count(1)).
Note that if a particular interleave count is being requested
(through llvm.loop.interleave_count), it will still be honoured, regardless
of the presence of nounroll hints.

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D101374
The file was modifiedllvm/test/Transforms/LoopVectorize/explicit_outer_detection.ll
The file was modifiedllvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
The file was modifiedllvm/include/llvm/Transforms/Utils/LoopUtils.h
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
The file was modifiedllvm/lib/Transforms/Utils/LoopUtils.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was addedllvm/test/Transforms/LoopVectorize/nounroll.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/X86/no_fpmath.ll
Commit 29cb9dc4be257fd3afd8245fa421f0716feda5bd by nicholas
NFC: Run clang-format over llvm-link.
The file was modifiedllvm/tools/llvm-link/llvm-link.cpp
Commit 0c01b37eeb18a51a7e9c9153330d8009de0f600e by listmail
Generalize getInvertibleOperand recurrence handling slightly

Follow up to D99912, specifically the revert, fix, and reapply thereof.

This generalizes the invertible recurrence logic in two ways:
* By allowing mismatching operand numbers of the phi, we can recurse through a pair of phi recurrences whose operand orders have not been canonicalized.
* By allowing recurrences through operand 1, we can invert these odd (but legal) recurrence.

Differential Revision: https://reviews.llvm.org/D100884
The file was modifiedllvm/test/Analysis/ValueTracking/known-non-equal.ll
The file was modifiedllvm/lib/Analysis/ValueTracking.cpp
Commit c3846bcfe1cc6d6421a543757b5046ea841d4610 by n.james93
[clangd][NFC] Reserve storage when creating semantic token encoding.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D101461
The file was modifiedclang-tools-extra/clangd/Protocol.cpp
Commit f7164c77144a130b830d9bb3fbe829783965fab3 by Vitaly Buka
[NFC][scudo] Add reference to a QEMU bug

D101031 added workaround for the bug.
The file was modifiedcompiler-rt/lib/scudo/standalone/linux.cpp
Commit 4c27ca21d9e5a99d49b7791795ff9dd7d312f760 by lebedev.ri
[NFC][SimplifyCFG] SinkCommonCodeFromPredecessors(): reword comment about PR30244
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
Commit 12c8027ce39f776a5cc1e322b0f125362384b8aa by lebedev.ri
[NFC][SimplifyCFG] Common code sinking: check profitability once

We can just eagerly pre-check all the instructions that we *could*
sink that we'd actually want to sink them, clamping the number of
instructions that we'll sink to stop just before the first unprofitable one.
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
Commit a8e273f2ed769a3bf1207a02bf609518bb3ae5be by lebedev.ri
[NFC][SimplifyCFG] Add test showing that profitability check for sinking is broken

Essentially, we can't promise that the instruction is sinkable without
introducing PHI's until we know that it is profitable to sink.
The file was modifiedllvm/test/Transforms/SimplifyCFG/X86/sink-common-code.ll
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
Commit 410d03aabf725abcd6e3c5d11f4c2f4c9604627b by lebedev.ri
[NFC][SimplifyCFG] Add test for sinking common code with multuple cond predecessors
The file was modifiedllvm/test/Transforms/SimplifyCFG/X86/sink-common-code.ll
Commit 1886aad9d03b95c35260d6d8013d746bd39dc94a by lebedev.ri
[SimplifyCFG] Common code sinking: relax restriction on non-uncond predecessors

While we have a known profitability issue for sinking in presence of
non-unconditional predecessors, there isn't any known issues
for having multiple such non-unconditional predecessors,
so said restriction appears to be artificial. Lift it.
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
The file was modifiedllvm/test/Transforms/SimplifyCFG/X86/sink-common-code.ll
Commit b30521c28a4dc1b94d793385e4144ede5822b2c1 by dpetrov
[analyzer] Wrong type cast occurs during pointer dereferencing after type punning

Summary: During pointer dereferencing CastRetrievedVal uses wrong type from the Store after type punning. Namely, the pointer casts to another type and then assigns with a value of one more another type. It produces NonLoc value when Loc is expected.

Differential Revision: https://reviews.llvm.org/D89055

Fixes:
https://bugs.llvm.org/show_bug.cgi?id=37503
https://bugs.llvm.org/show_bug.cgi?id=49007
The file was modifiedclang/test/Analysis/string.c
The file was modifiedclang/lib/StaticAnalyzer/Core/SValBuilder.cpp
The file was modifiedclang/test/Analysis/casts.c
Commit e20b32ff3b029f50c7237f49e5e5c97bd47ea540 by Dávid Bolvanský
[BuildLibCalls] Remove inaccessiblememonly inference for calloc

Solves regression mentioned in PR50143.

As noted in D101440, proper modelling for calloc would require new attribute inaccessible_or_returned_memonly.
The file was modifiedllvm/lib/Transforms/Utils/BuildLibCalls.cpp
The file was modifiedllvm/test/Transforms/InferFunctionAttrs/annotate.ll
Commit 707ad0139988a1782e63bc1331785b459f30baf5 by lebedev.ri
[SimplifyCFG] Common code sinking: fixup variable name

As noticed in post-commit review.

I've gone through several iterations of that name,
and somehow managed to end up with an incorrect one.
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
Commit ad9ce8142dd5b90f725ad362feb054d52a35aa1f by amanieu
[ConstantMerge] Don't merge thread_local constants with non-thread_local constants

Fixes PR49932

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D100322
The file was modifiedllvm/test/Transforms/ConstantMerge/dont-merge.ll
The file was modifiedllvm/lib/Transforms/IPO/ConstantMerge.cpp
Commit 3d3782397a3f13970ead4b56cd404d0b20600497 by craig.topper
[TableGen] Remove predicate filtering from GenerateVariants.

After D100691, predicates should be cheap to compare again so
we don't need to filter anymore.

This is mostly just a revert of several patches going back to 2018.

Reviewed By: kparzysz

Differential Revision: https://reviews.llvm.org/D100695
The file was modifiedllvm/utils/TableGen/CodeGenDAGPatterns.cpp
Commit 86f291ebb2dfc5a93e1ee83b2d5965dcfa5d8bb1 by alexshap
[llvm-objcopy][MachO] Add support for LC_THREAD/LC_UNIXTHREAD

Add support for LC_THREAD/LC_UNIXTHREAD
(these load commands can be copied over without any modifications).

Test plan: make check-all

Differential revision: https://reviews.llvm.org/D101384
The file was modifiedllvm/tools/llvm-objcopy/MachO/MachOLayoutBuilder.cpp
The file was addedllvm/test/tools/llvm-objcopy/MachO/lc-thread.test
Commit 32e2fec726beec2800f3db493bea8b4bdbbde936 by john.demme
[mlir] Move PyConcreteType to header. NFC.

This allows out-of-tree users to derive PyConcreteType to bind custom
types.

The Type version of https://reviews.llvm.org/D101063/new/

Reviewed By: stellaraccident

Differential Revision: https://reviews.llvm.org/D101496
The file was modifiedmlir/lib/Bindings/Python/IRModule.h
The file was modifiedmlir/lib/Bindings/Python/IRTypes.cpp
Commit 3341324d82f1278f91b8704048aff414abeaacdb by mcgrathr
[gwp_asan] Use __sanitizer_fast_backtrace on Fuchsia

Reviewed By: phosek, cryptoad, hctim

Differential Revision: https://reviews.llvm.org/D101407
The file was modifiedcompiler-rt/lib/gwp_asan/optional/backtrace_fuchsia.cpp
Commit 49745f87e61014ac2a9e93bcad1225c55695b9b7 by mikeurbach
[mlir][python] Add `destroy` method to PyOperation.

This adds a method to directly invoke `mlirOperationDestroy` on the
MlirOperation wrapped by a PyOperation.

Reviewed By: stellaraccident, mehdi_amini

Differential Revision: https://reviews.llvm.org/D101422
The file was modifiedmlir/lib/Bindings/Python/IRCore.cpp
The file was modifiedmlir/test/Bindings/Python/ir_operation.py
The file was modifiedmlir/lib/Bindings/Python/IRModule.h
Commit 1bbbcff99de8e53b89146386bb2587ed4fc8e9cf by Dan Liew
[NFC] Rename SanitizeAddressDtorKind codegen opt to not have `Kind` suffix.

This is post commit follow up based on discussions in
https://reviews.llvm.org/D101122.

Differential Revision: https://reviews.llvm.org/D101490

(cherry picked from commit f4c7e82d1b21e637c4e0c53125b126c407d8bdbf)
The file was modifiedclang/include/clang/Basic/CodeGenOptions.def
The file was modifiedclang/include/clang/Driver/Options.td
The file was modifiedclang/lib/CodeGen/BackendUtil.cpp
Commit fc1df36e6e402cadb46befd32c4d195a4096477b by Reshabhkumar.Sharma
[ASAN] NFC: Copy address space when creating globals with redzones

This patch makes sure that globals in supported address spaces
will be replaced by globals with red zones in the same address
space by copying the address space.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D101362
The file was modifiedllvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
Commit aff73487c986b519aac1e0b7fee6d7bef72e4002 by dvyukov
tsan: increase dense slab alloc capacity

We've got a user report about heap block allocator overflow.
Bump the L1 capacity of all dense slab allocators to maximum
and be careful to not page the whole L1 array in from .bss.
If OS uses huge pages, this still may cause a limited RSS increase
due to boundary huge pages, but avoiding that looks hard.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D101161
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_sync.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.cpp
The file was modifiedcompiler-rt/lib/tsan/tests/unit/tsan_dense_alloc_test.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_clock.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_sync.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_dense_alloc.h
The file was modifiedcompiler-rt/lib/tsan/tests/unit/CMakeLists.txt
Commit 60c60dd1387742730b5cc756f8d92bac2e23c2b0 by Reshabhkumar.Sharma
[ASAN] NFC: Use addrspace cast for pointers in non-zero addrspace

Pointers in non-zero address spaces need to be address space
casted before appending to the used list.

Reviewed by: vitalybuka

Differential Revision: https://reviews.llvm.org/D101363
The file was modifiedllvm/lib/Transforms/Utils/ModuleUtils.cpp
Commit d78782f6a6ee98defe12ec9dde22144e1fe36ce6 by dvyukov
tsan: fix warnings in tests

Fix format specifier.
Fix warnings about non-standard attribute placement.
Make free_race2.c test a bit more interesting:
test access with/without an offset.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D101424
The file was modifiedcompiler-rt/test/tsan/free_race2.c
The file was modifiedcompiler-rt/test/tsan/fiber_cleanup.cpp
The file was modifiedcompiler-rt/test/tsan/sleep_sync.cpp
The file was modifiedcompiler-rt/test/tsan/free_race.c
Commit 465df35355ec30ab8c60ef1c0c156a6b22bda7d4 by david.green
[ARM] Use just ARM::t2B in ARMBlockPlacementPass

The ARMConstantIsland pass will convert any t2B to tB if they are within
range after it has added or moved any constant pools. They don't need to
be deliberately converted beforehand, and it doesn't deal with needing
to convert tB to t2B very well.
The file was modifiedllvm/lib/Target/ARM/ARMBlockPlacement.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/block-placement.mir
Commit aa0b9200e8c5dea43c9ada2085a3061f4da70802 by Amara Emerson
[GlobalISel][IRTranslator] Move line zero DebugLoc creation to constant translation. NFC.

This is a compile time optimization. DILocation:get() is expensive to call, and
we were calling it to create a line zero debug loc for *every* instruction we
translated. We only really need to do this just before we build constants in the
entry block, so I moved this code there. This reduces the LLVM -O0 codegen time
of sqlite3 IR by around 0.7% instructions executed and by about ~2% in CPU time.

We can probably do better with a more involved change, since the reason we need
to create one for each new constant is because we're using the debug scope and
inlined-at loc. If we just use a single instruction's scope and drop the
inlined-at, we can just cache these and have them be free.
The file was modifiedllvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
Commit 9363aa90bfe6f73df105799abc55bb74d4f186bf by marek.kurdej+llvm.org
[clang-format] Add `SpacesInAngles: Leave` option to keep spacing inside angle brackets as is.

A need for such an option came up in a few libc++ reviews. That's because libc++ has both code in C++03 and newer standards.
Currently, it uses `Standard: C++03` setting for clang-format, but this breaks e.g. u8"string" literals.
Also, angle brackets are the only place where C++03-specific formatting needs to be applied.

Reviewed By: MyDeveloperDay, HazardyKnusperkeks

Differential Revision: https://reviews.llvm.org/D101344
The file was modifiedclang/lib/Format/Format.cpp
The file was modifiedclang/unittests/Format/FormatTest.cpp
The file was modifiedclang/docs/ReleaseNotes.rst
The file was modifiedclang/lib/Format/TokenAnnotator.cpp
The file was modifiedclang/include/clang/Format/Format.h
Commit c2be2cda8d268d4a0adbede149a20e3fd284f1d7 by gysit
[mlir][Python][Linalg] Adding const, capture, and index support to the OpDSL.

The patch extends the OpDSL with support for:
- Constant values
- Capture scalar parameters
- Access the iteration indices using the index operation
- Provide predefined floating point and integer types.

Up to now the patch only supports emitting the new nodes. The C++/yaml path is not fully implemented. The fill_rng_2d operation defined in emit_structured_generic.py makes use of the new DSL constructs.

Differential Revision: https://reviews.llvm.org/D101364
The file was modifiedmlir/lib/Bindings/Python/mlir/dialects/linalg/opdsl/lang/types.py
The file was modifiedmlir/docs/Tools/LinalgOpDsl.md
The file was modifiedmlir/lib/Bindings/Python/mlir/dialects/linalg/opdsl/lang/dsl.py
The file was modifiedmlir/lib/Bindings/Python/mlir/dialects/linalg/opdsl/lang/comprehension.py
The file was modifiedmlir/test/Bindings/Python/dialects/linalg/opdsl/emit_structured_generic.py
The file was modifiedmlir/lib/Bindings/Python/mlir/dialects/linalg/opdsl/lang/config.py
The file was modifiedmlir/lib/Bindings/Python/mlir/dialects/linalg/opdsl/lang/scalar_expr.py
The file was modifiedmlir/lib/Bindings/Python/mlir/dialects/linalg/opdsl/lang/affine.py
The file was modifiedmlir/lib/Bindings/Python/mlir/dialects/linalg/opdsl/lang/emitter.py
Commit 6a0283d0d23cc8b056005caa31097dfb78853548 by eleviant
[NewPM] Add an option to dump pass structure

Patch adds -debug-pass-structure option to dump pass structure when
new pass manager is used.

Differential revision: https://reviews.llvm.org/D99599
The file was modifiedclang/lib/CodeGen/BackendUtil.cpp
The file was modifiedllvm/lib/Passes/StandardInstrumentations.cpp
The file was addedclang/test/Driver/debug-pass-structure.c
The file was modifiedllvm/include/llvm/Passes/StandardInstrumentations.h
The file was modifiedllvm/test/Other/opt-O3-pipeline.ll
Commit 1b788607f549321ef1e8343554b432db07ba3fe6 by harald
[X32][CET] Fix handling of indirect branches

As X32 uses 32-bit pointers without having 32-bit indirect branch
instructions, we need to fix up indirect branches by extending the
branch targets to 64 bits. This was already done for BRIND but not yet
for NT_BRIND. The same logic works for both, so this applies that
existing logic to NT_BRIND as well.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D101499
The file was modifiedllvm/lib/Target/X86/X86ISelDAGToDAG.cpp
The file was modifiedllvm/test/CodeGen/X86/indirect-branch-tracking.ll
Commit 837fded984ed36fa462daeb0f671eec58f71ae26 by sjoerd.meijer
Follow up of rGddb3b26a1269: added 'requires asserts' to test case.
The file was modifiedllvm/test/Transforms/LoopVectorize/nounroll.ll
Commit b6113db955aa7783de9715adeffaf88ba12f2699 by nicolas.vasilache
[mlir][Linalg] Generalize linalg vectorization

This revision adds support for vectorizing more general linalg operations with projected permutation maps.

This is achieved by eagerly broadcasting the intermediate vector to the common size
of the iteration domain of the linalg op. This allows a much more natural expression of
generalized vectorization but may introduce additional computations until all the
proper canonicalizations are implemented.

This generalization modifies the vector.transfer_read/write permutation logic and
exposes the fact that the logic employed in vector.contract was too ad-hoc.

As a consequence, changes occur in the permutation / transposition logic for contraction. In turn this prompts supporting more cases in the lowering of contract
to matrix intrinsics, which is required to make the corresponding tests pass.

Differential revision: https://reviews.llvm.org/D101165
The file was modifiedmlir/lib/Dialect/Vector/VectorOps.cpp
The file was modifiedmlir/include/mlir/Dialect/Vector/VectorOps.td
The file was modifiedmlir/test/Dialect/Linalg/transform-patterns-matmul-to-vector.mlir
The file was modifiedmlir/lib/Dialect/Vector/VectorTransforms.cpp
The file was modifiedmlir/test/Dialect/Linalg/vectorization.mlir
The file was modifiedmlir/include/mlir/Analysis/SliceAnalysis.h
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
Commit 6e5082bbc498ab7d68178ea883203b38f6cd47fb by marek.kurdej+llvm.org
[clang-format] Fix build on gcc < 7 introduced in rG9363aa9.

This fixes a bogus build error on gcc, e.g. https://lab.llvm.org/buildbot/#/builders/110/builds/2973.

/home/ssglocal/clang-cmake-x86_64-avx2-linux/clang-cmake-x86_64-avx2-linux/llvm/clang/lib/Format/TokenAnnotator.cpp:3097:53: error: binding ‘const clang::SourceRange’ to reference of type ‘clang::SourceRange&’ discards qualifiers
   auto HasExistingWhitespace = [&Whitespace = Right.WhitespaceRange]() {
                                                     ^
The file was modifiedclang/lib/Format/TokenAnnotator.cpp
Commit 618b5b5fbc230e4a4c2b52c08cd2b5a525d82deb by fraser
[Utils][vim] Highlight 'vscale' constant

Reviewed By: awarzynski

Differential Revision: https://reviews.llvm.org/D101466
The file was modifiedllvm/utils/vim/syntax/llvm.vim
Commit d138e97c2a741fe7c9d4fa278e262ef95b63a358 by Amara Emerson
[GlobalISel] Bump CallLoweringInfo::OrigArgs initial size to 32. NFC.

We spend some time during sqlite3 compilation regrowing this vector,
bump it up to avoid this.

Gives around 1-2% improvement in codegen-only time for sqlite3 at -O0.
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
Commit 40c2d6188b08f7a1bdd23a8cfdfea8fa998bdff6 by marek.kurdej+llvm.org
[clang-format] Fix build on gcc < 7 introduced in rG9363aa9.

This fixes another bogus build error on gcc, e.g. https://lab.llvm.org/buildbot/#/builders/110/builds/2974.

/home/ssglocal/clang-cmake-x86_64-avx2-linux/clang-cmake-x86_64-avx2-linux/llvm/clang/lib/Format/TokenAnnotator.cpp:3412:34: error: binding ‘const clang::format::FormatStyle’ to reference of type ‘clang::format::FormatStyle&’ discards qualifiers
   auto ShouldAddSpacesInAngles = [&Style = this->Style,
                                  ^
The file was modifiedclang/lib/Format/TokenAnnotator.cpp
Commit eb56fa97de96856bb63e31340598a356056470c5 by frgossen
[MLIR][Shape] Fix `shape.broadcast` to standard lowering

Differential Revision: https://reviews.llvm.org/D101456
The file was modifiedmlir/test/Conversion/ShapeToStandard/shape-to-standard.mlir
The file was modifiedmlir/lib/Conversion/ShapeToStandard/ShapeToStandard.cpp
Commit 43ad058a01881962604a941ae95209fad095aa18 by fraser
[RISCV] Fix stack slot for argument types (Bug 49500)

This is an complementary/alternative fix for D99068. It takes a slightly
different approach by explicitly summing up all of the required split
part type sizes and ensuring we allocate enough space for them. It also
takes the maximum alignment of each part.

Compared with D99068 there are fewer changes to the stack objects in
existing tests. However, @luismarques has shown in that patch that there
are opportunities to reduce our stack usage in the future.

Reviewed By: luismarques

Differential Revision: https://reviews.llvm.org/D99087
The file was modifiedllvm/test/CodeGen/RISCV/vector-abi.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/test/CodeGen/RISCV/stack-slot-size.ll
Commit c50796475d9452a3f62a0c103a78d72649557c0b by Vitaly Buka
[NFC][scudo] Suppress "division by zero" warning
The file was modifiedcompiler-rt/lib/scudo/standalone/secondary.h
Commit f31e390453d255bc6a486bbd5cb990e684b29510 by david.spickett
[lldb][AArch64] Don't check for VmFlags in smaps files

AArch64 kernel builds default to having /smaps and
the "VmFlags" line was added in 3.8. Long before MTE
was supported.

So we can assume that if you're AArch64 with MTE,
you can run this test.

The previous method of checking had a race condition
where the process we read smaps for, could finish before
we get to read the file.

I explored some alternatives but in the end I think
it's fine to just assume we have what we need.

Reviewed By: omjavaid

Differential Revision: https://reviews.llvm.org/D100493
The file was modifiedlldb/test/API/linux/aarch64/mte_memory_region/TestAArch64LinuxMTEMemoryRegion.py
The file was modifiedlldb/packages/Python/lldbsuite/test/lldbtest.py
Commit 56d923efdb692bf2d459203692b164d54f4ffe48 by qiucofan
[SPE] Support constrained float operations on SPE

This patch enables support on SPE for constrained arithmetic and
comparison operations. This fixes bugzilla 50070.

One thing not covered is fcmp vs. fcmps on SPE. Some condition code
generates singaling comparison while some not. In this patch, all are
considered as singaling. So there might be still some issue when
compiling from C code.

Reviewed By: jhibbits

Differential Revision: https://reviews.llvm.org/D101282
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrSPE.td
The file was modifiedllvm/test/CodeGen/PowerPC/fp-strict.ll
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.td
The file was addedllvm/test/CodeGen/PowerPC/fp-strict-fcmp-spe.ll
Commit 30bbfda01fb6c6c56c55c6729348d9df7f68ac31 by nicholas
Improve error messages for attributes in the wrong context.

verifyFunctionAttrs has a comment that the value V is printed in error messages. The recently added errors for attributes didn't print V. Make them print V.

Change the stringification of AttributeList. Firstly they started with 'PAL[' which stood for ParamAttrsList. Change that to 'AttributeList[' matching its current name AttributeList. Print out semantic meaning of the index instead of the raw index value (i.e. 'return', 'function' or 'arg(n)').

Differential revision: https://reviews.llvm.org/D101484
The file was modifiedllvm/unittests/IR/AttributesTest.cpp
The file was modifiedllvm/lib/IR/Attributes.cpp
The file was modifiedllvm/lib/IR/Verifier.cpp
Commit 54ee962e4795cd00a379e560727dff7ea0743765 by david.spickett
[NVPTX] Fix unused var warning with asserts disabled

<...>/llvm-project/llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp:191:15:
warning: unused variable ‘ASC’ [-Wunused-variable]
  191 |     if (auto *ASC =
dyn_cast<AddrSpaceCastInst>(I.OldInstruction)) {
      |               ^~~
The file was modifiedllvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
Commit ac0a70f3737ecb2c0586c00240d14e46ff00644e by zinenko
[mlir] Split out Python bindings entry point into a separate file

This will allow the bindings to be built as a library and reused in out-of-tree
projects that want to provide bindings on top of MLIR bindings.

Reviewed By: stellaraccident, mikeurbach

Differential Revision: https://reviews.llvm.org/D101075
The file was modifiedmlir/lib/Bindings/Python/CMakeLists.txt
The file was addedmlir/lib/Bindings/Python/IRModule.cpp
The file was modifiedmlir/lib/Bindings/Python/MainModule.cpp
Commit 2e1150d8aad60a8a127c10d9cd48c31334493ebf by serguei.katkov
[Greedy RA] Replace ll to mir test to make more stable to check an error.
The file was removedllvm/test/CodeGen/X86/statepoint-invoke-ra1.ll
The file was addedllvm/test/CodeGen/X86/statepoint-invoke-ra.mir
Commit 42e5f42215c098face7f835f1a5a223409b85f69 by tpopp
[mlir] Support complex numbers in Linalg promotion

FillOp allows complex ops, and filling a properly sized buffer with
a default zero complex number is implemented.

Differential Revision: https://reviews.llvm.org/D99939
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Promotion.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
The file was modifiedmlir/test/Dialect/Linalg/transform-patterns.mlir
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
The file was modifiedmlir/test/lib/Transforms/TestLinalgTransforms.cpp
Commit e11420ca2371cb8e53fec90cfc619ddf8249c965 by david.green
[ARM] Ensure CSINC has one use in CSINV combine

Otherwise the CMP glue may be used in multiple nodes, needing to be
emitted multiple times. Currently this either increases instruction
count or fails as it attempt to insert the same node multiple times.
The file was modifiedllvm/test/CodeGen/Thumb2/csel.ll
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
Commit b863af5a5e03ec89effa48402bd02a2d16e2be08 by tpopp
[mlir] Add LinalgTransforms dependency on Complex
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/CMakeLists.txt
Commit f6c54a61da0d952cefc4be26f4e78709dae77450 by fraser
[RISCV][NFC] Combine identical RV32 and RV64 test checks
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode.ll
Commit 2fa14d47005115341c14f37cb2ab00062a60fe0d by Amara Emerson
Try to fix bots. We shouldn't be setting the entrybuilder's DL to a null one.

This was causing a DILocation verifier error, the old code path didn't try to do
this when building constants via the finishPendingPhis() method.
The file was modifiedllvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
Commit 9569d5ba02697f64dda86591cb202f8a4390f710 by sebastian.neubauer
[AMDGPU] Allow buildSpillLoadStore in empty bb

This allows calling buildSpillLoadStore for an empty basic block, where
MI points at the end of the block instead of to an instruction.

This only happens with downstream CFI changes, so I was not able to
create a testcase that works with upstream LLVM.

Differential Revision: https://reviews.llvm.org/D101356
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIFrameLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.h
Commit 0ff41c2ebc9904f881c958f9006bbf2b6bdc5d1e by nathan
Update libstdc++ hack comment

This libstc++ hack isn't ready for removal. Updating the comment to
note what I found. While I have not proven Ville's
__is_throw_swappable patch made this go away, that patch did remove
the use of noexcept(noexcept(swap(....))). I'm not sure when gcc grew
deferred noexcept parsing.

Differential Revision: https://reviews.llvm.org/D101441
The file was modifiedclang/lib/Sema/SemaExceptionSpec.cpp
Commit de94b1855c63f8357bc7ae6668996c4a42d2b5be by l.chelini
[mlir] Fix top-level comments (NFC)
The file was modifiedmlir/lib/Dialect/SCF/SCF.cpp
Commit 545fa37834ef6b5731444728c00e7a18d4f1aeed by zinenko
[mlir] Affine: parallelize affine loops with reductions

Introduce a basic support for parallelizing affine loops with reductions
expressed using iteration arguments. Affine parallelism detector now has a flag
to assume such reductions are parallel. The transformation handles a subset of
parallel reductions that are can be expressed using affine.parallel:
integer/float addition and multiplication. This requires to detect the
reduction operation since affine.parallel only supports a fixed set of
reduction operators.

Reviewed By: chelini, kumasento, bondhugula

Differential Revision: https://reviews.llvm.org/D101171
The file was modifiedmlir/include/mlir/Dialect/Affine/Passes.td
The file was modifiedmlir/include/mlir/Dialect/Affine/Utils.h
The file was modifiedmlir/lib/Analysis/Utils.cpp
The file was modifiedmlir/lib/Dialect/Affine/Utils/Utils.cpp
The file was modifiedmlir/lib/Dialect/Affine/Transforms/AffineParallelize.cpp
The file was modifiedmlir/lib/Dialect/Affine/Transforms/SuperVectorize.cpp
The file was modifiedmlir/test/Dialect/Affine/parallelize.mlir
The file was modifiedmlir/include/mlir/Analysis/Utils.h
The file was modifiedmlir/lib/Dialect/Affine/Utils/CMakeLists.txt
The file was modifiedmlir/include/mlir/Analysis/AffineAnalysis.h
The file was modifiedmlir/lib/Analysis/AffineAnalysis.cpp
Commit 6841e6afba00e78972061d2d9bb631c4ac38ad25 by zinenko
[mlir] support max/min lower/upper bounds in affine.parallel

This enables to express more complex parallel loops in the affine framework,
for example, in cases of tiling by sizes not dividing loop trip counts perfectly
or inner wavefront parallelism, among others. One can't use affine.max/min
and supply values to the nested loop bounds since the results of such
affine.max/min operations aren't valid symbols. Making them valid symbols
isn't an option since they would introduce selection trees into memref
subscript arithmetic as an unintended and undesired consequence. Also
add support for converting such loops to SCF. Drop some API that isn't used in
the core repo from AffineParallelOp since its semantics becomes ambiguous in
presence of max/min bounds. Loop normalization is currently unavailable for
such loops.

Depends On D101171

Reviewed By: bondhugula

Differential Revision: https://reviews.llvm.org/D101172
The file was modifiedmlir/test/Dialect/Affine/parallelize.mlir
The file was modifiedmlir/include/mlir/IR/AffineMap.h
The file was modifiedmlir/lib/Conversion/AffineToStandard/AffineToStandard.cpp
The file was modifiedmlir/lib/Dialect/Affine/IR/AffineOps.cpp
The file was modifiedmlir/include/mlir/Dialect/Affine/IR/AffineOps.td
The file was modifiedmlir/test/Dialect/Affine/ops.mlir
The file was modifiedmlir/lib/Parser/Parser.h
The file was modifiedmlir/lib/Dialect/Affine/Transforms/AffineLoopNormalize.cpp
The file was modifiedmlir/include/mlir/IR/OpImplementation.h
The file was modifiedmlir/lib/Parser/AffineParser.cpp
The file was modifiedmlir/test/Dialect/Affine/invalid.mlir
The file was modifiedmlir/lib/IR/AsmPrinter.cpp
The file was modifiedmlir/lib/Parser/Parser.cpp
The file was modifiedmlir/test/Conversion/AffineToStandard/lower-affine.mlir
The file was modifiedmlir/lib/IR/AffineMap.cpp
The file was modifiedmlir/lib/Dialect/Affine/Utils/Utils.cpp
Commit c8f20ed44888f3a09c077690480d1d978c881b0d by bradley.smith
[AArch64][SVE] Move convert.{from,to}.svbool optimization into InstCombine

As part of this the ptrue coalescing done in SVEIntrinsicOpts has been
modified to not introduce redundant converts, since the convert removal
will no longer run after that optimisation to clean up.

Differential Revision: https://reviews.llvm.org/D101302
The file was addedllvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-reinterpret.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp
The file was removedllvm/test/CodeGen/AArch64/sve-intrinsic-opts-reinterpret.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-coalesce-ptrue-intrinsics.ll
Commit 89085bcc86d4dad5cac1601f3c54b776e53eeaa4 by bradley.smith
[AArch64][SVE] Convert svdup(vec, SV_VL1, elm) to insertelement(vec, elm, 0)

By converting the SVE intrinsic to a normal LLVM insertelement we give
the code generator a better chance to remove transitions between GPRs
and VPRs

Co-authored-by: Paul Walker <paul.walker@arm.com>

Depends on D101302

Differential Revision: https://reviews.llvm.org/D101167
The file was addedllvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-dup.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
Commit 354604a2a7149b5efd52134efa4765cf8c32e386 by bradley.smith
[AArch64][SVE] Use SIMD variant of INSR when scalar is the result of a vector extract

At the intrinsic layer the sve.insr operation takes a scalar. When this
scalar is an integer we are forcing a data transition between GPRs and
ZPRs that is potentially costly.

Often the integer scalar is the result of a vector extract, when
performing a reduction for example. In such cases we should keep all
data within the ZPRs.

Co-authored-by: Paul Walker <paul.walker@arm.com>

Differential Revision: https://reviews.llvm.org/D101169
The file was addedllvm/test/CodeGen/AArch64/sve-insr.ll
The file was modifiedllvm/lib/Target/AArch64/SVEInstrFormats.td
Commit 28ab7ff2d732fb0580486baa02b1383a72cec0cb by zinenko
[mlir] fix shared-lib build
The file was modifiedmlir/lib/Analysis/CMakeLists.txt
Commit 79f7d3b7b123faa80daf265277b32ac77998190f by arnamoy10
[flang][OpenMP] Add semantic checks for strict nesting inside `teams` construct.
The file was modifiedflang/lib/Semantics/check-omp-structure.h
The file was modifiedflang/test/Semantics/omp-combined-constructs.f90
The file was modifiedflang/lib/Semantics/check-omp-structure.cpp
The file was modifiedflang/test/Semantics/omp-device-constructs.f90
The file was addedflang/test/Semantics/omp-nested-distribute.f90
Commit a0e1313c23296da1cf592f972ed97e5dea10b8ea by flo
[VPlan] Add getVPSingleValue helper.

As suggested in D99294, this adds a getVPSingleValue helper to use for
recipes that are guaranteed to define a single value. This replaces uses
of getVPValue() which used to default to I = 0.
The file was modifiedllvm/unittests/Transforms/Vectorize/VPlanTest.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.h
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/VPlanValue.h
The file was modifiedllvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Commit 8fb0d6df11e4d2b4a534c96fcc1b55459940151e by anastasia.stulova
[OpenCL][Docs] Describe extension for legacy atomics with generic addr space.

This extension is primarily targeting SPIR-V compilations flow
as the IR translation is the same between 1.x and 2.x atomics.

Differential Revision: https://reviews.llvm.org/D101089
The file was modifiedclang/docs/LanguageExtensions.rst
Commit fbd3548d1ca72ddf7977b2b970f3966e545702c9 by Chirag.Khandelwal
[LLVM][OpenMP] Adding support for OpenMP sections construct in OpenMPIRBuilder

This patch adds section support in the OpenMP IRBuilder module, along with a test for the same.

Reviewed By: fghanim

Differential Revision: https://reviews.llvm.org/D89671
The file was modifiedllvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
The file was modifiedllvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
The file was modifiedllvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
Commit 1ed6e87ab02db4fb9379b80c820bebad9869aa4d by anastasia.stulova
[OpenCL][Docs] Misc updates to C++ for OpenCL and offline compilation

Differential Revision: https://reviews.llvm.org/D101092
The file was modifiedclang/docs/UsersManual.rst
The file was modifiedclang/docs/OpenCLSupport.rst
Commit 3eb2be67b997ea62f47dbe90a62e828ecfb266a8 by dave
Unbreak no-asserts testing
The file was modifiedclang/test/Driver/debug-pass-structure.c
Commit c20410618827b7870fbc86d45ff8e9b11bc169b4 by Chirag.Khandelwal
[Clang][OpenMP] Frontend work for sections - D89671

This patch is child of D89671, contains the clang
implementation to use the OpenMP IRBuilder's section
construct.

Co-author: @anchu-rajendran

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D91054
The file was modifiedclang/test/OpenMP/cancel_codegen.cpp
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntime.cpp
The file was modifiedclang/lib/CodeGen/CGStmtOpenMP.cpp
Commit 1ecddddbeca33c9e5d492c20e1b147fc6ae3a90d by jay.foad
[AMDGPU] Add a v_swap_b32 test case to be fixed
The file was modifiedllvm/test/CodeGen/AMDGPU/v_swap_b32.mir
Commit 51d648c119d7773ce6fb809353bd6bd14bca8818 by sander.desmalen
Revert "[LV] Calculate max feasible scalable VF."

Temporarily reverting this patch due to some unexpected issue found
by one of the PPC buildbots.

This reverts commit 584e9b6e4b4987b882719923e640eed854613d91.
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/scalable-vf-hint.ll
The file was removedllvm/test/Transforms/LoopVectorize/AArch64/scalable-vf-analysis.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/scalable-reductions.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/scalable-vf-hint.ll
The file was modifiedllvm/include/llvm/Transforms/Vectorize/LoopVectorize.h
Commit 25391cec3a81c3c2c4ac3f2ce0efda961766ab07 by craig.topper
[RISCV] Teach computeKnownBits that vsetvli returns number less than 2^31.

This seems like a reasonable upper bound on VL. WG discussions for
the V spec would probably allow us to use 2^16 as an upper bound
on VLEN, but this is good enough for now.

This allows us to remove sext and zext if user happens to assign
the size_t result into an int and then uses it as a VL intrinsic
argument which is size_t.

Reviewed By: frasercrmck, rogfer01, arcbbb

Differential Revision: https://reviews.llvm.org/D101472
The file was addedllvm/test/Transforms/InstCombine/RISCV/riscv-vsetvli-knownbits.ll
The file was addedllvm/test/Transforms/InstCombine/RISCV/lit.local.cfg
The file was addedllvm/test/CodeGen/RISCV/rvv/vsetvl-ext.ll
The file was modifiedllvm/lib/Analysis/ValueTracking.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
Commit 0c330afdfa42370fb50979efd1ee6bcbe9642b6d by craig.topper
[RISCV] Enable SPLAT_VECTOR for fixed vXi64 types on RV32.

This replaces D98479.

This allows type legalization to form SPLAT_VECTOR_PARTS so we don't
lose the splattedness when the scalar type is split.

I'm handling SPLAT_VECTOR_PARTS for fixed vectors separately so
we can continue using non-VL nodes for scalable vectors.

I limited to RV32+vXi64 because DAGCombiner::visitBUILD_VECTOR likes
to form SPLAT_VECTOR before seeing if it can replace the BUILD_VECTOR
with other operations. Especially interesting is a splat BUILD_VECTOR of
the extract_vector_elt which can become a splat shuffle, but won't if
we form SPLAT_VECTOR first. We either need to reorder visitBUILD_VECTOR
or add visitSPLAT_VECTOR.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D100803
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-int.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-int.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll
Commit c9b1bd10128956f51ea3b910b5d946a0ee7c2b0c by i
[ELF] Support .rela.eh_frame with unordered r_offset values

GNU ld -r can create .rela.eh_frame with unordered r_offset values.
(With LLD, we can craft such a case by reordering sections in .eh_frame.)
This is currently unsupported and will trigger
`assert(pieces[i].inputOff <= off ...` in `OffsetGetter::get`
(the content is corrupted in a -DLLVM_ENABLE_ASSERTIONS=off build).
This patch supports this case.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D101116
The file was addedlld/test/ELF/eh-frame-unordered-r_offset.s
The file was modifiedlld/ELF/Relocations.h
The file was modifiedlld/ELF/Relocations.cpp
The file was modifiedlld/ELF/InputSection.cpp
Commit ded0a70aeb08919922cdba5f4fcc7d7646e2ffe2 by anirudh_prasad
[AsmParser][SystemZ][z/OS] Reject "Dot" as current PC on z/OS

- Currently, the "." (Dot) character, when not identifying an Identifier or a Constant, refers to the current PC (Program Counter)
- However, in z/OS, for the HLASM dialect, it strictly accepts only the "*" as the current PC (Support for this will be put up in a follow-up patch)
- The changes in this patch allow individual platforms to choose whether they would like to use the "." (Dot) character as a marker for the current PC or not.
- It is achieved by introducing a new field in MCAsmInfo.h called `DotIsPC` (similar to `DollarIsPC`)

Reviewed By: abhina.sreeskantharajan

Differential Revision: https://reviews.llvm.org/D100975
The file was modifiedllvm/include/llvm/MC/MCAsmInfo.h
The file was modifiedllvm/lib/MC/MCParser/AsmParser.cpp
The file was modifiedllvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
The file was modifiedllvm/unittests/MC/SystemZ/SystemZAsmLexerTest.cpp
Commit f4b1272d3d2457ca51056794023fe8ae20dd7c54 by spatel
[ADT] fix typo in code block comment; NFC
The file was modifiedllvm/include/llvm/ADT/APInt.h
Commit 71597d40e878c42990d315b23885771f87d6af4d by spatel
[ConstantFolding] refactor helper for vector reductions; NFC

We should handle other cases (undef/poison), so reduce
the duplication of repeated switches.
The file was modifiedllvm/lib/Analysis/ConstantFolding.cpp
Commit 678018138d15827dc4ffb138f2d73b5dc7c3eb38 by spatel
[ConstProp] add tests for vector reductions of poison; NFC
The file was modifiedllvm/test/Transforms/InstSimplify/ConstProp/vecreduce.ll
Commit b7c6697813af21fc2bf1a87e1d66d79caea3d790 by i
[DebugInfo] Add tests that we emit .eh_frame instead of .debug_frame

Add tests which can catch the issue in 0ce723cb228bc1d1a0f5718f3862fb836145a333
(If any function needs CFISection::EH, the module should use CFISection::EH).

Reviewed By: echristo

Differential Revision: https://reviews.llvm.org/D101339
The file was addedllvm/test/DebugInfo/X86/cfi_sections.ll
The file was removedllvm/test/DebugInfo/X86/debug_frame.ll
Commit 47a686d5cbcaed72fde0a859bfbc41c3c16ada27 by i
[unittest] Fix Frontend/OpenMPIRBuilderTest.cpp -Wsign-compare after D89671
The file was modifiedllvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
Commit 92399322217917e67c0d72a55ec51ddc82251cf6 by a.bataev
[COST] Improve shuffle kind detection if shuffle mask is provided.

Added an extra analysis for better choosing of shuffle kind in
getShuffleCost functions for better cost estimation if mask was
provided.

Differential Revision: https://reviews.llvm.org/D100865
The file was modifiedllvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/remark_extract_broadcast.ll
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
Commit 60216adef1c8599eaf6d183dad546c1dafd81964 by craig.topper
[RISCV] Add test cases for D101485. NFC
The file was addedllvm/test/CodeGen/RISCV/select-binop-identity.ll
Commit dcdda2bdf236492f595c361cdddd316ada441137 by craig.topper
[RISCV] Teach DAG combine to fold (and (select_cc lhs, rhs, cc, -1, c), x) -> (select_cc lhs, rhs, cc, x, (and, x, c))

Similar for or/xor with 0 in place of -1.

This is the canonical form produced by InstCombine for something like `c ? x & y : x;` Since we have to use control flow to expand select we'll usually end up with a mv in basic block. By folding this we may be able to pull the and/or/xor into the block instead and avoid a mv instruction.

The code here is based on code from ARM that uses this to create predicated instructions. I'm doing it on SELECT_CC so it happens late, but we could do it on select earlier which is what ARM does. I'm not sure if we lose any combine opportunities if we do it earlier.

I left out add and sub because this can separate sext.w from the add/sub. It also made a conditional i64 addition/subtraction on RV32 worse. I guess both of those would be fixed by doing this earlier on select.

The select-binop-identity.ll test has not been commited yet, but I made the diff show the changes to it.

Reviewed By: luismarques

Differential Revision: https://reviews.llvm.org/D101485
The file was modifiedllvm/test/CodeGen/RISCV/select-binop-identity.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv32zbb-zbp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv32zbs.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rv32zbt.ll
Commit 7ad4dee3e733d820115f44cecce73ceb64c76450 by Vitaly Buka
[scudo] Use require_constant_initialization

Attribute guaranties safe static initialization of globals.

Differential Revision: https://reviews.llvm.org/D101514
The file was modifiedcompiler-rt/lib/scudo/standalone/tsd.h
The file was modifiedcompiler-rt/lib/scudo/standalone/internal_defs.h
The file was modifiedcompiler-rt/lib/scudo/standalone/mutex.h
The file was modifiedcompiler-rt/lib/scudo/standalone/wrappers_c.cpp
The file was modifiedcompiler-rt/lib/scudo/standalone/tsd_exclusive.h
The file was modifiedcompiler-rt/lib/scudo/standalone/wrappers_c_bionic.cpp
The file was modifiedcompiler-rt/lib/scudo/standalone/list.h
The file was modifiedcompiler-rt/lib/scudo/standalone/local_cache.h
The file was modifiedcompiler-rt/lib/scudo/standalone/primary32.h
The file was modifiedcompiler-rt/lib/scudo/standalone/primary64.h
The file was modifiedcompiler-rt/lib/scudo/standalone/quarantine.h
The file was modifiedcompiler-rt/lib/scudo/standalone/stack_depot.h
The file was modifiedcompiler-rt/lib/scudo/standalone/stats.h
The file was modifiedcompiler-rt/lib/scudo/standalone/combined.h
The file was modifiedcompiler-rt/lib/scudo/standalone/options.h
The file was modifiedcompiler-rt/lib/scudo/standalone/secondary.h
Commit 203096adfce36ed9fe212abd529ce51a8c4b4830 by martin
[libcxx] [test] Include more libraries that normally are linked automatically

As the libcxx tests link with -nostdlib, libraries that normally
are added by default by the compiler driver has to be added
manually.

The "oldnames" library is automatically added when driving linking
with clang-cl. When linking with the plain clang driver, as the
libcxx tests do, the clang driver does the same but only since Clang
12.0). But when linking with -nostdlib, like the libcxx tests do,
the driver defaults aren't added at all, and we need to specify the
defaults manually.

This allows removing a TODO from the Windows CI setup; it turns out
that upgrading to Clang 12.0 didn't help here as expected, sorry about
that mixup.

Differential Revision: https://reviews.llvm.org/D101434
The file was modifiedlibcxx/utils/ci/run-buildbot
The file was modifiedlibcxx/utils/libcxx/test/config.py
Commit 1089158c5a0f7a30100159b7d9b57238578caeaf by spatel
[ConstantFolding] propagate poison through vector reduction intrinsics
The file was modifiedllvm/test/Transforms/InstSimplify/ConstProp/vecreduce.ll
The file was modifiedllvm/lib/Analysis/ConstantFolding.cpp
Commit ea7618684c5117f43a9491145d4d68156a4b9c78 by Vitaly Buka
Revert "[scudo] Use require_constant_initialization"

This reverts commit 7ad4dee3e733d820115f44cecce73ceb64c76450.
The file was modifiedcompiler-rt/lib/scudo/standalone/local_cache.h
The file was modifiedcompiler-rt/lib/scudo/standalone/mutex.h
The file was modifiedcompiler-rt/lib/scudo/standalone/quarantine.h
The file was modifiedcompiler-rt/lib/scudo/standalone/primary64.h
The file was modifiedcompiler-rt/lib/scudo/standalone/combined.h
The file was modifiedcompiler-rt/lib/scudo/standalone/options.h
The file was modifiedcompiler-rt/lib/scudo/standalone/tsd_exclusive.h
The file was modifiedcompiler-rt/lib/scudo/standalone/stats.h
The file was modifiedcompiler-rt/lib/scudo/standalone/internal_defs.h
The file was modifiedcompiler-rt/lib/scudo/standalone/tsd.h
The file was modifiedcompiler-rt/lib/scudo/standalone/list.h
The file was modifiedcompiler-rt/lib/scudo/standalone/primary32.h
The file was modifiedcompiler-rt/lib/scudo/standalone/wrappers_c_bionic.cpp
The file was modifiedcompiler-rt/lib/scudo/standalone/secondary.h
The file was modifiedcompiler-rt/lib/scudo/standalone/stack_depot.h
The file was modifiedcompiler-rt/lib/scudo/standalone/wrappers_c.cpp
Commit df323ba445f7fc4d29def8950e80dec6ba487961 by benny.kra
Revert "[X86] Support AMX fast register allocation"

This reverts commit 3b8ec86fd576b9808dc63da620d9a4f7bbe04372.

Revert "[X86] Refine AMX fast register allocation"

This reverts commit c3f95e9197643b699b891ca416ce7d72cf89f5fc.

This pass breaks using LLVM in a multi-threaded environment by
introducing global state.
The file was modifiedllvm/lib/CodeGen/TargetPassConfig.cpp
The file was modifiedllvm/test/CodeGen/X86/AMX/amx-low-intrinsics.ll
The file was modifiedllvm/tools/opt/opt.cpp
The file was modifiedllvm/lib/Target/X86/CMakeLists.txt
The file was modifiedllvm/test/CodeGen/X86/AMX/amx-low-intrinsics-no-amx-bitcast.ll
The file was removedllvm/lib/Target/X86/X86FastTileConfig.cpp
The file was removedllvm/test/CodeGen/X86/AMX/amx-configO2toO0-precfg.ll
The file was removedllvm/test/CodeGen/X86/AMX/amx-fast-tile-config.mir
The file was removedllvm/test/CodeGen/X86/AMX/amx-configO0toO0.ll
The file was modifiedllvm/lib/Target/X86/X86.h
The file was removedllvm/lib/Target/X86/X86PreAMXConfig.cpp
The file was modifiedllvm/test/CodeGen/X86/O0-pipeline.ll
The file was modifiedllvm/include/llvm/CodeGen/TargetPassConfig.h
The file was modifiedllvm/lib/Target/X86/X86LowerAMXIntrinsics.cpp
The file was modifiedllvm/lib/Target/X86/X86LowerAMXType.cpp
The file was removedllvm/test/CodeGen/X86/AMX/amx-configO2toO0-lower.ll
The file was removedllvm/test/CodeGen/X86/AMX/amx-configO2toO0.ll
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn
The file was modifiedllvm/include/llvm/CodeGen/Passes.h
The file was modifiedllvm/lib/Target/X86/X86TargetMachine.cpp
Commit 5fbea826920f2ed51259093ae87b33b571833513 by llvmgnsyncbot
[gn build] Port df323ba445f7
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn
Commit a76df78470d7994f73df0353225cbddc463cce63 by Raphael Isemann
[lldb] Make the NSSet formatter faster and less prone to infinite recursion

Right now to get the 'NSSet *` pointer value we first derefence it and then take
the address of the result.

Beside being inefficient this potentially can cause an infinite recursion if the
`pointer` value we get is a pointer of a type that the TypeSystem can't
derefence. If the pointer is for example some form of `void *` that the dynamic
type resolution can't resolve to an actual type, then the `Derefence` call goes
back to asking the formatters how to reference it. If the NSSet formatter then
checks if it's an NSSet variation under the hood then we just end infinitely
often recursion.

In practice this seems to happen with some form of Builtin.RawPointer we get
from a NSDictionary in Swift.

FWIW, no other formatter is doing the same deref->addressOf as here and there
doesn't seem to be any specific reason to do so in the git history (it's just
part of the initial formatter commit)

Reviewed By: JDevlieghere

Differential Revision: https://reviews.llvm.org/D101537
The file was modifiedlldb/source/Plugins/Language/ObjC/NSSet.cpp
Commit ba631240ae9ccbf70f57c0ba22cf2dd5a3592da2 by phosek
[CMake] Set correct CXX_FLAGS for relative-vtables variants

We overrite CXX_FLAGS to enable relative vtables, but doing so
overwrites generic Fuchsia CXX_FLAGS leading to a build failure
on Windows.

Differential Revision: https://reviews.llvm.org/D101551
The file was modifiedclang/cmake/caches/Fuchsia-stage2.cmake
Commit 9393060f908b95f30267f2122b3a2aadb698aadb by koraq
[libc++] Fixes std::to_chars for bases != 10.

While working on D70631, Microsoft's unit tests discovered an issue.
Our `std::to_chars` implementation for bases != 10 uses the range
`[first,last)` as temporary buffer. This violates the contract for
to_chars:
[charconv.to.chars]/1 http://eel.is/c++draft/charconv#to.chars-1
`to_chars_result to_chars(char* first, char* last, see below value, int base = 10);`
"If the member ec of the return value is such that the value is equal to
the value of a value-initialized errc, the conversion was successful and
the member ptr is the one-past-the-end pointer of the characters
written."

Our implementation modifies the range `[member ptr, last)`, which causes
Microsoft's test to fail. Their test verifies the buffer
`[member ptr, last)` is unchanged. (The test is only done when the
conversion is successful.)

While looking at the code I noticed the performance for bases != 10 also
is suboptimal. This is tracked in D97705.

This patch fixes the issue and adds a benchmark. This benchmark will be
used as baseline for D97705.

Reviewed By: #libc, Quuxplusone, zoecarver

Differential Revision: https://reviews.llvm.org/D100722
The file was modifiedlibcxx/include/charconv
The file was modifiedlibcxx/test/support/charconv_test_helpers.h
The file was addedlibcxx/benchmarks/to_chars.bench.cpp
Commit a6f406480a223068875602fb46e7b1db74873564 by sbc
[lld][WebAssembly] Add `--export-if-defined`

Unlike the existing `--export` option this will not causes errors
or warnings if the specified symbol is not defined.

See: https://github.com/emscripten-core/emscripten/issues/13736

Differential Revision: https://reviews.llvm.org/D99887
The file was addedlld/test/wasm/export-if-defined.s
The file was modifiedlld/wasm/Config.h
The file was modifiedlld/docs/WebAssembly.rst
The file was modifiedlld/wasm/Driver.cpp
The file was modifiedlld/wasm/Writer.cpp
The file was modifiedlld/wasm/Options.td
Commit cc63203908daa3a844d09160375c191003ab970c by lebedev.ri
[SimplifyCFG] Common code sinking: fix application of profitability check

The profitability check is: we don't want to create more than a single PHI
per instruction sunk. We need to create the PHI unless we'll sink
all of it's would-be incoming values.

But there is a caveat there.
This profitability check doesn't converge on the first iteration!
If we first decide that we want to sink 10 instructions,
but then determine that 5'th one is unprofitable to sink,
that may result in us not sinking some instructions that
resulted in determining that some other instruction
we've determined to be profitable to sink becoming unprofitable.

So we need to iterate until we converge, as in determine
that all leftover instructions are profitable to sink.

But, the direct approach of just re-iterating seems dumb,
because in the worst case we'd find that the last instruction
is unprofitable, which would result in revisiting instructions
many many times.

Instead, i think we can get away with just two passes - forward and backward.
However then it isn't obvious what is the most performant way to update
InstructionsToSink.
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
The file was modifiedllvm/test/Transforms/SimplifyCFG/X86/sink-common-code.ll
Commit ae3377c55343e83e7768f612398dda942b83a06e by wei.huang
[AIX][TLS] Add ASM portion changes to support TLSGD relocations to XCOFF objects

- Add new variantKinds for the symbol's variable offset and region handle
- Print the proper relocation specifier @gd in the asm streamer when emitting
  the TC Entry for the variable offset for the symbol
- Fix the switch section failure between the TC Entry of variable offset and
  region handle
- Put .__tls_get_addr symbol in the ProgramCodeSects with XTY_ER property

Reviewed by: sfertile

Differential Revision: https://reviews.llvm.org/D100956
The file was modifiedllvm/test/CodeGen/PowerPC/aix-tls-gd-double.ll
The file was modifiedllvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
The file was modifiedllvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
The file was modifiedllvm/include/llvm/MC/MCExpr.h
The file was modifiedllvm/lib/Target/PowerPC/PPC.h
The file was modifiedllvm/lib/MC/MCExpr.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.cpp
The file was modifiedllvm/test/CodeGen/PowerPC/aix-tls-gd-int.ll
The file was modifiedllvm/test/CodeGen/PowerPC/aix-tls-gd-longlong.ll
Commit 438a63e13bf89ebe21768940976a6eea6285f5ff by Tim Northover
RegAlloc: do not consider liveins to EH-pad successors as liveout.

These registers get defined by the runtime, not the block being allocated, and
treating them as preassigned in RegAllocFast adds extra pressure, sometimes
enough to make the function unallocatable.
The file was addedllvm/test/CodeGen/X86/regalloc-tight-invoke.ll
The file was modifiedllvm/test/CodeGen/X86/fast-isel-cmp-branch.ll
The file was modifiedllvm/lib/CodeGen/RegAllocFast.cpp
Commit 2d42b2ee7bafe76d6b2c792b73f7371cb1cf8d94 by Dan Liew
[ASan] Rename `-fsanitize-address-destructor-kind=` to drop the `-kind` suffix.

Renaming the option is based on discussions in https://reviews.llvm.org/D101122.

It is normally not a good idea to rename driver flags but this flag is
new enough and obscure enough that it is very unlikely to have adopters.

While we're here also drop the `<kind>` metavar. It's not necessary and
is actually inconsistent with the documentation in
`clang/docs/ClangCommandLineReference.rst`.

Differential Revision: https://reviews.llvm.org/D101491
The file was removedclang/test/Driver/fsanitize-address-destructor-kind.c
The file was modifiedclang/test/CodeGen/asan-destructor-kind.cpp
The file was addedclang/test/Driver/fsanitize-address-destructor.c
The file was modifiedclang/include/clang/Driver/Options.td
The file was modifiedclang/test/Driver/darwin-asan-mkernel-kext.c
The file was modifiedclang/docs/ClangCommandLineReference.rst
The file was modifiedclang/lib/Driver/SanitizerArgs.cpp
Commit c34900e1335d490bf6f16fba55eacd4ecf831f72 by petar.avramovic
AMDGPU/GlobalISel: Fix selection of image intrinsics with unused return

When atomic image intrinsic return value is unused, register class for
destination of a sub-register copy of return value ends up not being set.
This copy then hits 'Register class not set' assert later.
If return value has uses, register class is determined by use instruction.
Fix is to not create sub-register copy when image intrinsic destination has
no uses because it would be deleted by dead-mi-elimination later anyway.

Differential Revision: https://reviews.llvm.org/D101448
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.atomic.dim.ll
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.atomic.dim.mir
Commit c1b7460b5b705d983ac40ac37449911d132c7db4 by Tim Northover
Revert "RegAlloc: do not consider liveins to EH-pad successors as liveout."

Some liveins *can* come from this block (e.g. any SSA value except the call),
it's only the ones that produce `landingpad` values that can't and I didn't
think it through properly.
The file was modifiedllvm/test/CodeGen/X86/fast-isel-cmp-branch.ll
The file was removedllvm/test/CodeGen/X86/regalloc-tight-invoke.ll
The file was modifiedllvm/lib/CodeGen/RegAllocFast.cpp
Commit b142e9d1c5170baad39dee3e800032460554551a by spatel
[InstCombine] add tests for popcount with zext operand; NFC

PR50141
The file was modifiedllvm/test/Transforms/InstCombine/ctpop.ll
Commit 0f8b6686ac288cda8d14d2ec5b8ca98d188b0684 by spatel
[InstCombine] narrow popcount with zext operand

https://llvm.org/PR50141
The file was modifiedllvm/test/Transforms/InstCombine/ctpop.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
Commit a6d92a971175d727873a9e7644913ee02d7232a8 by ajcbik
[mlir][sparse] migrate sparse operations into new sparse tensor dialect

This is the very first step toward removing the glue and clutter from linalg and
replace it with proper sparse tensor types. This revision migrates the LinalgSparseOps
into SparseTensorOps of a sparse tensor dialect. This also provides a new home for
sparse tensor related transformation.

NOTE: the actual replacement with sparse tensor types (and removal of linalg glue/clutter)
will follow but I am trying to keep the amount of changes per revision manageable.

Reviewed By: bixia

Differential Revision: https://reviews.llvm.org/D101488
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgTypes.cpp
The file was modifiedmlir/test/Dialect/Linalg/sparse_1d.mlir
The file was removedmlir/test/Integration/Sparse/CPU/frostt-example.mlir
The file was addedmlir/test/Integration/Dialect/SparseTensor/CPU/frostt-example.mlir
The file was addedmlir/lib/Dialect/SparseTensor/IR/CMakeLists.txt
The file was removedmlir/test/Dialect/Linalg/sparse_lower_calls.mlir
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
The file was addedmlir/lib/Dialect/SparseTensor/CMakeLists.txt
The file was removedmlir/lib/Dialect/Linalg/Transforms/SparseLowering.cpp
The file was modifiedmlir/lib/Dialect/CMakeLists.txt
The file was removedmlir/test/Dialect/Linalg/sparse_roundtrip.mlir
The file was modifiedmlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
The file was removedmlir/include/mlir/Dialect/Linalg/IR/LinalgSparseOps.td
The file was removedmlir/test/Integration/Sparse/CPU/sparse_sampled_matmul.mlir
The file was addedmlir/test/Dialect/SparseTensor/lowering.mlir
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgOps.h
The file was addedmlir/lib/Dialect/SparseTensor/IR/SparseTensorDialect.cpp
The file was addedmlir/test/Integration/Dialect/SparseTensor/CPU/matrix-market-example.mlir
The file was modifiedmlir/test/Dialect/Linalg/sparse_nd.mlir
The file was addedmlir/lib/Dialect/SparseTensor/Transforms/CMakeLists.txt
The file was addedmlir/include/mlir/Dialect/SparseTensor/IR/SparseTensor.h
The file was modifiedmlir/include/mlir/InitAllDialects.h
The file was modifiedmlir/test/Dialect/Linalg/sparse_2d.mlir
The file was addedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum.mlir
The file was modifiedmlir/test/Dialect/Linalg/sparse_3d.mlir
The file was removedmlir/test/Integration/Sparse/CPU/sparse_matvec.mlir
The file was addedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_matvec.mlir
The file was addedmlir/test/Dialect/SparseTensor/roundtrip.mlir
The file was modifiedmlir/test/mlir-opt/commandline.mlir
The file was addedmlir/include/mlir/Dialect/SparseTensor/Transforms/Transforms.h
The file was removedmlir/test/Integration/Sparse/CPU/matrix-market-example.mlir
The file was removedmlir/test/Integration/Sparse/CPU/lit.local.cfg
The file was addedmlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorBase.td
The file was addedmlir/test/Integration/Dialect/SparseTensor/CPU/lit.local.cfg
The file was removedmlir/test/Integration/Sparse/CPU/sparse_sum.mlir
The file was modifiedmlir/include/mlir/Dialect/CMakeLists.txt
The file was addedmlir/include/mlir/Dialect/SparseTensor/CMakeLists.txt
The file was addedmlir/lib/Dialect/SparseTensor/Transforms/SparseTensorLowering.cpp
The file was modifiedmlir/test/Dialect/Linalg/sparse_vector.mlir
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/CMakeLists.txt
The file was addedmlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorOps.td
The file was addedmlir/include/mlir/Dialect/SparseTensor/IR/CMakeLists.txt
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Sparsification.cpp
The file was modifiedmlir/test/Dialect/Linalg/sparse_lower.mlir
The file was modifiedmlir/test/lib/Transforms/TestSparsification.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/CMakeLists.txt
The file was addedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sampled_matmul.mlir
The file was modifiedmlir/test/lib/Transforms/CMakeLists.txt
Commit 7e115da5df47dbbbef141987845c1258f0c52874 by jezng
[lld-macho] Make everything PIE by default

Modern versions of macOS (>= 10.7) and in general all modern Mach-O
target archs want PIEs by default. ld64 defaults to PIE for iOS >= 4.3,
as well as for all versions of watchOS and simulators. Basically all the
platforms LLD is likely to target want PIE. So instead of cluttering LLD's
code with legacy version checks, I think it's simpler to just default to
PIE for everything.

Note that `-no_pie` still works, so users can still opt out of it.

Reviewed By: #lld-macho, thakis, MaskRay

Differential Revision: https://reviews.llvm.org/D101513
The file was modifiedlld/MachO/Options.td
The file was modifiedlld/MachO/Driver.cpp
The file was modifiedlld/test/MachO/x86-64-reloc-unsigned.s
Commit d9c8ffa958b7725e7d3a2231701ab20eb477b9ee by jezng
[lld-macho][nfc] Clean up header.s test

I don't think it's super worthwhile to test the dylib headers outputs of
all the different archs when x86_64 is the only one that has interesting
behavior.

Motivated by my upcoming addition of arm32...
The file was addedlld/test/MachO/arm-relocs.s
The file was modifiedlld/test/MachO/header.s
Commit a64411916cc8b3e87cf767dc24b3bce52af92575 by tmsriram
Basic block sections for functions with implicit-section-name attribute

Functions can have section names set via #pragma or section attributes,
basic block sections should be correctly named for such functions.

With #pragma, the expectation is that all functions in that file are placed
in the same section in the final binary. Basic block sections should be
correctly named with the unique flag set so that the final binary has all the
basic blocks of the function in that named section. This patch fixes the bug
by calling getExplictSectionGlobal when implicit-section-name attribute is set
to make sure the function's basic blocks get the correct section name.

Differential Revision: https://reviews.llvm.org/D101311
The file was modifiedllvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
The file was addedllvm/test/CodeGen/X86/basic-block-sections-pragma-sections.ll
The file was modifiedllvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
The file was addedllvm/test/CodeGen/X86/basic-block-sections-named-section.ll
Commit 07884152ec5d2cc112332c5a1ce157968b77a6de by jezng
[lld-macho] Remove stray file
The file was removedlld/test/MachO/arm-relocs.s
Commit 6e859f3cd40946f4d866f18860dc13a6c5f675c9 by a.bataev
Revert "[COST] Improve shuffle kind detection if shuffle mask is provided."

This reverts commit 92399322217917e67c0d72a55ec51ddc82251cf6 to fix
a compiler crash on mask checks.
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/remark_extract_broadcast.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
Commit 12c51f23584252974b63180b7915e6e6f8df87de by a.bataev
[COST] Improve shuffle kind detection if shuffle mask is provided.

Added an extra analysis for better choosing of shuffle kind in
getShuffleCost functions for better cost estimation if mask was
provided.

Differential Revision: https://reviews.llvm.org/D100865
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/remark_extract_broadcast.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Commit 16d707e656ecd54934afe6c3adb5f710fd6bb36c by jay.foad
[AMDGPU] Fix v_swap_b32 formation on physical registers

As explained in the comments, matchSwap matches:

// mov t, x
// mov x, y
// mov y, t

and turns it into:

// mov t, x (t is potentially dead and move eliminated)
// v_swap_b32 x, y

On physical registers we don't have full use-def chains so the check
for T being live-out was not working properly with subregs/superregs.

Differential Revision: https://reviews.llvm.org/D101546
The file was modifiedllvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/v_swap_b32.mir
Commit b389c80963fb6276d5df62afe9bd4bd08239887b by benny.kra
[mlir] Fix lowering of multi-dimensional vector log1p to LLVM

This was using the untransformed operand, leading to invalid IR.

Differential Revision: https://reviews.llvm.org/D101531
The file was modifiedmlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp
The file was modifiedmlir/test/Conversion/StandardToLLVM/standard-to-llvm.mlir
Commit a047837b9063f33617abfa8abe0c408ab522b948 by listmail
Revert "Generalize getInvertibleOperand recurrence handling slightly"

This reverts commit 0c01b37eeb18a51a7e9c9153330d8009de0f600e while a problem reported is investigated.
The file was modifiedllvm/test/Analysis/ValueTracking/known-non-equal.ll
The file was modifiedllvm/lib/Analysis/ValueTracking.cpp
Commit 8f5a2a5836cc8e4c1def2bdeb022e7b496623439 by arnamoy.bhattacharyya
[flang][OpenMP][FIX] Fix the worksharing nesting check with inclusion of more constructs to cover combined constructs.
The file was modifiedflang/test/Semantics/omp-workshare04.f90
The file was modifiedflang/lib/Semantics/check-omp-structure.cpp
The file was modifiedflang/test/Semantics/omp-workshare05.f90
The file was modifiedflang/test/Semantics/omp-do05.f90
The file was modifiedflang/lib/Semantics/check-omp-structure.h
The file was modifiedflang/test/Semantics/omp-workshare01.f90
Commit 2b01a417d7ccb001ccc1185ef5fdc967c9fac8d7 by martin
[LLD] [COFF] Fix the mingw --export-all-symbols behaviour with comdat symbols

When looking for the "all" symbols that are supposed to be exported,
we can't look at the live flag - the symbols we mark as to be
exported will become GC roots even if they aren't yet marked as live.

With this in place, building an LLVM library with BUILD_SHARED_LIBS
produces the same set of symbols exported regardless of whether the
--gc-sections flag is specified, both with and without being built
with -ffunction-sections.

Differential Revision: https://reviews.llvm.org/D101522
The file was modifiedlld/COFF/MinGW.cpp
The file was modifiedlld/test/COFF/export-all.s
Commit 37789240882bfacd951767acdb4c088fcbf53385 by martin
[llvm-readobj] [ARMWinEH] Fix handling of relocations and symbol offsets

When looking up data referenced from pdata/xdata structures, the
referenced data can be found in two different ways:
- For an unrelocated object file, it's located via a relocation
- For a relocated, linked image, the data is referenced with an
  (image relative) absolute address

For the latter case, the absolute address can optionally be
described with a symbol.

For the case of an object file, there's two offsets involved; one
immediate offset encoded in the data location that is modified by
the relocation, and a section offset in the symbol.

Previously, for the ExceptionRecord field, we printed the offset
from the symbol (only) but used the immediate offset ignoring
the symbol's address (using only the symbol's section) for printing
the exception data.

Add a helper method for doing the lookup and address calculation,
for simplifying the calling code and making all the cases consistent.

This addresses an existing FIXME comment, fixing printing of the
exception data for cases where relocations point at individual
symbols in the xdata section (which is what MSVC generates) instead of
all relocations pointing at the start of the xdata section (which is
what LLVM generates).

This also fixes printing of the function name for packed entries in
linked images.

Differential Revision: https://reviews.llvm.org/D100305
The file was modifiedllvm/tools/llvm-readobj/ARMWinEHPrinter.cpp
The file was addedllvm/test/tools/llvm-readobj/COFF/arm64-packed-symbol-name.yaml
The file was addedllvm/test/tools/llvm-readobj/COFF/arm64-unwind-reference.yaml
The file was modifiedllvm/tools/llvm-readobj/ARMWinEHPrinter.h
Commit 086e0f05bfc2f5e24a016a037e01c1fcf8a5146a by joker.eph
Revert "[mlir][sparse] migrate sparse operations into new sparse tensor dialect"

This reverts commit a6d92a971175d727873a9e7644913ee02d7232a8.

The build with -DBUILD_SHARED_LIBS=ON is broken.
The file was removedmlir/include/mlir/Dialect/SparseTensor/CMakeLists.txt
The file was removedmlir/test/Dialect/SparseTensor/roundtrip.mlir
The file was addedmlir/lib/Dialect/Linalg/Transforms/SparseLowering.cpp
The file was addedmlir/test/Integration/Sparse/CPU/frostt-example.mlir
The file was removedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sampled_matmul.mlir
The file was addedmlir/test/Dialect/Linalg/sparse_roundtrip.mlir
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
The file was removedmlir/lib/Dialect/SparseTensor/Transforms/SparseTensorLowering.cpp
The file was modifiedmlir/test/lib/Transforms/TestSparsification.cpp
The file was removedmlir/include/mlir/Dialect/SparseTensor/Transforms/Transforms.h
The file was addedmlir/test/Integration/Sparse/CPU/sparse_sampled_matmul.mlir
The file was addedmlir/test/Dialect/Linalg/sparse_lower_calls.mlir
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Sparsification.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/CMakeLists.txt
The file was modifiedmlir/test/Dialect/Linalg/sparse_vector.mlir
The file was removedmlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorBase.td
The file was modifiedmlir/test/Dialect/Linalg/sparse_nd.mlir
The file was addedmlir/test/Integration/Sparse/CPU/lit.local.cfg
The file was modifiedmlir/include/mlir/Dialect/CMakeLists.txt
The file was addedmlir/test/Integration/Sparse/CPU/sparse_sum.mlir
The file was removedmlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorOps.td
The file was modifiedmlir/lib/Dialect/CMakeLists.txt
The file was removedmlir/test/Integration/Dialect/SparseTensor/CPU/frostt-example.mlir
The file was modifiedmlir/test/Dialect/Linalg/sparse_lower.mlir
The file was removedmlir/include/mlir/Dialect/SparseTensor/IR/CMakeLists.txt
The file was removedmlir/lib/Dialect/SparseTensor/IR/CMakeLists.txt
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/CMakeLists.txt
The file was removedmlir/test/Integration/Dialect/SparseTensor/CPU/lit.local.cfg
The file was modifiedmlir/include/mlir/InitAllDialects.h
The file was removedmlir/lib/Dialect/SparseTensor/CMakeLists.txt
The file was modifiedmlir/test/Dialect/Linalg/sparse_2d.mlir
The file was modifiedmlir/test/lib/Transforms/CMakeLists.txt
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgOps.h
The file was removedmlir/test/Integration/Dialect/SparseTensor/CPU/matrix-market-example.mlir
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgTypes.cpp
The file was modifiedmlir/test/Dialect/Linalg/sparse_1d.mlir
The file was modifiedmlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
The file was removedmlir/lib/Dialect/SparseTensor/Transforms/CMakeLists.txt
The file was modifiedmlir/test/Dialect/Linalg/sparse_3d.mlir
The file was removedmlir/lib/Dialect/SparseTensor/IR/SparseTensorDialect.cpp
The file was removedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_matvec.mlir
The file was removedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum.mlir
The file was removedmlir/test/Dialect/SparseTensor/lowering.mlir
The file was removedmlir/include/mlir/Dialect/SparseTensor/IR/SparseTensor.h
The file was addedmlir/test/Integration/Sparse/CPU/sparse_matvec.mlir
The file was modifiedmlir/test/mlir-opt/commandline.mlir
The file was addedmlir/test/Integration/Sparse/CPU/matrix-market-example.mlir
The file was addedmlir/include/mlir/Dialect/Linalg/IR/LinalgSparseOps.td
Commit 96ec6d91e4da6910c7038e02691285978668be10 by Amara Emerson
[AArch64][GlobalISel] Simplify out of range rotate amount.

Differential Revision: https://reviews.llvm.org/D101005
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/form-bitfield-extract-from-sextinreg.mir
The file was modifiedllvm/include/llvm/Target/GlobalISel/Combine.td
The file was modifiedllvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64Combine.td
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/postlegalizercombiner-rotate.mir
Commit 5bf2ef9d869ba882480232a4ed87728af74dac3b by martin
Revert "[llvm-readobj] [ARMWinEH] Fix handling of relocations and symbol offsets"

This reverts commit 37789240882bfacd951767acdb4c088fcbf53385.

The added test fails on at least one buildbot, by printing a reversed
combination, printing "func3_xdata +0x18 (0x8)" while it's supposed to
be "func3_xdata +0x8 (0x18)", see e.g.
https://lab.llvm.org/buildbot/#/builders/107/builds/7269. Currently
no idea how that could happen, but reverting until it can be figured
out.
The file was modifiedllvm/tools/llvm-readobj/ARMWinEHPrinter.h
The file was removedllvm/test/tools/llvm-readobj/COFF/arm64-unwind-reference.yaml
The file was removedllvm/test/tools/llvm-readobj/COFF/arm64-packed-symbol-name.yaml
The file was modifiedllvm/tools/llvm-readobj/ARMWinEHPrinter.cpp
Commit aaf026d9da3885a951dcdc5edd64c8e7d23b6285 by Lang Hames
[ORC] JITDylib::addDependencies should be run under the session lock.
The file was modifiedllvm/lib/ExecutionEngine/Orc/Core.cpp
Commit 74d9a76ad3f55c16982ceaa8b6b4a6b7744109b1 by vvereschaka
[CMake] Stop using c++ subdirectory for libc++ on Win to ARM Linux cross builds. NFC

Updated cross Win-x-ARM Linux toolchain cmake cache file in according of
the following changes: https://reviews.llvm.org/D100869

Stop using use c++ subdirectory for libc++ library
The file was modifiedclang/cmake/caches/CrossWinToARMLinux.cmake
Commit fa2340574c5b3208eaa17bf021be92cda7b6d308 by Amara Emerson
[GlobalISel][Legalizer] Bump up a smallvector size that was found to be too small. NFC.
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerInfo.cpp
Commit 3aaac01aab2f2e5c654f73e3424e92c53ba601a4 by zoecarver
[libcxx][ranges] Fix tests for stdlib types that conform to sized_sentinel_for.

Differential Revision: https://reviews.llvm.org/D101371
The file was modifiedlibcxx/test/std/containers/associative/map/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/sequences/deque/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/associative/set/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/associative/multiset/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/sequences/vector/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/strings/string.view/string.view.iterators/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/strings/basic.string/string.iterators/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/sequences/array/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/sequences/vector.bool/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/associative/multimap/iterator_concept_conformance.compile.pass.cpp
Commit 6b938d2ead2cb0465436496c0171c7d750e11773 by Alex Lorenz
Recommit "[clang][driver] Use the provided arch name for a Darwin target triple

This ensures that the Darwin driver uses a consistent target triple
representation when the triple is printed out to the user.

This reverts the revert commit ab0df6c0346e515291a381467527621ab0ccf953.

Differential Revision: https://reviews.llvm.org/D100807
The file was modifiedclang/test/Driver/aarch64-cpus.c
The file was modifiedclang/test/Driver/darwin-version.c
The file was modifiedclang/test/Driver/arm64_32-link.c
The file was modifiedclang/lib/Driver/ToolChains/Darwin.cpp
The file was modifiedclang/test/Driver/openmp-offload.c
The file was modifiedclang/test/Driver/default-toolchain.c
The file was modifiedclang/test/Driver/openmp-offload-gpu.c
Commit 7049fbf960df7ebf77f322a058a3eff9cb4a33cd by jasonliu
[XCOFF] Handle the case when personality routine is an alias

Summary:
Personality routine could be an alias to another personality routine.
Fix the situation when we compile the file that contains the personality
routine and the file also have functions that need to refer to the
personality routine.

Reviewed By: hubert.reinterpretcast

Differential Revision: https://reviews.llvm.org/D101401
The file was modifiedllvm/lib/Analysis/EHPersonalities.cpp
The file was modifiedllvm/lib/CodeGen/AsmPrinter/AIXException.cpp
The file was modifiedllvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
The file was addedllvm/test/CodeGen/PowerPC/aix-personality-alias.ll
Commit be01b091afd820c5784ba960241ea6140529b654 by rob.suderman
[mlir][tosa] Remove constant-0 dim expr values from TOSA lowerings

Constant-0 dim expr values should be avoided for linalg as it can prevent
fusion. This includes adding support for rank-0 reshapes.

Differential Revision: https://reviews.llvm.org/D101418
The file was modifiedmlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
The file was modifiedmlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
Commit cab48e2f0e00648ef0494ce114f4e00a3ded330f by zequanwu
[CodeGen] don't emit addrsig symbol if it's used only by metadata

Value only used by metadata can be removed from .addrsig table.
This solves the undefined symbol error when enabling addrsig table on COFF LTO.

Differential Revision: https://reviews.llvm.org/D101512
The file was modifiedllvm/lib/IR/Value.cpp
The file was modifiedllvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
The file was modifiedllvm/include/llvm/IR/Value.h
The file was modifiedllvm/test/CodeGen/X86/addrsig.ll
Commit 319072f4e3377c4703c25333a321140a6d63c59b by ajcbik
[mlir][sparse] migrate sparse operations into new sparse tensor dialect

This is the very first step toward removing the glue and clutter from linalg and
replace it with proper sparse tensor types. This revision migrates the LinalgSparseOps
into SparseTensorOps of a sparse tensor dialect. This also provides a new home for
sparse tensor related transformation.

NOTE: the actual replacement with sparse tensor types (and removal of linalg glue/clutter)
will follow but I am trying to keep the amount of changes per revision manageable.

Differential Revision: https://reviews.llvm.org/D101573
The file was removedmlir/test/Integration/Sparse/CPU/matrix-market-example.mlir
The file was addedmlir/test/Integration/Dialect/SparseTensor/CPU/frostt-example.mlir
The file was removedmlir/lib/Dialect/Linalg/Transforms/SparseLowering.cpp
The file was addedmlir/include/mlir/Dialect/SparseTensor/CMakeLists.txt
The file was removedmlir/include/mlir/Dialect/Linalg/IR/LinalgSparseOps.td
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Sparsification.cpp
The file was addedmlir/lib/Dialect/SparseTensor/Transforms/CMakeLists.txt
The file was removedmlir/test/Dialect/Linalg/sparse_roundtrip.mlir
The file was addedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_matvec.mlir
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgTypes.cpp
The file was addedmlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorOps.td
The file was removedmlir/test/Integration/Sparse/CPU/frostt-example.mlir
The file was modifiedmlir/include/mlir/Dialect/CMakeLists.txt
The file was modifiedmlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
The file was addedmlir/test/Dialect/SparseTensor/lowering.mlir
The file was addedmlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorBase.td
The file was addedmlir/lib/Dialect/SparseTensor/Transforms/SparseTensorLowering.cpp
The file was removedmlir/test/Dialect/Linalg/sparse_lower_calls.mlir
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/CMakeLists.txt
The file was modifiedmlir/test/Dialect/Linalg/sparse_1d.mlir
The file was modifiedmlir/test/Dialect/Linalg/sparse_2d.mlir
The file was modifiedmlir/test/mlir-opt/commandline.mlir
The file was modifiedmlir/lib/Dialect/CMakeLists.txt
The file was addedmlir/lib/Dialect/SparseTensor/CMakeLists.txt
The file was removedmlir/test/Integration/Sparse/CPU/lit.local.cfg
The file was modifiedmlir/include/mlir/InitAllDialects.h
The file was removedmlir/test/Integration/Sparse/CPU/sparse_matvec.mlir
The file was modifiedmlir/test/lib/Transforms/CMakeLists.txt
The file was addedmlir/lib/Dialect/SparseTensor/IR/CMakeLists.txt
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgOps.h
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/CMakeLists.txt
The file was addedmlir/lib/Dialect/SparseTensor/IR/SparseTensorDialect.cpp
The file was modifiedmlir/test/Dialect/Linalg/sparse_lower.mlir
The file was modifiedmlir/test/Dialect/Linalg/sparse_vector.mlir
The file was addedmlir/test/Dialect/SparseTensor/roundtrip.mlir
The file was addedmlir/include/mlir/Dialect/SparseTensor/Transforms/Transforms.h
The file was removedmlir/test/Integration/Sparse/CPU/sparse_sampled_matmul.mlir
The file was removedmlir/test/Integration/Sparse/CPU/sparse_sum.mlir
The file was addedmlir/include/mlir/Dialect/SparseTensor/IR/SparseTensor.h
The file was modifiedmlir/test/Dialect/Linalg/sparse_3d.mlir
The file was addedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum.mlir
The file was addedmlir/test/Integration/Dialect/SparseTensor/CPU/lit.local.cfg
The file was addedmlir/test/Integration/Dialect/SparseTensor/CPU/matrix-market-example.mlir
The file was addedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sampled_matmul.mlir
The file was modifiedmlir/test/lib/Transforms/TestSparsification.cpp
The file was addedmlir/include/mlir/Dialect/SparseTensor/IR/CMakeLists.txt
The file was modifiedmlir/test/Dialect/Linalg/sparse_nd.mlir
Commit 6b30240288fc6c0871ea92fcf77c944b0bdd43ad by zequanwu
Reland "[lld-link] Enable addrsig table in COFF lto"

This reverts commit a78fa73bcf986cf5912d665ecd9620535f480607.

The commit cab48e2f0e00648ef0494ce114f4e00a3ded330f fixes the issue on eabd55b1b2c5e322c3b36cb44348f178692890c8.
The file was modifiedlld/COFF/LTO.cpp
Commit 2e1d9ebd46b826b06f0a5882e992e3d84335f268 by Akira
[ObjC][ARC] Don't enter the cleanup scope if the initializer expression
isn't an ExprWithCleanups

This patch fixes a bug where a temporary ObjC pointer is released before
the end of the full expression.

This fixes PR50043.

rdar://77030453

Differential Revision: https://reviews.llvm.org/D101502
The file was modifiedclang/lib/CodeGen/CGDecl.cpp
The file was modifiedclang/test/CodeGenObjCXX/arc-blocks.mm
The file was modifiedclang/test/CodeGenObjCXX/arc.mm
Commit 75be3681d1a98e57f3e7d45343b8fd0a8286b56b by jianzhouzh
[msan] Remove dead function/fields

To see how to extract a shared allocator interface for D101204,
found some unused code. Tests passed. Are they safe to remove?

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D101559
The file was modifiedcompiler-rt/lib/memprof/memprof_allocator.h
The file was modifiedcompiler-rt/lib/msan/msan.h
The file was modifiedcompiler-rt/lib/msan/msan_allocator.h
Commit 809435e390e91355f64bee0142a65c4fe6e9f488 by Akira
[Sema] Don't set BlockDecl's DoesNotEscape bit if the parameter type of
the function the block is passed to isn't a block pointer type

This patch fixes a bug where a block passed to a function taking a
parameter that doesn't have a block pointer type (e.g., id or reference
to a block pointer) was marked as noescape.

This partially fixes PR50043.

rdar://77030453

Differential Revision: https://reviews.llvm.org/D101097
The file was modifiedclang/test/SemaObjCXX/noescape.mm
The file was modifiedclang/lib/Sema/SemaExprObjC.cpp
The file was modifiedclang/lib/Sema/SemaExpr.cpp
Commit 749702fc6ba268cb0096c09393db51a20bb5eb0d by carl.ritson
[AMDGPU] Remove dead early-out in GCNHazardRecognizer

Remove an early-out in wait state counting which can never be
taken.

Reviewed By: foad, rampitec

Differential Revision: https://reviews.llvm.org/D101520
The file was modifiedllvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
Commit 424f1f6f96d0e0f14d25b0d1f3e85b85aa6a8249 by carl.ritson
[AMDGPU][NFC] Refactor hazard recognition IsHazardFn and IsExpiredFn

Refactor IsHazardFn and IsExpiredFn to use constant references as these should not be mutating the instructions visited and the instruction can never be null.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D101430
The file was modifiedllvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
The file was modifiedllvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
Commit e6701e575cfd035d808edf2752881c4b6bba77d1 by Matthew.Arsenault
AMDGPU: Add missing runline to test

There are checks for gfx908, but this wasn't actually running with it.
The file was modifiedllvm/test/CodeGen/AMDGPU/agpr-csr.ll
Commit 1cf3d68f9731199b3f753c5a87826c40a4d2168b by Matthew.Arsenault
VirtRegMap: Add pass option to not clear virt regs

In a future change it will be possible to run register
allocation with a specific set of register classes,
so some of the remaining virtual registers will still
be meaningful.
The file was modifiedllvm/include/llvm/CodeGen/Passes.h
The file was modifiedllvm/lib/CodeGen/VirtRegMap.cpp
Commit 1141ba677e09156daec8ef31d3dcdae7f59f60c5 by walter erquinigo
[lldb-vscode] Follow up of D99989 - store some strings more safely

As a follow up of https://reviews.llvm.org/D99989#inline-953343, I'm now
storing std::string instead of char *. I know it might never break as char *,
but if it does, chasing that bug might be dauting.
Besides, I'm also checking of the strings gotten through the SB API are
null or not.
The file was modifiedlldb/tools/lldb-vscode/lldb-vscode.cpp
The file was modifiedlldb/tools/lldb-vscode/JSONUtils.cpp
The file was modifiedlldb/tools/lldb-vscode/JSONUtils.h
Commit 55a29c6b71c9b80353ccb17c0dd15dde5c9940b3 by Matthew.Arsenault
VirtRegMap: Support partially allocated virtual registers

Don't assert if there are unassigned virtual registers.  Maintain
LiveIntervals by removing the RegUnits for allocated registers, since
they should not longer be necessary.

One part I find somewhat questionable is the special handling
necessary for handleIdentityCopy. The LiveIntervals for the relevant
regunits needs to be removed.
The file was modifiedllvm/lib/CodeGen/VirtRegMap.cpp
Commit d7d85f72ef9b45b45472611196f6b97305832b9a by brendon.cahoon
[AArch64][GlobalISel] Fix width value for G_SBFX/G_UBFX

When creating G_SBFX/G_UBFX opcodes, the last operand is the
width instead of the bit position. The bit position is used
for the AArch64 SBFM and UBFM instructions. The bit position
is converted to a width if the SBFX/UBFX aliases are generated.
For other SBMF/UBFM aliases, such as shifts, the bit position
is used.

Differential Revision: https://reviews.llvm.org/D101543
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/select-ubfx.mir
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/form-bitfield-extract-from-sextinreg.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/select-sbfx.mir
Commit e0c7db7d8ce780df5129b4d0f5bbf145271ef14f by pengfei.wang
[MS] Preserve base register %rbx around cpuid

This patch copies implementation from cpuid.h, which preserve base register %rbx around cpuid. It fixes PR50133.

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D101338
The file was modifiedclang/test/CodeGen/ms-intrinsics-cpuid.c
The file was modifiedclang/lib/Headers/intrin.h
Commit 7259394b32d96bf981a1d9972514e98d3ac0b1da by Steven Wu
[CMake][compiler-rt] avoid conflict with builtin check_linker_flag

Rename `check_linker_flag` in compiler_rt to avoid conflict. Follow up
as the fix in D100901.

Patched by radford.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D101581
The file was modifiedcompiler-rt/cmake/config-ix.cmake
Commit 325b454ed8d8165fe63c03883ce7a3de0ec990c9 by 932494295
[RISCV] Precommit a test case that test accessing a fixed object when has rvv vector object existed

Differential Revision: https://reviews.llvm.org/D100284
The file was modifiedllvm/test/CodeGen/RISCV/rvv/localvar.ll
Commit 5603ed60ad6cd6370010e0746faef9f823c1fa72 by 932494295
[RISCV] Fix StackOffset calculation when using sp to access the fixed stack object in the case of rvv vector objects existed

When rvv vector objects existed, using sp to access the fixed stack object will pass the rvv vector objects field. So the StackOffset needs add a scalable offset of the size of rvv vector objects field

Differential Revision: https://reviews.llvm.org/D100286
The file was modifiedllvm/test/CodeGen/RISCV/rvv/localvar.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVFrameLowering.cpp
Commit 544be708641b2f3d58a1b86ae86c3ba460f41d10 by Christudasan.Devadasan
[AMDGPU] Skip promote-alloca for insertelement/insertvalue users

It is difficult to track the users of vector and aggregate types.

Reviewed by: arsenm

Differential Revision: https://reviews.llvm.org/D101562
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
The file was addedllvm/test/CodeGen/AMDGPU/skip-promote-alloca-vector-users.ll
Commit a3a798d49dfcc30fbe26bb865ac30ccda216c4a7 by aeubanks
[InlineCost] Remove visitUnaryInstruction()

The simplifyInstruction() in visitUnaryInstruction() does not trigger
for all of check-llvm. Looking at all delegates to UnaryInstruction in
InstVisitor, the only instructions that either don't have a visitor in
CallAnalyzer, or redirect to UnaryInstruction, are VAArgInst and Alloca.
VAArgInst will never get simplified, and visitUnaryInstruction(Alloca)
would always return false anyway.

Reviewed By: mtrofin, lebedev.ri

Differential Revision: https://reviews.llvm.org/D101577
The file was modifiedllvm/lib/Analysis/InlineCost.cpp
Commit bd48def3e2203e534f8f7345664a35f08f1d9c32 by qiucofan
Pre-commit test for PPC vector extraction test
The file was modifiedllvm/test/CodeGen/PowerPC/vec_extract_p9.ll
The file was modifiedllvm/test/CodeGen/PowerPC/vec_extract_p9_2.ll
Commit c027272ac260785849ae8afbb26742d5b7499ae5 by jianzhouzh
[msan] Add static to some msan allocator functions

This is to help review refactor the allocator code.
So it is easy to see which are the real public interfaces.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D101586
The file was modifiedcompiler-rt/lib/msan/msan_allocator.cpp
Commit b535459d0a1db37fca6688b8e15305e361debff5 by Jonas Devlieghere
[debugserver] Use add_lldb_library instead of add_library

Use add_lldb_library to ensure debugserver inherits the defines set by
llvm and lldb.

Differential revision: https://reviews.llvm.org/D101596
The file was modifiedlldb/tools/debugserver/source/CMakeLists.txt
Commit ed7bf7d73fa253c770c0e715db5262f359268c3a by dvyukov
tsan: refactor fork handling

Commit efd254b6362 ("tsan: fix deadlock in pthread_atfork callbacks")
fixed another deadlock related to atfork handling.
But builders with DCHECKs enabled reported failures of
pthread_atfork_deadlock2.c and pthread_atfork_deadlock3.c tests
related to the fact that we hold runtime locks on interceptor exit:
https://lab.llvm.org/buildbot/#/builders/70/builds/6727
This issue is somewhat inherent to the current approach,
we indeed execute user code (atfork callbacks) with runtime lock held.

Refactor fork handling to not run user code (atfork callbacks)
with runtime locks held. This change does this by installing
own atfork callbacks during runtime initialization.
Atfork callbacks run in LIFO order, so the expectation is that
our callbacks run last, right before the actual fork.
This way we lock runtime mutexes around fork, but not around
user callbacks.

Extend tests to also install after fork callbacks just to cover
more scenarios. Some tests also started reporting real races
that we previously suppressed.

Also extend tests to cover fork syscall support.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D101517
The file was modifiedcompiler-rt/test/tsan/pthread_atfork_deadlock2.c
The file was addedcompiler-rt/test/tsan/pthread_atfork_deadlock3.c
The file was addedcompiler-rt/test/tsan/Linux/fork_syscall.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_thread.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_mman.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_report.cpp
The file was modifiedcompiler-rt/test/tsan/pthread_atfork_deadlock.c
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_mutex.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.cpp
Commit 4750a8b1bcded31ba15d21b14530882092a9d5cc by martin
Reapply [llvm-readobj] [ARMWinEH] Fix handling of relocations and symbol offsets

When looking up data referenced from pdata/xdata structures, the
referenced data can be found in two different ways:
- For an unrelocated object file, it's located via a relocation
- For a relocated, linked image, the data is referenced with an
  (image relative) absolute address

For the latter case, the absolute address can optionally be
described with a symbol.

For the case of an object file, there's two offsets involved; one
immediate offset encoded in the data location that is modified by
the relocation, and a section offset in the symbol.

Previously, for the ExceptionRecord field, we printed the offset
from the symbol (only) but used the immediate offset ignoring
the symbol's address (using only the symbol's section) for printing
the exception data.

Add a helper method for doing the lookup and address calculation,
for simplifying the calling code and making all the cases consistent.

This addresses an existing FIXME comment, fixing printing of the
exception data for cases where relocations point at individual
symbols in the xdata section (which is what MSVC generates) instead of
all relocations pointing at the start of the xdata section (which is
what LLVM generates).

This also fixes printing of the function name for packed entries in
linked images.

Relanded with a format string fix in the formatSymbol function; one
can't use %X as format string for an uint64_t. That bug has been
present since this code was added in e6971cab306cd.

Differential Revision: https://reviews.llvm.org/D100305
The file was addedllvm/test/tools/llvm-readobj/COFF/arm64-packed-symbol-name.yaml
The file was modifiedllvm/tools/llvm-readobj/ARMWinEHPrinter.h
The file was modifiedllvm/tools/llvm-readobj/ARMWinEHPrinter.cpp
The file was addedllvm/test/tools/llvm-readobj/COFF/arm64-unwind-reference.yaml
Commit c81ec19fba27ec308607aac2e44234eee8e190d1 by eleviant
Fix -fdebug-pass-structure test case

Pass structure can change when -O0 is given and extensions are used.
The file was modifiedclang/test/Driver/debug-pass-structure.c
Commit b11a2f2544e880602b539c85c4445468d14b63a1 by martin
[cmake] Use -ffunction-sections and -Wl,--gc-sections on MinGW targets

If compiling with GCC or linking with ld.bfd, these options have little
effect, but if built with Clang and linked with LLD, they provide a
quite notable size decrease - this shrinks an entire llvm-mingw
distribution package by 22%.

If building with BUILD_SHARED_LIBS or LLVM_BUILD_LLVM_DYLIB with LLD,
this requires a version of LLD that contains a fix for auto exporting
symbols from comdats, 2b01a417d7ccb001ccc1185ef5fdc967c9fac8d7.

Differential Revision: https://reviews.llvm.org/D101568
The file was modifiedllvm/cmake/modules/AddLLVM.cmake
The file was modifiedllvm/cmake/modules/HandleLLVMOptions.cmake
Commit f251379a91d3731be079b701fda0d3551bb22b4e by jay.foad
[AMDGPU] Simplify getWaitStatesSince. NFC.
The file was modifiedllvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp

Summary

  1. [zorg] Add buildbot for Synopsys ARC (details)
  2. [zorg] Build and test project depends on project enabled in LibcxxAndAbiBuilder (details)
  3. Fixed bug introduced by D100497 - local variable jobs_flag referenced before assignment. (details)
  4. [zorg] Fix AnnotatedBuilder.py extra_args bug (details)
  5. Bumped urllib3 from 1.26.3 to 1.26.4. (details)
  6. Added enable_runtimes and enable_projects to LLVMBuildFactory. (details)
  7. Added support for LLVM_ENABLE_RUNTIMES to UnifiedTreeBuilder. (details)
  8. Documentation builds do not support LLVM_ENABLE_RUNTIMES. (details)
  9. Added support for LLVM_ENABLE_RUNTIMES to ClangLTOBuilder. (details)
  10. Changed LibcxxAndAbiBuilder to use LLVMBuildFactory enable_projects and enable_runtimes. (details)
Commit 41979ca6ea64a4f9a46675af188634d4fb40fa75 by danila
[zorg] Add buildbot for Synopsys ARC

Create AWS worker for LLVM Experimental Target : ARC

Reviewed By: gkistanova

Differential Revision: https://reviews.llvm.org/D101345
The file was modifiedbuildbot/osuosl/master/config/builders.py
The file was modifiedbuildbot/osuosl/master/config/status.py
The file was modifiedbuildbot/osuosl/master/config/workers.py
Commit c5e33710b23442d929d6646c71e1e31d0de2f106 by Xiangling.Liao
[zorg] Build and test project depends on project enabled in LibcxxAndAbiBuilder

Build and test project depends on project enabled in LibcxxAndAbiBuilder;
Let all steps respect env passed in;

Differential Revision: https://reviews.llvm.org/D100497
The file was modifiedzorg/buildbot/builders/LibcxxAndAbiBuilder.py
Commit 9710f7832a344854c51248164a0a4c55f2b6c1d1 by gkistanova
Fixed bug introduced by D100497 - local variable jobs_flag referenced before assignment.
The file was modifiedzorg/buildbot/builders/LibcxxAndAbiBuilder.py
Commit b766b0b8afb3cf857a9b0314aa807786d00372ee by enye.shi
[zorg] Fix AnnotatedBuilder.py extra_args bug

Do not assign WithProperties("--jobs=%(jobs:-)s") to
extra_args, because extra_args_with_props will perform
WithProperties(...) on all of the args in extra_args.

Reviewed By: tra

Differential Revision: https://reviews.llvm.org/D101575
The file was modifiedzorg/buildbot/builders/AnnotatedBuilder.py
Commit de05587afe1c1f79810a27ad77e39c485995dd98 by gkistanova
Bumped urllib3 from 1.26.3 to 1.26.4.
The file was modifiedrequirements.txt
Commit 2ed0c6ae25a4da897f23770f9a4976c3e19fff10 by gkistanova
Added enable_runtimes and enable_projects to LLVMBuildFactory.
The file was modifiedzorg/buildbot/process/factory.py
Commit 90c0b74c2ee54639b417bbda061c45ba8967ed9f by gkistanova
Added support for LLVM_ENABLE_RUNTIMES to UnifiedTreeBuilder.
The file was modifiedzorg/buildbot/builders/UnifiedTreeBuilder.py
Commit 4762fe8e3c66b6ca574eb0b5f2cbe99db079e6c7 by gkistanova
Documentation builds do not support LLVM_ENABLE_RUNTIMES.
The file was modifiedzorg/buildbot/builders/SphinxDocsBuilder.py
The file was modifiedzorg/buildbot/builders/DoxygenDocsBuilder.py
Commit 1a77335dfe7cff35bc736523ae7d9f801a470739 by gkistanova
Added support for LLVM_ENABLE_RUNTIMES to ClangLTOBuilder.
The file was modifiedzorg/buildbot/builders/ClangLTOBuilder.py
Commit a138f265e7a4fd9a6bf7288ca50361b4d7c0860f by gkistanova
Changed LibcxxAndAbiBuilder to use LLVMBuildFactory enable_projects and enable_runtimes.
The file was modifiedzorg/buildbot/builders/LibcxxAndAbiBuilder.py