FailedChanges

Summary

  1. [GISel] Teach TableGen to check predicates of immediate operands in patterns (details)
  2. tsan: fix fork syscall test (details)
  3. [llvm][Support][NFC] Fix fallthrough attribute indentation (details)
  4. [RISCV] Support STEP_VECTOR with a step greater than one (details)
  5. [RISCV][NFC] Merge RV32/RV64 test checks with a common prefix (details)
  6. [lldb] Add tests for DumpDataExtractor formats (details)
  7. [AArch64] Change __ARM_FEATURE_FP16FML macro name to  __ARM_FEATURE_FP16_FML (details)
  8. [JITLink] Minor fix to avoid Windows compiler warning for static-cast (details)
  9. [AMDGPU] Tidy up some simple expressions for clarity NFC (details)
  10. Wrap edit line configuration calls into helper functions (details)
  11. [InlineCost] CallAnalyzer: use TTI info for extractvalue - they are free (PR50099) (details)
  12. [AArch64][SVE] Lower index_vector to step_vector (details)
  13. [Passes] Run sinking/hoisting in SimplifyCFG earlier. (details)
  14. [Doc] Fix sphinx warnings about wrong code-block format (details)
  15. [NARY] Don't optimize min/max if there are side uses (part2) (details)
  16. clang-format: [JS] handle "off" in imports (details)
  17. Require shell for lld/test/MachO/reproduce.s (details)
  18. [clangd][NFC] Remove unnecessary string captures in lambdas. (details)
  19. [ARM][MVE] vcreateq lane ordering for big endian (details)
  20. [libc++] Minor cleanups in <iterator>. NFCI. (details)
  21. [libc++] [test] Run the clang-format and generated-output checks on the "service" queue (details)
  22. [AMDGPU] Fix inconsistent ---/... in MIR tests and regenerate checks (details)
  23. [clang] Refactor mustprogress handling, add it to all loops in c++11+. (details)
  24. [MCA] Fix CarryOver check in the DispatchStage (PR50174). (details)
  25. [lld/mac] Tweak two comments and fix style on one variable name (details)
  26. [docs]Added llvm/bindings section (details)
  27. [lld/mac] Remove unused -L%t flags from tests (details)
  28. [OpenCL] Prevent adding vendor extensions for all targets (details)
  29. [AMDGPU] Add implicit negative check for the set_gpr_idx tests (details)
  30. [VP,Integer,#2] ExpandVectorPredication pass (details)
  31. [VE] VP intrinsics are legal (details)
  32. [gn build] Port 43bc584dc05e (details)
  33. sanitizer_common: introduce kInvalidTid/kMainTid (details)
  34. [AMDGPU] Add test for set_gpr_idx removal with conditional branches (details)
  35. [clang] Fix assert() crash when checking undeduced arg alignment (details)
  36. [XCOFF][AIX] Add Global Variables Directly to TOC for 32 bit AIX (details)
  37. [PowerPC] Add new infrastructure to select load/store instructions, update P8/P9 load/store patterns. (details)
  38. [SimpleLoopUnswitch] Port partially invariant unswitch from LoopUnswitch to SimpleLoopUnswitch (details)
  39. [lldb] More tests for DumpDataExtractor (details)
  40. AMDGPU/llvm-readobj: Add missing tests for note parsing/displaying (details)
  41. [TableGen] Fix two bugs in 'defm' when complex 'assert' is involved. (details)
  42. [CodeGen][ARM] Implement atomicrmw as pseudo operations at -O0 (details)
  43. [lldb] DumpDataExtractor tests for item byte size errors (details)
  44. Revert "[CodeGen][ARM] Implement atomicrmw as pseudo operations at -O0" (details)
  45. [lldb] Change DumpDataExtractorTest function names to lldb style (NFC) (details)
  46. [AArch64][SVE] Remove unused function missed from D101302 (details)
  47. [analyzer] Fix assertion in SVals.h (details)
  48. [flang] Allow KIND type parameters to be used as LEN parameters of components (details)
  49. [clang] Update comments on another libstdc++ HACK (details)
  50. [AArch64] Adds a pre-indexed paired Load/Store optimization for LDR-STR. (details)
  51. [SLP]Fix the crash on cost calculation if non-compatible vectors shuffled. (details)
  52. [libcxx][ranges] adds `range` access CPOs (details)
  53. [libcxx][ranges] adds `ranges::range`, `ranges::common_range`, and range aliases (details)
  54. [gn build] Port 5a3309f82576 (details)
  55. [gn build] Port 7c17731596e9 (details)
  56. [NFC] Refactor ExecuteAssembler in cc1as_main.cpp (details)
  57. [ADT] Add STLForwardCompat.h and llvm::disjunction (details)
  58. [gn build] Port c6f20d70a8c9 (details)
  59. [OpenMP][CMake] Use in-project clang as CUDA->IR compiler. (details)
  60. [AArch64] Fix lowering for fshl/fshr with SVE types. (details)
  61. Add patterns to lower vector.multi_reduction into a sequence of vector.reduction (details)
  62. Support: Stop using F_{None,Text,Append} compatibility synonyms, NFC (details)
  63. [libc++] Revert the change that runs clang-format and generated-output in the service queue (details)
  64. [ADT] Add llvm::remove_cvref and llvm::remove_cvref_t (details)
  65. [M68k] fix -Wdefaulted-function-deleted and -Woverloaded-virtual (details)
  66. [llvm-objdump] add -v alias for --version (details)
  67. [libcxx] Use joined format for include flag on Windows (details)
  68. Revert "AMDGPU/llvm-readobj: Add missing tests for note parsing/displaying" (details)
  69. [libc++] [test] Recommit the unsetting of LC_COLLATE in the builder script. (details)
  70. [llvm-reduce] Add flag to only run specific passes (details)
  71. [NFC][tsan] Fix cast after D101428 (details)
  72. [llvm-reduce] Don't unset dso_local on implicitly dso_local GVs (details)
  73. [MachineFunction] Make comment for TracksLiveness more clearer (details)
  74. [InstCombine] Added tests for PR50172, NFC (details)
  75. [TTI] NFC: Change getTypeLegalizationCost to return InstructionCost. (details)
  76. [libc++] Fix constexpr-ness of std::tuple's constructor (details)
  77. [lld-macho] Initial scaffolding for ARM32 support (details)
  78. [lld-macho] Parse & emit the N_ARM_THUMB_DEF symbol flag (details)
  79. [gn build] Port 2d28100bf2e4 (details)
  80. [OpenMP] Fix second debug name from map clause (details)
  81. [tsan] Remove special SyncClock::kInvalidTid (details)
  82. Add support for llvm.assume intrinsic to the LoadStoreVectorizer pass (details)
  83. asan: fix a windows test (details)
  84. [ValueTracking] Limit scan when checking poison UB (PR50155) (details)
  85. [ValueTracking] Slightly clean up programUndefinedIfUndefOrPoison() (NFC) (details)
  86. [AMDGPU] Remove set_gpr_idx instructions in conditional blocks (details)
  87. [NewPM] Disable RelLookupTableConverter pass in LTO (details)
  88. [llvm-readobj] Recognize N_THUMB_DEF as a symbol flag (details)
  89. [EarlyIfConversion] Avoid producing selects with identical operands (details)
  90. [AArch64][GlobalISel] Use a single MachineIRBuilder for most of isel. NFC. (details)
  91. Revert "[EarlyIfConversion] Avoid producing selects with identical operands" (details)
  92. [libc++] Remove the line of stdout output from this generator. NFCI. (details)
  93. [libc++] [test] Add a debug-mode CI. (details)
  94. [X86] Promote 16-bit CTTZ_ZERO_UNDEF to 32-bit variant (details)
  95. [libcxx][iterator][ranges] adds `input_iterator` and `input_range` (details)
  96. [PowerPC] modernize test via update_llc_test_checks.py. NFC (details)
  97. [EarlyIfConversion] Avoid producing selects with identical operands (details)
  98. [dfsan] Fix origin tracking for fast8 (details)
  99. Revert "[DebugInfo] Drop DBG_VALUE_LISTs with an excessive number of debug operands" (details)
  100. Revert "[VP,Integer,#2] ExpandVectorPredication pass" (details)
  101. [libc++] s/begin.h/access.h/ in comments. NFCI. (details)
  102. [gn build] Port 02c5ba867987 (details)
  103. [PowerPC] Provide fastmath sqrt and div functions in altivec.h (details)
  104. [ELF] Simplify the condition adding .got header (details)
  105. Correct tiny misspelling (readlef -> readelf). (details)
  106. [PowerPC] Add missing requirement to test case (details)
  107. [PowerPC] Add floating point overloads for vec_sldw (details)
  108. [clang][driver][darwin] use the deployment target version as the SDK version (details)
  109. [mlir][sparse] sparse tensor type encoding migration (new home, new builders) (details)
  110. [libc++] [LIBCXX-DEBUG-FIXME] <span>, like <string_view>, has no use for debug iterators. (details)
  111. Revert "Re-reapply "[DebugInfo] Use variadic debug values to salvage BinOps and GEP instrs with non-const operands"" (details)
Commit 97ed1b6036074e66dd926b6720f087b9964a7286 by dominik.montada
[GISel] Teach TableGen to check predicates of immediate operands in patterns

Reviewed By: dsanders

Differential Revision: https://reviews.llvm.org/D91703
The file was modifiedllvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
The file was modifiedllvm/utils/TableGen/GlobalISelEmitter.cpp
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h
The file was addedllvm/test/TableGen/immarg-predicated.td
Commit b6df85290118d17c1dddf412a1a44a83158133e3 by dvyukov
tsan: fix fork syscall test

Arm64 builders failed with:
error: use of undeclared identifier 'SYS_fork'
https://lab.llvm.org/buildbot/#/builders/7/builds/2575

Indeed, not all arches have fork syscall.
Implement fork via clone on these arches.

Differential Revision: https://reviews.llvm.org/D101603
The file was modifiedcompiler-rt/test/tsan/Linux/fork_syscall.cpp
Commit 95157860aeecde33da8dc75c67823ac9ea9c58ff by tbaeder
[llvm][Support][NFC] Fix fallthrough attribute indentation

The attribute does not belong to the if statement before and trips up
gcc's indentation checker.
The file was modifiedllvm/lib/Support/GraphWriter.cpp
Commit 791766e6d2e14f437a0b765cb7133c1509ac378e by fraser
[RISCV] Support STEP_VECTOR with a step greater than one

DAGCombiner was recently taught how to combine STEP_VECTOR nodes,
meaning the step value is no longer guaranteed to be one by the time it
reaches the backend for lowering.

This patch supports such cases on RISC-V by lowering to other step
values to a multiply following the vid.v instruction. It includes a
small optimization for common cases where the multiply can be expressed
as a shift left.

Reviewed By: rogfer01

Differential Revision: https://reviews.llvm.org/D100856
The file was modifiedllvm/test/CodeGen/RISCV/rvv/stepvector.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
Commit 1d85b247628521f52a9cb8c9a7ccd3ea480a88ec by fraser
[RISCV][NFC] Merge RV32/RV64 test checks with a common prefix
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract.ll
Commit 8fdfc1d64c51d949b84b2ee824f2ba9b9a3a6bd6 by david.spickett
[lldb] Add tests for DumpDataExtractor formats

Covering basic cases where you have 1 item on 1 line.

Apart from eFormatCharArray, where using multiple lines
highlights the difference between it and eFormatVectorOfChar.

Reviewed By: #lldb, teemperor

Differential Revision: https://reviews.llvm.org/D101453
The file was modifiedlldb/unittests/Core/CMakeLists.txt
The file was addedlldb/unittests/Core/DumpDataExtractorTest.cpp
Commit 109bf25e2c425ea5dd20836f25176cf9d9479016 by keith.walker
[AArch64] Change __ARM_FEATURE_FP16FML macro name to  __ARM_FEATURE_FP16_FML

The "Arm C Language extensions" document (the current version can be
found at https://developer.arm.com/documentation/101028/0012/?lang=en)
states that the name of the feature test macro for the FP16 FML extension
is __ARM_FEATURE_FP16_FML.

Differential Revision: https://reviews.llvm.org/D101532
The file was modifiedclang/lib/Basic/Targets/AArch64.cpp
The file was modifiedclang/include/clang/Basic/arm_neon.td
The file was modifiedclang/test/Preprocessor/aarch64-target-features.c
Commit 417b1164c28ef526cfe3ccab70d22598b7c63624 by david.stuttard
[JITLink] Minor fix to avoid Windows compiler warning for static-cast

Change-Id: Id0c1d5535b53e2aebe314151c0efa585e763f3f6

Differential Revision: https://reviews.llvm.org/D100093
The file was modifiedllvm/lib/ExecutionEngine/JITLink/x86_64.cpp
Commit a67a377014ceaaed55b2ba2259e080bc3fc42b43 by david.stuttard
[AMDGPU] Tidy up some simple expressions for clarity NFC

Slight refactor for clarity.

Change-Id: Ib25e7f4582c67a7c57f066cfd5382c1405d7d4c5

Differential Revision: https://reviews.llvm.org/D101610
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Commit fd89af6880f33ead708abe2f7d88ecb687d4e0d2 by Raphael Isemann
Wrap edit line configuration calls into helper functions

Currently we call el_set directly to configure the editor in the libedit
wrapper.  There are some cases in which this causes extra casting, but we pass
captureless lambdas as function pointers, which should work out of the box.
Since el_set takes varargs, if the cast is incorrect or if the cast is not
present, it causes a run time failure rather than compile error.  This change
makes it so a few different types of configuration is done inside a helper
function to provide type safety and eliminate that casting.  I didn't do all
edit line configuration because I'm not sure how important it was in other cases
and it might require something more general keep up with libedit's signature.
I'm open to suggestions, though.

Reviewed By: teemperor, JDevlieghere

Differential Revision: https://reviews.llvm.org/D101250
The file was modifiedlldb/include/lldb/Host/Editline.h
The file was modifiedlldb/source/Host/common/Editline.cpp
Commit ba5b015b0de13b412d73d127ca181115c5e78717 by lebedev.ri
[InlineCost] CallAnalyzer: use TTI info for extractvalue - they are free (PR50099)

It seems incorrect to use TTI data in some places,
and override it in others. In this case, TTI says
that `extractvalue` are free, yet we bill them.

While this doesn't address https://bugs.llvm.org/show_bug.cgi?id=50099 yet,
it reduces the cost from 55 to 50 while the threshold is 45.

Differential Revision: https://reviews.llvm.org/D101228
The file was modifiedllvm/lib/Analysis/InlineCost.cpp
The file was modifiedllvm/test/Transforms/Inline/X86/extractvalue.ll
Commit b310dd15017f9aecd1ecc84b896d346075282a34 by JunMa
[AArch64][SVE] Lower index_vector to step_vector

As discussed in D100107, this patch first convert index_vector to
step_vector, and convert step_vector back to index_vector after LegalizeDAG.

Differential Revision: https://reviews.llvm.org/D100816
The file was modifiedllvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
The file was modifiedllvm/test/CodeGen/AArch64/sve-intrinsics-index.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/lib/Target/AArch64/SVEInstrFormats.td
Commit ed9df5bd2f50b2199204cc6e50910ba52dd5e93e by flo
[Passes] Run sinking/hoisting in SimplifyCFG earlier.

Hoisting and sinking instructions out of conditional blocks enables
additional vectorization by:

1. Executing memory accesses unconditionally.
2. Reducing the number of instructions that need predication.

After disabling early hoisting / sinking, we miss out on a few
vectorization opportunities. One of those is causing a ~10% performance
regression in one of the Geekbench benchmarks on AArch64.

This patch tires to recover the regression by running hoisting/sinking
as part of a SimplifyCFG run after LoopRotate and before LoopVectorize.

Note that in the legacy pass-manager, we run LoopRotate just before
vectorization again and there's no SimplifyCFG run in between, so the
sinking/hoisting may impact the later run on LoopRotate. But the impact
should be limited and the benefit of hosting/sinking at this stage
should outweigh the risk of not rotating.

Compile-time impact looks slightly positive for most cases.
http://llvm-compile-time-tracker.com/compare.php?from=2ea7fb7b1c045a7d60fcccf3df3ebb26aa3699e5&to=e58b4a763c691da651f25996aad619cb3d946faf&stat=instructions

NewPM-O3: geomean -0.19%
NewPM-ReleaseThinLTO: geoman -0.54%
NewPM-ReleaseLTO-g: geomean -0.03%

With a few benchmarks seeing a notable increase, but also some
improvements.

Alternative to D101290.

Reviewed By: lebedev.ri

Differential Revision: https://reviews.llvm.org/D101468
The file was modifiedllvm/lib/Passes/PassBuilder.cpp
The file was modifiedllvm/test/Transforms/PGOProfile/thinlto_cspgo_use.ll
The file was modifiedllvm/test/Transforms/PGOProfile/Inputs/thinlto_cspgo_bar_use.ll
The file was modifiedllvm/lib/Transforms/IPO/PassManagerBuilder.cpp
The file was modifiedllvm/test/Transforms/PhaseOrdering/AArch64/hoisting-sinking-required-for-vectorization.ll
The file was modifiedllvm/test/Transforms/PGOProfile/cspgo_profile_summary.ll
Commit 76f84e772978a3daef33df5bea7da676a0163f28 by alexey.bader
[Doc] Fix sphinx warnings about wrong code-block format

Differential Revision: https://reviews.llvm.org/D101549
The file was modifiedclang/docs/SYCLSupport.rst
Commit 7861cb600cd6f1905df3d1055ea910a07e2c3c4f by ybrevnov
[NARY] Don't optimize min/max if there are side uses (part2)

Previous attempt to fix infinite recursion in min/max reassociation was not fully successful (D100170). Newly discovered failing case is due to not properly handled when there is a single use. It should be processed separately from 2 uses case.

Reviewed By: mkazantsev

Differential Revision: https://reviews.llvm.org/D101359
The file was modifiedllvm/test/Transforms/NaryReassociate/nary-req.ll
The file was modifiedllvm/lib/Transforms/Scalar/NaryReassociate.cpp
Commit b2780cd744eaad6f5c7f39165054cf7000a1ff07 by martin
clang-format: [JS] handle "off" in imports

Previously, the JavaScript import sorter would ignore `// clang-format
off` and `on` comments. This change fixes that. It tracks whether
formatting is enabled for a stretch of imports, and then only sorts and
merges the imports where formatting is enabled, in individual chunks.

This means that there's no meaningful total order when module references are mixed
with blocks that have formatting disabled. The alternative approach
would have been to sort all imports that have formatting enabled in one
group. However that raises the question where to insert the
formatting-off block, which can also impact symbol visibility (in
particular for exports). In practice, sorting in chunks probably isn't a
big problem.

This change also simplifies the general algorithm: instead of tracking
indices separately and sorting them, it just sorts the vector of module
references. And instead of attempting to do fine grained tracking of
whether the code changed order, it just prints out the module references
text, and compares that to the previous text. Given that source files
typically have dozens, but not even hundreds of imports, the performance
impact seems negligible.

Differential Revision: https://reviews.llvm.org/D101515
The file was modifiedclang/lib/Format/SortJavaScriptImports.cpp
The file was modifiedclang/unittests/Format/SortImportsTestJS.cpp
Commit cbe62f2f2f1e7e514fdf10d9bfc604921e7eba89 by hans
Require shell for lld/test/MachO/reproduce.s

as a way of not running it on Windows, where the file paths when
extracting repro2.tar can become longer than the maximum file length
limit (depending on the build dir name) and cause the test to fail.

(See https://crbug.com/1204463 for example test failure.)
The file was modifiedlld/test/MachO/reproduce.s
Commit 6815037085945be8bb758c23b1a5daabe0a8667d by n.james93
[clangd][NFC] Remove unnecessary string captures in lambdas.

Due to a somewhat annoying, but necessary, shortfall in -Wunused-lambda-capture, These unused captures aren't warned about.

Reviewed By: kadircet

Differential Revision: https://reviews.llvm.org/D101611
The file was modifiedclang-tools-extra/clangd/ClangdServer.cpp
The file was modifiedclang-tools-extra/clangd/ClangdLSPServer.cpp
Commit b14a6f06cc8763830a25023edf5b9ccee18e426a by tomas.matheson
[ARM][MVE] vcreateq lane ordering for big endian

Use of bitcast resulted in lanes being swapped for vcreateq with big
endian. Fix this by using vreinterpret. No code change for little
endian. Adds IR lit test.

Differential Revision: https://reviews.llvm.org/D101606
The file was modifiedclang/include/clang/Basic/arm_mve.td
The file was modifiedclang/test/CodeGen/arm-mve-intrinsics/admin.c
Commit 5f51fb3421e0254f6d88673b61053bd485c13a41 by arthur.j.odwyer
[libc++] Minor cleanups in <iterator>. NFCI.
The file was modifiedlibcxx/include/iterator
Commit 6712534ebc6f84f0b178a19bf17b7b2bd852f6eb by arthur.j.odwyer
[libc++] [test] Run the clang-format and generated-output checks on the "service" queue

As these jobs only run in a couple seconds, and block starting of
other jobs, they can run on the "service" queue which doesn't get
blocked by other long-running jobs.

Differential Revision: https://reviews.llvm.org/D101437
The file was modifiedlibcxx/utils/ci/run-buildbot
The file was modifiedlibcxx/utils/ci/buildkite-pipeline.yml
Commit 66b8a16cc07c20f97f21c61d880f7924d47e597b by jay.foad
[AMDGPU] Fix inconsistent ---/... in MIR tests and regenerate checks

In some cases the lack of --- or ... confused update_mir_test_checks.py
into not adding any checks for a function.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/sgpr-spill.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/accvgpr-copy.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/pei-build-spill-partial-agpr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/combine-sext-inreg.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/i1-copies-rpo.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/set-gpr-idx-peephole.mir
Commit 6c3129549374c0e81e28fd0a21e96f8087b63a78 by flo
[clang] Refactor mustprogress handling, add it to all loops in c++11+.

Currently Clang does not add mustprogress to inifinite loops with a
known constant condition, matching C11 behavior. The forward progress
guarantee in C++11 and later should allow us to add mustprogress to any
loop (http://eel.is/c++draft/intro.progress#1).

This allows us to simplify the code dealing with adding mustprogress a
bit.

Reviewed By: aaron.ballman, lebedev.ri

Differential Revision: https://reviews.llvm.org/D96418
The file was modifiedclang/lib/CodeGen/CGStmt.cpp
The file was modifiedclang/lib/CodeGen/CodeGenFunction.cpp
The file was modifiedclang/test/CodeGenCXX/attr-mustprogress.cpp
The file was modifiedclang/test/CodeGen/attr-mustprogress.c
The file was modifiedclang/lib/CodeGen/CodeGenFunction.h
Commit 8bd4f3d5474b3a97933476fb6646496d4c525468 by andrea.dibiagio
[MCA] Fix CarryOver check in the DispatchStage (PR50174).

Early exit from method DispatchStage::isAvailable() if the dispatch group is
already full. Not all instructions declare at least one uOP.
Fixes PR50174.
The file was modifiedllvm/lib/MCA/Stages/DispatchStage.cpp
The file was addedllvm/test/tools/llvm-mca/ARM/cortex-a57-carryover.s
Commit 4b456038e4372b7f5199ffcfaaae11364b73837d by thakis
[lld/mac] Tweak two comments and fix style on one variable name

Cosmetic, no behavior change.
The file was modifiedlld/MachO/InputFiles.cpp
Commit cfb95f6f916dfd518e89c545e2988e2c7bc56fd3 by shivam98.tkg
[docs]Added llvm/bindings section

Added information about language bindings provided by LLVM.

Reviewed By: xgupta, gandhi21299

Differential Revision: https://reviews.llvm.org/D101295
The file was modifiedllvm/docs/GettingStarted.rst
Commit a1a2a8e8acef1061215d1baa442755b472cc1448 by thakis
[lld/mac] Remove unused -L%t flags from tests

No behavior change.

Differential Revision: https://reviews.llvm.org/D101623
The file was modifiedlld/test/MachO/weak-definition-order.s
The file was modifiedlld/test/MachO/weak-definition-indirect-fetch.s
The file was modifiedlld/test/MachO/weak-definition-direct-fetch.s
Commit 3ec82e519513b231bb0e8dd5e098c4c5a51501a2 by anastasia.stulova
[OpenCL] Prevent adding vendor extensions for all targets

Removed extension begin/end pragma as it has no effect and
it is added unconditionally for all targets.

Differential Revision: https://reviews.llvm.org/D92244
The file was modifiedclang/lib/Headers/opencl-c.h
The file was modifiedclang/test/Headers/opencl-c-header.cl
The file was modifiedclang/lib/Headers/opencl-c-base.h
Commit 181c492ee72c2234e50a60dda467a587f1e8dc08 by jay.foad
[AMDGPU] Add implicit negative check for the set_gpr_idx tests

The only effect of the optimization is to remove s_set_gpr_idx_*
instructions, and update_mir_test_checks.py always inserts CHECK: rather
than CHECK-NEXT: checks, so without this implicit negative check, the
tests would always pass even if the optimization did nothing.

Differential Revision: https://reviews.llvm.org/D101622
The file was modifiedllvm/test/CodeGen/AMDGPU/set-gpr-idx-peephole.mir
Commit 43bc584dc05e24c6d44ece8e07d4bff585adaf6d by simon.moll
[VP,Integer,#2] ExpandVectorPredication pass

This patch implements expansion of llvm.vp.* intrinsics
(https://llvm.org/docs/LangRef.html#vector-predication-intrinsics).

VP expansion is required for targets that do not implement VP code
generation. Since expansion is controllable with TTI, targets can switch
on the VP intrinsics they do support in their backend offering a smooth
transition strategy for VP code generation (VE, RISC-V V, ARM SVE,
AVX512, ..).

Reviewed By: rogfer01

Differential Revision: https://reviews.llvm.org/D78203
The file was modifiedllvm/include/llvm/LinkAllPasses.h
The file was addedllvm/include/llvm/CodeGen/ExpandVectorPredication.h
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h
The file was modifiedllvm/lib/IR/IntrinsicInst.cpp
The file was modifiedllvm/lib/CodeGen/TargetPassConfig.cpp
The file was modifiedllvm/tools/llc/llc.cpp
The file was modifiedllvm/include/llvm/CodeGen/Passes.h
The file was modifiedllvm/test/CodeGen/X86/O0-pipeline.ll
The file was addedllvm/lib/CodeGen/ExpandVectorPredication.cpp
The file was modifiedllvm/include/llvm/InitializePasses.h
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h
The file was modifiedllvm/include/llvm/IR/IntrinsicInst.h
The file was modifiedllvm/tools/opt/opt.cpp
The file was modifiedllvm/include/llvm/CodeGen/MachinePassRegistry.def
The file was modifiedllvm/test/CodeGen/ARM/O3-pipeline.ll
The file was modifiedllvm/lib/CodeGen/CMakeLists.txt
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp
The file was modifiedllvm/test/CodeGen/AArch64/O0-pipeline.ll
The file was addedllvm/test/CodeGen/Generic/expand-vp.ll
The file was modifiedllvm/test/CodeGen/AArch64/O3-pipeline.ll
The file was modifiedllvm/test/CodeGen/X86/opt-pipeline.ll
Commit 7a8664561116cd3c1ce2e66826c479649ae741b9 by simon.moll
[VE] VP intrinsics are legal
The file was modifiedllvm/lib/Target/VE/VETargetTransformInfo.h
Commit 4978bf65adbcd1674cec33c49d646d55694b03ef by llvmgnsyncbot
[gn build] Port 43bc584dc05e
The file was modifiedllvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
Commit 92a3a2dc3eb69ff4f20ec27f68d9923cf3201bf3 by dvyukov
sanitizer_common: introduce kInvalidTid/kMainTid

Currently we have a bit of a mess related to tids:
- sanitizers re-declare kInvalidTid multiple times
- some call it kUnknownTid
- implicit assumptions that main tid is 0
- asan/memprof claim their tids need to fit into 24 bits,
   but this does not seem to be true anymore
- inconsistent use of u32/int to store tids

Introduce kInvalidTid/kMainTid in sanitizer_common
and use them consistently.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D101428
The file was modifiedcompiler-rt/lib/asan/asan_descriptions.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_report.cpp
The file was modifiedcompiler-rt/lib/sanitizer_common/tests/sanitizer_thread_registry_test.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_sync.h
The file was modifiedcompiler-rt/lib/lsan/lsan_posix.cpp
The file was modifiedcompiler-rt/lib/lsan/lsan_common.h
The file was modifiedcompiler-rt/lib/lsan/lsan_thread.cpp
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_thread_registry.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_clock.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_defs.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.cpp
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_internal_defs.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.h
The file was modifiedcompiler-rt/lib/asan/asan_thread.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_mutex.cpp
The file was modifiedcompiler-rt/lib/asan/asan_allocator.cpp
The file was modifiedcompiler-rt/lib/memprof/memprof_thread.cpp
The file was modifiedcompiler-rt/lib/memprof/memprof_thread.h
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_thread_registry.h
The file was modifiedcompiler-rt/lib/lsan/lsan_interceptors.cpp
The file was modifiedcompiler-rt/lib/memprof/memprof_descriptions.cpp
The file was modifiedcompiler-rt/lib/asan/asan_thread.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_thread.cpp
Commit e2a2df2a1e96a523dd7c0f8fb1eb5935aa6b4d09 by jay.foad
[AMDGPU] Add test for set_gpr_idx removal with conditional branches
The file was modifiedllvm/test/CodeGen/AMDGPU/set-gpr-idx-peephole.mir
Commit fbfcfdbf6828b8d36f4ec0ff5f4eac11fb1411a5 by adamcz
[clang] Fix assert() crash when checking undeduced arg alignment

There already was a check for undeduced and incomplete types, but it
failed to trigger when outer type (SubstTemplateTypeParm in test) looked
fine, but inner type was not.

Differential Revision: https://reviews.llvm.org/D100667
The file was modifiedclang/test/SemaCXX/recovery-expr-type.cpp
The file was modifiedclang/lib/Sema/SemaExpr.cpp
The file was modifiedclang/lib/Sema/SemaChecking.cpp
Commit 70c433a184a54819835e54c62c3e6891e7069861 by sidharth.baveja
[XCOFF][AIX] Add Global Variables Directly to TOC for 32 bit AIX

Summary:
This patch implements the backend implementation of adding global variables
directly to the table of contents (TOC), rather than adding the address of the
variable to the TOC.
Currently, this patch will look for the "toc-data" attribute on symbols in the
IR, and then add those symbols to the TOC.
ATM, this is implemented for 32 bit AIX.

Reviewers: sfertile
Differential Revision: https://reviews.llvm.org/D101178
The file was modifiedllvm/lib/MC/XCOFFObjectWriter.cpp
The file was addedllvm/test/CodeGen/PowerPC/basic-toc-data-def.ll
The file was addedllvm/test/CodeGen/PowerPC/toc-data.ll
The file was addedllvm/test/CodeGen/PowerPC/basic-toc-data-local-linkage.ll
The file was modifiedllvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
The file was addedllvm/test/CodeGen/PowerPC/basic-toc-data-extern.ll
The file was modifiedllvm/lib/MC/MCSectionXCOFF.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.td
Commit 64d951be61aa7d69ad10cc87796151156da7d7ce by amy.kwan1
[PowerPC] Add new infrastructure to select load/store instructions, update P8/P9 load/store patterns.

This patch introduces a new infrastructure that is used to select the load and
store instructions in the PPC backend.

The primary motivation is that the current implementation of selecting load/stores
is dependent on the ordering of patterns in TableGen. Given this limitation, we
are not able to easily and reliably generate the P10 prefixed load and stores
instructions (such as when the immediates that fit within 34-bits). This
refactoring is meant to provide us with more control over the patterns/different
forms to exploit, as well as eliminating dependency of pattern declaration in TableGen.

The idea of this refactoring is that it introduces a set of addressing modes that
correspond to different instruction formats of a particular load and store
instruction, along with a set of common flags that describes a load/store.
Whenever a load/store instruction is being selected, we analyze the instruction
and compute a set of flags for it. The computed flags are then used to
select the most optimal load/store addressing mode.

This patch is the first of a series of patches to be committed - it contains the
initial implementation of the refactored load/store selection infrastructure and
also updates P8/P9 patterns to adopt this infrastructure. The idea is that
incremental patches will add more implementation and support, and eventually
the old implementation will be removed.

Differential Revision: https://reviews.llvm.org/D93370
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.h
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.td
The file was modifiedllvm/test/CodeGen/PowerPC/p9-dform-load-alignment.ll
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrVSX.td
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrPrefix.td
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrAltivec.td
The file was modifiedllvm/lib/Target/PowerPC/PPCInstr64Bit.td
The file was modifiedllvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
Commit 88b259c01463c08ac2575b4432c07ea7751946b5 by jingu.kang
[SimpleLoopUnswitch] Port partially invariant unswitch from LoopUnswitch to SimpleLoopUnswitch

Differential Revision: https://reviews.llvm.org/D99354
The file was modifiedllvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
The file was addedllvm/test/Transforms/SimpleLoopUnswitch/partial-unswitch-mssa-threshold.ll
The file was addedllvm/test/Transforms/SimpleLoopUnswitch/partial-unswitch-update-memoryssa.ll
The file was modifiedllvm/test/Transforms/SimpleLoopUnswitch/partial-unswitch.ll
Commit a86cbd475576b0c08537bea44c54cfc332f215f2 by david.spickett
[lldb] More tests for DumpDataExtractor

* Using a base address or skipping it with LLDB_INVALID_ADDRESS
* Using a data offset, which does not effect the printed addresses
* Not providing an output stream
* Formatting a double sized HexFloat
* Formatting over multiple lines

Since address printing now has its own test,
I've removed the base address from all the format
type tests.

The multi line tests still use a base address to check that
it's incremented correctly for each new line.

Reviewed By: teemperor

Differential Revision: https://reviews.llvm.org/D101627
The file was modifiedlldb/unittests/Core/DumpDataExtractorTest.cpp
Commit c9c4676a458b1ef99ffb67b43cfd87d6c27a448c by kzhuravl_dev
AMDGPU/llvm-readobj: Add missing tests for note parsing/displaying

This is a follow up review/change for https://reviews.llvm.org/D95638

Add valid note tests for code object v2 notes:
  - NT_AMD_HSA_CODE_OBJECT_VERSION (required yaml2obj update)
  - NT_AMD_HSA_HSAIL (required yaml2obj update)
  - NT_AMD_HSA_ISA_VERSION (required yaml2obj update)
  - NT_AMD_HSA_METADATA
  - NT_AMD_HSA_ISA_NAME
  - NT_AMD_PAL_METADATA

Add valid note tests for code object v3 notes:
  - NT_AMDGPU_METADATA

Add invalid note tests for code object v2 notes:
  - NT_AMD_HSA_CODE_OBJECT_VERSION (required yaml2obj update)
  - NT_AMD_HSA_HSAIL (required yaml2obj update)
  - NT_AMD_HSA_ISA_VERSION (required yaml2obj update)

Add invalid note tests for code object v3 notes:
  - NT_AMDGPU_METADATA

Differential Revision: https://reviews.llvm.org/D101304
The file was addedllvm/test/tools/llvm-readobj/ELF/note-amd-valid-v2.test
The file was modifiedllvm/lib/ObjectYAML/ELFYAML.cpp
The file was addedllvm/test/tools/llvm-readobj/ELF/note-amd-valid-v3.s
The file was addedllvm/test/tools/llvm-readobj/ELF/note-amd-invalid-v2.test
The file was addedllvm/test/tools/llvm-readobj/ELF/note-amd-invalid-v3.test
The file was modifiedllvm/tools/llvm-readobj/ELFDumper.cpp
Commit 985ab6e1fa575fc41ebfdafbba401e5787661584 by Paul C. Anagnostopoulos
[TableGen] Fix two bugs in 'defm' when complex 'assert' is involved.

This patch fixes two bugs that arise when a 'defm' inherits from a multiclass
and also from a class with assertions.

Differential Revision: https://reviews.llvm.org/D101626
The file was modifiedllvm/lib/TableGen/TGParser.cpp
The file was modifiedllvm/include/llvm/TableGen/Record.h
The file was modifiedllvm/test/TableGen/assert.td
Commit 3338290c187b254ad071f4b9cbf2ddb2623cefc0 by tomas.matheson
[CodeGen][ARM] Implement atomicrmw as pseudo operations at -O0

atomicrmw instructions are expanded by AtomicExpandPass before register allocation
into cmpxchg loops. Register allocation can insert spills between the exclusive loads
and stores, which invalidates the exclusive monitor and can lead to infinite loops.

To avoid this, reimplement atomicrmw operations as pseudo-instructions and expand them
after register allocation.

Floating point legalisation:
f16 ATOMIC_LOAD_FADD(*f16, f16) is legalised to
f32 ATOMIC_LOAD_FADD(*i16, f32) and then eventually
f32 ATOMIC_LOAD_FADD_16(*i16, f32)

Differential Revision: https://reviews.llvm.org/D101164
The file was modifiedllvm/test/Transforms/AtomicExpand/ARM/atomicrmw-fp.ll
The file was addedllvm/test/CodeGen/ARM/atomicrmw_exclusive_monitor_all.ll
The file was modifiedllvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
The file was modifiedllvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
The file was modifiedllvm/lib/Target/ARM/ARMInstrInfo.td
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
The file was modifiedllvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
Commit 8da5d111a5d2f795d5c32ef194f2e93c8ac0ec3f by david.spickett
[lldb] DumpDataExtractor tests for item byte size errors

Reviewed By: teemperor

Differential Revision: https://reviews.llvm.org/D101631
The file was modifiedlldb/unittests/Core/DumpDataExtractorTest.cpp
Commit c7df6b1223d88dfd15248fbf7b7b83dacad22ae3 by tomas.matheson
Revert "[CodeGen][ARM] Implement atomicrmw as pseudo operations at -O0"

This reverts commit 3338290c187b254ad071f4b9cbf2ddb2623cefc0.

Broke expensive checks on debian.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
The file was modifiedllvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
The file was modifiedllvm/test/Transforms/AtomicExpand/ARM/atomicrmw-fp.ll
The file was modifiedllvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/ARM/ARMInstrInfo.td
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
The file was modifiedllvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
The file was removedllvm/test/CodeGen/ARM/atomicrmw_exclusive_monitor_all.ll
Commit 44d0ad53afbe06d1141b84321eaca234c60a1305 by david.spickett
[lldb] Change DumpDataExtractorTest function names to lldb style (NFC)
The file was modifiedlldb/unittests/Core/DumpDataExtractorTest.cpp
Commit 62e9c7601adb1d137c8f5f2061bd47580ddd8f7f by bradley.smith
[AArch64][SVE] Remove unused function missed from D101302

The functionality in SVEIntrinsicOpts::isReinterpretToSVBool was moved in
D101302, however the original now unused function was not removed (NFC).

Differential Revision: https://reviews.llvm.org/D101642
The file was modifiedllvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp
Commit a27af1d8166cc8cebd6ecfed94042852922d8239 by vince.a.bridgers
[analyzer] Fix assertion in SVals.h

Fix assertion in SVals.h apparently caused by
https://reviews.llvm.org/D89055.

clang:clang/include/clang/StaticAnalyzer/Core/PathSensitive/SVals.h:596:
clang::ento::loc::MemRegionVal::MemRegionVal(const clang::ento::MemRegion *):
  Assertion `r' failed.

Backtrace:
...
     clang/include/clang/StaticAnalyzer/Core/PathSensitive/SVals.h:597:3
     clang::QualType, clang::QualType)
     clang/lib/StaticAnalyzer/Core/SValBuilder.cpp:773:18
     clang::QualType, clang::QualType)
     clang/lib/StaticAnalyzer/Core/SValBuilder.cpp:612:12
     clang::QualType) clang/lib/StaticAnalyzer/Core/SValBuilder.cpp:587:12
     namespace)::RegionBindingsRef const&, clang::ento::Loc, clang::QualType)
     clang/lib/StaticAnalyzer/Core/RegionStore.cpp:1510:24
...

Reviewed By: ASDenysPetrov

Differential Revision: https://reviews.llvm.org/D101635
The file was modifiedclang/test/Analysis/casts.c
The file was modifiedclang/lib/StaticAnalyzer/Core/SValBuilder.cpp
Commit 8989268dae30d38bd6799038e14e6e33ee5528ad by psteinfeld
[flang] Allow KIND type parameters to be used as LEN parameters of components

When producing the runtime type information for a component of a derived type
that had a LEN type parameter, we were not allowing a KIND parameter of the
derived type.  This was causing one of the NAG correctness tests to fail
(.../hibiya/d5.f90).

I added a test to our own test suite to check for this.

Also, I fixed a typo in .../module/__fortran_type_info.f90.

I allowed KIND type parameters to be used for the declarations of components
that use LEN parameters by constant folding the value of the LEN parameter.  To
make the constant folding work, I had to put the semantics::DerivedTypeSpec of
the associated derived type into the folding context.  To get this
semantics::DerivedTypeSpec, I changed the value of the semantics::Scope object
that was passed to DescribeComponent() to be the derived type scope rather than
the containing non-derived type scope.

This scope change, in turn, caused differences in the symbol table output that
is checked in typeinfo01.f90.  Most of these differences were in the order that
the symbols appeared in the dump.  But one of them changed one of the values
from "CHARACTER(2_8,1)" to "CHARACTER(1_8,1)".  I'm not sure if these changes
are significant.  Please verify that the results of this test are still valid.

Also, I wonder if there are other situations in this code where we should be
folding constants.  For example, what if the field of a component has a
component whose type is a PDT with a LEN type parameter, and the component's
declaration depends on the KIND type parameter of the current PDT.  Here's an
example:

  type string(stringkind)
    integer,kind :: stringkind
    character(stringkind) :: value
  end type string

  type outer(kindparam)
    integer,kind :: kindparam
    type(string(kindparam)) :: field
  end type outer

I don't understand the code or what it's trying to accomplish well enough to
figure out if such cases are correctly handled by my new code.

Differential Revision: https://reviews.llvm.org/D101482
The file was modifiedflang/lib/Semantics/runtime-type-info.cpp
The file was modifiedflang/module/__fortran_type_info.f90
The file was modifiedflang/test/Semantics/typeinfo01.f90
The file was modifiedflang/test/Semantics/resolve69.f90
Commit e90792d8c78bac79a1a39f245e222684ea24c7c0 by nathan
[clang] Update comments on another libstdc++ HACK

Document relevant gcc versions and dates.

Differential Revision: https://reviews.llvm.org/D101530
The file was modifiedclang/lib/Sema/SemaTemplateInstantiateDecl.cpp
Commit 936c777e2bf86cd78b532c1331c4f7ee90b95383 by stelios.ioannou
[AArch64] Adds a pre-indexed paired Load/Store optimization for LDR-STR.

This patch merges STR<S,D,Q,W,X>pre-STR<S,D,Q,W,X>ui and
LDR<S,D,Q,W,X>pre-LDR<S,D,Q,W,X>ui instruction pairs into a single
STP<S,D,Q,W,X>pre and LDP<S,D,Q,W,X>pre instruction, respectively.
For each pair, there is a MIR test that verifies this optimization.

Differential Revision: https://reviews.llvm.org/D99272

Change-Id: Ie97a20c8c716c08492fe229c22e14e3c98ef08b7
The file was addedllvm/test/CodeGen/AArch64/strpre-str-merge.mir
The file was modifiedllvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
The file was addedllvm/test/CodeGen/AArch64/ldrpre-ldr-merge.mir
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.h
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.cpp
The file was modifiedllvm/test/CodeGen/AArch64/arm64-memset-inline.ll
Commit a3fd82c289878e1a8fa5833d87b688cd50624247 by a.bataev
[SLP]Fix the crash on cost calculation if non-compatible vectors shuffled.

If the extracts from the non-power-2 vectors are recognized as shuffles,
need some extra checks to not crash cost calculations if trying to gext
the ecost for subvector extracts. In this case need to check carefully
that we do not exit out of bounds of the original vector, otherwise the
TTI's cost model will crash on assert.

Differential Revision: https://reviews.llvm.org/D101477
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
The file was addedllvm/test/Transforms/SLPVectorizer/AMDGPU/crash_extract_subvector_cost.ll
Commit 5a3309f8257690838d8dbc8c973cdc90a32dba33 by cjdb
[libcxx][ranges] adds `range` access CPOs

* `std::ranges::begin`
* `std::ranges::cbegin`
* `std::ranges::end`
* `std::ranges::cend`
* `std::ranges::iterator` (required for `end`)

Implements parts of:
    * P0896R4 The One Ranges Proposal`

Co-author: @zoecarver

Depends on D90999, D100160.

Differential Revision: https://reviews.llvm.org/D100255
The file was addedlibcxx/test/std/ranges/range.access/range.access.end/end.cpp
The file was addedlibcxx/test/std/containers/associative/multimap/range_concept_conformance.compile.pass.cpp
The file was addedlibcxx/test/std/containers/unord/unord.multimap/range_concept_conformance.compile.pass.cpp
The file was addedlibcxx/test/std/strings/basic.string/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/include/ranges
The file was addedlibcxx/test/std/ranges/range.access/range.access.begin/incomplete.compile.verify.cpp
The file was addedlibcxx/test/std/containers/associative/set/range_concept_conformance.compile.pass.cpp
The file was addedlibcxx/test/std/ranges/range.access/range.access.cbegin/cbegin.compile.pass.cpp
The file was addedlibcxx/test/std/containers/unord/unord.multiset/range_concept_conformance.compile.pass.cpp
The file was addedlibcxx/test/std/containers/associative/map/range_concept_conformance.compile.pass.cpp
The file was addedlibcxx/test/std/containers/views/range_concept_conformance.compile.pass.cpp
The file was addedlibcxx/test/std/ranges/range.range/iterator_t.compile.pass.cpp
The file was addedlibcxx/test/std/input.output/filesystems/class.path/range_concept_conformance.compile.pass.cpp
The file was addedlibcxx/test/std/input.output/filesystems/class.directory_iterator/range_concept_conformance.compile.pass.cpp
The file was addedlibcxx/test/std/ranges/range.access/range.access.begin/begin.pass.cpp
The file was addedlibcxx/test/std/containers/sequences/array/range_concept_conformance.compile.pass.cpp
The file was addedlibcxx/test/std/containers/sequences/forwardlist/range_concept_conformance.compile.pass.cpp
The file was addedlibcxx/test/std/containers/sequences/vector.bool/range_concept_conformance.compile.pass.cpp
The file was addedlibcxx/test/std/ranges/range.access/range.access.cbegin/incomplete.compile.verify.cpp
The file was addedlibcxx/test/std/containers/associative/multiset/range_concept_conformance.compile.pass.cpp
The file was addedlibcxx/test/std/containers/unord/unord.set/range_concept_conformance.compile.pass.cpp
The file was addedlibcxx/test/std/ranges/range.access/range.access.end/incomplete.compile.verify.cpp
The file was addedlibcxx/test/std/ranges/range.access/range.access.cbegin/incomplete.compile.verify copy.cpp
The file was addedlibcxx/include/__ranges/access.h
The file was addedlibcxx/test/std/containers/sequences/list/range_concept_conformance.compile.pass.cpp
The file was addedlibcxx/test/std/ranges/range.access/range.access.cend/cend.compile.pass.cpp
The file was addedlibcxx/test/std/ranges/range.access/range.access.cend/incomplete.compile.verify.cpp
The file was addedlibcxx/test/std/containers/unord/unord.map/range_concept_conformance.compile.pass.cpp
The file was addedlibcxx/test/support/test_range.h
The file was modifiedlibcxx/include/module.modulemap
The file was addedlibcxx/test/std/re/re.results/range_concept_conformance.compile.pass.cpp
The file was addedlibcxx/test/std/containers/sequences/deque/range_concept_conformance.compile.pass.cpp
The file was addedlibcxx/test/std/strings/string.view/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/include/CMakeLists.txt
The file was modifiedlibcxx/include/type_traits
The file was addedlibcxx/test/std/containers/sequences/vector/range_concept_conformance.compile.pass.cpp
Commit 7c17731596e9cb05b861f1a1be35fb827d33f632 by cjdb
[libcxx][ranges] adds `ranges::range`, `ranges::common_range`, and range aliases

* `std::ranges::range`
* `std::ranges::sentinel_t`
* `std::ranges::range_difference_t`
* `std::ranges::range_value_t`
* `std::ranges::range_reference_t`
* `std::ranges::range_rvalue_reference_t`
* `std::ranges::common_range`

`range_size_t` depends on `sized_range` and will be added alongside it.

Implements parts of:
    * P0896R4 The One Ranges Proposal`

Depends on D100255.

Differential Revision: https://reviews.llvm.org/D100269
The file was modifiedlibcxx/test/std/containers/sequences/array/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/sequences/deque/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/associative/multiset/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/sequences/forwardlist/range_concept_conformance.compile.pass.cpp
The file was addedlibcxx/test/std/ranges/range.range/helper_aliases.compile.pass.cpp
The file was modifiedlibcxx/include/CMakeLists.txt
The file was modifiedlibcxx/test/std/containers/associative/multimap/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/re/re.results/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/support/test_range.h
The file was modifiedlibcxx/test/std/containers/associative/map/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/unord/unord.map/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/unord/unord.multiset/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/sequences/vector.bool/range_concept_conformance.compile.pass.cpp
The file was addedlibcxx/test/std/ranges/range.refinements/common_range.compile.pass.cpp
The file was modifiedlibcxx/test/std/strings/basic.string/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/strings/string.view/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/include/ranges
The file was modifiedlibcxx/test/std/containers/unord/unord.set/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/class.directory_iterator/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/class.path/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/sequences/list/range_concept_conformance.compile.pass.cpp
The file was addedlibcxx/test/std/ranges/range.range/sentinel_t.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/associative/set/range_concept_conformance.compile.pass.cpp
The file was addedlibcxx/test/std/ranges/range.range/range.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/unord/unord.multimap/range_concept_conformance.compile.pass.cpp
The file was addedlibcxx/include/__ranges/concepts.h
The file was modifiedlibcxx/test/std/containers/sequences/vector/range_concept_conformance.compile.pass.cpp
Commit 8ebbaf17f92c8ef5cd7dcb0f868eeaf140de5864 by llvmgnsyncbot
[gn build] Port 5a3309f82576
The file was modifiedllvm/utils/gn/secondary/libcxx/include/BUILD.gn
Commit 5596bc40e6d569ff068aa58ec44ca4a86abd39d8 by llvmgnsyncbot
[gn build] Port 7c17731596e9
The file was modifiedllvm/utils/gn/secondary/libcxx/include/BUILD.gn
Commit cab19d84ce85cbceec7fde515cc686d6a83a5f9d by scott.linder
[NFC] Refactor ExecuteAssembler in cc1as_main.cpp

Introduce an extra scope (another static function) to replace calls to
`unique_ptr::reset` with implicit destructors via RAII.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D101542
The file was modifiedclang/tools/driver/cc1as_main.cpp
Commit c6f20d70a8c93ab3d50c9777c477fe040460a664 by scott.linder
[ADT] Add STLForwardCompat.h and llvm::disjunction

Move some types in STLExtras.h which are named and behave identically to
STL types from future standards into a dedicated header. This keeps them
organized (they are not "extras" in the same sense as most types in
STLExtras.h are) and fixes circular dependencies in future patches.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D100668
The file was addedllvm/unittests/ADT/STLForwardCompatTest.cpp
The file was addedllvm/include/llvm/ADT/STLForwardCompat.h
The file was modifiedllvm/include/llvm/ADT/STLExtras.h
The file was modifiedllvm/unittests/ADT/CMakeLists.txt
Commit adf4dc056139304bddbd63dc6739561b001ea9c0 by llvmgnsyncbot
[gn build] Port c6f20d70a8c9
The file was modifiedllvm/utils/gn/secondary/llvm/unittests/ADT/BUILD.gn
Commit 7308862ff532a9e5ca7ca787f9fcc2b8eeabb8b5 by llvm-project
[OpenMP][CMake] Use in-project clang as CUDA->IR compiler.

If available, use the clang that is already built in the same project as
CUDA compiler unless another executable is explicitly defined. This also
ensures the generated deviceRTL IR will be consistent with the version
of Clang.

This patch is required to reliably test OpenMP offloading in a buildbot
without either a two-stage build (e.g. with LLVM_ENABLE_RUNTIMES) or a
separately installed clang on the worker that will eventually become
outdated.

Reviewed By: tianshilei1992

Differential Revision: https://reviews.llvm.org/D101265
The file was modifiedopenmp/libomptarget/deviceRTLs/nvptx/CMakeLists.txt
The file was modifiedopenmp/README.rst
Commit 6e6ae6c727b795eaca5495f64c064ee917bb26e5 by efriedma
[AArch64] Fix lowering for fshl/fshr with SVE types.

These operations don't exist natively, so just let the
target-independent code expand to plain shifts.

The generated sequences could probably be optimized a bit more, but
they seem good enough for now.

Differential Revision: https://reviews.llvm.org/D101574
The file was modifiedllvm/test/CodeGen/AArch64/llvm-ir-to-intrinsic.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Commit 499e89fc9119d901132bcc8ab460b1c161c22acc by ataei
Add patterns to lower vector.multi_reduction into a sequence of vector.reduction

Three patterns are added to convert into vector.multi_reduction into a
sequence of vector.reduction as the following:

- Transpose the inputs so inner most dimensions are always reduction.
- Reduce rank of vector.multi_reduction into 2d with inner most
reduction dim (get the 2d canical form)
- 2D canonical form is converted into a sequence of vector.reduction.

There are two things we might worth in a follow up diff:

- An scf.for (maybe optionally) around vector.reduction instead of unrolling it.
- Breakdown the vector.reduction into a sequence of vector.reduction
(e.g tree-based reduction) instead of relying on how downstream dialects
handle it.
  Note: this will requires passing target-vector-length

Differential Revision: https://reviews.llvm.org/D101570
The file was modifiedmlir/include/mlir/Dialect/Vector/VectorOps.h
The file was addedmlir/test/Dialect/Vector/vector-multi-reduction-lowering.mlir
The file was modifiedmlir/test/lib/Transforms/TestVectorTransforms.cpp
The file was modifiedmlir/lib/Dialect/Vector/VectorTransforms.cpp
Commit 518d955f9dd2f5f854006a71ff9c8b117a66548b by Duncan P. N. Exon Smith
Support: Stop using F_{None,Text,Append} compatibility synonyms, NFC

Stop using the compatibility spellings of `OF_{None,Text,Append}`
left behind by 1f67a3cba9b09636c56e2109d8a35ae96dc15782. A follow-up
will remove them.

Differential Revision: https://reviews.llvm.org/D101650
The file was modifiedlibclc/utils/prepare-builtins.cpp
The file was modifiedllvm/lib/Analysis/CFGPrinter.cpp
The file was modifiedllvm/tools/llvm-ml/llvm-ml.cpp
The file was modifiedclang/lib/Tooling/DumpTool/ClangSrcLocDump.cpp
The file was modifiedmlir/lib/Support/FileUtilities.cpp
The file was modifiedlld/ELF/Driver.cpp
The file was modifiedllvm/lib/Analysis/DDGPrinter.cpp
The file was modifiedclang/lib/Tooling/DumpTool/ASTSrcLocProcessor.cpp
The file was modifiedllvm/lib/Analysis/CallPrinter.cpp
Commit 1b885573327d0f6b36f24ad23d243642f658750b by Louis Dionne
[libc++] Revert the change that runs clang-format and generated-output in the service queue

This reverts commit 6712534ebc6f84f0b178a19bf17b7b2bd852f6eb.

Differential Revision: https://reviews.llvm.org/D101437
The file was modifiedlibcxx/utils/ci/buildkite-pipeline.yml
The file was modifiedlibcxx/utils/ci/run-buildbot
Commit f3026d8b8d723f530299110d76d34bfaadf86eea by scott.linder
[ADT] Add llvm::remove_cvref and llvm::remove_cvref_t

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D100669
The file was modifiedllvm/include/llvm/ADT/STLForwardCompat.h
The file was modifiedllvm/include/llvm/ADT/Any.h
The file was modifiedllvm/include/llvm/ADT/FunctionExtras.h
The file was modifiedllvm/include/llvm/ADT/STLExtras.h
The file was modifiedllvm/unittests/ADT/STLForwardCompatTest.cpp
Commit 93bc038126304cffc230fbc5561c78efa6fe4209 by ndesaulniers
[M68k] fix -Wdefaulted-function-deleted and -Woverloaded-virtual

Fixes the following warnings observerd when building the experimental
m68k backend (-DLLVM_EXPERIMENTAL_TARGETS_TO_BUILD="M68k"):

../lib/Target/M68k/M68kMachineFunction.h:71:3: warning: explicitly
defaulted default constructor is implicitly deleted
[-Wdefaulted-function-deleted]
  M68kMachineFunctionInfo() = default;
  ^
../lib/Target/M68k/M68kMachineFunction.h:24:20: note: default
constructor of 'M68kMachineFunctionInfo' is implicitly deleted because
field 'MF' of reference type 'llvm::MachineFunction &' would not be
initialized
  MachineFunction &MF;
                   ^
In file included from ../lib/Target/M68k/M68kISelLowering.cpp:18:
In file included from ../lib/Target/M68k/M68kSubtarget.h:17:
../lib/Target/M68k/M68kFrameLowering.h:60:8: warning:
'llvm::M68kFrameLowering::emitCalleeSavedFrameMoves' hides overloaded
virtual functions [-Woverloaded-virtual]
  void emitCalleeSavedFrameMoves(MachineBasicBlock &MBB,
       ^
../include/llvm/CodeGen/TargetFrameLowering.h:215:3: note: hidden
overloaded virtual function
'llvm::TargetFrameLowering::emitCalleeSavedFrameMoves' declared here:
different number of parameters (2 vs 3)
  emitCalleeSavedFrameMoves(MachineBasicBlock &MBB,
  ^
../include/llvm/CodeGen/TargetFrameLowering.h:218:16: note: hidden
overloaded virtual function
'llvm::TargetFrameLowering::emitCalleeSavedFrameMoves' declared here:
different number of parameters (4 vs 3)
  virtual void emitCalleeSavedFrameMoves(MachineBasicBlock &MBB,
               ^

pr/50071

Reviewed By: myhsu

Differential Revision: https://reviews.llvm.org/D101588
The file was modifiedllvm/lib/Target/M68k/M68kFrameLowering.cpp
The file was modifiedllvm/lib/Target/M68k/M68kFrameLowering.h
The file was modifiedllvm/lib/Target/M68k/M68kMachineFunction.h
Commit dde24a87c55f82d8c7b3bf3eafb10f2b9b2b9a01 by ndesaulniers
[llvm-objdump] add -v alias for --version

Used by the Linux kernel's CONFIG_X86_DECODER_SELFTEST.

Link: https://github.com/ClangBuiltLinux/linux/issues/1130

Reviewed By: MaskRay, jhenderson, rupprecht

Differential Revision: https://reviews.llvm.org/D101483
The file was modifiedllvm/docs/CommandGuide/llvm-objdump.rst
The file was addedllvm/test/tools/llvm-objdump/version.test
The file was modifiedllvm/tools/llvm-objdump/ObjdumpOpts.td
Commit dcbfb6f8735a517f7142779ac7c804607f65d7a9 by phosek
[libcxx] Use joined format for include flag on Windows

Without this, CMake deduplicates the /I flag breaking the build. See
https://cmake.org/cmake/help/v3.13/command/target_compile_options.html
for more details on why this is needed.

Differential Revision: https://reviews.llvm.org/D101550
The file was modifiedlibcxx/include/CMakeLists.txt
Commit 54aad6365951247e9f18c718c14422745b3afa4c by kzhuravl_dev
Revert "AMDGPU/llvm-readobj: Add missing tests for note parsing/displaying"

This reverts commit c9c4676a458b1ef99ffb67b43cfd87d6c27a448c.

Reason for revert: note-amd-valid-v3.s test fails if AMDGPU is not built.
The file was modifiedllvm/lib/ObjectYAML/ELFYAML.cpp
The file was modifiedllvm/tools/llvm-readobj/ELFDumper.cpp
The file was removedllvm/test/tools/llvm-readobj/ELF/note-amd-invalid-v2.test
The file was removedllvm/test/tools/llvm-readobj/ELF/note-amd-valid-v3.s
The file was removedllvm/test/tools/llvm-readobj/ELF/note-amd-invalid-v3.test
The file was removedllvm/test/tools/llvm-readobj/ELF/note-amd-valid-v2.test
Commit c92cdb48788115e093e29143d0bdf9fca32d1f61 by arthur.j.odwyer
[libc++] [test] Recommit the unsetting of LC_COLLATE in the builder script.

This re-reverts one piece of 1b885573327d0f6b36f24ad23d243642f658750b,
reapplying one piece of D101437 (but not the "service"-queue piece of it).

It turns out that the behavior of `grep [^ -~]`, or even `grep [A-Z]`,
depends on locale, specifically `LC_COLLATE`. So we want to make sure
we're not in any weird locale, no matter what machine we're running on.
Yes, "en_US.UTF-8" counts as weird!
https://stackoverflow.com/questions/67320156/misbehavior-of-gnu-grep-when-grepping-for-ignores-spaces
https://stackoverflow.com/questions/6799872/how-to-make-grep-a-z-independent-of-locale
The file was modifiedlibcxx/utils/ci/run-buildbot
Commit 545a8177eaad190732752255c33931e19e4a0972 by aeubanks
[llvm-reduce] Add flag to only run specific passes

Reviewed By: fhahn, hans

Differential Revision: https://reviews.llvm.org/D101278
The file was modifiedllvm/tools/llvm-reduce/DeltaManager.h
The file was modifiedllvm/tools/llvm-reduce/llvm-reduce.cpp
The file was addedllvm/test/tools/llvm-reduce/custom-delta-passes.ll
The file was modifiedllvm/tools/llvm-reduce/DeltaManager.cpp
Commit cbd5aceb6296956387157fea9b13f49c932b8813 by Vitaly Buka
[NFC][tsan] Fix cast after D101428
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_platform_linux.cpp
Commit 511f2cecf7c95aa2eea7447818bddf08f7222daa by aeubanks
[llvm-reduce] Don't unset dso_local on implicitly dso_local GVs

This introduces a flag that aborts if we ever reduce to IR that fails
the verifier.

Reviewed By: swamulism, arichardson

Differential Revision: https://reviews.llvm.org/D101279
The file was modifiedllvm/test/tools/llvm-reduce/remove-dso-local.ll
The file was modifiedllvm/tools/llvm-reduce/deltas/ReduceGlobalValues.cpp
The file was modifiedllvm/tools/llvm-reduce/deltas/Delta.cpp
Commit b817ea7b17b8ae68c2bd29834138ed84a8a7005d by carrot
[MachineFunction] Make comment for TracksLiveness more clearer

As discussed in https://lists.llvm.org/pipermail/llvm-dev/2021-April/150225.html,
the current comments for TracksLiveness property and isKill flag are confusing.
This patch makes the comments more clearer.

Differential Revision: https://reviews.llvm.org/D101500
The file was modifiedllvm/include/llvm/CodeGen/MachineFunction.h
The file was modifiedllvm/include/llvm/CodeGen/MachineOperand.h
Commit ad12590fdd1459ffb8db185ea1b45748c20b538e by Dávid Bolvanský
[InstCombine] Added tests for PR50172, NFC
The file was addedllvm/test/Transforms/InstCombine/cttz.ll
Commit 3489c2d7b1676cbf7efec6b71742019650e49047 by daniil.fukalov
[TTI] NFC: Change getTypeLegalizationCost to return InstructionCost.

This patch migrates the TTI cost interfaces to return an InstructionCost.

See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html

Reviewed By: sdesmalen, kparzysz

Differential Revision: https://reviews.llvm.org/D101533
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.h
The file was modifiedllvm/lib/CodeGen/TargetLoweringBase.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
Commit ef89e8ca1cfe3b18861ca227ef827c7188cb6eaf by Louis Dionne
[libc++] Fix constexpr-ness of std::tuple's constructor

Mentioned in https://reviews.llvm.org/D96523.
The file was modifiedlibcxx/test/std/utilities/tuple/tuple.tuple/tuple.cnstr/move_pair.pass.cpp
The file was modifiedlibcxx/include/tuple
Commit 2d28100bf2e427c892305e08a57cdffa9620bf6e by jezng
[lld-macho] Initial scaffolding for ARM32 support

This just parses the `-arch armv7` and emits the right header flags.
The rest will be slowly fleshed out in upcoming diffs.

Reviewed By: #lld-macho, gkm

Differential Revision: https://reviews.llvm.org/D101557
The file was modifiedlld/test/MachO/Inputs/WatchOS.sdk/usr/lib/libSystem.tbd
The file was modifiedlld/MachO/Target.h
The file was modifiedlld/test/MachO/Inputs/WatchOS.sdk/usr/lib/libc++.tbd
The file was modifiedlld/MachO/CMakeLists.txt
The file was modifiedlld/test/MachO/header.s
The file was addedlld/MachO/Arch/ARM.cpp
The file was modifiedlld/test/MachO/Inputs/WatchOS.sdk/usr/lib/libc++abi.tbd
The file was modifiedlld/MachO/Driver.cpp
Commit 05c5363b39980d818324f2b9336319c699701cfe by jezng
[lld-macho] Parse & emit the N_ARM_THUMB_DEF symbol flag

Eventually we'll use this flag to properly handle bl/blx
opcodes.

Reviewed By: #lld-macho, gkm

Differential Revision: https://reviews.llvm.org/D101558
The file was modifiedlld/MachO/Symbols.h
The file was modifiedlld/MachO/UnwindInfoSection.cpp
The file was addedlld/test/MachO/weak-def-thumb-conflict.s
The file was modifiedlld/MachO/InputFiles.cpp
The file was modifiedlld/MachO/SyntheticSections.cpp
The file was modifiedlld/MachO/SymbolTable.cpp
The file was modifiedlld/MachO/SymbolTable.h
The file was modifiedlld/MachO/Driver.cpp
Commit e01e9a2e31d608a17aa40188a7c05c29996bb09c by llvmgnsyncbot
[gn build] Port 2d28100bf2e4
The file was modifiedllvm/utils/gn/secondary/lld/MachO/BUILD.gn
Commit 82e99f50351dd83d854f45bab3d91d4e6ad6450e by jdenny.ornl
[OpenMP] Fix second debug name from map clause

This patch fixes a bug from D89802.  For example, without it, Clang
generates x as the debug map name for both x and y in the following
example:

```
#pragma omp target map(to: x, y)
x = y = 1;
```

Reviewed By: jhuber6

Differential Revision: https://reviews.llvm.org/D101564
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntime.cpp
The file was modifiedclang/test/OpenMP/target_map_names.cpp
Commit f0c9d1e95f99f3db21c907e912c966566ae2a4ea by Vitaly Buka
[tsan] Remove special SyncClock::kInvalidTid

Followup for D101428.

Reviewed By: dvyukov

Differential Revision: https://reviews.llvm.org/D101604
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_clock.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_clock.h
Commit 954272108587d0862919212137e67988f079c4a5 by Justin Bogner
Add support for llvm.assume intrinsic to the LoadStoreVectorizer pass

Patch by Viacheslav Nikolaev. Thanks!
The file was modifiedllvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
The file was modifiedllvm/test/Transforms/LoadStoreVectorizer/X86/vectorize-i8-nested-add.ll
Commit bf61690e92b210c8934918152bed2932cf665105 by Vitaly Buka
asan: fix a windows test

Before commit "sanitizer_common: introduce kInvalidTid/kMainTid"
asan invalid/unknown thread id was 0xffffff, so presumably we printed "T16777215".
Now it's -1, so we print T-1. Fix the test.
I think the new format is even better, "T-1" clearly looks like something special
rather than a random large number.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D101634
The file was modifiedcompiler-rt/test/asan/TestCases/Windows/queue_user_work_item_report.cpp
Commit 2cd78686055f1badb9aa55cb95e189548ffc82f0 by nikita.ppv
[ValueTracking] Limit scan when checking poison UB (PR50155)

The current code can scan an unlimited number of instructions,
if the containing basic block is very large. The test case from
PR50155 contains a basic block with approximately 100k instructions.

To avoid this, limit the number of instructions we inspect. At
the same time, drop the limit on the number of basic blocks, as
this will be implicitly limited by the number of instructions as
well.
The file was modifiedllvm/lib/Analysis/ValueTracking.cpp
Commit fe230dc197b1cc259e497b88a6bc9c717318eebb by nikita.ppv
[ValueTracking] Slightly clean up programUndefinedIfUndefOrPoison() (NFC)

Use contains() to check set membership, and adjust an oddly
structured loop.
The file was modifiedllvm/lib/Analysis/ValueTracking.cpp
Commit 7e43483dd1699c34c5bccb56fb6c437e1682d8ad by jay.foad
[AMDGPU] Remove set_gpr_idx instructions in conditional blocks

SIPreEmitPeephole did not try to remove redundant s_set_gpr_idx_*
instructions in blocks that end with a conditional branch instruction.
This seems like a simple oversight.

Differential Revision: https://reviews.llvm.org/D101629
The file was modifiedllvm/test/CodeGen/AMDGPU/set-gpr-idx-peephole.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
Commit 4423a7a09b1b0dc8558e06e1f84f144b28466d9b by gulfem
[NewPM] Disable RelLookupTableConverter pass in LTO

Relative look table converter pass caused an issue when full lto
is enabled (reported in https://reviews.llvm.org/D94355).
This patch disables that pass from full lto pre-link phase optimization
pipeline until the issue is fixed.

Differential Revision: https://reviews.llvm.org/D101664
The file was modifiedllvm/lib/Passes/PassBuilder.cpp
The file was modifiedllvm/test/Other/new-pm-defaults.ll
Commit c00fc180ecdac4b13caddd1ba506ffa3f6e7e206 by jezng
[llvm-readobj] Recognize N_THUMB_DEF as a symbol flag

The right symbol flag mask is ~0x7, not ~0xf.

Also emit string names for the other flags (we were missing some).

Reviewed By: #lld-macho, gkm

Differential Revision: https://reviews.llvm.org/D101548
The file was addedllvm/test/tools/llvm-readobj/MachO/flags.yaml
The file was modifiedlld/test/MachO/symtab.s
The file was modifiedllvm/test/tools/llvm-objcopy/MachO/symbol-table.test
The file was modifiedllvm/tools/llvm-readobj/MachODumper.cpp
The file was modifiedllvm/test/MC/MachO/ARM/darwin-Thumb-reloc.s
Commit 3d27b5d28aabf8516aa1fefc78a6878b89a992f0 by jonathan_roelofs
[EarlyIfConversion] Avoid producing selects with identical operands

This extends the early-ifcvt pass to avoid a few more cases where the resulting
select instructions would have matching operands.  Additionally, we now use TII
to determine "sameness" of the operands so that as TII gets smarter, so too
will ifcvt.

The attached test case was bugpoint-reduced down from CINT2000/252.eon in the
test-suite. See: https://clang.godbolt.org/z/WvnrcrGEn

Differential Revision: https://reviews.llvm.org/D101508
The file was addedllvm/test/CodeGen/AArch64/early-ifcvt-same-value.mir
The file was modifiedllvm/lib/CodeGen/EarlyIfConversion.cpp
Commit 7d2562c2daad83adadf14f3719cf7199c5bfd9cf by Amara Emerson
[AArch64][GlobalISel] Use a single MachineIRBuilder for most of isel. NFC.

This is a long overdue cleanup. Not every use is eliminated, I stuck to uses
that were directly being called from select(), and not the render functions.

Differential Revision: https://reviews.llvm.org/D101590
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
Commit 8be3af36f9e1d30050455a0bf1e239e993a28a2c by jonathan_roelofs
Revert "[EarlyIfConversion] Avoid producing selects with identical operands"

This reverts commit 3d27b5d28aabf8516aa1fefc78a6878b89a992f0.

Broke one of the PPC tests, which I didn't see because I usually build with
only the x86/AARch64 targets enabled... oops.

https://lab.llvm.org/buildbot#builders/109/builds/13834

llvm/test/CodeGen/PowerPC/expand-foldable-isel.ll
The file was removedllvm/test/CodeGen/AArch64/early-ifcvt-same-value.mir
The file was modifiedllvm/lib/CodeGen/EarlyIfConversion.cpp
Commit 680c5d5de2f3b3a302dd6c0bf9f3d2f119688c3f by arthur.j.odwyer
[libc++] Remove the line of stdout output from this generator. NFCI.

This line was confusing some people: it's not supposed to indicate
any kind of problem with the script, and I can't see any way it could
even help with troubleshooting. So, just silence it.
The file was modifiedlibcxx/utils/generate_header_tests.py
Commit 86d1f590c2e4265998a29fd3a5a64233c5870137 by arthur.j.odwyer
[libc++] [test] Add a debug-mode CI.

To run llvm-lit manually from the command line:

    ./bin/llvm-lit -sv --param std=c++2b --param cxx_under_test=`pwd`/bin/clang \
        --param debug_level=1 ../libcxx/test/

Tests that currently fail with `debug_level=1` are marked `LIBCXX-DEBUG-FIXME`,
but my intent is to deal with all of them and leave no such annotations in
the codebase within the next couple weeks. (I have patches for all of them
in my local checkout.)

Differential Revision: https://reviews.llvm.org/D100866
The file was modifiedlibcxx/test/std/algorithms/alg.sorting/alg.merge/inplace_merge_comp.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.iterators/rbegin.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.sub/last.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.iterators/end.pass.cpp
The file was modifiedlibcxx/test/libcxx/containers/sequences/vector/robust_against_adl.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.proximate/proximate.pass.cpp
The file was modifiedlibcxx/test/std/containers/unord/unord.set/insert_hint_const_lvalue.pass.cpp
The file was modifiedlibcxx/test/std/strings/char.traits/char.traits.specializations/char.traits.specializations.char16_t/copy.pass.cpp
The file was addedlibcxx/cmake/caches/Generic-debug-iterators.cmake
The file was modifiedlibcxx/test/std/containers/views/span.iterators/begin.pass.cpp
The file was modifiedlibcxx/test/std/strings/char.traits/char.traits.specializations/char.traits.specializations.wchar.t/copy.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.sub/first.pass.cpp
The file was modifiedlibcxx/utils/ci/run-buildbot
The file was modifiedlibcxx/utils/ci/buildkite-pipeline.yml
The file was modifiedlibcxx/test/std/containers/views/span.sub/subspan.pass.cpp
The file was modifiedlibcxx/test/std/strings/char.traits/char.traits.specializations/char.traits.specializations.char8_t/copy.pass.cpp
The file was modifiedlibcxx/test/std/iterators/iterator.primitives/iterator.operations/robust_against_adl.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.iterators/rend.pass.cpp
The file was modifiedlibcxx/test/std/strings/char.traits/char.traits.specializations/char.traits.specializations.char32_t/copy.pass.cpp
The file was modifiedlibcxx/test/std/strings/char.traits/char.traits.specializations/char.traits.specializations.char/copy.pass.cpp
The file was modifiedlibcxx/test/std/strings/string.view/string.view.ops/copy.pass.cpp
The file was modifiedlibcxx/test/std/strings/basic.string/string.modifiers/string_assign/iterator.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/class.path/path.nonmember/path.factory.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.cons/deduct.pass.cpp
Commit 2af95a527580333940333c532679356d99b88e3d by Dávid Bolvanský
[X86] Promote 16-bit CTTZ_ZERO_UNDEF to 32-bit variant

Related to PR50172.

Protects us against regressions after we will start doing cttz(zext(x)) -> zext(cttz(x)) transformation in the middle-end.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D101662
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/clz.ll
Commit c05d1eed35f5284c1eafc86e26cf0a304fb0a35b by cjdb
[libcxx][iterator][ranges] adds `input_iterator` and `input_range`

Implements parts of:
    * P0896R4 The One Ranges Proposal`

Depends on D100269.

Differential Revision: https://reviews.llvm.org/D100271
The file was addedlibcxx/test/std/iterators/iterator.requirements/iterator.concepts/iterator.concept.input/input_iterator.compile.pass.cpp
The file was modifiedlibcxx/test/std/iterators/predef.iterators/insert.iterators/front.insert.iterator/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/associative/map/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/class.directory_iterator/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/unord/unord.multiset/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/unord/unord.multimap/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/class.path/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/unord/unord.multiset/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/sequences/array/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/include/iterator
The file was modifiedlibcxx/include/__iterator/concepts.h
The file was addedlibcxx/test/libcxx/iterators/iterator.concepts/iterator.concept.input/subsumption.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/sequences/forwardlist/forwardlist.iter/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/associative/set/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/sequences/list/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/re/re.iter/re.tokiter/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/include/__ranges/concepts.h
The file was modifiedlibcxx/test/std/containers/unord/unord.map/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/sequences/forwardlist/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/strings/basic.string/string.iterators/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/sequences/list/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/unord/unord.set/iterator_concept_conformance.compile.pass.cpp
The file was addedlibcxx/test/std/ranges/range.refinements/input_range.compile.pass.cpp
The file was modifiedlibcxx/test/std/iterators/stream.iterators/ostreambuf.iterator/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/associative/multiset/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/iterators/stream.iterators/istreambuf.iterator/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/iterators/predef.iterators/reverse.iterators/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/associative/set/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/unord/unord.map/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/include/ranges
The file was modifiedlibcxx/test/std/containers/unord/unord.multimap/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/unord/unord.set/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/sequences/array/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.iterators/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/class.directory_iterator/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/iterators/predef.iterators/insert.iterators/back.insert.iterator/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/strings/string.view/string.view.iterators/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/iterators/stream.iterators/ostream.iterator/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/support/test_iterators.h
The file was modifiedlibcxx/test/std/containers/sequences/vector/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/strings/basic.string/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/sequences/vector.bool/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/strings/string.view/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/support/test_macros.h
The file was modifiedlibcxx/test/std/containers/sequences/vector/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/re/re.iter/re.regiter/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/re/re.results/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/sequences/vector.bool/iterator_concept_conformance.compile.pass.cpp
The file was addedlibcxx/test/std/iterators/iterator.requirements/iterator.concepts/iterator.concept.input/subsumption.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/sequences/deque/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/associative/multiset/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/associative/multimap/range_concept_conformance.compile.pass.cpp
The file was addedlibcxx/test/std/ranges/range.refinements/subsumption.compile.pass.cpp
The file was modifiedlibcxx/test/support/test_range.h
The file was modifiedlibcxx/test/std/iterators/predef.iterators/insert.iterators/insert.iterator/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/sequences/deque/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/iterators/predef.iterators/move.iterators/move.iterator/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/associative/map/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/iterators/stream.iterators/istream.iterator/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/associative/multimap/iterator_concept_conformance.compile.pass.cpp
Commit 7f2109128fc9c8b49bfb25a1360837cab40d29f7 by jonathan_roelofs
[PowerPC] modernize test via update_llc_test_checks.py. NFC
The file was modifiedllvm/test/CodeGen/PowerPC/expand-foldable-isel.ll
Commit 421569b244b6b037b1f0bf702ca9083e69f87422 by jonathan_roelofs
[EarlyIfConversion] Avoid producing selects with identical operands

This extends the early-ifcvt pass to avoid a few more cases where the resulting
select instructions would have matching operands.  Additionally, we now use TII
to determine "sameness" of the operands so that as TII gets smarter, so too
will ifcvt.

The attached test case was bugpoint-reduced down from CINT2000/252.eon in the
test-suite. See: https://clang.godbolt.org/z/WvnrcrGEn

Differential Revision: https://reviews.llvm.org/D101508
The file was addedllvm/test/CodeGen/AArch64/early-ifcvt-same-value.mir
The file was modifiedllvm/test/CodeGen/PowerPC/expand-foldable-isel.ll
The file was modifiedllvm/lib/CodeGen/EarlyIfConversion.cpp
Commit a45fd436aef4d5712da99f8292f5d0b16794892c by gbalats
[dfsan] Fix origin tracking for fast8

The problem is the following. With fast8, we broke an important
invariant when loading shadows.  A wide shadow of 64 bits used to
correspond to 4 application bytes with fast16; so, generating a single
load was okay since those 4 application bytes would share a single
origin.  Now, using fast8, a wide shadow of 64 bits corresponds to 8
application bytes that should be backed by 2 origins (but we kept
generating just one).

Let’s say our wide shadow is 64-bit and consists of the following:
0xABCDEFGH. To check if we need the second origin value, we could do
the following (on the 64-bit wide shadow) case:

- bitwise shift the wide shadow left by 32 bits (yielding 0xEFGH0000)
- push the result along with the first origin load to the shadow/origin vectors
- load the second 32-bit origin of the 64-bit wide shadow
- push the wide shadow along with the second origin to the shadow/origin vectors.

The combineOrigins would then select the second origin if the wide
shadow is of the form 0xABCDE0000.  The tests illustrate how this
change affects the generated bitcode.

Reviewed By: stephan.yichao.zhao

Differential Revision: https://reviews.llvm.org/D101584
The file was modifiedllvm/test/Instrumentation/DataFlowSanitizer/origin_load.ll
The file was modifiedllvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
Commit b11e4c990771541e440861f017afea7b4ba162f4 by ndesaulniers
Revert "[DebugInfo] Drop DBG_VALUE_LISTs with an excessive number of debug operands"

This reverts commit b623df3c93983c4512aa54f2c706716bdf865a90, as per
https://llvm.org/docs/DeveloperPolicy.html#patch-reversion-policy.

Breakages observed downstream reported in:
https://reviews.llvm.org/D91722#2724321

Fixes exist in:
https://reviews.llvm.org/D101523
https://reviews.llvm.org/D101540

but haven't landed yet going into the weekend.
The file was removedllvm/test/DebugInfo/X86/live-debug-vars-loc-limit.ll
The file was modifiedllvm/lib/CodeGen/LiveDebugVariables.cpp
Commit 02c5ba8679873e878ae7a76fb26808a47940275b by Adrian Prantl
Revert "[VP,Integer,#2] ExpandVectorPredication pass"

This reverts commit 43bc584dc05e24c6d44ece8e07d4bff585adaf6d.

The commit broke the -DLLVM_ENABLE_MODULES=1 builds.

http://green.lab.llvm.org/green/view/LLDB/job/lldb-cmake/31603/consoleFull#2136199809a1ca8a51-895e-46c6-af87-ce24fa4cd561
The file was modifiedllvm/tools/opt/opt.cpp
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp
The file was modifiedllvm/include/llvm/IR/IntrinsicInst.h
The file was modifiedllvm/lib/CodeGen/TargetPassConfig.cpp
The file was modifiedllvm/test/CodeGen/AArch64/O0-pipeline.ll
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h
The file was removedllvm/include/llvm/CodeGen/ExpandVectorPredication.h
The file was modifiedllvm/include/llvm/CodeGen/MachinePassRegistry.def
The file was modifiedllvm/include/llvm/CodeGen/Passes.h
The file was modifiedllvm/include/llvm/InitializePasses.h
The file was modifiedllvm/test/CodeGen/ARM/O3-pipeline.ll
The file was modifiedllvm/test/CodeGen/X86/O0-pipeline.ll
The file was modifiedllvm/tools/llc/llc.cpp
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h
The file was modifiedllvm/lib/IR/IntrinsicInst.cpp
The file was modifiedllvm/test/CodeGen/AArch64/O3-pipeline.ll
The file was modifiedllvm/test/CodeGen/X86/opt-pipeline.ll
The file was removedllvm/test/CodeGen/Generic/expand-vp.ll
The file was modifiedllvm/include/llvm/LinkAllPasses.h
The file was modifiedllvm/lib/CodeGen/CMakeLists.txt
The file was removedllvm/lib/CodeGen/ExpandVectorPredication.cpp
Commit 7e9cf2075ab595b3f501829c0a5512c4f3c5f9c7 by arthur.j.odwyer
[libc++] s/begin.h/access.h/ in comments. NFCI.
The file was modifiedlibcxx/include/__ranges/access.h
The file was modifiedlibcxx/include/__ranges/concepts.h
Commit 7994615ea08e7fd84b8d2256448cc25b5db1d454 by llvmgnsyncbot
[gn build] Port 02c5ba867987
The file was modifiedllvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
Commit c3da07d216dd20fbdb7302fd085c0a59e189ae3d by nemanja.i.ibm
[PowerPC] Provide fastmath sqrt and div functions in altivec.h

This adds the long overdue implementations of these functions
that have been part of the ABI document and are now part of
the "Power Vector Intrinsic Programming Reference" (PVIPR).

The approach is to add new builtins and to emit code with
the fast flag regardless of whether fastmath was specified
on the command line.

Differential revision: https://reviews.llvm.org/D101209
The file was modifiedclang/lib/Headers/altivec.h
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
The file was modifiedclang/test/CodeGen/builtins-ppc-vsx.c
The file was modifiedclang/test/CodeGen/builtins-ppc-altivec.c
The file was modifiedclang/include/clang/Basic/BuiltinsPPC.def
Commit 818b508953c7684a6c104b89c6f6ce84e961d82e by i
[ELF] Simplify the condition adding .got header

Adopt my suggestion in https://reviews.llvm.org/D91426#2653926 ,
generalizing the ppc64 specific code.

GNU ld and glibc ld.so has a contract about the first few entries of .got .
There are somewhat complex conditions when the header is needed. This patch
switches to a simpler approach: add a header unconditionally if
_GLOBAL_OFFSET_TABLE_ is used or the number of entries is more than just the
header.
The file was modifiedlld/ELF/SyntheticSections.cpp
The file was modifiedlld/test/ELF/riscv-tls-gd.s
The file was modifiedlld/test/ELF/ppc32-tls-ie.s
The file was modifiedlld/test/ELF/riscv-tls-ie.s
The file was modifiedlld/test/ELF/ppc32-tls-gd.s
The file was modifiedlld/test/ELF/ppc32-tls-ld.s
Commit bc9120047b91bf474bb72b093070ab9cd0a2bf6b by kda
Correct tiny misspelling (readlef -> readelf).
Getting my feet wet here as a new committer.

Correct misspelling in check-depends.pl.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D101552
The file was modifiedopenmp/runtime/tools/check-depends.pl
Commit bed58a4a5856116d11944cae152e0e04174f3af9 by nemanja.i.ibm
[PowerPC] Add missing requirement to test case

Commit 70c433a184a54819835e54c62c3e6891e7069861 added this
test case that has -stop-before that mentions a pass that is
only added for non-release builds. Add the requirement for asserts.
The file was modifiedllvm/test/CodeGen/PowerPC/toc-data.ll
Commit bfd60b36f825c299971bb0c2bf973031e2e0fc09 by nemanja.i.ibm
[PowerPC] Add floating point overloads for vec_sldw

These are added for compatibility with XLC.
The file was modifiedclang/lib/Headers/altivec.h
The file was modifiedclang/test/CodeGen/builtins-ppc-vsx.c
The file was modifiedclang/test/CodeGen/builtins-ppc-altivec.c
Commit 8fc5f07fc0aee95ff9f79e91035d115690177dc1 by Alex Lorenz
[clang][driver][darwin] use the deployment target version as the SDK version
when passing -platform_version to the linker

The use of a valid SDK version is preferred over an empty SDK version
(0.0.0) as the system's runtime might expect the linked binary to contain
a valid SDK version in order for the binary to work correctly

rdar://66795188
The file was modifiedclang/test/Driver/darwin-ld-platform-version-macos.c
The file was modifiedclang/lib/Driver/ToolChains/Darwin.cpp
Commit 0a2921993199fbf8af5078dce0dd933d6a50e25b by ajcbik
[mlir][sparse] sparse tensor type encoding migration (new home, new builders)

(1) migrates the encoding from TensorDialect into the new SparseTensorDialect
(2) replaces dictionary-based storage and builders with struct-like data

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D101669
The file was modifiedmlir/include/mlir/Dialect/SparseTensor/IR/CMakeLists.txt
The file was modifiedmlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorOps.td
The file was removedmlir/test/Dialect/Tensor/invalid_sparse_tensor.mlir
The file was removedmlir/include/mlir/Dialect/Tensor/IR/TensorAttrDefs.td
The file was modifiedmlir/include/mlir/Dialect/Tensor/IR/TensorOps.td
The file was removedmlir/test/Dialect/Tensor/valid_sparse.mlir
The file was addedmlir/test/Dialect/SparseTensor/invalid_encoding.mlir
The file was modifiedmlir/lib/Dialect/SparseTensor/IR/SparseTensorDialect.cpp
The file was modifiedmlir/include/mlir/Dialect/SparseTensor/IR/SparseTensor.h
The file was modifiedmlir/lib/Dialect/Tensor/IR/TensorDialect.cpp
The file was modifiedmlir/include/mlir/Dialect/Tensor/IR/CMakeLists.txt
The file was modifiedmlir/include/mlir/Dialect/Tensor/IR/Tensor.h
The file was addedmlir/test/Dialect/SparseTensor/roundtrip_encoding.mlir
The file was addedmlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorAttrDefs.td
The file was modifiedmlir/lib/Dialect/SparseTensor/IR/CMakeLists.txt
The file was modifiedmlir/lib/Dialect/Tensor/IR/CMakeLists.txt
Commit 6946f0ecca64f3af6b9e28cced9c982de2748f19 by arthur.j.odwyer
[libc++] [LIBCXX-DEBUG-FIXME] <span>, like <string_view>, has no use for debug iterators.

A span has no idea what container (if any) "owns" its iterators, nor
under what circumstances they might become invalidated.

However, continue to use `__wrap_iter<T*>` instead of raw `T*` outside
of debug mode, because we've been shipping `std::span` since Clang 7
and ldionne doesn't want to break ABI. (Namely, the mangling of functions
taking `span::iterator` as a parameter.) Permit using raw `T*` there,
but only under an ABI macro: `_LIBCPP_ABI_SPAN_POINTER_ITERATORS`.

Differential Revision: https://reviews.llvm.org/D101003
The file was modifiedlibcxx/test/std/containers/views/span.cons/deduct.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.iterators/end.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.sub/last.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.sub/subspan.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.iterators/begin.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.iterators/rend.pass.cpp
The file was modifiedlibcxx/include/__config
The file was modifiedlibcxx/include/span
The file was modifiedlibcxx/test/std/containers/views/span.iterators/rbegin.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.sub/first.pass.cpp
Commit 4397b7095d640f9b9426c4d0135e999c5a1de1c5 by nathan
Revert "Re-reapply "[DebugInfo] Use variadic debug values to salvage BinOps and GEP instrs with non-const operands""

This reverts commit 791930d74087b8ae8901172861a0fd21a211e436, as per
https://llvm.org/docs/DeveloperPolicy.html#patch-reversion-policy.

I observed breakage with the Linux kernel, as reported at
https://reviews.llvm.org/D91722#2724321

Fixes exist at
https://reviews.llvm.org/D101523
https://reviews.llvm.org/D101540

but they have not landed so to unbreak the tree for the weekend, revert
this commit.

Commit b11e4c990771 ("Revert "[DebugInfo] Drop DBG_VALUE_LISTs with an
excessive number of debug operands"") only reverted one follow-up fix,
not the original patch that broke the kernel.

e
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DebugLocEntry.h
The file was modifiedllvm/lib/Transforms/Coroutines/CoroFrame.cpp
The file was modifiedllvm/include/llvm/IR/DebugInfoMetadata.h
The file was modifiedllvm/lib/IR/IntrinsicInst.cpp
The file was removedllvm/test/DebugInfo/salvage-nonconst-binop.ll
The file was modifiedllvm/include/llvm/IR/Instructions.h
The file was modifiedllvm/include/llvm/Transforms/Utils/Local.h
The file was modifiedllvm/lib/Transforms/Utils/Local.cpp
The file was modifiedllvm/test/DebugInfo/NVPTX/debug-info.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
The file was modifiedllvm/lib/IR/DebugInfoMetadata.cpp
The file was modifiedllvm/include/llvm/IR/IntrinsicInst.h
The file was modifiedllvm/include/llvm/IR/Operator.h
The file was modifiedllvm/test/Transforms/InstCombine/debuginfo-sink.ll
The file was modifiedllvm/test/Transforms/Reassociate/undef_intrinsics_when_deleting_instructions.ll
The file was modifiedllvm/lib/IR/Instructions.cpp
The file was modifiedllvm/lib/IR/Operator.cpp
The file was removedllvm/test/DebugInfo/salvage-gep.ll