Changes

Summary

  1. [libcxx] [test] Fix the _supportsVerify check on Windows by fixing quoting (details)
  2. [X86] Split FeatureFastVariableShuffle tuning into Lane-Crossing and Per-Lane variants (details)
  3. [X86] AMD Zen 3 has fast variable per-lane shuffles (details)
  4. [mlir][linalg] Cleanup LinalgOp usage in vectorization (NFC). (details)
  5. [clangd] Fix -Wunused-variable warning (NFC) (details)
  6. [mlir][linalg] Cleanup LinalgOp usage in tiling (NFC). (details)
  7. [mlir][linalg] Cleanup LinalgOp usage in fusion (NFC). (details)
  8. [mlir][linalg] Cleanup LinalgOp usage in dependence analysis (NFC). (details)
  9. Mark test as requiring asserts. (details)
  10. [VectorCombine] Add tests with multiple noundef indices for scalarization. (details)
  11. [WebAssembly][CodeGen] IR support for WebAssembly local variables (details)
  12. [RISCV] Support vector types in combination with fastcc (details)
  13. [VectorCombine] Freeze index unless it is known to be non-poison. (details)
  14. [mlir][linalg] Fix signed/unsigned comparison warnings (NFC). (details)
  15. [mlir] Use interfaces in MathToLibm (details)
  16. [SDAG] add helper function for sext-of-setcc folds; NFC (details)
  17. [LoopDeletion] Consider infinite loops alive, unless mustprogress. (details)
  18. [compiler-rt] Fix compilation when multiple architectures can be targeted (details)
  19. [InstCombine] Relax constraints of uses for exp(X) * exp(Y) -> exp(X + Y) (details)
  20. [AMDGPU][Libomptarget] Remove g_atmi_machine global (details)
  21. [OpenCL] Fix ICE with invalid use of half (details)
  22. [clang][Parse] Add parsing support for C++ attributes on using-declarations (details)
  23. [llvm-dwarfdump][test] Add missing dedicated tests for some options (details)
  24. [SLP]Better detection of perfect/shuffles matches for gather nodes. (details)
  25. Simplify coro-zero-alloca.ll (details)
  26. [x86] add test for sext-of-setcc; NFC (details)
  27. [lldb] Remove SBCommandReturnObject::ref (details)
  28. [lldb][NFC] Use Language plugins in Mangled::GuessLanguage (details)
  29. [RISCV] Remove earlyclobber from compares with LMUL<=1. (details)
  30. [RISCV] Remove earlyclobber from vnsrl/vnsra/vnclip(u) when the source and dest are a single vector register. (details)
  31. [ADT] Move DenseMapInfo for APInt into APInt.h (PR50527) (details)
  32. [polly] Fix SCEVLoopAddRecRewriter to avoid invalid AddRecs. (details)
  33. [SystemZ] Return true from hasBitPreservingFPLogic(). (details)
  34. [MLIR] Add missing APSInt.h include (details)
  35. [X86FixupLEAs] Transform the sequence LEA/SUB to SUB/SUB (details)
  36. [clangd][ObjC] Fix issue completing a method decl by name (details)
  37. [libc++] Temporary hack to unbreak CI (details)
  38. [GlobalISel][AArch64] Combine and (lshr x, cst), mask -> ubfx x, cst, width (details)
  39. Fix a git apply that went bad somehow. (details)
  40. [OpenMP] Define named constants for interop's foreign runtime ID (details)
  41. [ORC-RT] Add equality/inequality comparison to string_view. (details)
  42. [ORC-RT] Rename C-API functions to use __orc_rt_ prefix (instead of OrcRT). (details)
  43. [ORC-RT] Add WrapperFunctionResult, Simple Packed Serialization (SPS) system. (details)
  44. [flang][openacc] Enforce restriction on attach and detach variables (details)
  45. [clang] RecursiveASTVisitor visits ObjCPropertyRefExpr's class receiver (details)
  46. [OpenMP] Add L2-Tile equivalence for KNL (details)
  47. [SLPVectorizer] Ignore unreachable blocks (details)
  48. [AMDGPU][NFC] Remove author's name from codebase (details)
  49. [lld/mac] Don't write mtimes to N_OSO entries if ZERO_AR_DATE is set. (details)
  50. [lld/mac] Don't load DylibFiles from the DylibFile constructor (details)
  51. [libcxx] Implement view.interface. (details)
  52. [gn build] Port 5671ff20d92b (details)
  53. [clang] Fix ICE with typeid & polymorphic class (pr50497) (details)
  54. [SystemZ][z/OS] Stricter condition for HLASM class instantiation (details)
  55. [InstCombine] add tests for cast folding; NFC (details)
  56. WindowsSupport.h: do not depend on private config header (details)
  57. [lld/mac] Implement removal of unused dylibs (details)
  58. [NFC][OpaquePtr] Explicitly pass GEP source type to IRBuilder in more places (details)
  59. Convert TableGen assert to error (details)
  60. [globalisel][legalizer] Separate the deprecated LegalizerInfo from the current one (details)
  61. [mlir] Updated depthwise conv to support kernel dilation (details)
  62. [gn build] Port aaac268285ff (details)
  63. [libc++] Fix the std_include.sh.cpp test that has been failing since c9385297ce (details)
  64. [lld/mac] fix test failure after 24979e111 (details)
  65. fixup: Missing operator in [globalisel][legalizer] Separate the deprecated LegalizerInfo from the current one (details)
  66. Fix a Clang diagnostic to start with a lowercase letter; NFC (details)
  67. [libcxx][ranges] Add `default_sentinel` and `default_sentinel_t`. (details)
  68. [gn build] Port 065cf3f9d703 (details)
  69. [lld][WebAssemlby] Fix for string merging of -dwarf-5 sections (details)
  70. [Dominators] Rewrite the dominator implementation for efficiency. NFC. (details)
  71. [Fuchsia] Add compat multilibs to cache file (details)
  72. [lld/mac] Emit only one LC_LOAD_DYLIB per dylib (details)
  73. [CSE] Ask DominanceInfo about "hasSSADominance" instead of reconstructing it. (details)
  74. [lld-macho][nfc] Remove unnecessary use of Optional<T*> (details)
  75. [various] Remove or use variables which are unused but set. (details)
  76. [Clang] -Wunused-but-set-parameter and -Wunused-but-set-variable (details)
  77. [clang][Fuchsia] Turn on relative-vtables by default for Fuchsia (details)
  78. [lld/mac] Make -t work correctly with -flat_namespace (details)
  79. [test] Precommit test for D101103 (details)
  80. [InstSimplify] Treat invariant group insts as bitcasts for load operands (details)
  81. [mlir-reduce] Reducer refactor. (details)
  82. [OpaquePtr] Create API to make a copy of a PointerType with some address space (details)
  83. [AMDGPU] All GWS instructions need aligned VGPR on gfx90a (details)
  84. Fix tmp files being left on Windows builds. (details)
  85. Remove x86 test amx-fast-tile-config.mir (by its author) (details)
  86. [CUDA][HIP] Change default lang std to c++14 (details)
  87. [RISCV][test] Add new tests of bitwise and with constant for the Zbs extension (details)
  88. Make ignore counts work as "after stop" modifiers so they play nicely with conditions (details)
  89. [CUDA][HIP] Promote const variables to constant (details)
  90. [mlir] Support tensor types in non-unrolled VectorToSCF (details)
  91. [llvm-readobj] Print function names with `--bb-addr-map`. (details)
  92. [mlir] Support tensor types in unrolled VectorToSCF (details)
  93. [libc++] NFC: Move unwrap_iter to its own header (details)
  94. [gn build] Port 924ea3bb53ca (details)
  95. [RISCV] Improve register allocation for masked vwadd(u).wv, vwsub(u).wv, vfwadd.wv, and vfwsub.wv. (details)
  96. [libc++] Add a CI job to test libc++ when building for 32 bit (details)
  97. Revert "Fix tmp files being left on Windows builds." for now; (details)
  98. [scudo] Enabled MTE in tests (details)
  99. [NFC][msan] Fix warning on sanitizer-ppc64le-linux bot (details)
  100. [lldb/API] Expose triple for SBProcessInfo. (details)
  101. Resubmit D85085 after fixing the tests that were failing. (details)
Commit 41d7909368bebc897467a75860a524a5f172564f by martin
[libcxx] [test] Fix the _supportsVerify check on Windows by fixing quoting

The pipes.quote function quotes using single quotes, the same goes
for the newer shlex.quote (which is the preferred form in Python 3).
This isn't suitable for quoting in command lines on Windows (and the
documentation for shlex.quote even says it's only usable for Unix
shells).

In general, the python subprocess.list2cmdline function should do
proper quoting for the platform's current shell. However, it doesn't
quote the ';' char, which we pass within some arguments to run.py.
Therefore use the custom reimplementation from lit.TestRunner which
is amended to quote ';' too.

The fact that arguemnts were quoted with single quotes didn't matter
for command lines that were executed by either bash or the lit internal
shell, but if executing things directly using subprocess.call, as in
_supportsVerify, the quoted path to %{cxx} fails to be resolved by the
Windows shell.

This unlocks 114 tests that previously were skipped on Windows.

Differential Revision: https://reviews.llvm.org/D103310
The file was modifiedlibcxx/utils/libcxx/test/config.py
The file was modifiedllvm/utils/lit/lit/TestRunner.py
Commit cf9b1f7a0e9da5d019a8bea853f3cff85d808d18 by lebedev.ri
[X86] Split FeatureFastVariableShuffle tuning into Lane-Crossing and Per-Lane variants

Currently, X86 backend only has a global one-size-fits-all `FeatureFastVariableShuffle` feature,
which controls profitability of both the cross-lane and per-lane variable shuffles.
I guess, this has been fine so far.

But at least on AMD Zen 3, while per-line variable shuffles (e.g. `VPSHUFB`)
are as fast as as shuffles with fixed/immediate mask,
while lane-crossing shuffles, e.g. `VPERMPS` is performing worse.

So to get the benefits of variable-mask shuffles, but not the drawbacks of lane-crossing shuffles,
as suggested by @RKSimon, split the feature flag into two.

Differential Revision: https://reviews.llvm.org/D103274
The file was modifiedllvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-4.ll
The file was modifiedllvm/lib/Target/X86/X86Subtarget.h
The file was modifiedllvm/test/CodeGen/X86/broadcastm-lowering.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-256-v32.ll
The file was modifiedllvm/test/CodeGen/X86/psubus.ll
The file was modifiedllvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-combining.ll
The file was modifiedllvm/test/CodeGen/X86/avx512-shuffles/broadcast-vector-int.ll
The file was modifiedllvm/test/CodeGen/X86/shuffle-strided-with-offset-256.ll
The file was modifiedllvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-4.ll
The file was modifiedllvm/test/CodeGen/X86/shuffle-vs-trunc-512.ll
The file was modifiedllvm/test/CodeGen/X86/vec_smulo.ll
The file was modifiedllvm/test/CodeGen/X86/ssub_sat_vec.ll
The file was modifiedllvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-5.ll
The file was modifiedllvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-3.ll
The file was modifiedllvm/test/CodeGen/X86/combine-srl.ll
The file was modifiedllvm/test/CodeGen/X86/oddsubvector.ll
The file was modifiedllvm/test/CodeGen/X86/vec_uaddo.ll
The file was modifiedllvm/test/CodeGen/X86/avx512-shuffles/partial_permute.ll
The file was modifiedllvm/test/CodeGen/X86/combine-sra.ll
The file was modifiedllvm/test/CodeGen/X86/phaddsub.ll
The file was modifiedllvm/test/CodeGen/X86/vector-trunc-ssat.ll
The file was modifiedllvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-6.ll
The file was modifiedllvm/test/CodeGen/X86/vector-half-conversions.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-128-unpck.ll
The file was modifiedllvm/test/CodeGen/X86/vec_umulo.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-128-v16.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.h
The file was modifiedllvm/test/CodeGen/X86/insertelement-zero.ll
The file was modifiedllvm/test/CodeGen/X86/combine-shl.ll
The file was modifiedllvm/test/CodeGen/X86/oddshuffles.ll
The file was modifiedllvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-5.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
The file was modifiedllvm/test/CodeGen/X86/shuffle-vs-trunc-128.ll
The file was modifiedllvm/test/CodeGen/X86/uadd_sat_vec.ll
The file was modifiedllvm/test/CodeGen/X86/vector-trunc-usat.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-128-v8.ll
The file was modifiedllvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-2.ll
The file was modifiedllvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-2.ll
The file was modifiedllvm/test/CodeGen/X86/avx512-trunc.ll
The file was modifiedllvm/test/CodeGen/X86/shuffle-strided-with-offset-128.ll
The file was modifiedllvm/test/CodeGen/X86/vec_saddo.ll
The file was modifiedllvm/test/CodeGen/X86/avx2-vector-shifts.ll
The file was modifiedllvm/test/CodeGen/X86/vec_usubo.ll
The file was modifiedllvm/test/CodeGen/X86/bitcast-int-to-vector-bool-sext.ll
The file was modifiedllvm/test/CodeGen/X86/usub_sat_vec.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-256-v8.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-v1.ll
The file was modifiedllvm/test/CodeGen/X86/vector-trunc-packus.ll
The file was modifiedllvm/test/CodeGen/X86/shuffle-strided-with-offset-512.ll
The file was modifiedllvm/test/CodeGen/X86/vec_ssubo.ll
The file was modifiedllvm/test/CodeGen/X86/vector-trunc-math.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-128-v4.ll
The file was modifiedllvm/test/CodeGen/X86/sadd_sat_vec.ll
The file was modifiedllvm/test/CodeGen/X86/shuffle-of-splat-multiuses.ll
The file was modifiedllvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-3.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-256-v16.ll
The file was modifiedllvm/test/CodeGen/X86/avx512-extract-subvector-load-store.ll
The file was modifiedllvm/test/CodeGen/X86/shuffle-vs-trunc-256.ll
The file was modifiedllvm/lib/Target/X86/X86.td
The file was modifiedllvm/test/CodeGen/X86/avx2-conversions.ll
The file was modifiedllvm/test/CodeGen/X86/bitcast-int-to-vector-bool-zext.ll
The file was modifiedllvm/test/CodeGen/X86/vector-trunc.ll
The file was modifiedllvm/test/CodeGen/X86/vector-zext.ll
The file was modifiedllvm/test/CodeGen/X86/paddus.ll
Commit a3b8695bf5927f0a43d295dfdfeafeef4da022ea by lebedev.ri
[X86] AMD Zen 3 has fast variable per-lane shuffles

... but lane-crossing shuffles are slow.
The file was modifiedllvm/lib/Target/X86/X86.td
Commit 912ebf60b15123827299df73a7c9136f6693b487 by gysit
[mlir][linalg] Cleanup LinalgOp usage in vectorization (NFC).

Replace the uses of deprecated Structured Op Interface methods in Vectorization.cpp. This patch is based on https://reviews.llvm.org/D103394.

Differential Revision: https://reviews.llvm.org/D103410
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
Commit 5b747197f8fb83bb7c256fa6cb2010445deb0a85 by nullptr.cpp
[clangd] Fix -Wunused-variable warning (NFC)

GCC warning:
```
/llvm-project/clang-tools-extra/clangd/InlayHints.cpp: In member function ‘bool clang::clangd::InlayHintVisitor::VisitVarDecl(clang::VarDecl*)’:
/llvm-project/clang-tools-extra/clangd/InlayHints.cpp:81:15: warning: unused variable ‘AT’ [-Wunused-variable]
   81 |     if (auto *AT = D->getType()->getContainedAutoType()) {
      |               ^~

```
The file was modifiedclang-tools-extra/clangd/InlayHints.cpp
Commit c2e5226a851413464356163fc028f23653dad4cd by gysit
[mlir][linalg] Cleanup LinalgOp usage in tiling (NFC).

Replace the uses of deprecated Structured Op Interface methods in Tiling.cpp and Utils.cpp. This patch is based on https://reviews.llvm.org/D103394.

Differential Revision: https://reviews.llvm.org/D103438
The file was modifiedmlir/lib/Dialect/Linalg/Utils/Utils.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Tiling.cpp
Commit 7594f5028a11c68bcfdf631928ab44889127fab7 by gysit
[mlir][linalg] Cleanup LinalgOp usage in fusion (NFC).

Replace the uses of deprecated Structured Op Interface methods in Fusion.cpp. This patch is based on https://reviews.llvm.org/D103394.

Differential Revision: https://reviews.llvm.org/D103437
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Fusion.cpp
Commit 94643fda1346e8dab30243d02250cd44683445f2 by gysit
[mlir][linalg] Cleanup LinalgOp usage in dependence analysis (NFC).

Replace the uses of deprecated Structured Op Interface methods in DependenceAnalysis.cpp and DependenceAnalysis.h. This patch is based on https://reviews.llvm.org/D103394.

Differential Revision: https://reviews.llvm.org/D103411
The file was modifiedmlir/include/mlir/Dialect/Linalg/Analysis/DependenceAnalysis.h
The file was modifiedmlir/lib/Dialect/Linalg/Analysis/DependenceAnalysis.cpp
Commit 18225d45769b8c86c8291505de90ea539ae4f445 by douglas.yung
Mark test as requiring asserts.
The file was modifiedllvm/test/Transforms/LoopVectorize/RISCV/riscv-interleaved.ll
Commit f000c4cfb66ce5f86394920db35397d618c0855a by flo
[VectorCombine] Add tests with multiple noundef indices for scalarization.
The file was modifiedllvm/test/Transforms/VectorCombine/AArch64/load-extractelement-scalarization.ll
Commit 82f92e35c6464e23859c29422956caaceb623967 by wingo
[WebAssembly][CodeGen] IR support for WebAssembly local variables

This patch adds TargetStackID::WasmLocal.  This stack holds locations of
values that are only addressable by name -- not via a pointer to memory.
For the WebAssembly target, these objects are lowered to WebAssembly
local variables, which are managed by the WebAssembly run-time and are
not addressable by linear memory.

For the WebAssembly target IR indicates that an AllocaInst should be put
on TargetStackID::WasmLocal by putting it in the non-integral address
space WASM_ADDRESS_SPACE_WASM_VAR, with value 1.  SROA will mostly lift
these allocations to SSA locals, but any alloca that reaches instruction
selection (usually in non-optimized builds) will be assigned the new
TargetStackID there.  Loads and stores to those values are transformed
to new WebAssemblyISD::LOCAL_GET / WebAssemblyISD::LOCAL_SET nodes,
which then lower to the type-specific LOCAL_GET_I32 etc instructions via
tablegen patterns.

Differential Revision: https://reviews.llvm.org/D101140
The file was addedllvm/test/CodeGen/WebAssembly/ir-locals-stackid.ll
The file was modifiedllvm/include/llvm/CodeGen/TargetFrameLowering.h
The file was addedllvm/test/CodeGen/WebAssembly/ir-locals.ll
The file was modifiedllvm/include/llvm/CodeGen/MIRYamlMapping.h
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyISD.def
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIFrameLowering.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.h
The file was modifiedllvm/lib/Target/RISCV/RISCVFrameLowering.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
Commit 4f500c402b7357808d9595313438f223447dcace by fraser
[RISCV] Support vector types in combination with fastcc

This patch extends the RISC-V lowering of the 'fastcc' calling
convention to vector types, both fixed-length and scalable. Without this
patch, any function passing or returning vector types by value would
throw a compiler error.

Vectors are handled in 'fastcc' much as they are in the default calling
convention, the noticeable difference being the extended set of scalar
GPR registers that can be used to pass vectors indirectly.

Reviewed By: HsiangKai

Differential Revision: https://reviews.llvm.org/D102505
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.h
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was addedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv-fastcc.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll
Commit d4c070d801413186c5a59cede9d721e9ca099708 by flo
[VectorCombine] Freeze index unless it is known to be non-poison.

If the index itself is already poison, the poison propagates through
instructions clamping the index to a valid range. This still causes
introducing a load of poison, as flagged by Alive2 and pointed out
at 575e2aff5574.

This patch updates the code to freeze the index, unless it is proven to
not be poison.

Reviewed By: nlopes

Differential Revision: https://reviews.llvm.org/D103378
The file was modifiedllvm/test/Transforms/VectorCombine/AArch64/load-extractelement-scalarization.ll
The file was modifiedllvm/lib/Transforms/Vectorize/VectorCombine.cpp
Commit 07576cc4dc891294e31a8ff10ff08c662042c572 by gysit
[mlir][linalg] Fix signed/unsigned comparison warnings (NFC).

Fix signedness warnings in Utils.cpp and LinalgInterfaces.cpp.
The file was modifiedmlir/lib/Dialect/Linalg/Utils/Utils.cpp
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgInterfaces.cpp
Commit 1ebf7ce950bb72599055d2f2789fd604a02b6d15 by tpopp
[mlir] Use interfaces in MathToLibm

Previously, this assumed use of ModuleOp and FuncOp. There is no need to
restrict this, and using interfaces allows these patterns to be used
during dialect conversion to LLVM.

Some assertions were removed due to inconsistent implementation of
FunctionLikeOps.

Differential Revision: https://reviews.llvm.org/D103447
The file was modifiedmlir/lib/Conversion/MathToLibm/MathToLibm.cpp
Commit 1b14f3951a205536d95ce7fab5b9f57f9ffa2ee0 by spatel
[SDAG] add helper function for sext-of-setcc folds; NFC

Try to make this easier to read as noted in D103280
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Commit 1b84acb23acac2fbb450312049495164a16ee715 by flo
[LoopDeletion] Consider infinite loops alive, unless mustprogress.

The current loop or any of its sub-loops may be infinite. Unless the
function or the loops are marked as mustprogress, this in itself makes
the loop *not* dead.

This patch moves the logic to check whether the current loop is finite
or mustprogress to `isLoopDead` and also extends it to check the
sub-loops. This should fix PR50511.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D103382
The file was modifiedllvm/lib/Transforms/Scalar/LoopDeletion.cpp
The file was modifiedllvm/test/Transforms/LoopDeletion/unreachable-loops.ll
The file was modifiedllvm/test/Transforms/LoopDeletion/noop-loops-with-subloops.ll
Commit 7879fa6884723f35463de33cbe03b2acb93ea3cf by eleviant
[compiler-rt] Fix compilation when multiple architectures can be targeted

When toolchain can supports all of arm, armhf and armv6m architectures compiler-rt
libraries won't compile because architecture specific flags are appended to single
BUILTIN_CFLAGS variable.

Differential revision: https://reviews.llvm.org/D103363
The file was modifiedcompiler-rt/lib/builtins/CMakeLists.txt
Commit 13140120dcca64c35508880e10e14bcee3c54a58 by spatel
[InstCombine] Relax constraints of uses for exp(X) * exp(Y) -> exp(X + Y)

InstCombine didn't perform the transformations when fmul's operands were
the same instruction because it required to have one use for each of them
which is false in the case. This patch fixes this + adds tests for them
and introduces a new function isOnlyUserOfAnyOperand to check these cases
in a single place.

This patch is a result of discussion in D102574.

Differential Revision: https://reviews.llvm.org/D102698
The file was modifiedllvm/lib/IR/Instruction.cpp
The file was modifiedllvm/include/llvm/IR/Instruction.h
The file was modifiedllvm/test/Transforms/InstCombine/fmul-exp.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
The file was modifiedllvm/test/Transforms/InstCombine/fmul-exp2.ll
Commit fb113264a8da1d8e456e64f99920fac6b4fae548 by Pushpinder.Singh
[AMDGPU][Libomptarget] Remove g_atmi_machine global

Turns out the only purpose of this class was verify if device ID
was in range or not which could be done easily by using g_atl_machine.

Still getting rid of g_atl_machine is pending which would be done in
a later patch.

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D103443
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/system.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/rt.h
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/atmi_runtime.h
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/atmi_interop_hsa.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/atmi.cpp
Commit 94b0aec0f5c6b4f6a27cf3a542f795bbba72e851 by olemarius.strohm
[OpenCL] Fix ICE with invalid use of half

Because half is limited to the `cl_khr_fp16` extension being enabled,
`DefaultLvalueConversion` can fail when it's not enabled.
The original assumption that it will never fail is therefore wrong now.

Fixes: PR47976

Reviewed By: Anastasia

Differential Revision: https://reviews.llvm.org/D103175
The file was modifiedclang/lib/Sema/SemaExprCXX.cpp
The file was addedclang/test/SemaOpenCLCXX/half.clcpp
Commit 97d234935f1514af128277943f30efc469525371 by Louis Dionne
[clang][Parse] Add parsing support for C++ attributes on using-declarations

This is a re-application of dc67299 which was reverted in f63adf5b because
it broke the build. The issue should now be fixed.

Attribution note: The original author of this patch is Erik Pilkington.
I'm only trying to land it after rebasing.

Differential Revision: https://reviews.llvm.org/D91630
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was addedclang/test/SemaCXX/cxx11-attributes-on-using-declaration.cpp
The file was modifiedclang/include/clang/Basic/Features.def
The file was modifiedclang/lib/Parse/ParseDecl.cpp
The file was modifiedclang/lib/Sema/SemaDeclAttr.cpp
The file was modifiedclang/test/Parser/cxx0x-attributes.cpp
The file was modifiedclang/docs/LanguageExtensions.rst
The file was modifiedclang/include/clang/Parse/Parser.h
The file was modifiedclang/lib/Sema/SemaDeclCXX.cpp
The file was modifiedclang/docs/ReleaseNotes.rst
The file was modifiedclang/include/clang/Basic/DiagnosticParseKinds.td
The file was modifiedclang/lib/Parse/ParseDeclCXX.cpp
Commit e60f147324b64f7740de58e6b936cdc0e26daadd by gbreynoo
[llvm-dwarfdump][test] Add missing dedicated tests for some options

This change adds tests specifically for --parent-recurse-depth, --quiet
and -o. The test for -o found a typo in an error message which is also
fixed in this change.

Differential Revision: https://reviews.llvm.org/D103250
The file was addedllvm/test/tools/llvm-dwarfdump/X86/parent_recurse_depth.s
The file was addedllvm/test/tools/llvm-dwarfdump/X86/output.s
The file was addedllvm/test/tools/llvm-dwarfdump/X86/quiet.s
The file was modifiedllvm/tools/llvm-dwarfdump/llvm-dwarfdump.cpp
Commit 36911971a58d1ba8b15e97790ac816eaadb0603e by a.bataev
[SLP]Better detection of perfect/shuffles matches for gather nodes.

Implemented better scheme for perfect/shuffled matches of the gather
nodes which allows to fix the performance regressions introduced by
earlier patches. Starting detecting matches for broadcast nodes and
extractelement gathering.

Differential Revision: https://reviews.llvm.org/D102920
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/diamond_broadcast.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/blending-shuffle-inseltpoison.ll
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/blending-shuffle.ll
Commit 41d08541e88467992ff6116cfcf18190a10402b3 by lxfind
Simplify coro-zero-alloca.ll

D101841 added this test. It appears to generate different outcome on different platforms.
Make it to only call -coro-split instead of entire O2 pipeline to simplify the test flow.
Hope this will make  the test more robust.

Reviewed By: djtodoro

Differential Revision: https://reviews.llvm.org/D103418
The file was modifiedllvm/test/Transforms/Coroutines/coro-zero-alloca.ll
Commit de65b1ab7de1f4651d930d8f445167918ebf9908 by spatel
[x86] add test for sext-of-setcc; NFC
The file was modifiedllvm/test/CodeGen/X86/sext-vsetcc.ll
Commit 01fb14e17763269779f2c03b772db960540f47ed by Raphael Isemann
[lldb] Remove SBCommandReturnObject::ref

This function was added in D67589 and returns an internal CommandReturnObject
which isn't allowed in the SB API. This patch just makes it private as all uses
of this function are inside SBCommandReturnObject.

Reviewed By: jankratochvil

Differential Revision: https://reviews.llvm.org/D103390
The file was modifiedlldb/include/lldb/API/SBCommandReturnObject.h
Commit ecfca427f9601a7789c0703582cff92e7a3277c0 by Raphael Isemann
[lldb][NFC] Use Language plugins in Mangled::GuessLanguage

This removes the direct dependency to the ObjC and C++ plugins.

Reviewed By: bulbazord

Differential Revision: https://reviews.llvm.org/D103158
The file was modifiedlldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
The file was modifiedlldb/source/Plugins/Language/ObjC/ObjCLanguage.cpp
The file was modifiedlldb/include/lldb/Target/Language.h
The file was modifiedlldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.h
The file was modifiedlldb/source/Core/Mangled.cpp
The file was modifiedlldb/source/Plugins/Language/ObjC/ObjCLanguage.h
Commit 5a5219a0f961b91253dc3fdb4b33e088b199b451 by craig.topper
[RISCV] Remove earlyclobber from compares with LMUL<=1.

Compares are considered a narrowing operation for register overlap.
I believe for LMUL<=1 they meet this exception to allow overlap

"The destination EEW is smaller than the source EEW and the overlap is in the
lowest-numbered part of the source register group"

Both the result and the sources will occupy a single register for
LMUL<=1 so the overlap would always be in the "lowest-numbered part".

Reviewed By: frasercrmck, HsiangKai

Differential Revision: https://reviews.llvm.org/D103336
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-splat.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-int.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-setcc.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/select-int.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsge-rv32.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsgeu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/extload-truncstore.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-i2fp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-subvector.ll
Commit 896f9bc350eba0baf17f1ceae7383d88f0ce2a85 by craig.topper
[RISCV] Remove earlyclobber from vnsrl/vnsra/vnclip(u) when the source and dest are a single vector register.

This guarantees they meet this overlap exception:

"The destination EEW is smaller than the source EEW and the overlap
is in the lowest-numbered part of the source register group"

Being a single register guarantees the overlap is always in the
lowerst-number part of the group.

Reviewed By: frasercrmck, khchen

Differential Revision: https://reviews.llvm.org/D103351
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnclip-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vtruncs-sdnode-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnclip-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnsra-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnsrl-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vnsra-vnsrl.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnclipu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnsra-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnclipu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/extload-truncstore.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vtruncs-sdnode-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnsrl-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-exttrunc.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-extload-truncstore.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfptoi-sdnode.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
Commit fd7e309e02fd226b0390888388ed732608e52c73 by nikita.ppv
[ADT] Move DenseMapInfo for APInt into APInt.h (PR50527)

As suggested in https://bugs.llvm.org/show_bug.cgi?id=50527, this
moves the DenseMapInfo for APInt and APSInt into the respective
headers, removing the need to include APInt.h and APSInt.h from
DenseMapInfo.h.

We could probably do the same from StringRef and ArrayRef as well.

Differential Revision: https://reviews.llvm.org/D103422
The file was modifiedllvm/lib/Support/APInt.cpp
The file was modifiedllvm/lib/ObjectYAML/ELFYAML.cpp
The file was modifiedllvm/include/llvm/ADT/DenseMapInfo.h
The file was modifiedllvm/include/llvm/ADT/APSInt.h
The file was modifiedllvm/include/llvm/ADT/APInt.h
Commit fd229caa0138d296090c101655c82ca7da58ddd6 by efriedma
[polly] Fix SCEVLoopAddRecRewriter to avoid invalid AddRecs.

When we're remapping an AddRec, the AddRec constructed by a partial
rewrite might not make sense.  This triggers an assertion complaining
it's not loop-invariant.

Instead of constructing the partially rewritten AddRec, just skip
straight to calling evaluateAtIteration.

Testcase was automatically reduced using llvm-reduce, so it's a little
messy, but hopefully makes sense.

Differential Revision: https://reviews.llvm.org/D102959
The file was addedpolly/test/Isl/CodeGen/OpenMP/scev-rewriting.ll
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was modifiedllvm/include/llvm/Analysis/ScalarEvolutionExpressions.h
Commit 9ee3f16919acb753d011290446efd12bc59d9605 by paulsson
[SystemZ] Return true from hasBitPreservingFPLogic().

This is currently NFC on benchmarks and tests.

Review: Ulrich Weigand
The file was modifiedllvm/lib/Target/SystemZ/SystemZISelLowering.h
Commit bd0a9880d02f12df8374e05e67b0d95a7af939d7 by nikita.ppv
[MLIR] Add missing APSInt.h include

Since fd7e309e02fd226b0390888388ed732608e52c73 this is no longer
pulled in indirectly through DenseMapInfo.h.
The file was modifiedmlir/lib/IR/BuiltinAttributes.cpp
Commit 1b748faf2bae246e2fc77d88420df13c2e60f4df by carrot
[X86FixupLEAs] Transform the sequence LEA/SUB to SUB/SUB

This patch transforms the sequence

    lea (reg1, reg2), reg3
    sub reg3, reg4

to two sub instructions

    sub reg1, reg4
    sub reg2, reg4

Similar optimization can also be applied to LEA/ADD sequence.
The modifications to TwoAddressInstructionPass is to ensure the operands of ADD
instruction has expected order (the dest register of LEA should be src register of ADD).

Differential Revision: https://reviews.llvm.org/D101970
The file was modifiedllvm/lib/Target/X86/X86FixupLEAs.cpp
The file was modifiedllvm/test/CodeGen/X86/2009-03-23-MultiUseSched.ll
The file was modifiedllvm/lib/Target/X86/X86InstrInfo.h
The file was modifiedllvm/test/CodeGen/X86/vp2intersect_multiple_pairs.ll
The file was modifiedllvm/include/llvm/CodeGen/TargetInstrInfo.h
The file was modifiedllvm/test/CodeGen/X86/lea-opt2.ll
The file was modifiedllvm/lib/CodeGen/TwoAddressInstructionPass.cpp
The file was modifiedllvm/lib/Target/X86/X86InstrInfo.cpp
Commit 2a030e680e0812c652ed4ae2b012e285a5514ffa by davg
[clangd][ObjC] Fix issue completing a method decl by name

When completing an Objective-C method declaration by name, we need to
preserve the leading text as a `qualifier` so we insert it properly
before the first typed text chunk.

Differential Revision: https://reviews.llvm.org/D100798
The file was modifiedclang-tools-extra/clangd/unittests/CodeCompleteTests.cpp
The file was modifiedclang-tools-extra/clangd/CodeCompletionStrings.cpp
Commit 95cb06d234c699a67e45959837f3866e854bc80a by Louis Dionne
[libc++] Temporary hack to unbreak CI

Until I figure out what the issue is with this test on AppleClang (and
in particular which change caused it), I want to avoid all CI being broken.
The file was modifiedlibcxx/test/libcxx/modules/stds_include.sh.cpp
Commit e7f501b5e7dbcde2790986edd6e7fe5025f041fe by Jessica Paquette
[GlobalISel][AArch64] Combine and (lshr x, cst), mask -> ubfx x, cst, width

Also add a target hook which allows us to get around custom legalization on
AArch64.

Differential Revision: https://reviews.llvm.org/D99283
The file was modifiedllvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/form-bitfield-extract-from-and.mir
The file was modifiedllvm/lib/Target/AArch64/AArch64Combine.td
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/include/llvm/Target/GlobalISel/Combine.td
Commit baa2b8d08502acfa91a8dfd699d25f7b4e25edbb by aaron
Fix a git apply that went bad somehow.

When applying the changes in 8edd3464afbff65d7d5945b3a8b20009d6ff5deb,
it seems that this bit got merged incorrectly and no test coverage
caught the issue. This fixes the diagnostic and adds a test.
The file was modifiedclang/test/Preprocessor/elifdef.c
The file was modifiedclang/lib/Lex/PPDirectives.cpp
Commit cf5c94ef08f97a6ce16ffb0b02b4b9b130f0c1fc by hansang.bae
[OpenMP] Define named constants for interop's foreign runtime ID

Also added missing Fortran definitions for interop support.

Differential Revision: https://reviews.llvm.org/D102883
The file was modifiedopenmp/runtime/src/include/omp_lib.f90.var
The file was modifiedopenmp/runtime/src/include/omp.h.var
The file was modifiedopenmp/runtime/src/include/omp_lib.h.var
Commit d791f0c2199e47e63e1dd95da2e78518d574bad2 by Lang Hames
[ORC-RT] Add equality/inequality comparison to string_view.
The file was modifiedcompiler-rt/lib/orc/adt.h
Commit 28c3e9c0d150591105511d4aa8064e9366da0df7 by Lang Hames
[ORC-RT] Rename C-API functions to use __orc_rt_ prefix (instead of OrcRT).

This matches the C++ namespace name, and is consistent with other C linkage
functions (e.g. __orc_rt_jit_dispatch).
The file was modifiedcompiler-rt/lib/orc/unittests/c_api_test.cpp
The file was modifiedcompiler-rt/lib/orc/common.h
The file was modifiedcompiler-rt/lib/orc/c_api.h
Commit da5924132771576bcb0d46aeb63777b42b898265 by Lang Hames
[ORC-RT] Add WrapperFunctionResult, Simple Packed Serialization (SPS) system.

WrapperFunctionResult is a C++ wrapper for __orc_rt_CWrapperFunctionResult
that automatically manages the underlying struct.

The Simple Packed Serialization (SPS) utilities support a simple serialization
scheme for wrapper function argument and result buffers:

Primitive typess (bool, char, int8_t, and uint8_t, int16_t, uint16_t, int32_t,
uint32_t, int64_t, uint64_t) are serialized in little-endian form.

SPSTuples are serialized by serializing each of the tuple members in order
without padding.

SPSSequences are serialized by serializing a sequence length (as a uint64_t)
followed by each of the elements of the sequence in order without padding.

Serialization/deserialization always involves a pair of SPS type tag (a tag
representing the serialized format to use, e.g. uint32_t, or
SPSTuple<bool, SPSString>) and a concrete type to be serialized from or
deserialized to (uint32_t, std::pair<bool, std::string>). Serialization for new
types can be implemented by specializing the SPSSerializationTraits type.
The file was modifiedcompiler-rt/lib/orc/unittests/CMakeLists.txt
The file was addedcompiler-rt/lib/orc/unittests/wrapper_function_utils_test.cpp
The file was modifiedcompiler-rt/lib/orc/CMakeLists.txt
The file was addedcompiler-rt/lib/orc/wrapper_function_utils.h
Commit 6b8bf9494c4601da44f432b13c644615a91edce5 by clementval
[flang][openacc] Enforce restriction on attach and detach variables

Each var argument to an attach or detach clause must be a
Fortran variable or array with the pointer or allocatable attribute.
This patch enforce this restruction.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D103279
The file was modifiedflang/test/Semantics/OpenACC/acc-parallel.f90
The file was modifiedflang/lib/Semantics/resolve-directives.cpp
The file was modifiedflang/test/Semantics/OpenACC/acc-data.f90
The file was modifiedflang/test/Semantics/OpenACC/acc-serial.f90
The file was modifiedflang/test/Semantics/OpenACC/acc-kernels-loop.f90
The file was modifiedflang/test/Semantics/OpenACC/acc-kernels.f90
Commit 13a8aa3ee15a67048deeb193fe8b86005fdf9d10 by davg
[clang] RecursiveASTVisitor visits ObjCPropertyRefExpr's class receiver

We now make up a TypeLoc for the class receiver to simplify visiting,
notably for indexing, availability, and clangd.

Differential Revision: https://reviews.llvm.org/D101645
The file was modifiedclang/include/clang/AST/RecursiveASTVisitor.h
The file was modifiedclang/lib/Index/IndexBody.cpp
The file was modifiedclang/test/Index/Core/index-source.m
The file was modifiedclang-tools-extra/clangd/FindTarget.cpp
The file was modifiedclang-tools-extra/clangd/unittests/FindTargetTests.cpp
The file was modifiedclang/lib/Sema/SemaAvailability.cpp
Commit 2020c981faa0e8807ad6b091495930664d4db175 by jonathan.l.peyton
[OpenMP] Add L2-Tile equivalence for KNL

When on KNL and L2 or Tile layer is detected, manually add
the corresponding layer which is equivalent.

Differential Revision: https://reviews.llvm.org/D102865
The file was modifiedopenmp/runtime/src/kmp_affinity.cpp
Commit f126e8ec2873ceedde53d2ccee1a66a83620e9a6 by harald
[SLPVectorizer] Ignore unreachable blocks

As the existing test unreachable.ll shows, we should be doing more
work to avoid entering unreachable blocks: we should not stop
vectorization just because a PHI incoming value from an unreachable
block cannot be vectorized. We know that particular value will never
be used so we can just replace it with poison.
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/unreachable.ll
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Commit 3c874ce4271cf24b431443252f1e6c52a3ccb65c by Madhur.Amilkanthwar
[AMDGPU][NFC] Remove author's name from codebase

This must have made to code by accident.

Differential Revision: https://reviews.llvm.org/D103484
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
Commit 0b39f055d8879eca308d5c41641f2f47ff0a3925 by thakis
[lld/mac] Don't write mtimes to N_OSO entries if ZERO_AR_DATE is set.

This is important for build determinism. This matches ld64.

Differential Revision: https://reviews.llvm.org/D103446
The file was modifiedlld/MachO/DriverUtils.cpp
The file was modifiedlld/MachO/Config.h
The file was modifiedlld/MachO/Driver.cpp
The file was modifiedlld/test/MachO/stabs.s
Commit 24979e1113adf077572fcc1022ee4e3a534a8a4d by thakis
[lld/mac] Don't load DylibFiles from the DylibFile constructor

loadDylib() keeps a name->DylibFile cache, but it only writes
to the cache once the DylibFile constructor has completed.
So dylib loads done recursively from the DylibFile constructor
wouldn't use the cache.

Now, we load additional dylibs after writing to the cache,
which means the cache now gets used for dylibs loaded because
they're referenced from other dylibs.

Related to PR49514 and PR50101, but no dramatic behavior change in itself.
(Technically we no longer crash when a tbd file reexports itself,
but that doesn't happen in practice. We now accept it silently instead
of crashing; ld64 has a diag for the reexport cycle.)

Differential Revision: https://reviews.llvm.org/D103423
The file was modifiedlld/MachO/InputFiles.h
The file was modifiedlld/MachO/DriverUtils.cpp
The file was modifiedlld/MachO/InputFiles.cpp
Commit 5671ff20d92b17d9b95cb5c9e08cc109fe77844e by zoecarver
[libcxx] Implement view.interface.

This will unblock work on ranges::view. Based on D101396.

Refs http://eel.is/c++draft/view.interface.

Differential Revision: https://reviews.llvm.org/D101737
The file was modifiedlibcxx/include/ranges
The file was modifiedlibcxx/include/CMakeLists.txt
The file was modifiedlibcxx/docs/OneRangesProposalStatus.csv
The file was addedlibcxx/test/std/ranges/range.utility/view.interface/view.interface.pass.cpp
The file was addedlibcxx/include/__ranges/view_interface.h
Commit e9f82e9e1b6851ff66010a0e500346379b1ef572 by llvmgnsyncbot
[gn build] Port 5671ff20d92b
The file was modifiedllvm/utils/gn/secondary/libcxx/include/BUILD.gn
Commit c138f3ce5c70ff87a35d77e11f77a77d9d539b49 by nathan
[clang] Fix ICE with typeid & polymorphic class (pr50497)

This addresses pr50497. The argument of a typeid expression is
unevaluated, *except* when it's a polymorphic type. We handle this by
parsing as unevaluated and then transforming to evaluated if we
discover it should have been an evaluated context.

We do the same in TreeTransform<Derived>::TransformCXXTypeidExpr,
entering unevaluated context before transforming and rebuilding the
typeid. But that's incorrect and can lead us to converting to
evaluated context twice -- and hitting an assert.

During normal template instantiation we're always cloning the
expression, but during generic lambda processing we do not necessarily
AlwaysRebuild, and end up with TransformDeclRefExpr unconditionally
calling MarkDeclRefReferenced around line 10226. That triggers the
assert.

// Mark it referenced in the new context regardless.
// FIXME: this is a bit instantiation-specific.
SemaRef.MarkDeclRefReferenced(E);

This patch makes 2 changes.

a) TreeTransform<Derived>::TransformCXXTypeidExpr only enters
unevaluated context if the typeid's operand is not a polymorphic
glvalue. If it is, it keeps the same evaluation context.

b) Sema::BuildCXXTypeId is altered to only transform to evaluated, if
the current context is unevaluated.

Differential Revision: https://reviews.llvm.org/D103258
The file was addedclang/test/SemaCXX/pr50497-crash-typeid.cpp
The file was modifiedclang/lib/Sema/SemaExprCXX.cpp
The file was modifiedclang/lib/Sema/TreeTransform.h
Commit e52007cac4faf07ad2776136015fcbfc076ddd84 by anirudh_prasad
[SystemZ][z/OS] Stricter condition for HLASM class instantiation

- A lot of lit tests simply specify the arch minus the triple. On z/OS, this could result in a scenario of some-other-triple-unknown-ibm-zos. This points to an incorrect triple + arch combo.
- To prevent this, isOSzOS change is switched in favour of isOSBinFormatGOFF.
- This is because, the GOFF format is set only if the triple is systemz and if the operating system is GOFF. And currently, there are no other architectures/os's using the GOFF file format.
- An argument could be made that the problematic tests be fixed to explicitly specify the arch-vendor-triple string, but there's a large number of these tests, and adding this stricter scope ensures that we aren't instantiating the incorrect instance of the AsmParser for other platforms when run on z/OS.

Reviewed By: uweigand

Differential Revision: https://reviews.llvm.org/D103343
The file was modifiedllvm/lib/MC/MCParser/AsmParser.cpp
Commit 337854270023c95401b7718f586b9759891caa06 by spatel
[InstCombine] add tests for cast folding; NFC

https://llvm.org/PR49543
The file was modifiedllvm/test/Transforms/InstCombine/sext-of-trunc-nsw.ll
Commit 936ca1e21a91843c76b20c6c857aaddd5fa3d42a by martin
WindowsSupport.h: do not depend on private config header

WindowsSupport.h is a public header, however if it gets included, will cause a compile error indicating that llvm/Config/config.h cannot be found, because config.h is a private header. However there is no actual dependency on the private things in this header, so it can be changed to the public config header.

Reviewed By: amccarth

Differential Revision: https://reviews.llvm.org/D103370
The file was modifiedllvm/include/llvm/Support/Windows/WindowsSupport.h
Commit 2c1903412b0a73ed65e9feb272af9c07f32970d0 by thakis
[lld/mac] Implement removal of unused dylibs

This omits load commands for unreferenced dylibs if:
- the dylib was loaded implicitly,
- it is marked MH_DEAD_STRIPPABLE_DYLIB
- or -dead_strip_dylibs is passed

This matches ld64.

Currently, the "is dylib referenced" state is computed before dead code
stripping and is not updated after dead code stripping. This too matches ld64.
We should do better here.

With this, clang-format linked with lld (like with ld64) no longer has
libobjc.A.dylib in `otool -L` output. (It was implicitly loaded as a reexport
of CoreFoundation.framework, but it's not needed.)

Differential Revision: https://reviews.llvm.org/D103430
The file was modifiedlld/test/MachO/lc-linker-option.ll
The file was modifiedlld/MachO/Writer.cpp
The file was modifiedlld/MachO/Config.h
The file was modifiedlld/MachO/Driver.cpp
The file was modifiedlld/MachO/InputFiles.h
The file was modifiedlld/MachO/Symbols.h
The file was modifiedlld/MachO/Options.td
The file was modifiedlld/MachO/SyntheticSections.cpp
The file was addedlld/test/MachO/dead-strip-dylibs.s
The file was modifiedlld/MachO/SymbolTable.cpp
The file was modifiedlld/test/MachO/implicit-dylibs.s
The file was modifiedlld/MachO/InputFiles.cpp
Commit 2983053d23d30b408122abf772bd50638f4ded2c by aeubanks
[NFC][OpaquePtr] Explicitly pass GEP source type to IRBuilder in more places
The file was modifiedllvm/lib/Transforms/Coroutines/CoroFrame.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonVectorCombine.cpp
The file was modifiedllvm/lib/Transforms/Utils/AMDGPUEmitPrintf.cpp
The file was modifiedllvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
Commit bbd399954b8913293176ad61db74c4d3675ad0bc by stephen.neuendorffer
Convert TableGen assert to error

This gives a nice message about the location of errors in a large
tablegen file, which is much more useful for users

Differential Revision: https://reviews.llvm.org/D102740
The file was modifiedllvm/utils/TableGen/CodeGenDAGPatterns.cpp
Commit aaac268285ff596b4cbffbb1ce8dbe516811eda8 by daniel_l_sanders
[globalisel][legalizer] Separate the deprecated LegalizerInfo from the current one

It's still in use in a few places so we can't delete it yet but there's not
many at this point.

Differential Revision: https://reviews.llvm.org/D103352
The file was modifiedllvm/lib/CodeGen/GlobalISel/CMakeLists.txt
The file was modifiedllvm/lib/Target/PowerPC/GISel/PPCLegalizerInfo.cpp
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
The file was modifiedllvm/lib/Target/X86/X86LegalizerInfo.cpp
The file was modifiedllvm/lib/Target/ARM/ARMLegalizerInfo.cpp
The file was modifiedllvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
The file was modifiedllvm/unittests/CodeGen/GlobalISel/LegalizerInfoTest.cpp
The file was modifiedllvm/lib/Target/Mips/MipsLegalizerInfo.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVLegalizerInfo.cpp
The file was modifiedllvm/unittests/CodeGen/GlobalISel/GISelMITest.h
The file was addedllvm/lib/CodeGen/GlobalISel/LegacyLegalizerInfo.cpp
The file was addedllvm/include/llvm/CodeGen/GlobalISel/LegacyLegalizerInfo.h
Commit 422c7036d5fae8e9a6a30ebe4074a0cf08da1208 by rob.suderman
[mlir] Updated depthwise conv to support kernel dilation

Depthwise convolution should support kernel dilation and non-dilation should
not be a special case. Updated op definition to include a dilation attribute.

This also adds a tosa.depthwise_conv2d lowering to linalg to support the new
linalg behavior.

Differential Revision: https://reviews.llvm.org/D103219
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOpsSpec.tc
The file was modifiedmlir/test/Dialect/Linalg/generalize-named-ops.mlir
The file was modifiedmlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
The file was modifiedmlir/test/Dialect/Linalg/named-ops.mlir
The file was modifiedmlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
Commit bebb802a2527e5c254ed8f80eed677995fbe09f2 by llvmgnsyncbot
[gn build] Port aaac268285ff
The file was modifiedllvm/utils/gn/secondary/llvm/lib/CodeGen/GlobalISel/BUILD.gn
Commit ba95fa03ce267fbd59113ae20a4ac251e251be3f by Louis Dionne
[libc++] Fix the std_include.sh.cpp test that has been failing since c9385297ce

The compiler used on Apple bots doesn't know about -std=c++20 yet, so
we can't use that just yet.

Differential Revision: https://reviews.llvm.org/D103475
The file was modifiedlibcxx/test/libcxx/modules/stds_include.sh.cpp
Commit 8d80139cccf449a3227e0614098cf713ad1b0e73 by thakis
[lld/mac] fix test failure after 24979e111

If there is an error reading the dylib, we shouldn't try
to load its reexports.

Caught e.g. by https://lab.llvm.org/buildbot/#/builders/36/builds/8946
The file was modifiedlld/MachO/DriverUtils.cpp
The file was modifiedlld/MachO/InputFiles.h
Commit 937266205026052c413acee73da7be5e254cc2c9 by daniel_l_sanders
fixup: Missing operator in [globalisel][legalizer] Separate the deprecated LegalizerInfo from the current one

My local compiler was fine with it but the bots complain about ambiguous types.
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegacyLegalizerInfo.cpp
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/LegacyLegalizerInfo.h
Commit d7f846fc6be14539fb0f5223eb08cb2235759897 by aaron
Fix a Clang diagnostic to start with a lowercase letter; NFC
The file was modifiedclang/include/clang/Basic/DiagnosticParseKinds.td
The file was modifiedclang/test/Sema/ms-inline-asm-invalid-arch.c
Commit 065cf3f9d70374d0a02f1e15be32eaaa59f01466 by zoecarver
[libcxx][ranges] Add `default_sentinel` and `default_sentinel_t`.

Refs https://eel.is/c++draft/default.sentinel and https://eel.is/c++draft/iterator.synopsis

Differential Revision: https://reviews.llvm.org/D103487
The file was addedlibcxx/include/__iterator/default_sentinel.h
The file was modifiedlibcxx/include/iterator
The file was modifiedlibcxx/include/CMakeLists.txt
The file was modifiedlibcxx/docs/OneRangesProposalStatus.csv
The file was addedlibcxx/test/std/iterators/predef.iterators/default.sentinel/default.sentinel.pass.cpp
Commit 8ae7fe24c1837590fc623133f9dbc9ff683f9e85 by llvmgnsyncbot
[gn build] Port 065cf3f9d703
The file was modifiedllvm/utils/gn/secondary/libcxx/include/BUILD.gn
Commit c1a59fa550818c6d3c229b43918b5045d7df83e6 by sbc
[lld][WebAssemlby] Fix for string merging of -dwarf-5 sections

We were mistakenly treating `.debug_str_offsets` as a string mergable
section when it is not (it contains integers not strings).  This is an
indication that we really should find a way to store flags for custom
sections.

Fixes: https://bugs.llvm.org/show_bug.cgi?id=48828
Fixes: https://bugs.chromium.org/p/chromium/issues/detail?id=1172217

Differential Revision: https://reviews.llvm.org/D103486
The file was modifiedlld/wasm/InputFiles.cpp
The file was modifiedlld/test/wasm/merge-string-debug.s
Commit 412ae15de49a227de25a695735451f8908ebf999 by clattner
[Dominators] Rewrite the dominator implementation for efficiency. NFC.

The previous impl densely scanned the entire region starting with an op
when dominators were created, creating a DominatorTree for every region.

This is extremely expensive up front -- particularly for clients like
Linalg/Transforms/Fusion.cpp that construct DominanceInfo for a single
query.  It is also extremely memory wasteful for IRs that use single
block regions commonly (e.g. affine.for) because it's making a
dominator tree for a region that has trivial dominance.  The
implementation also had numerous unnecessary minor efficiencies, e.g.
doing multiple walks of the region tree or tryGetBlocksInSameRegion
building a DenseMap that it didn't need.

This patch switches to an approach where [Post]DominanceInfo is free
to construct, and which lazily constructs DominatorTree's for any
multiblock regions that it needs.  This avoids the up-front cost
entirely, making its runtime proportional to the complexity of the
region tree instead of # ops in a region.  This also avoids the memory
and time cost of creating DominatorTree's for single block regions.

Finally this rewrites the implementation for simplicity and to avoids
the constant factor problems the old implementation had.

Differential Revision: https://reviews.llvm.org/D103384
The file was modifiedmlir/lib/IR/Dominance.cpp
The file was modifiedmlir/lib/Transforms/CSE.cpp
The file was modifiedmlir/include/mlir/IR/Dominance.h
The file was modifiedmlir/include/mlir/IR/Region.h
The file was modifiedmlir/lib/Transforms/BufferOptimizations.cpp
The file was modifiedmlir/lib/IR/Region.cpp
Commit da1db49409657d5212185ab9952ee35d99b773d4 by leonardchan
[Fuchsia] Add compat multilibs to cache file

Differential Revision: https://reviews.llvm.org/D103477
The file was modifiedclang/cmake/caches/Fuchsia-stage2.cmake
Commit aeae3e0ba9061a40209987d6256e489146c2bffb by thakis
[lld/mac] Emit only one LC_LOAD_DYLIB per dylib

In some cases, we end up with several distinct DylibFiles that
have the same install name. Only emit a single LC_LOAD_DYLIB in
those cases.

This happens in 3 cases I know of:

1. Some tbd files are symlinks. libpthread.tbd is a symlink against
   libSystem.tbd for example, so `-lSystem -lpthread` loads
   libSystem.tbd twice. We could (and maybe should) cache loaded
   dylibs by realpath() to catch this.

2. Some tbd files are copies of each other. For example,
   CFNetwork.framework/CFNetwork.tbd and
   CFNetwork.framework/Versions/A/CFNetwork.tbd are two distinct
   copies of the same file. The former is found by
   `-framework CFNetwork` and the latter by the reexport in
   CoreServices.tbd. We could conceivably catch this by
   making `-framework` search look in `Versions/Current` instead
   of in the root, and/or by using a content hash to cache
   tbd files, but that's starting to sound complicated.

3. Magic $ld$ symbol processing can change the install name of
   a dylib based on the target platform_version. Here, two
   truly distinct dylibs can have the same install name.

So we need this code to deal with (3) anyways. Might as well use
it for 1 and 2, at least for now :)

With this (and D103430), clang-format links in the same dylibs
when linked with lld and ld64.

Differential Revision: https://reviews.llvm.org/D103488
The file was modifiedlld/MachO/Writer.cpp
The file was addedlld/test/MachO/dylink-ordinal.s
Commit 6134231a78bf667a2f4357a415fac11e2732405a by clattner
[CSE] Ask DominanceInfo about "hasSSADominance" instead of reconstructing it.

I backed this off to make the previous patch easier to wrangle, but now
this is an efficient query and it is better to not replace it in CSE.

Differential Revision: https://reviews.llvm.org/D103494
The file was modifiedmlir/lib/Transforms/CSE.cpp
Commit 8f89c054afa115e4e45dbc76f7efa2e7f485d227 by vyng
[lld-macho][nfc] Remove unnecessary use of Optional<T*>

In all of these cases, the functions could simply return a nullptr instead of {}.
There is no case where Optional<nullptr> has a special meaning.

Differential Revision: https://reviews.llvm.org/D103489
The file was modifiedlld/MachO/InputFiles.cpp
The file was modifiedlld/MachO/Driver.cpp
The file was modifiedlld/MachO/Driver.h
The file was modifiedlld/MachO/DriverUtils.cpp
Commit 00d19c6704f421157ae3de3623aca5f58f6c366d by George Burgess IV
[various] Remove or use variables which are unused but set.

This is in preparation for the -Wunused-but-set-variable warning.

Differential Revision: https://reviews.llvm.org/D102942
The file was modifiedlldb/source/Interpreter/CommandInterpreter.cpp
The file was modifiedllvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
The file was modifiedllvm/utils/benchmark/src/complexity.cc
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
The file was modifiedlldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV1.cpp
The file was modifiedllvm/lib/Target/X86/X86FloatingPoint.cpp
The file was modifiedlldb/source/Plugins/ABI/PowerPC/ABISysV_ppc.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCBranchSelector.cpp
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64PostSelectOptimize.cpp
Commit cf49cae278b4e972cd2547d72f9ee7d9d69a3af4 by George Burgess IV
[Clang] -Wunused-but-set-parameter and -Wunused-but-set-variable

These are intended to mimic warnings available in gcc.

Differential Revision: https://reviews.llvm.org/D100581
The file was modifiedclang/test/CXX/expr/expr.prim/expr.prim.lambda/p12.cpp
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/include/clang/Basic/DiagnosticGroups.td
The file was modifiedclang/lib/Sema/SemaExprCXX.cpp
The file was modifiedclang/test/CodeGen/X86/x86_32-xsave.c
The file was modifiedclang/test/FixIt/fixit.cpp
The file was addedclang/test/SemaCXX/warn-unused-but-set-parameters-cpp.cpp
The file was modifiedclang/test/Sema/vector-gcc-compat.cpp
The file was addedclang/test/Sema/warn-unused-but-set-variables.c
The file was modifiedclang/test/CodeGen/builtins-arm.c
The file was modifiedclang/test/Sema/shift.c
The file was addedclang/test/Sema/warn-unused-but-set-parameters.c
The file was modifiedclang/lib/Sema/SemaExpr.cpp
The file was modifiedclang/test/SemaObjC/foreach.m
The file was modifiedclang/test/CodeGen/X86/x86_64-xsave.c
The file was addedclang/test/SemaCXX/warn-unused-but-set-variables-cpp.cpp
The file was modifiedclang/test/CodeGen/2007-10-30-Volatile.c
The file was modifiedclang/test/SemaCXX/shift.cpp
The file was modifiedclang/test/CodeGen/builtins-riscv.c
The file was modifiedclang/test/Misc/warning-wall.c
The file was modifiedclang/lib/Sema/SemaDecl.cpp
The file was modifiedclang/test/Sema/vector-gcc-compat.c
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was modifiedclang/test/SemaCXX/goto.cpp
The file was modifiedclang/test/SemaCXX/sizeless-1.cpp
Commit e6f88dc01a7208b6f4671c4fcb5d9e68d0808a34 by leonardchan
[clang][Fuchsia] Turn on relative-vtables by default for Fuchsia

All fuchsia targets will now use the relative-vtables ABI by default.
Also remove -fexperimental-relative-c++-abi-vtables from test RUNs targeting fuchsia.

Differential Revision: https://reviews.llvm.org/D102374
The file was modifiedclang/test/CodeGenCXX/RelativeVTablesABI/inlined-key-function.cpp
The file was modifiedclang/test/CodeGenCXX/RelativeVTablesABI/vtable-hidden-when-in-comdat.cpp
The file was modifiedclang/test/CodeGenCXX/RelativeVTablesABI/diamond-virtual-inheritance.cpp
The file was modifiedclang/test/CodeGenCXX/RelativeVTablesABI/cross-translation-unit-2.cpp
The file was modifiedclang/test/CodeGenCXX/RelativeVTablesABI/overriden-virtual-function.cpp
The file was modifiedclang/lib/Frontend/CompilerInvocation.cpp
The file was modifiedclang/test/CodeGenCXX/RelativeVTablesABI/diamond-inheritance.cpp
The file was modifiedclang/test/CodeGenCXX/RelativeVTablesABI/dynamic-cast.cpp
The file was modifiedclang/test/CodeGenCXX/constructor-destructor-return-this.cpp
The file was modifiedclang/test/CodeGenCXX/RelativeVTablesABI/child-vtable-in-comdat.cpp
The file was modifiedclang/test/CodeGenCXX/RelativeVTablesABI/multiple-inheritance.cpp
The file was modifiedclang/test/CodeGenCXX/RelativeVTablesABI/simple-vtable-definition.cpp
The file was modifiedclang/include/clang/Driver/Options.td
The file was modifiedclang/test/CodeGenCXX/RelativeVTablesABI/available_externally-vtable.cpp
The file was modifiedclang/test/CodeGenCXX/RelativeVTablesABI/relative-vtables-flag.cpp
The file was modifiedclang/test/CodeGenCXX/RelativeVTablesABI/inheritted-virtual-function.cpp
The file was modifiedclang/test/CodeGenCXX/RelativeVTablesABI/type-info.cpp
The file was modifiedclang/test/CodeGenCXX/RelativeVTablesABI/child-inheritted-from-parent-in-comdat.cpp
The file was modifiedclang/include/clang/Basic/TargetCXXABI.h
The file was modifiedclang/test/CodeGenCXX/RelativeVTablesABI/cross-translation-unit-1.cpp
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedclang/test/CodeGenCXX/RelativeVTablesABI/override-pure-virtual-method.cpp
The file was modifiedclang/test/CodeGenCXX/RelativeVTablesABI/thunk-mangling.cpp
The file was modifiedclang/test/CodeGenCXX/RelativeVTablesABI/no-alias-when-dso-local.cpp
The file was modifiedclang/test/CodeGenCXX/RelativeVTablesABI/vbase-offset.cpp
The file was modifiedclang/test/CodeGenCXX/RelativeVTablesABI/member-function-pointer.cpp
The file was modifiedclang/test/CodeGenCXX/RelativeVTablesABI/virtual-function-call.cpp
Commit 222a88a24371b8a1db2c2cedd1918a5f90758b75 by thakis
[lld/mac] Make -t work correctly with -flat_namespace

We used to not print dylibs referenced by other dylibs in `-t` mode. This
affected reexports, and with `-flat_namespace` also just dylibs loaded by
dylibs. Now we print them.

Fixes PR49514.

Differential Revision: https://reviews.llvm.org/D103428
The file was modifiedlld/test/MachO/flat-namespace.s
The file was modifiedlld/MachO/Driver.cpp
The file was modifiedlld/MachO/DriverUtils.cpp
Commit 3aa943070cc1235c5b8d738dbeb0ca38cb7c6920 by aeubanks
[test] Precommit test for D101103
The file was addedllvm/test/Transforms/InstSimplify/invariant.group-load.ll
Commit 26044c6a54de3e03c73c5515702b95acdb0b7f22 by aeubanks
[InstSimplify] Treat invariant group insts as bitcasts for load operands

We can look through invariant group intrinsics for the purposes of
simplifying the result of a load.

Since intrinsics can't be constants, but we also don't want to
completely rewrite load constant folding, we convert the load operand to
a constant. For GEPs and bitcasts we just treat them as constants. For
invariant group intrinsics, we treat them as a bitcast.

Reviewed By: lebedev.ri

Differential Revision: https://reviews.llvm.org/D101103
The file was modifiedllvm/lib/Analysis/InstructionSimplify.cpp
The file was modifiedllvm/test/Transforms/InstSimplify/invariant.group-load.ll
Commit c484c7dd9d2382f07216ae9142ceb76272e21dc4 by chiahungduan
[mlir-reduce] Reducer refactor.

* A Reducer is a kind of RewritePattern, so it's just the same as
writing graph rewrite.
* ReductionTreePass operates on Operation rather than ModuleOp, so that
* we are able to reduce a nested structure(e.g., module in module) by
* self-nesting.

Reviewed By: jpienaar, rriddle

Differential Revision: https://reviews.llvm.org/D101046
The file was addedmlir/test/mlir-reduce/crashop-reduction.mlir
The file was modifiedmlir/test/lib/Dialect/Test/TestOps.td
The file was modifiedmlir/include/mlir/Reducer/Passes.td
The file was modifiedmlir/test/lib/Dialect/Test/TestPatterns.cpp
The file was modifiedmlir/test/lib/Dialect/Test/TestDialect.cpp
The file was modifiedmlir/test/lib/Dialect/Test/CMakeLists.txt
The file was addedmlir/lib/Reducer/OptReductionPass.cpp
The file was removedmlir/tools/mlir-reduce/ReductionNode.cpp
The file was modifiedmlir/test/lib/Dialect/Test/TestDialect.h
The file was modifiedmlir/lib/Reducer/CMakeLists.txt
The file was removedmlir/tools/mlir-reduce/ReductionTreePass.cpp
The file was modifiedmlir/test/mlir-reduce/single-function.mlir
The file was modifiedmlir/include/mlir/Reducer/Passes.h
The file was modifiedmlir/test/lib/Reducer/MLIRTestReducer.cpp
The file was modifiedmlir/test/mlir-reduce/dce-test.mlir
The file was removedmlir/include/mlir/Reducer/ReductionTreePass.h
The file was modifiedmlir/test/mlir-reduce/multiple-function.mlir
The file was addedmlir/lib/Reducer/ReductionNode.cpp
The file was addedmlir/lib/Reducer/ReductionTreePass.cpp
The file was modifiedmlir/test/mlir-reduce/simple-test.mlir
The file was removedmlir/include/mlir/Reducer/Passes/OpReducer.h
The file was modifiedmlir/include/mlir/Reducer/ReductionNode.h
The file was removedmlir/tools/mlir-reduce/OptReductionPass.cpp
The file was removedmlir/include/mlir/Reducer/OptReductionPass.h
The file was modifiedmlir/tools/mlir-reduce/CMakeLists.txt
The file was modifiedmlir/tools/mlir-reduce/mlir-reduce.cpp
The file was addedmlir/include/mlir/Reducer/ReductionPatternInterface.h
The file was modifiedmlir/lib/Reducer/Tester.cpp
Commit 89612938516b3623ecc038267539f2a4b69312d2 by aeubanks
[OpaquePtr] Create API to make a copy of a PointerType with some address space

Some existing places use getPointerElementType() to create a copy of a
pointer type with some new address space.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D103429
The file was modifiedllvm/lib/Analysis/ConstantFolding.cpp
The file was modifiedllvm/unittests/IR/TypesTest.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
The file was modifiedllvm/include/llvm/IR/DerivedTypes.h
The file was modifiedllvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
Commit 9e2e49328f19eeeab63c08721122815a27b2dad5 by Stanislav.Mekhanoshin
[AMDGPU] All GWS instructions need aligned VGPR on gfx90a

Fixes: SWDEV-288006

Differential Revision: https://reviews.llvm.org/D103197
The file was addedllvm/test/CodeGen/AMDGPU/ds_gws_align.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was addedllvm/test/CodeGen/AMDGPU/verify-ds-gws-align.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
Commit 7daa18215905c831e130c7542f17619e9d936dfc by akhuang
Fix tmp files being left on Windows builds.

Clang writes object files by first writing to a .tmp file and then
renaming to the final .obj name. On Windows, if a compile is killed
partway through the .tmp files don't get deleted.

Currently it seems like RemoveFileOnSignal takes care of deleting the
tmp files on Linux, but on Windows we need to call
setDeleteDisposition on tmp files so that they are deleted when
closed.

This patch switches to using TempFile to create the .tmp files we write
when creating object files, since it uses setDeleteDisposition on Windows.
This change applies to both Linux and Windows for consistency.

Differential Revision: https://reviews.llvm.org/D102876
The file was modifiedllvm/lib/Support/Windows/Path.inc
The file was modifiedclang/lib/Frontend/CompilerInstance.cpp
The file was modifiedclang/include/clang/Frontend/CompilerInstance.h
The file was modifiedllvm/lib/Support/Path.cpp
Commit 5fc9653faaf93f4cf2bc9d46c4619ec5811a602f by xiang1.zhang
Remove x86 test amx-fast-tile-config.mir (by its author)

This test contains a lot of manual changes which is not convenient
to update, and the checks are duplicated with test amx-configO2toO0.ll
The file was removedllvm/test/CodeGen/X86/AMX/amx-fast-tile-config.mir
Commit f7e87dd6ff0c1c4a41a6b654d2460557ae97ab8d by Yaxun.Liu
[CUDA][HIP] Change default lang std to c++14

Currently clang and nvcc use c++14 as default std for C++.
gcc 11 even uses c++17 as default std for C++. However,
clang uses c++98 as default std for CUDA/HIP.

As c++14 has been well adopted and became default for
clang, it seems reasonable to use c++14 as default std
for CUDA/HIP.

Reviewed by: Artem Belevich

Differential Revision: https://reviews.llvm.org/D103221
The file was modifiedclang/test/SemaCUDA/function-target.cu
The file was modifiedclang/include/clang/Basic/LangStandards.def
The file was modifiedclang/test/SemaCUDA/cuda-builtin-vars.cu
The file was modifiedclang/test/SemaCUDA/implicit-member-target-collision.cu
The file was addedclang/test/Preprocessor/lang-std.cu
The file was modifiedclang/test/SemaCUDA/asm_delayed_diags.cu
The file was modifiedclang/test/Parser/cuda-kernel-call.cu
Commit 59f44f9ad4f0f4c0f087b4e0287878adfed38081 by powerman1st
[RISCV][test] Add new tests of bitwise and with constant for the Zbs extension

These tests will show how (and r i) will be optimized to
(BCLRI (BCLRI r, i0), i1) or (BCLRI (ANDI r, i0), i1) by future
commits.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D103359
The file was modifiedllvm/test/CodeGen/RISCV/rv32zbs.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv64zbs.ll
Commit 658f6ed1523b0e61ddee494ce1691f29a701c317 by jingham
Make ignore counts work as "after stop" modifiers so they play nicely with conditions

Previously ignore counts were checked when we stopped to do the sync callback in Breakpoint::ShouldStop. That meant we would do all the ignore count work even when
there is also a condition says the breakpoint should not stop.

That's wrong, lldb treats breakpoint hits that fail the thread or condition checks as "not having hit the breakpoint". So the ignore count check should happen after
the condition and thread checks in StopInfoBreakpoint::PerformAction.

The one side-effect of doing this is that if you have a breakpoint with a synchronous callback, it will run the synchronous callback before checking the ignore count.
That is probably a good thing, since this was already true of the condition and thread checks, so this removes an odd asymmetry. And breakpoints with sync callbacks
are all internal lldb breakpoints and there's not a really good reason why you would want one of these to use an ignore count (but not a condition or thread check...)

Differential Revision https://reviews.llvm.org/D103217
The file was modifiedlldb/source/Breakpoint/Breakpoint.cpp
The file was modifiedlldb/test/API/functionalities/breakpoint/breakpoint_ignore_count/main.c
The file was modifiedlldb/include/lldb/Breakpoint/BreakpointLocation.h
The file was modifiedlldb/source/Target/StopInfo.cpp
The file was modifiedlldb/include/lldb/Breakpoint/Breakpoint.h
The file was modifiedlldb/test/API/functionalities/breakpoint/breakpoint_ignore_count/TestBreakpointIgnoreCount.py
The file was modifiedlldb/source/Breakpoint/BreakpointLocation.cpp
Commit 04caa7c3e02f0e2f96881b2b9b5ae5fec6e59aa9 by Yaxun.Liu
[CUDA][HIP] Promote const variables to constant

Recently we added diagnosing ODR-use of host variables
in device functions, which includes ODR-use of const
host variables since they are not really emitted on
device side. This caused regressions since we used
to allow ODR-use of const host variables in device
functions.

This patch allows ODR-use of const variables in device
functions if the const variables can be statically initialized
and have an empty dtor. Such variables are marked with
implicit constant attrs and emitted on device side. This is
in line with what clang does for constexpr variables.

Reviewed by: Artem Belevich

Differential Revision: https://reviews.llvm.org/D103108
The file was modifiedclang/lib/Sema/SemaTemplateInstantiateDecl.cpp
The file was modifiedclang/lib/Sema/SemaDecl.cpp
The file was modifiedclang/lib/Sema/SemaExpr.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was modifiedclang/test/CodeGenCUDA/device-use-host-var.cu
The file was modifiedclang/lib/Sema/SemaCUDA.cpp
The file was modifiedclang/test/SemaCUDA/static-device-var.cu
The file was modifiedclang/test/SemaCUDA/device-use-host-var.cu
Commit 558e740170681c723ecb04156f7177d6dfebff13 by springerm
[mlir] Support tensor types in non-unrolled VectorToSCF

Support for tensor types in the unrolled version will follow in a separate commit.

Add a new pass option to activate lowering of transfer ops with tensor types (default: deactivated).

Differential Revision: https://reviews.llvm.org/D102666
The file was modifiedmlir/include/mlir/Conversion/Passes.td
The file was modifiedmlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
The file was addedmlir/test/Conversion/VectorToSCF/tensor-transfer-ops.mlir
The file was modifiedmlir/include/mlir/Conversion/VectorToSCF/VectorToSCF.h
Commit 616ac1b961aa1ef9041d7e82b088ad2a9ad50014 by rahmanl
[llvm-readobj] Print function names with `--bb-addr-map`.

This patch uses the `getSymbolIndexForFunctionAddress` helper function to print function names for BB address map entries.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D102900
The file was modifiedllvm/test/tools/llvm-readobj/ELF/bb-addr-map.test
The file was modifiedllvm/tools/llvm-readobj/ELFDumper.cpp
Commit bd20756d2c583002de862cb2aa41d54c8e9bc3d0 by springerm
[mlir] Support tensor types in unrolled VectorToSCF

Differential Revision: https://reviews.llvm.org/D102668
The file was addedmlir/test/Conversion/VectorToSCF/unrolled-tensor-transfer-ops.mlir
The file was modifiedmlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
Commit 924ea3bb53ca98848cc54a656f6580dd95f45304 by Louis Dionne
[libc++] NFC: Move unwrap_iter to its own header

This re-applies 9968896cd62a, which was reverted in b13edf6e907b because
it broke the build.

Differential Revision: https://reviews.llvm.org/D103369
The file was modifiedlibcxx/include/module.modulemap
The file was modifiedlibcxx/include/algorithm
The file was modifiedlibcxx/include/CMakeLists.txt
The file was addedlibcxx/include/__algorithm/unwrap_iter.h
Commit e61917ce2dc71573248f5de54c5e1628d96648fc by llvmgnsyncbot
[gn build] Port 924ea3bb53ca
The file was modifiedllvm/utils/gn/secondary/libcxx/include/BUILD.gn
Commit 41ff1e0e29bbd3c12c8fdb0a0bbed8bda95dec85 by craig.topper
[RISCV] Improve register allocation for masked vwadd(u).wv, vwsub(u).wv, vfwadd.wv, and vfwsub.wv.

The first source has the same EEW as the destination, but we're
using earlyclobber which prevents them from ever being the same
register.

To workaround this, add a special TIED pseudo to use whenever the
first source and merge operand are the same value. This allows
us to use a single operand for the merge operand and first source
which we can then tie to the destination. A tied source disables
earlyclobber for that operand.

Reviewed By: arcbbb

Differential Revision: https://reviews.llvm.org/D103211
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwaddu.w-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsubu.w-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwadd.w-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwadd.w-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsubu.w-rv64.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsub.w-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsub.w-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwaddu.w-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv64.ll
Commit ae4dad2b731eefce5f65ed1a74510563ffe64c0f by Louis Dionne
[libc++] Add a CI job to test libc++ when building for 32 bit

Differential Revision: https://reviews.llvm.org/D92508
The file was modifiedlibcxx/utils/ci/buildkite-pipeline.yml
Commit 20797b129f844d4b12ffb2b12cf33baa2d42985c by akhuang
Revert "Fix tmp files being left on Windows builds." for now;
causing some asan test failures.

This reverts commit 7daa18215905c831e130c7542f17619e9d936dfc.
The file was modifiedllvm/lib/Support/Path.cpp
The file was modifiedclang/lib/Frontend/CompilerInstance.cpp
The file was modifiedllvm/lib/Support/Windows/Path.inc
The file was modifiedclang/include/clang/Frontend/CompilerInstance.h
Commit 4124bca309586234748c9c99600ec2f3b2f6d775 by Vitaly Buka
[scudo] Enabled MTE in tests

Reviewed By: pcc, hctim

Differential Revision: https://reviews.llvm.org/D103305
The file was modifiedcompiler-rt/lib/scudo/standalone/tests/scudo_unit_test_main.cpp
The file was modifiedcompiler-rt/lib/scudo/standalone/memtag.h
Commit 6a2807bc81771d3fed397378507ecab40f8bff27 by Vitaly Buka
[NFC][msan] Fix warning on sanitizer-ppc64le-linux bot
The file was modifiedcompiler-rt/lib/msan/tests/msan_test.cpp
Commit 251a5d9d5239c0402e0ab68718aa194c2b4f04bb by bruce.mitchener
[lldb/API] Expose triple for SBProcessInfo.

This is present when doing a `platform process list` and is
tracked by the underlying code. To do something like the
process list via the SB API in the future, this must be
exposed.

Differential Revision: https://reviews.llvm.org/D103375
The file was modifiedlldb/bindings/interface/SBProcessInfo.i
The file was modifiedlldb/include/lldb/API/SBProcessInfo.h
The file was modifiedlldb/test/API/python_api/process/TestProcessAPI.py
The file was modifiedlldb/source/API/SBProcessInfo.cpp
Commit 516e5bb2b11ea374e5a468b7fb17b0c4e9f1b863 by tmsriram
Resubmit D85085 after fixing the tests that were failing.

D85085 was pushed earlier but broke tests on mac and win:
http://lab.llvm.org:8080/green/job/clang-stage1-RA/21182/consoleFull#-706149783d489585b-5106-414a-ac11-3ff90657619c

Recommitting it after adding mtriple to the llc commands.

Emit correct location lists with basic block sections.

This patch addresses multiple things:

1) It ensures that const_value is emitted when possible with basic block
   sections.
2) It emits location lists such that the labels are always within the
   section boundary.
3) It fixes a bug when the parameter is first used in a non-entry block
   which is in a different section from the entry block.

Differential Revision: https://reviews.llvm.org/D85085
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DebugHandlerBase.cpp
The file was addedllvm/test/DebugInfo/X86/basic-block-sections-debug-loc-const-value-2.ll
The file was modifiedllvm/test/DebugInfo/X86/basic-block-sections-debug-loc.ll
The file was addedllvm/test/DebugInfo/X86/basic-block-sections-debug-loclist-4.ll
The file was modifiedllvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
The file was modifiedllvm/test/DebugInfo/X86/basic-block-sections_1.ll
The file was addedllvm/test/DebugInfo/X86/basic-block-sections-debug-loc-const-value-1.ll
The file was addedllvm/test/DebugInfo/X86/basic-block-sections-debug-loclist-5.ll
The file was addedllvm/test/DebugInfo/X86/basic-block-sections-debug-loc-split-range.ll
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
The file was addedllvm/test/DebugInfo/X86/basic-block-sections-debug-loclist-3.ll
The file was addedllvm/test/DebugInfo/X86/basic-block-sections-debug-loclist-1.ll
The file was addedllvm/test/DebugInfo/X86/basic-block-sections-debug-loclist-2.ll