Changes

Summary

  1. [VE] disable cmake caches until resolved (details)
  2. Enable retry on failed git operations (details)
Commit 99821277c29d5565a8f5c6cda80ea8b0faf097b4 by simon.moll
[VE] disable cmake caches until resolved
The file was modifiedbuildbot/osuosl/master/config/builders.py (diff)
Commit b83568a0e50fe1d8fd419721f67e82c4bda5eaf0 by kuhnel
Enable retry on failed git operations

This should address issues like
`fatal: unable to access 'https://github.com/llvm/llvm-project.git/': Could not resolve host: github.com`
in
http://lab.llvm.org:8011/#/builders/131/builds/7

Differential Revision: https://reviews.llvm.org/D91945
The file was modifiedzorg/buildbot/process/factory.py (diff)

Summary

  1. [analyzer]  [NFC] Implement a wrapper SValBuilder::getCastedMemRegionVal for similar functionality on region cast (details)
  2. [mlir][ArmSVE] Add basic mask generation operations (details)
  3. [Demangle][Rust] Parse path backreferences (details)
  4. [Demangle][Rust] Parse type backreferences (details)
  5. [Demangle][Rust] Parse const backreferences (details)
  6. [lldb] Set return status to failed when adding a command error (details)
  7. [JITLink] Clarify LinkGraph::splitBlock contract in comment. (details)
  8. Revert "[mlir][ArmSVE] Add basic mask generation operations" (details)
  9. [mlir] fix integer type mismatch in alloc conversion to LLVM (details)
  10. [mlir] Make MemRef element type extensible (details)
  11. [mlir] support memref of memref in standard-to-llvm conversion (details)
  12. [clang] Apply MS ABI details on __builtin_ms_va_list on non-windows platforms on x86_64 (details)
  13. [DAG] Allow isNullOrNullSplat to see truncated zeroes (details)
  14. [mlir] fix shared-libs build (details)
  15. [LoopVectorize] Don't use strict reductions when reordering is allowed (details)
  16. NVPTXTargetLowering::LowerReturn - Pass DataLayout by reference. NFCI. (details)
  17. ValueTrackingTest.cpp - Pass DataLayout by reference. NFCI. (details)
  18. MemCpyOptimizer.cpp - hasUndefContentsMSSA - Pass DataLayout by reference. NFCI. (details)
  19. [CostModel][X86] Improve AVX1/AVX2 truncation costs (details)
  20. OptBisect.cpp - remove unused include. NFCI. (details)
  21. [InstCombine] Add instcombine fold for extractelement + splat for scalable vectors (details)
  22. [RISCV] Add a test case showing inefficient vector codegen (details)
  23. [OpenCL] Add memory_scope_all_devices (details)
  24. [CostModel] Return an invalid cost for memory ops with unsupported types (details)
  25. [OpenMP][OMPD] Implementation of OMPD debugging library - libompd. (details)
  26. [LoopUnrollAndJam] Change LoopUnrollAndJamPass to LoopNest pass (details)
  27. [clang] p1099 using enum part 1 (details)
  28. [VE][NFC] IRBuilder<> -> IRBuilderBase (details)
  29. [NFC] Remove some include cycles (details)
  30. [VP] getDeclarationForParams (details)
  31. [MLIR] Mark additional builtin attr methods const (details)
  32. Revert "3rd Reapply "[DebugInfo] Use variadic debug values to salvage BinOps and GEP instrs with non-const operands"" (details)
  33. [llvm] Make Sequence reverse-iterable (details)
  34. [Polly][Isl] Removing nullptr constructor from C++ bindings. NFC. (details)
  35. Fix missing header and namespace qualifier in ADT Sequence (details)
  36. [CUDA][HIP] Fix store of vtbl in ctor (details)
  37. [LoopNest] Fix Wdeprecated-copy warnings (details)
  38. [DAG] foldShuffleOfConcatUndefs - ensure shuffles of upper (undef) subvector elements is undef (PR50609) (details)
  39. Revert "[Polly][Isl] Removing nullptr constructor from C++ bindings. NFC." (details)
  40. [libc++] Remove the old HTML documentation (details)
  41. NFC: .clang-tidy: Inherit configs from parents to improve maintainability (details)
  42. [IR] make -stack-alignment= into a module attr (details)
  43. .clang-tidy: Disable misc-no-recursion in general/across the monorepo (details)
  44. [MLIR][MemRef] Only allow fold of cast for the pointer operand, not the value (details)
  45. Revert "[IR] make -stack-alignment= into a module attr" (details)
  46. [clang-cl] Parse the /external: flags (PR36003) (details)
  47. [libc++] NFC: Add regression tests for some <tuple> PRs that have been fixed (details)
  48. [MLIR] Remove LLVM_AnyInteger type constraint (details)
  49. [ELF] Add a GRP_COMDAT test with a local signature symbol (details)
  50. [RISCV] Remove ForceTailAgnostic flag from vmv.s.x, vfmv.s.f and reductions. (details)
  51. Fix a typo in the internals manual (details)
  52. Further improve register allocation for vwadd(u).wv, vwsub(u).wv, vfwadd.wv, and vfwsub.wv. (details)
  53. [Verifier] Speed up and parallelize dominance checking.  NFC (details)
  54. [Core] Add Twine support for StringAttr and Identifier. NFC. (details)
  55. [AMDGPU] Add gfx1013 target (details)
  56. InstrEmitter.cpp - don't dereference a dyn_cast<>. (details)
  57. PPCISelLowering.cpp - don't dereference a dyn_cast<>. (details)
  58. Use llvm_unreachable for unsupported integer types. (details)
  59. Revert "[llvm] Make Sequence reverse-iterable" (details)
  60. [Fuchsia] Update some of the Fuchsia toolchain flags (details)
  61. Add missing header <atomic> in lib/IR/Verifier.cpp (NFC) (details)
  62. [GlobalISel] Handle non-multiples of the base type in narrowScalarInsert (details)
  63. [GlobalISel] Handle non-multiples of the base type in narrowScalarAddSub (details)
  64. [libc++] Add a CI configuration for the modular build (details)
  65. [libcxx] Remove VLA from libcxx locale header (details)
  66. reland [IR] make -stack-alignment= into a module attr (details)
  67. [CMake] Only include LTO on Apple targets (details)
  68. [clang] p1099 using enum part 2 (details)
  69. [FuzzMutate] Fix getWeight of InstDeleterIRStrategy (details)
  70. [RISCV] Remove dead code from fixed-vectors-abs.ll test cases. NFC (details)
  71. [CMake][Fuchsia] Include llvm-otool in Fuchsia toolchain (details)
  72. Add an option to hide "cold" blocks from CFG graph (details)
  73. Add a static assertions for custom Op<> to not defined data members (NFC) (details)
  74. [ARM] A couple of extra VMOVimm tests, useful for showing BE codegen. NFC (details)
  75. GlobalISel: Hide virtual register creation in MIRBuilder (details)
  76. GlobalISel: Avoid use of G_INSERT in insertParts (details)
  77. [SystemZ][z/OS] Pass OpenFlags when creating tmp files (details)
  78. [NFC][compiler-rt][hwasan] Move allocation functions into their own file (details)
  79. [gn build] (semi-manually) port 944b3c53aec5 (details)
  80. [CMake][Fuchsia] Use PIC for Fuchsia runtimes (details)
  81. [CodeGen] remove instcombine from codegen tests; NFC (details)
  82. [lldb][NFC] Refactor name to index maps in Symtab (details)
  83. Fix for failing test mentioned in https://reviews.llvm.org/D103564. (details)
  84. [amdgpu] Add `-enable-ocl-mangling-mismatch-workaround`. (details)
  85. [ms] [llvm-ml] Disambiguate size directives and variable declarations (details)
  86. [ARM] Generate VDUP(Const) from constant buildvectors (details)
  87. Partially revert the Fuchsia changes to avoid the use of PIC (details)
  88. Revert "[DSE] Remove stores in the same loop iteration" (details)
  89. Revert "[AMDGPU] Add gfx1013 target" (details)
  90. [SystemZ] Return true from isMaskAndCmp0FoldingBeneficial(). (details)
  91. [CMake][Fuchsia] Disable vcruntime for first stage as well (details)
  92. Revert "[LoopNest] Fix Wdeprecated-copy warnings" (details)
  93. [libc++] NFC: Rewrite the documentation for the debug mode (details)
  94. [DSE] Add another multiblock loop DSE test. NFC (details)
  95. [lldb] Don't print script output twice in HandleCommand (details)
  96. [scudo] Add Scudo support for Trusty OS (details)
  97. [InstCombine] add FMF tests for fneg-of-select; NFC (details)
  98. [InstCombine] fix nsz (fast-math) propagation from fneg-of-select (details)
  99. [LLDB][NFC] Remove parameter names from forward declarations from hand written expressions used in heap.py (details)
  100. [SystemZ] Return true from convertSetCCLogicToBitwiseLogic for scalar integer. (details)
  101. Update and improve compiler-rt tests for -mllvm -asan_use_after_return=(never|[runtime]|always). (details)
  102. [Polly][Isl] Removing nullptr constructor from C++ bindings. NFC. (details)
  103. Revert "Revert "[LoopNest] Fix Wdeprecated-copy warnings"" (details)
  104. LTO: Export functions referenced by non-canonical CFI jump tables (details)
  105. [NFC] In the future, all intrinsics defined for compatibility with the XL (details)
  106. [mlir][tosa] Temporarily support 2D and 3D tensor types in matmul (details)
  107. [libc][NFC] Use add_library instead of add_llvm_library for a few libraries. (details)
  108. [libc] Add a macro to include/exclude subprocess tests. (details)
  109. [libc][NFC][Obvious] Compare against size_t values in ArrayRef tests. (details)
  110. [JITLink][MachO] Split C-string literal sections on null-terminators. (details)
  111. [OpenMP] Add an information flag for device data transfers (details)
  112. Add llvm_unreacheable to silence warning "not all control paths return a value" (NFC) (details)
  113. Revert "Add a static assertions for custom Op<> to not defined data members (NFC)" (details)
  114. Rename compiler-rt/lib/orc/endian.h to endianness.h to avoid conflict with system headers (details)
  115. Add a couple of missing includes (details)
  116. ORTRT: Add tests for string_view equality and inequality operators (details)
  117. Reland "[AMDGPU] Add gfx1013 target" (details)
  118. [PowerPC][Dwarf] Assign MMA register's dwarf register number to negative value (details)
  119. [NFC][XCOFF] Use yaml2obj in llvm-objdump/XCOFF/section-headers.test instead of binary files. (details)
  120. [RISCV][NFC] Add a single space after comma for VType (details)
  121. Add Twine support for std::string_view. (details)
  122. Fix LIT test failure encountered on AIX (details)
Commit d3a6181e82ca8d1c49c1bc049c07233bd8c38550 by dpetrov
[analyzer]  [NFC] Implement a wrapper SValBuilder::getCastedMemRegionVal for similar functionality on region cast

Summary: Replaced code on region cast with a function-wrapper SValBuilder::getCastedMemRegionVal. This is a next step of code refining due to suggestions in D103319.

Differential Revision: https://reviews.llvm.org/D103803
The file was modifiedclang/lib/StaticAnalyzer/Core/SValBuilder.cpp
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/SValBuilder.h
Commit 392af6a78bb7dfb87a24ed66db598c1d09ac756b by javier.setoain
[mlir][ArmSVE] Add basic mask generation operations

These `arm_sve.cmp` functions are needed to generate scalable vector
masks as long as scalable vectors are not part of the standard types.
Once in standard, these can be removed and `std.cmp` can be used
instead.

Differential Revision: https://reviews.llvm.org/D103473
The file was modifiedmlir/include/mlir/Dialect/ArmSVE/ArmSVE.td
The file was modifiedmlir/include/mlir/Dialect/ArmSVE/ArmSVEDialect.h
The file was modifiedmlir/test/Target/LLVMIR/arm-sve.mlir
The file was modifiedmlir/test/Dialect/ArmSVE/legalize-for-llvm.mlir
The file was modifiedmlir/lib/Dialect/ArmSVE/Transforms/LegalizeForLLVMExport.cpp
The file was modifiedmlir/test/Dialect/ArmSVE/roundtrip.mlir
The file was modifiedmlir/include/mlir/Dialect/StandardOps/IR/Ops.td
The file was modifiedmlir/lib/Dialect/ArmSVE/IR/ArmSVEDialect.cpp
The file was modifiedmlir/include/mlir/Dialect/StandardOps/IR/StandardOpsBase.td
The file was modifiedmlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
Commit 82b7e822d00596ec8a02490f1d662ed0fa872b54 by tomasz.miasko
[Demangle][Rust] Parse path backreferences

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D103459
The file was modifiedllvm/lib/Demangle/RustDemangle.cpp
The file was modifiedllvm/include/llvm/Demangle/RustDemangle.h
The file was modifiedllvm/test/Demangle/rust.test
Commit 44d63c57c129f6c784460070c30cb736dbbdb927 by tomasz.miasko
[Demangle][Rust] Parse type backreferences

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D103847
The file was modifiedllvm/test/Demangle/rust.test
The file was modifiedllvm/lib/Demangle/RustDemangle.cpp
Commit f9a79356f223035ccf0b4d0666f8779061eddc61 by tomasz.miasko
[Demangle][Rust] Parse const backreferences

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D103848
The file was modifiedllvm/test/Demangle/rust.test
The file was modifiedllvm/lib/Demangle/RustDemangle.cpp
Commit e05b03cf4f45ac5ee63c59a3464e7d484884645c by david.spickett
[lldb] Set return status to failed when adding a command error

There is a common pattern:
result.AppendError(...);
result.SetStatus(eReturnStatusFailed);

I found that some commands don't actually "fail" but only
print "error: ..." because the second line got missed.

This can cause you to miss a failed command when you're
using the Python interface during testing.
(and produce some confusing script results)

I did not find any place where you would want to add
an error without setting the return status, so just
set eReturnStatusFailed whenever you add an error to
a command result.

This change does not remove any of the now redundant
SetStatus. This should allow us to see if there are any
tests that have commands unexpectedly fail with this change.
(the test suite passes for me but I don't have access to all
the systems we cover so there could be some corner cases)

Some tests that failed on x86 and AArch64 have been modified
to work with the new behaviour.

Differential Revision: https://reviews.llvm.org/D103701
The file was modifiedlldb/test/API/commands/register/register/register_command/TestRegisters.py
The file was removedlldb/test/Shell/Commands/command-backtrace.test
The file was addedlldb/test/Shell/Commands/command-backtrace-parser-1.test
The file was modifiedlldb/source/Interpreter/CommandReturnObject.cpp
The file was addedlldb/test/Shell/Commands/command-backtrace-parser-2.test
Commit 4f16ccdab2d39ed1fb718ce646507c07b6c2de46 by Lang Hames
[JITLink] Clarify LinkGraph::splitBlock contract in comment.
The file was modifiedllvm/include/llvm/ExecutionEngine/JITLink/JITLink.h
Commit 57546f5b2224fe6d56081463dec2acc5964a61e8 by javier.setoain
Revert "[mlir][ArmSVE] Add basic mask generation operations"

This reverts commit 392af6a78bb7dfb87a24ed66db598c1d09ac756b
The file was modifiedmlir/test/Dialect/ArmSVE/roundtrip.mlir
The file was modifiedmlir/lib/Dialect/ArmSVE/IR/ArmSVEDialect.cpp
The file was modifiedmlir/lib/Dialect/ArmSVE/Transforms/LegalizeForLLVMExport.cpp
The file was modifiedmlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
The file was modifiedmlir/test/Dialect/ArmSVE/legalize-for-llvm.mlir
The file was modifiedmlir/include/mlir/Dialect/ArmSVE/ArmSVEDialect.h
The file was modifiedmlir/include/mlir/Dialect/StandardOps/IR/StandardOpsBase.td
The file was modifiedmlir/include/mlir/Dialect/ArmSVE/ArmSVE.td
The file was modifiedmlir/include/mlir/Dialect/StandardOps/IR/Ops.td
The file was modifiedmlir/test/Target/LLVMIR/arm-sve.mlir
Commit 3c70a82e2891949801bd5da68159cd8156659f6f by zinenko
[mlir] fix integer type mismatch in alloc conversion to LLVM

Some places in the alloc-like op conversion use the converted index type
whereas other places use the pointer-sized integer type, which may not be the
same. Consistently use the converted index type, similarly to other address
calculations.

Reviewed By: pifon2a

Differential Revision: https://reviews.llvm.org/D103826
The file was modifiedmlir/test/Conversion/StandardToLLVM/convert-static-memref-ops.mlir
The file was modifiedmlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp
Commit ada9aa5a228200cb71269c371308e82c42fd4abc by zinenko
[mlir] Make MemRef element type extensible

Historically, MemRef only supported a restricted list of element types that
were known to be storable in memory. This is unnecessarily restrictive given
the open nature of MLIR's type system. Allow types to opt into being used as
MemRef elements by implementing a type interface. For now, the interface is
merely a declaration with no methods. Later, methods to query, e.g., the type
size or whether a type can alias elements of another type may be added.

Harden the "standard"-to-LLVM conversion against memrefs with non-builtin
types.

See https://llvm.discourse.group/t/rfc-memref-of-custom-types/3558.

Depends On D103826

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D103827
The file was modifiedmlir/test/lib/Dialect/Test/TestTypeDefs.td
The file was modifiedmlir/test/Conversion/StandardToLLVM/invalid.mlir
The file was modifiedmlir/include/mlir/IR/CMakeLists.txt
The file was modifiedmlir/test/Conversion/StandardToLLVM/convert-static-memref-ops.mlir
The file was modifiedmlir/include/mlir/IR/BuiltinTypes.td
The file was modifiedmlir/docs/Dialects/Builtin.md
The file was modifiedmlir/test/IR/parser.mlir
The file was modifiedmlir/include/mlir/IR/BuiltinTypes.h
The file was modifiedmlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp
The file was modifiedmlir/lib/IR/BuiltinTypes.cpp
The file was modifiedmlir/test/lib/Dialect/Test/CMakeLists.txt
Commit c59ce1f6257c88330c1f1757c36d59d34fe29248 by zinenko
[mlir] support memref of memref in standard-to-llvm conversion

Now that memref supports arbitrary element types, add support for memref of
memref and make sure it is properly converted to the LLVM dialect. The type
support itself avoids adding the interface to the memref type itself similarly
to other built-in types. This allows the shape, and therefore byte size, of the
memref descriptor to remain a lowering aspect that is easier to customize and
evolve as opposed to sanctifying it in the data layout specification for the
memref type itself.

Factor out the code previously in a testing pass to live in a dedicated data
layout analysis and use that analysis in the conversion to compute the
allocation size for memref of memref. Other conversions will be ported
separately.

Depends On D103827

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D103828
The file was modifiedmlir/test/IR/parser.mlir
The file was modifiedmlir/test/lib/Dialect/DLTI/TestDataLayoutQuery.cpp
The file was modifiedmlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp
The file was modifiedmlir/include/mlir/Conversion/StandardToLLVM/ConvertStandardToLLVMPass.h
The file was addedmlir/include/mlir/Analysis/DataLayoutAnalysis.h
The file was addedmlir/lib/Analysis/DataLayoutAnalysis.cpp
The file was modifiedmlir/include/mlir/Conversion/StandardToLLVM/ConvertStandardToLLVM.h
The file was modifiedmlir/lib/Conversion/StandardToLLVM/CMakeLists.txt
The file was modifiedmlir/lib/Analysis/CMakeLists.txt
The file was modifiedmlir/test/Conversion/StandardToLLVM/convert-static-memref-ops.mlir
The file was modifiedmlir/include/mlir/IR/BuiltinTypes.h
The file was modifiedmlir/include/mlir/IR/BuiltinTypes.td
The file was modifiedmlir/test/Conversion/StandardToLLVM/convert-dynamic-memref-ops.mlir
Commit b34da6ff9c1d72816d0c9b87d5f0e879850bc424 by martin
[clang] Apply MS ABI details on __builtin_ms_va_list on non-windows platforms on x86_64

This fixes inconsistencies in the ms_abi.c testcase.

Also add a couple cases of missing double pointers in the windows part
of the testcase; the outcome of building that testcase on windows hasn't
changed, but the previous form of the test was imprecise (checking
for "%[[STRUCT_FOO]]*" when clang actually generates "%[[STRUCT_FOO]]**"),
which still used to match.

Ideally this would share code with the native Windows case, but
X86_64ABIInfo and WinX86_64ABIInfo aren't superclasses/subclasses of
each other so it's impractical, and the code to share currently only
consists of a couple lines.

Differential Revision: https://reviews.llvm.org/D103837
The file was modifiedclang/test/CodeGen/ms_abi.c
The file was modifiedclang/lib/CodeGen/TargetInfo.cpp
Commit b889c6ee9911b72a58986d528f42dd18cbdf92d7 by david.green
[DAG] Allow isNullOrNullSplat to see truncated zeroes

This sets the AllowTruncation flag on isConstOrConstSplat in
isNullOrNullSplat, allowing it to see truncated constant zeroes on
architectures such as AArch64, where only a i32.i64 are legal. As a
truncation of 0 is always 0, this should always be valid, allowing some
extra folding to happen including some of the cases from D103755.

Differential Revision: https://reviews.llvm.org/D103756
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vdiv-sdnode-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vdiv-sdnode-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vrem-sdnode-rv64.ll
The file was modifiedllvm/test/CodeGen/AArch64/vecreduce-bool.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vrem-sdnode-rv32.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Commit 7116468ca9d0ebec1d97d58d99879eaf7e7a3982 by zinenko
[mlir] fix shared-libs build
The file was modifiedmlir/lib/Analysis/CMakeLists.txt
Commit 14eeccfe9adb372c76d11d6ffa98fdb6e9808acc by kerry.mclaughlin
[LoopVectorize] Don't use strict reductions when reordering is allowed

If the `-enable-strict-reductions` flag is set to true, then currently we will
always choose to vectorize the loop with strict in-order reductions. This is
not necessary where we allow the reordering of FP operations, such as
when loop hints are passed via metadata.

This patch moves useOrderedReductions so that we can also check whether
loop hints allow reordering, in which case we should use the default
behaviour of vectorizing with unordered reductions.

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D103814
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
Commit 27f3041c88ac4e392da7c1f071f8516947c7a1c7 by llvm-dev
NVPTXTargetLowering::LowerReturn - Pass DataLayout by reference. NFCI.
The file was modifiedllvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
Commit 4ad59f9a5a9589e7d0608dafb99ee4f2db67cb95 by llvm-dev
ValueTrackingTest.cpp - Pass DataLayout by reference. NFCI.
The file was modifiedllvm/unittests/Analysis/ValueTrackingTest.cpp
Commit 596004a94748e427ff59956e74d8ed4eb0e109d4 by llvm-dev
MemCpyOptimizer.cpp - hasUndefContentsMSSA - Pass DataLayout by reference. NFCI.
The file was modifiedllvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
Commit 49d3a367c0376a95b9518e90426cdd6d5508e64a by llvm-dev
[CostModel][X86] Improve AVX1/AVX2 truncation costs

Based off the worse case numbers generated by D103695, we were overestimating the cost of a number of vector truncations:

AVX2: v2i32->v2i8, v2i64->v2i16 + v4i64->v4i32
AVX1: v2i32->v2i8, v4i64->v4i16 + v16i16->v16i8

Once we have a working set of conversion costs, the intention is to cleanup the tables and use legalized types a lot more to reduce the number of entries we currently have.
The file was modifiedllvm/test/Analysis/CostModel/X86/trunc.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/rem.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/arith.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/cast.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/arith-fix.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/min-legal-vector-width.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/arith-overflow.ll
Commit f96b5e801d67dac4fb1b94566aa4be3a3a5756d5 by llvm-dev
OptBisect.cpp - remove unused include. NFCI.

StringRef.h is included in OptBisect.h and we have no uses of std::string.
The file was modifiedllvm/lib/IR/OptBisect.cpp
Commit 6fd1604d14335a31268bbc477de27e81310f39ef by caroline.concatto
[InstCombine] Add instcombine fold for extractelement + splat for scalable vectors

This patch allows that scalable vector can also use the fold that already
exists for fixed vector, only when the lane index is lower than the minimum
number of elements of the vector.

Differential Revision: https://reviews.llvm.org/D102404
The file was modifiedllvm/test/Transforms/InstCombine/gep-vector-indices.ll
The file was modifiedllvm/test/Transforms/InstCombine/vscale_extractelement-inseltpoison.ll
The file was modifiedllvm/test/Transforms/InstCombine/vscale_extractelement.ll
The file was modifiedllvm/lib/Analysis/InstructionSimplify.cpp
Commit ccd1e087f3702d5ccdfcce24ac7f7d2877921165 by fraser
[RISCV] Add a test case showing inefficient vector codegen
The file was addedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitcast-large-vector.ll
Commit d54e7b731e662e3ec19c590172c9827e3e184829 by sven.vanhaastregt
[OpenCL] Add memory_scope_all_devices

Add the `memory_scope_all_devices` enum value, which is restricted to
OpenCL 3.0 or newer and the `__opencl_c_atomic_scope_all_devices`
feature.  Also guard `memory_scope_all_svm_devices` accordingly, which
is already available in OpenCL 2.0.

The `__opencl_c_atomic_scope_all_devices` feature is header-only, so
set its define to 1 in `opencl-c-base.h`.  This is done
unconditionally at the moment, as the mechanism for disabling
header-only options hasn't been decided yet.

This patch only adds a negative test for now.  Ideally adding a CL3.0
run line to atomic-ops.cl should suffice as a positive test, but we
cannot do that yet until (at least) generic address spaces and program
scope variables are supported in OpenCL 3.0 mode.

Differential Revision: https://reviews.llvm.org/D103241
The file was modifiedclang/test/Headers/opencl-c-header.cl
The file was modifiedclang/test/SemaOpenCL/atomic-ops.cl
The file was modifiedclang/lib/Headers/opencl-c-base.h
Commit 5db52751a594410d0166d606b305b01a03f0ca3f by kerry.mclaughlin
[CostModel] Return an invalid cost for memory ops with unsupported types

Fixes getTypeConversion to return `TypeScalarizeScalableVector` when a scalable vector
type cannot be legalized by widening/splitting. When this is the method of legalization
found, getTypeLegalizationCost will return an Invalid cost.

The getMemoryOpCost, getMaskedMemoryOpCost & getGatherScatterOpCost functions already call
getTypeLegalizationCost and will now also return an Invalid cost for unsupported types.

Reviewed By: sdesmalen, david-arm

Differential Revision: https://reviews.llvm.org/D102515
The file was addedllvm/test/Transforms/VectorCombine/AArch64/extract-cmp-binop.ll
The file was modifiedllvm/test/Transforms/VectorCombine/X86/extract-cmp-binop.ll
The file was modifiedllvm/lib/CodeGen/TargetLoweringBase.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
The file was addedllvm/test/Analysis/CostModel/AArch64/sve-illegal-types.ll
The file was modifiedllvm/unittests/CodeGen/AArch64SelectionDAGTest.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/scalable-vf-hint.ll
Commit f61602b0d3fd3ff5b277dc44cf22cfb5356dee5c by Vignesh.Balasubrmanian
[OpenMP][OMPD] Implementation of OMPD debugging library - libompd.

This is the first of seven patches that implements OMPD, a debugging interface to support debugging of OpenMP programs.
It contains support code required in "openmp/runtime" for OMPD implementation.

Reviewed By: @hbae
Differential Revision: https://reviews.llvm.org/D100181
The file was modifiedopenmp/runtime/src/ompt-specific.cpp
The file was modifiedopenmp/runtime/src/kmp_tasking.cpp
The file was modifiedopenmp/runtime/src/kmp_config.h.cmake
The file was modifiedopenmp/runtime/CMakeLists.txt
The file was modifiedopenmp/runtime/src/kmp_settings.cpp
The file was modifiedopenmp/runtime/src/include/omp-tools.h.var
The file was modifiedopenmp/runtime/src/kmp_runtime.cpp
The file was modifiedopenmp/runtime/src/kmp_settings.h
The file was modifiedopenmp/runtime/src/kmp_csupport.cpp
The file was modifiedopenmp/runtime/src/kmp_gsupport.cpp
The file was modifiedopenmp/runtime/src/CMakeLists.txt
The file was addedopenmp/runtime/src/ompd-specific.h
The file was addedopenmp/runtime/src/ompd-specific.cpp
The file was modifiedopenmp/runtime/src/ompt-general.cpp
The file was modifiedopenmp/runtime/src/kmp_wait_release.h
The file was modifiedopenmp/runtime/src/kmp.h
Commit 09e92c607cc94f3d088da2d13592f4e7100ba84a by konndennsa
[LoopUnrollAndJam] Change LoopUnrollAndJamPass to LoopNest pass

This patch changes LoopUnrollAndJamPass from FunctionPass to LoopNest pass.
The next patch will utilize LoopNest to effectively handle loop nests.

Also, a crash problem on legacy pass manager is fixed.

Reviewed By: Whitney

Differential Revision: https://reviews.llvm.org/D99149
The file was modifiedllvm/lib/Passes/PassBuilder.cpp
The file was modifiedllvm/include/llvm/Transforms/Scalar/LoopUnrollAndJamPass.h
The file was modifiedllvm/lib/Transforms/Scalar/LoopUnrollAndJamPass.cpp
The file was modifiedllvm/lib/Passes/PassRegistry.def
The file was modifiedllvm/include/llvm/Transforms/Scalar/LoopPassManager.h
The file was modifiedllvm/test/Transforms/LoopUnrollAndJam/innerloop.ll
Commit 012898b92cad00e230a960a08a3f418628bec060 by nathan
[clang] p1099 using enum part 1

This adds support for p1099's 'using SCOPED_ENUM::MEMBER;'
functionality, bringing a member of an enumerator into the current
scope. The novel feature here, is that there need not be a class
hierarchical relationship between the current scope and the scope of
the SCOPED_ENUM. That's a new thing, the closest equivalent is a
typedef or alias declaration. But this means that
Sema::CheckUsingDeclQualifier needs adjustment. (a) one can't call it
until one knows the set of decls that are being referenced -- if
exactly one is an enumerator, we're in the new territory. Thus it
needs calling later in some cases. Also (b) there are two ways we hold
the set of such decls. During parsing (or instantiating a dependent
scope) we have a lookup result, and during instantiation we have a set
of shadow decls. Thus two optional arguments, at most one of which
should be non-null.

Differential Revision: https://reviews.llvm.org/D100276
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/lib/Sema/SemaDeclCXX.cpp
The file was modifiedclang/lib/Sema/SemaTemplateInstantiateDecl.cpp
The file was modifiedclang/test/SemaCXX/enum-scoped.cpp
The file was addedclang/test/CXX/dcl.dcl/basic.namespace/namespace.udecl/p7-cxx20.cpp
The file was modifiedclang/test/CXX/dcl.dcl/basic.namespace/namespace.udecl/p7.cpp
The file was modifiedclang/test/CXX/dcl.dcl/basic.namespace/namespace.udecl/p3.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
Commit 2b626aba448a5febb76cca87623c7a380b9e96d6 by simon.moll
[VE][NFC] IRBuilder<> -> IRBuilderBase

VE's TTI broke with the switch from IRBuilder<> to IRBuilderBase.
Following that change to compile again.
The file was modifiedllvm/lib/Target/VE/VEISelLowering.h
The file was modifiedllvm/lib/Target/VE/VEISelLowering.cpp
Commit 22875b2ce3fd8a5cf4f615ed7e91950f613ba9d4 by tbaeder
[NFC] Remove some include cycles

These files include themselves directly.
The file was modifiedllvm/include/llvm/ExecutionEngine/JITLink/ELF.h
The file was modifiedclang/lib/AST/Interp/Context.h
Commit 0f9d299122f1223e93c54f10401a608f5d481314 by simon.moll
[VP] getDeclarationForParams

`VPIntrinsic::getDeclarationForParams` creates a vp intrinsic
declaration for parameters you want to call it with.  This is in
preparation of a new builder class that makes emitting vp intrinsic code
nearly as convenient as using a plain ir builder (aka `VectorBuilder`,
to be used by D99750).

Reviewed By: frasercrmck, craig.topper, vkmr

Differential Revision: https://reviews.llvm.org/D102686
The file was modifiedllvm/unittests/IR/VPIntrinsicTest.cpp
The file was modifiedllvm/include/llvm/IR/IntrinsicInst.h
The file was modifiedllvm/lib/IR/IntrinsicInst.cpp
Commit 41eb2cec47986d8128c0ef03164a007b0db67127 by fabian
[MLIR] Mark additional builtin attr methods const

* Mark the following methods const:
  * `ArrayAttr::getAsRange`
  * `ArrayAttr::getAsValueRange`
  * `DictionaryAttr::getAs`
* Make `DictionarAttr::getAs` generic over the name class, such that
  `Identifier` and `StringRef` arguments get forwarded to the underlying
  call to `get`. (Made generic to avoid introducing a dependency on
  `include/mlir/IR/Identifier.h` as per the diff discussion.)

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D103822
The file was modifiedmlir/include/mlir/IR/BuiltinAttributes.td
Commit 386b66b2fc297cda121a3cc8a36887a6ecbcfc68 by hans
Revert "3rd Reapply "[DebugInfo] Use variadic debug values to salvage BinOps and GEP instrs with non-const operands""

> This reapplies c0f3dfb9, which was reverted following the discovery of
> crashes on linux kernel and chromium builds - these issues have since
> been fixed, allowing this patch to re-land.

This reverts commit 36ec97f76ac0d8be76fb16ac521f55126766267d.

The change caused non-determinism in the compiler, see comments on the code
review at https://reviews.llvm.org/D91722.

Reverting to unbreak people's builds until that can be addressed.

This also reverts the follow-up "[DebugInfo] Limit the number of values
that may be referenced by a dbg.value" in
a0bd6105d80698c53ceaa64bbe6e3b7e7bbf99ee.
The file was removedllvm/test/DebugInfo/salvage-nonconst-binop.ll
The file was modifiedllvm/include/llvm/IR/Instructions.h
The file was modifiedllvm/lib/IR/IntrinsicInst.cpp
The file was modifiedllvm/lib/IR/Instructions.cpp
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DebugLocEntry.h
The file was modifiedllvm/lib/Transforms/Utils/Local.cpp
The file was modifiedllvm/lib/IR/DebugInfoMetadata.cpp
The file was modifiedllvm/include/llvm/Transforms/Utils/Local.h
The file was modifiedllvm/include/llvm/IR/IntrinsicInst.h
The file was modifiedllvm/lib/Transforms/Coroutines/CoroFrame.cpp
The file was removedllvm/test/DebugInfo/limit-arglist-size.ll
The file was removedllvm/test/DebugInfo/salvage-gep.ll
The file was modifiedllvm/test/Transforms/Reassociate/undef_intrinsics_when_deleting_instructions.ll
The file was modifiedllvm/lib/IR/Operator.cpp
The file was modifiedllvm/test/DebugInfo/NVPTX/debug-info.ll
The file was modifiedllvm/include/llvm/IR/DebugInfoMetadata.h
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
The file was modifiedllvm/include/llvm/IR/Operator.h
The file was modifiedllvm/test/Transforms/InstCombine/debuginfo-sink.ll
Commit e772216e708937988c039420d2c559568f91ae27 by gchatelet
[llvm] Make Sequence reverse-iterable

This patch simplifies the implementation of Sequence and makes it compatible with llvm::reverse.
It exposes the reverse iterators through rbegin/rend which prevents a dangling reference in std::reverse_iterator::operator++().

Differential Revision: https://reviews.llvm.org/D102679
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
The file was modifiedmlir/lib/Conversion/PDLToPDLInterp/PDLToPDLInterp.cpp
The file was modifiedllvm/include/llvm/ADT/Sequence.h
The file was modifiedllvm/unittests/ADT/SequenceTest.cpp
The file was modifiedmlir/include/mlir/IR/BuiltinAttributes.td
Commit be5e2fc7bf781c7fc079943552ea1b519f45c815 by patacca
[Polly][Isl] Removing nullptr constructor from C++ bindings. NFC.

[Polly][Isl] Removing nullptr constructor from C++ bindings. NFC.

This is part of an effort to reduce the differences between the custom C++ bindings used right now by polly in `lib/External/isl/include/isl/isl-noxceptions.h` and the official isl C++ interface.

Changes made:
- Removed `std::nullptr_t` constructor from all the classes in the isl C++ bindings.
- `isl-noexceptions.h` has been generated by this https://github.com/patacca/isl/commit/a7e00bea38f251a4bcf5c2c6ce5fa7ee5f661528

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D103751
The file was modifiedpolly/lib/External/isl/include/isl/isl-noexceptions.h
The file was modifiedpolly/lib/Transform/FlattenAlgo.cpp
The file was modifiedpolly/lib/CodeGen/IslAst.cpp
The file was modifiedpolly/lib/Transform/ZoneAlgo.cpp
The file was modifiedpolly/lib/Transform/FlattenSchedule.cpp
The file was modifiedpolly/lib/Support/ISLTools.cpp
The file was modifiedpolly/lib/Transform/ScheduleOptimizer.cpp
The file was modifiedpolly/lib/Analysis/ScopInfo.cpp
The file was modifiedpolly/lib/Analysis/ScopBuilder.cpp
The file was modifiedpolly/include/polly/ScopInfo.h
The file was modifiedpolly/lib/Transform/ForwardOpTree.cpp
The file was modifiedpolly/lib/Transform/DeLICM.cpp
The file was modifiedpolly/unittests/DeLICM/DeLICMTest.cpp
Commit 7f6c878a2c035eb6325ab228d9bc2d257509d959 by gchatelet
Fix missing header and namespace qualifier in ADT Sequence
The file was modifiedllvm/include/llvm/ADT/Sequence.h
Commit 054cc3b1b469de4b0cb25d1dc3af43c679c5dc44 by Yaxun.Liu
[CUDA][HIP] Fix store of vtbl in ctor

vtbl itself is in default global address space. When clang emits
ctor, it gets a pointer to the vtbl field based on the this pointer,
then stores vtbl to the pointer.

Since this pointer can point to any address space (e.g. an object
created in stack), this pointer points to default address space, therefore
the pointer to vtbl field in this object should also be in default
address space.

Currently, clang incorrectly casts the pointer to vtbl field in this object
to global address space. This caused assertions in backend.

This patch fixes that by removing the incorrect addr space cast.

Reviewed by: Artem Belevich

Differential Revision: https://reviews.llvm.org/D103835
The file was addedclang/test/CodeGenCUDA/vtbl.cu
The file was modifiedclang/lib/CodeGen/CGClass.cpp
Commit dee1f0cb348b0a56375d9b563fb4d6918c431ed1 by whitneyt
[LoopNest] Fix Wdeprecated-copy warnings

error: definition of implicit copy constructor for 'LoopNest' is
deprecated because it has a user-declared copy assignment operator
[-Werror,-Wdeprecated-copy]
  LoopNest &operator=(const LoopNest &) = delete;

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D103752
The file was modifiedllvm/include/llvm/Analysis/LoopNestAnalysis.h
Commit 61a2d6bfe48cf3da4b95d1383bf866690287f8e8 by llvm-dev
[DAG] foldShuffleOfConcatUndefs - ensure shuffles of upper (undef) subvector elements is undef (PR50609)

shuffle(concat(x,undef),concat(y,undef)) -> concat(shuffle(x,y),shuffle(x,y))

If the original shuffle references any of the upper (undef) subvector elements, ensure the split shuffle masks uses undef instead of an out-of-bounds value.

Fixes PR50609
The file was addedllvm/test/CodeGen/X86/pr50609.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Commit f60ea691a94b3b4c28f2ff85a4520562f4110810 by patacca
Revert "[Polly][Isl] Removing nullptr constructor from C++ bindings. NFC."

This reverts commit be5e2fc7bf781c7fc079943552ea1b519f45c815.

This introduced a building error for polly. https://lab.llvm.org/buildbot#builders/10/builds/4951
The file was modifiedpolly/lib/External/isl/include/isl/isl-noexceptions.h
The file was modifiedpolly/lib/Transform/ScheduleOptimizer.cpp
The file was modifiedpolly/lib/CodeGen/IslAst.cpp
The file was modifiedpolly/lib/Transform/ForwardOpTree.cpp
The file was modifiedpolly/lib/Transform/DeLICM.cpp
The file was modifiedpolly/unittests/DeLICM/DeLICMTest.cpp
The file was modifiedpolly/lib/Analysis/ScopBuilder.cpp
The file was modifiedpolly/lib/Transform/ZoneAlgo.cpp
The file was modifiedpolly/lib/Support/ISLTools.cpp
The file was modifiedpolly/include/polly/ScopInfo.h
The file was modifiedpolly/lib/Transform/FlattenAlgo.cpp
The file was modifiedpolly/lib/Transform/FlattenSchedule.cpp
The file was modifiedpolly/lib/Analysis/ScopInfo.cpp
Commit 491d04595751a712db41c196bc1ad816fd9cdaa0 by Louis Dionne
[libc++] Remove the old HTML documentation

This commit finishes moving the <atomic> design documents to the RST
documentation and removes the old documentation. https://libcxx.llvm.org
is already pointing to the new documentation only now, so the removal of
the old documentation is really a NFC.

I went over the old documentation and I don't think we're leaving anything
important behind - I think everything important was mentionned in the RST
documentation anyway.
The file was removedlibcxx/www/upcoming_meeting.html
The file was removedlibcxx/www/type_traits_design.html
The file was modifiedlibcxx/docs/index.rst
The file was removedlibcxx/www/index.html
The file was removedlibcxx/www/cxx1y_status.html
The file was removedlibcxx/www/atomic_design.html
The file was removedlibcxx/www/ts1z_status.html
The file was addedlibcxx/docs/DesignDocs/AtomicDesign.rst
The file was removedlibcxx/www/content.css
The file was removedlibcxx/www/menu.css
The file was removedlibcxx/www/atomic_design_b.html
The file was removedlibcxx/www/atomic_design_a.html
The file was removedlibcxx/www/cxx1z_status.html
The file was removedlibcxx/www/cxx2a_status.html
The file was removedlibcxx/www/atomic_design_c.html
Commit c5d56fec502f36a0c994835ca23bc93a6c682d95 by dblaikie
NFC: .clang-tidy: Inherit configs from parents to improve maintainability

In the interests of disabling misc-no-recursion across LLVM (this seems
like a stylistic choice that is not consistent with LLVM's
style/development approach) this NFC preliminary change adjusts all the
.clang-tidy files to inherit from their parents as much as possible.

This change specifically preserves all the quirks of the current configs
in order to make it easier to review as NFC.

I validatad the change is NFC as follows:

for X in `cat ../files.txt`;
do
  mkdir -p ../tmp/$(dirname $X)
  touch $(dirname $X)/blaikie.cpp
  clang-tidy -dump-config $(dirname $X)/blaikie.cpp > ../tmp/$(dirname $X)/after
  rm $(dirname $X)/blaikie.cpp
done

(similarly for the "before" state, without this patch applied)

for X in `cat ../files.txt`;
do
  echo $X
  diff \
    ../tmp/$(dirname $X)/before \
    <(cat ../tmp/$(dirname $X)/after \
      | sed -e "s/,readability-identifier-naming\(.*\),-readability-identifier-naming/\1/" \
      | sed -e "s/,-llvm-include-order\(.*\),llvm-include-order/\1/" \
      | sed -e "s/,-misc-no-recursion\(.*\),misc-no-recursion/\1/" \
      | sed -e "s/,-clang-diagnostic-\*\(.*\),clang-diagnostic-\*/\1/")
done

(using sed to strip some add/remove pairs to reduce the diff and make it easier to read)

The resulting report is:
  .clang-tidy
  clang/.clang-tidy
  2c2
  < Checks:          'clang-diagnostic-*,clang-analyzer-*,-*,clang-diagnostic-*,llvm-*,misc-*,-misc-unused-parameters,-misc-non-private-member-variables-in-classes,-readability-identifier-naming,-misc-no-recursion'
  ---
  > Checks:          'clang-diagnostic-*,clang-analyzer-*,-*,clang-diagnostic-*,llvm-*,misc-*,-misc-unused-parameters,-misc-non-private-member-variables-in-classes,-misc-no-recursion'
  compiler-rt/.clang-tidy
  2c2
  < Checks:          'clang-diagnostic-*,clang-analyzer-*,-*,clang-diagnostic-*,llvm-*,-llvm-header-guard,misc-*,-misc-unused-parameters,-misc-non-private-member-variables-in-classes'
  ---
  > Checks:          'clang-diagnostic-*,clang-analyzer-*,-*,clang-diagnostic-*,llvm-*,misc-*,-misc-unused-parameters,-misc-non-private-member-variables-in-classes,-llvm-header-guard'
  flang/.clang-tidy
  2c2
  < Checks:          'clang-diagnostic-*,clang-analyzer-*,-*,llvm-*,-llvm-include-order,misc-*,-misc-no-recursion,-misc-unused-parameters,-misc-non-private-member-variables-in-classes'
  ---
  > Checks:          'clang-diagnostic-*,clang-analyzer-*,-*,llvm-*,misc-*,-misc-unused-parameters,-misc-non-private-member-variables-in-classes,-llvm-include-order,-misc-no-recursion'
  flang/include/flang/Lower/.clang-tidy
  flang/include/flang/Optimizer/.clang-tidy
  flang/lib/Lower/.clang-tidy
  flang/lib/Optimizer/.clang-tidy
  lld/.clang-tidy
  lldb/.clang-tidy
  llvm/tools/split-file/.clang-tidy
  mlir/.clang-tidy

The `clang/.clang-tidy` change is a no-op, disabling an option that was never enabled.
The compiler-rt and flang changes are no-op reorderings of the same flags.

(side note, the .clang-tidy file in parallel-libs is broken and crashes
clang-tidy because it uses "lowerCase" as the style instead of "lower_case" -
so I'll deal with that separately)

Differential Revision: https://reviews.llvm.org/D103842
The file was modifiedllvm/.clang-tidy
The file was modifiedflang/include/flang/Lower/.clang-tidy
The file was modifiedllvm/tools/split-file/.clang-tidy
The file was modifiedlldb/.clang-tidy
The file was modifiedflang/lib/Optimizer/.clang-tidy
The file was modifiedmlir/.clang-tidy
The file was modifiedlld/.clang-tidy
The file was modifiedflang/.clang-tidy
The file was modifiedclang/.clang-tidy
The file was modifiedflang/include/flang/Optimizer/.clang-tidy
The file was modifiedcompiler-rt/.clang-tidy
The file was modifiedflang/lib/Lower/.clang-tidy
Commit 433c8d950cb3a1fa0977355ce0367e8c763a3f13 by ndesaulniers
[IR] make -stack-alignment= into a module attr

Similar to D102742, specifying the stack alignment via CodegenOpts means
that this flag gets dropped during LTO, unless the command line is
re-specified as a plugin opt. Instead, encode this information as a
module level attribute so that we don't have to expose this llvm
internal flag when linking the Linux kernel with LTO.

Looks like external dependencies might need a fix:
* https://github.com/llvm-hs/llvm-hs/issues/345
* https://github.com/halide/Halide/issues/6079

Link: https://github.com/ClangBuiltLinux/linux/issues/1377

Reviewed By: tejohnson

Differential Revision: https://reviews.llvm.org/D103048
The file was modifiedclang/lib/CodeGen/BackendUtil.cpp
The file was modifiedllvm/include/llvm/IR/Module.h
The file was modifiedllvm/test/CodeGen/X86/x86-64-xmm-spill-unaligned.ll
The file was modifiedclang/lib/CodeGen/CodeGenModule.cpp
The file was addedllvm/test/CodeGen/X86/movtopush-stack-align.ll
The file was modifiedllvm/lib/Target/X86/X86TargetMachine.cpp
The file was modifiedllvm/test/CodeGen/X86/hipe-cc.ll
The file was addedllvm/test/CodeGen/X86/dynamic-allocas-VLAs-stack-align.ll
The file was modifiedllvm/test/CodeGen/X86/hipe-cc64.ll
The file was modifiedllvm/test/CodeGen/X86/force-align-stack-alloca.ll
The file was addedllvm/test/Linker/stack-alignment.ll
The file was modifiedllvm/lib/CodeGen/CommandFlags.cpp
The file was modifiedllvm/test/CodeGen/X86/movtopush.ll
The file was modifiedllvm/test/CodeGen/X86/unaligned-spill-folding.ll
The file was modifiedclang/test/CodeGen/stackrealign-main.c
The file was modifiedllvm/include/llvm/Target/TargetOptions.h
The file was modifiedllvm/test/CodeGen/Generic/ForceStackAlign.ll
The file was modifiedllvm/test/CodeGen/X86/base-pointer-and-cmpxchg.ll
The file was modifiedllvm/test/CodeGen/X86/base-pointer-and-mwaitx.ll
The file was modifiedllvm/test/CodeGen/X86/dynamic-allocas-VLAs.ll
The file was modifiedllvm/test/CodeGen/X86/pr11468.ll
The file was modifiedllvm/test/CodeGen/X86/x86-64-baseptr.ll
The file was modifiedllvm/lib/IR/Module.cpp
Commit 49454ebc56ecf8b11f4b6c328c9fdb7b92307684 by dblaikie
.clang-tidy: Disable misc-no-recursion in general/across the monorepo
The file was modifiedflang/include/flang/Lower/.clang-tidy
The file was modifiedflang/.clang-tidy
The file was modifiedclang/.clang-tidy
The file was modifiedflang/lib/Optimizer/.clang-tidy
The file was modified.clang-tidy
The file was modifiedflang/include/flang/Optimizer/.clang-tidy
The file was modifiedflang/lib/Lower/.clang-tidy
Commit 965ad79ea7d0b98f905a27785a6fd0091b904218 by gh
[MLIR][MemRef] Only allow fold of cast for the pointer operand, not the value

Currently canonicalizations of a store and a cast try to fold all casts into the store.

In the case where the operand being stored is itself a cast, this is illegal as the type of the value being stored
will change. This PR fixes this by not checking the value for folding with a cast.

Depends on https://reviews.llvm.org/D103828

Differential Revision: https://reviews.llvm.org/D103829
The file was modifiedmlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
The file was modifiedmlir/test/Dialect/Affine/canonicalize.mlir
The file was modifiedmlir/test/Dialect/MemRef/canonicalize.mlir
The file was modifiedmlir/lib/Dialect/Affine/IR/AffineOps.cpp
Commit a596b54d471cfde548bdda3925ea2f143f06b964 by ndesaulniers
Revert "[IR] make -stack-alignment= into a module attr"

This reverts commit 433c8d950cb3a1fa0977355ce0367e8c763a3f13.

Breaks the MIPS build.
The file was modifiedllvm/test/CodeGen/X86/movtopush.ll
The file was modifiedclang/test/CodeGen/stackrealign-main.c
The file was modifiedllvm/test/CodeGen/X86/dynamic-allocas-VLAs.ll
The file was modifiedclang/lib/CodeGen/CodeGenModule.cpp
The file was modifiedllvm/lib/Target/X86/X86TargetMachine.cpp
The file was removedllvm/test/CodeGen/X86/movtopush-stack-align.ll
The file was modifiedllvm/test/CodeGen/X86/base-pointer-and-mwaitx.ll
The file was modifiedllvm/test/CodeGen/X86/force-align-stack-alloca.ll
The file was modifiedllvm/test/CodeGen/X86/unaligned-spill-folding.ll
The file was modifiedllvm/test/CodeGen/X86/x86-64-baseptr.ll
The file was modifiedclang/lib/CodeGen/BackendUtil.cpp
The file was modifiedllvm/test/CodeGen/X86/hipe-cc64.ll
The file was modifiedllvm/include/llvm/IR/Module.h
The file was modifiedllvm/test/CodeGen/X86/base-pointer-and-cmpxchg.ll
The file was modifiedllvm/include/llvm/Target/TargetOptions.h
The file was modifiedllvm/lib/CodeGen/CommandFlags.cpp
The file was modifiedllvm/test/CodeGen/X86/x86-64-xmm-spill-unaligned.ll
The file was modifiedllvm/lib/IR/Module.cpp
The file was removedllvm/test/Linker/stack-alignment.ll
The file was modifiedllvm/test/CodeGen/X86/pr11468.ll
The file was modifiedllvm/test/CodeGen/Generic/ForceStackAlign.ll
The file was removedllvm/test/CodeGen/X86/dynamic-allocas-VLAs-stack-align.ll
The file was modifiedllvm/test/CodeGen/X86/hipe-cc.ll
Commit 172fcd9600e13d5365f5cf648105891ff6a0e59d by hans
[clang-cl] Parse the /external: flags (PR36003)

They are still unsupported, but at least this makes clang-cl not mistake
them for being filenames.

As pointed out in the bug, VS 16.10 now uses these flags in new projects
by default.
The file was modifiedclang/test/Driver/cl-options.c
The file was modifiedclang/include/clang/Driver/Options.td
Commit d2eccf9bb7f10bd5c9ac0259ee1b03f2e25fb7a1 by Louis Dionne
[libc++] NFC: Add regression tests for some <tuple> PRs that have been fixed
The file was addedlibcxx/test/std/utilities/tuple/tuple.tuple/PR38601.pass.cpp
The file was addedlibcxx/test/std/utilities/tuple/tuple.tuple/PR27375.pass.cpp
Commit cd73af92315ecf25ed47f4991806a054ddfca5ea by kiran.chandramohan
[MLIR] Remove LLVM_AnyInteger type constraint

LLVM Dialect uses builtin-integer types. The existing LLVM_AnyInteger
type constraint is a dupe of AnyInteger. This patch removes LLVM_AnyInteger
and replaces all usage with AnyInteger.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D103839
The file was modifiedmlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
The file was modifiedmlir/include/mlir/Dialect/AMX/AMX.td
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
The file was modifiedmlir/test/Dialect/LLVMIR/invalid.mlir
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
Commit 928a197d26ffd035bc4279ba533f169190a03574 by i
[ELF] Add a GRP_COMDAT test with a local signature symbol

See https://groups.google.com/g/generic-abi/c/2X6mR-s2zoc

Test that a local signature symbol does not suppress COMDAT deduplication.
The file was addedlld/test/ELF/comdat-local-signature.s
Commit c57bce9cc5facbdde52c24fe64fa4f6bf23a8449 by craig.topper
[RISCV] Remove ForceTailAgnostic flag from vmv.s.x, vfmv.s.f and reductions.

In 0.9 these were defined to leave elements other than 0 in the
destination unmodified. They were changed to use the tail policy
in 0.10. I missed that update.

I assume no one has noticed because in order cores treat tail
agnostic the same as tail undisturbed. I believe Spike and QEMU do
the same.

Reviewed By: arcbbb, frasercrmck

Differential Revision: https://reviews.llvm.org/D103736
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredor-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-buildvec.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredxor-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwredsumu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/urem-seteq-illegal-types.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfredsum-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwredsum-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-i1.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfredmin-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfredosum-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfredsum-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredand-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredmax-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredminu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-fp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/insertelt-int-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwredsum-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredmaxu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredmin-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfredosum-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwredosum-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwredsum-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredor-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwredosum-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredmin-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredsum-rv32.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredand-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-stepvector-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwredsumu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/insertelt-fp-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwredsum-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfredmax-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfredmax-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredmax-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/insertelt-fp-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredminu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredxor-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredsum-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfredmin-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/insertelt-int-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredmaxu-rv64.ll
Commit 71fb98e0c1de97c8ba2aa3292447b0c5d0f248d5 by aaron
Fix a typo in the internals manual
The file was modifiedclang/docs/InternalsManual.rst
Commit 8b4c80d380a681e6ea6ea60e9d9f9424e7782980 by craig.topper
Further improve register allocation for vwadd(u).wv, vwsub(u).wv, vfwadd.wv, and vfwsub.wv.

The first source has the same EEW as the destination, but we're
using earlyclobber which prevents them from ever being the same
register. This patch attempts to work around this.

-For unmasked .wv, add a special TIED pseudo that pretends like
the first operand and the destination must be the same register. This
disables the earlyclobber for that source. Mark the instruction
as convertible to 3 address form which will switch it to the
original untied pseudo when the TwoAddressInstructionPass decides
that keeping them tied would require an extra copy. This uses
code in RISCVInstrInfo.cpp to do the conversion to the untied
opcode.

The untie test case show that we can generate the untied version.
Not sure it was profitable to do it in this case, but they have
really simple IR.

Reviewed By: arcbbb

Differential Revision: https://reviews.llvm.org/D103552
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsub.w-rv32.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfo.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwadd.w-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsubu.w-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwaddu.w-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv32.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsubu.w-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv64.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfo.h
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwadd.w-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsub.w-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwaddu.w-rv64.ll
Commit 08664d005c02003180371049b19c7e5d01541c58 by clattner
[Verifier] Speed up and parallelize dominance checking.  NFC

One of the key algorithms used in the "mlir::verify(op)" method is the
dominance checker, which ensures that operand values properly dominate
the operations that use them.

The MLIR dominance implementation has a number of algorithmic problems,
and is not really set up in general to answer dense queries: it's constant
factors are really slow with multiple map lookups and scans, even in the
easy cases.  Furthermore, when calling mlir::verify(module) or some other
high level operation, it makes sense to parallelize the dominator
verification of all the functions within the module.

This patch has a few changes to enact this:
1) It splits dominance checking into "IsolatedFromAbove" units.  Instead
    of building a monolithic DominanceInfo for everything in a module,
    for example, it checks dominance for the module to all the functions
    within it (noop, since there are no operands at this level) then each
    function gets their own DominanceInfo for each of their scope.
2) It adds the ability for mlir::DominanceInfo (and post dom) to be
    constrained to an IsolatedFromAbove region.  There is no reason to
    recurse into IsolatedFromAbove regions since use/def relationships
    can't span this region anyway.  This is already checked by the time
    the verifier gets here.
3) It avoids querying DominanceInfo for trivial checks (e.g. intra Block
    references) to eliminate constant factor issues).
4) It switches to lazily constructing DominanceInfo because the trivial
    check case handles the vast majority of the cases and avoids
    constructing DominanceInfo entirely in some cases (e.g. at the module
    level or for many Regions's that contain a single Block).
5) It parallelizes analysis of collections IsolatedFromAbove operations,
    e.g. each of the functions within a Module.

All together this is more than a 10% speedup on `firtool` in circt on a
large design when run in -verify-each mode (our default) since the verifier
is invoked after each pass.

Still todo is to parallelize the main verifier pass.  I decided to split
this out to its own thing since this patch is already large-ish.

Differential Revision: https://reviews.llvm.org/D103373
The file was modifiedmlir/lib/IR/Verifier.cpp
The file was modifiedmlir/include/mlir/IR/Dominance.h
Commit 92a79dbe91413f685ab19295fc7a6297dbd6c824 by clattner
[Core] Add Twine support for StringAttr and Identifier. NFC.

This is both more efficient and more ergonomic than going
through an std::string, e.g. when using llvm::utostr and
in string concat cases.

Unfortunately we can't just overload ::get().  This causes an
ambiguity because both twine and stringref implicitly convert
from std::string.

Differential Revision: https://reviews.llvm.org/D103754
The file was modifiedmlir/lib/IR/Builders.cpp
The file was modifiedmlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
The file was modifiedmlir/lib/Conversion/GPUToVulkan/ConvertGPULaunchFuncToVulkanLaunchFunc.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
The file was modifiedmlir/lib/IR/MLIRContext.cpp
The file was modifiedmlir/include/mlir/IR/Identifier.h
The file was modifiedmlir/lib/IR/BuiltinAttributes.cpp
The file was modifiedmlir/include/mlir/IR/BuiltinAttributes.td
The file was modifiedmlir/lib/CAPI/IR/BuiltinAttributes.cpp
The file was modifiedmlir/lib/Dialect/GPU/Transforms/SerializeToBlob.cpp
The file was modifiedmlir/include/mlir/IR/Builders.h
Commit ea10a86984ea73fcec3b12d22404a15f2f59b219 by brendon.cahoon
[AMDGPU] Add gfx1013 target

Differential Revision: https://reviews.llvm.org/D103663
The file was modifiedllvm/test/Object/AMDGPU/elf-header-flags-mach.yaml
The file was modifiedllvm/lib/Target/AMDGPU/GCNProcessors.td
The file was modifiedllvm/lib/Target/AMDGPU/MIMGInstructions.td
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
The file was modifiedllvm/tools/llvm-readobj/ELFDumper.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/docs/AMDGPUUsage.rst
The file was modifiedllvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
The file was modifiedllvm/lib/Object/ELFObjectFile.cpp
The file was modifiedllvm/test/MC/AMDGPU/gfx10_unsupported.s
The file was modifiedclang/lib/Basic/Targets/AMDGPU.cpp
The file was modifiedllvm/lib/ObjectYAML/ELFYAML.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
The file was modifiedclang/test/Driver/amdgpu-macros.cl
The file was modifiedclang/test/Misc/target-invalid-cpu-note.c
The file was modifiedclang/include/clang/Basic/Cuda.h
The file was modifiedclang/lib/Basic/Cuda.cpp
The file was modifiedllvm/include/llvm/BinaryFormat/ELF.h
The file was modifiedllvm/lib/Support/TargetParser.cpp
The file was modifiedclang/test/CodeGenOpenCL/amdgpu-features.cl
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/get_elf_mach_gfx_name.cpp
The file was modifiedllvm/lib/Target/AMDGPU/GCNSubtarget.h
The file was modifiedllvm/include/llvm/Support/TargetParser.h
The file was modifiedllvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedclang/lib/Basic/Targets/NVPTX.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPU.td
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
The file was modifiedllvm/test/tools/llvm-readobj/ELF/amdgpu-elf-headers.test
The file was modifiedllvm/test/MC/AMDGPU/dl-insts-err.s
The file was modifiedclang/test/Driver/amdgpu-mcpu.cl
Commit 114e712c344fbf8361b97130e78baa2624ff9bca by llvm-dev
InstrEmitter.cpp - don't dereference a dyn_cast<>.

dyn_cast<> can return nullptr which we would then dereference - use cast<> which will assert that the type is correct.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
Commit 01b77159e30b38613ab700d8bb128b006822c58c by llvm-dev
PPCISelLowering.cpp - don't dereference a dyn_cast<>.

dyn_cast<> can return nullptr which we would then dereference - use cast<> which will assert that the type is correct.
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
Commit 52396577a2d85ef1b18f86e643fe3b1033750e15 by llvm-dev
Use llvm_unreachable for unsupported integer types.

As suggested on rG937c4cffd024, use llvm_unreachable for unhandled integer types (which shouldn't be possible) instead of breaking and dropping down to the existing fatal error handler.

Helps silence static analyzer warnings.
The file was modifiedllvm/lib/ExecutionEngine/Interpreter/ExternalFunctions.cpp
Commit a4e2cf712af3a3c7a4389e400a29da244b276f96 by joker.eph
Revert "[llvm] Make Sequence reverse-iterable"

This reverts commit e772216e708937988c039420d2c559568f91ae27
(and fixup 7f6c878a2c035eb6325ab228d9bc2d257509d959).

The build is broken with gcc5 host compiler:

In file included from
                 from mlir/lib/Dialect/Utils/StructuredOpsUtils.cpp:9:
tools/mlir/include/mlir/IR/BuiltinAttributes.h.inc:424:57: error: type/value mismatch at argument 1 in template parameter list for 'template<class ItTy, class FuncTy, class FuncReturnTy> class llvm::mapped_iterator'
                               std::function<T(ptrdiff_t)>>;
                                                         ^
tools/mlir/include/mlir/IR/BuiltinAttributes.h.inc:424:57: note:   expected a type, got 'decltype (seq<ptrdiff_t>(0, 0))::const_iterator'
The file was modifiedllvm/include/llvm/ADT/Sequence.h
The file was modifiedllvm/unittests/ADT/SequenceTest.cpp
The file was modifiedmlir/lib/Conversion/PDLToPDLInterp/PDLToPDLInterp.cpp
The file was modifiedmlir/include/mlir/IR/BuiltinAttributes.td
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
Commit 1dba2a026956b0f3918dcf8bb1d3f3483db2de8c by phosek
[Fuchsia] Update some of the Fuchsia toolchain flags

This should make the build more self-contained.

Differential Revision: https://reviews.llvm.org/D103875
The file was modifiedclang/cmake/caches/Fuchsia-stage2.cmake
The file was modifiedclang/cmake/caches/Fuchsia.cmake
Commit 30bb5dcb0a5cfe933136340318cbff2ba329a8c4 by joker.eph
Add missing header <atomic> in lib/IR/Verifier.cpp (NFC)

Fix the build on some platform.
The file was modifiedmlir/lib/IR/Verifier.cpp
Commit 2a7e759734982bea1d08642332a92f687266148f by Justin Bogner
[GlobalISel] Handle non-multiples of the base type in narrowScalarInsert

When narrowing G_INSERT, handle types that aren't a multiple of the
type we're narrowing to. This comes up if we're narrowing something
like an s96 to fit in 64 bit registers and also for non-byte multiple
packed types if they come up.

This implementation handles these cases by extending the extra bits to
the narrow size and truncating the result back to the destination
size.

Differential Revision: https://reviews.llvm.org/D97791
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-inserts.mir
Commit 4271e1d2c52271ddb9544fa0c76543bffe053937 by Justin Bogner
[GlobalISel] Handle non-multiples of the base type in narrowScalarAddSub

When narrowing G_ADD and G_SUB, handle types that aren't a multiple of
the type we're narrowing to. This allows us to handle types like s96
on 64 bit targets.

Note that the test here has a couple of dead instructions because of
the way the setup legalizes. I wasn't able to come up with a way to
write this test that avoids that easily.

Differential Revision: https://reviews.llvm.org/D97811
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
Commit 4d680b06c92a0b785da9bb4370cd7d8819b6d726 by Louis Dionne
[libc++] Add a CI configuration for the modular build

Differential Revision: https://reviews.llvm.org/D103559
The file was modifiedlibcxx/test/libcxx/utilities/utility/pairs/pairs.pair/non_trivial_copy_move_ABI.pass.cpp
The file was addedlibcxx/cmake/caches/Generic-modules.cmake
The file was modifiedlibcxx/utils/ci/run-buildbot
The file was modifiedlibcxx/utils/libcxx/test/config.py
The file was modifiedlibcxx/utils/libcxx/test/params.py
The file was modifiedlibcxx/utils/libcxx/test/format.py
The file was modifiedlibcxx/utils/ci/buildkite-pipeline.yml
The file was modifiedlibcxx/test/libcxx/include_as_c.sh.cpp
Commit ee2a92c29df6d37a4dc5d0f6795f0fe531962b9d by Abhina.Sreeskantharajan
[libcxx] Remove VLA from libcxx locale header

The buffer size (`__nbuf`) in `num_put::do_put` is currently not an
integral/core constant expression. As a result, `__nar` is a Variable Length
Array (VLA). VLAs are a GNU extension and not part of the base C++ standard, so
unless there is good reason to do so they probably shouldn't be used in any of
the standard library headers. The call to `__iob.flags()` is the only thing
keeping `__nbuf` from being a compile time constant, so the solution here is to
simply err on the side of caution and always allocate a buffer large enough to
fit the base prefix.

Note that, while the base prefix for hex (`0x`) is slightly longer than the
base prefix for octal (`0`), this isn't a concern. The difference in the space
needed for the value portion of the string is enough to make up for this.
(Unless we're working with small, oddly sized types such as a hypothetical
`uint9_t`, the space needed for the value portion in octal is at least 1 more
than the space needed for the value portion in hex).

This PR also adds `constexpr` to `__nbuf` to enforce compile time const-ness
going forward.

Reviewed By: Mordante, #libc, Quuxplusone, ldionne

Differential Revision: https://reviews.llvm.org/D103558
The file was modifiedlibcxx/include/locale
Commit 3787ee457173c3612aac4c9b1a2b6d6ab0202616 by ndesaulniers
reland [IR] make -stack-alignment= into a module attr

Relands commit 433c8d950cb3a1fa0977355ce0367e8c763a3f13 with fixes for
MIPS.

Similar to D102742, specifying the stack alignment via CodegenOpts means
that this flag gets dropped during LTO, unless the command line is
re-specified as a plugin opt. Instead, encode this information as a
module level attribute so that we don't have to expose this llvm
internal flag when linking the Linux kernel with LTO.

Looks like external dependencies might need a fix:
* https://github.com/llvm-hs/llvm-hs/issues/345
* https://github.com/halide/Halide/issues/6079

Link: https://github.com/ClangBuiltLinux/linux/issues/1377

Reviewed By: tejohnson

Differential Revision: https://reviews.llvm.org/D103048
The file was modifiedllvm/test/CodeGen/Generic/ForceStackAlign.ll
The file was modifiedllvm/include/llvm/Target/TargetOptions.h
The file was modifiedllvm/lib/Target/X86/X86TargetMachine.cpp
The file was modifiedllvm/test/CodeGen/X86/dynamic-allocas-VLAs.ll
The file was modifiedllvm/lib/Target/Mips/MipsTargetMachine.cpp
The file was modifiedllvm/lib/IR/Module.cpp
The file was modifiedllvm/lib/Target/Mips/MipsCallLowering.cpp
The file was modifiedllvm/test/CodeGen/Mips/stack-alignment.ll
The file was modifiedllvm/include/llvm/IR/Module.h
The file was modifiedllvm/test/CodeGen/X86/hipe-cc64.ll
The file was modifiedllvm/test/CodeGen/X86/movtopush.ll
The file was modifiedclang/test/CodeGen/stackrealign-main.c
The file was modifiedllvm/test/CodeGen/X86/base-pointer-and-mwaitx.ll
The file was modifiedllvm/test/CodeGen/X86/force-align-stack-alloca.ll
The file was modifiedllvm/test/CodeGen/X86/x86-64-baseptr.ll
The file was modifiedllvm/test/CodeGen/X86/base-pointer-and-cmpxchg.ll
The file was modifiedllvm/test/CodeGen/X86/hipe-cc.ll
The file was addedllvm/test/CodeGen/X86/movtopush-stack-align.ll
The file was modifiedllvm/test/CodeGen/X86/unaligned-spill-folding.ll
The file was modifiedclang/lib/CodeGen/BackendUtil.cpp
The file was modifiedclang/lib/CodeGen/CodeGenModule.cpp
The file was modifiedllvm/test/CodeGen/X86/x86-64-xmm-spill-unaligned.ll
The file was modifiedllvm/lib/CodeGen/CommandFlags.cpp
The file was addedllvm/test/CodeGen/X86/dynamic-allocas-VLAs-stack-align.ll
The file was modifiedllvm/test/CodeGen/X86/pr11468.ll
The file was addedllvm/test/Linker/stack-alignment.ll
Commit de98da2eced72eee791a93b076b70a7b22175abc by phosek
[CMake] Only include LTO on Apple targets

We only need libLTO when using ld64.

Differential Revision: https://reviews.llvm.org/D103916
The file was modifiedclang/cmake/caches/Fuchsia.cmake
The file was modifiedclang/cmake/caches/Fuchsia-stage2.cmake
Commit b2d0c16e91f39def3646b71e5afebfaea262cca1 by nathan
[clang] p1099 using enum part 2

This implements the 'using enum maybe-qualified-enum-tag ;' part of
1099. It introduces a new 'UsingEnumDecl', subclassed from
'BaseUsingDecl'. Much of the diff is the boilerplate needed to get the
new class set up.

There is one case where we accept ill-formed, but I believe this is
merely an extended case of an existing bug, so consider it
orthogonal. AFAICT in class-scope the c++20 rule is that no 2 using
decls can bring in the same target decl ([namespace.udecl]/8). But we
already accept:

struct A { enum { a }; };
struct B : A { using A::a; };
struct C : B { using A::a;
using B::a; }; // same enumerator

this patch permits mixtures of 'using enum Bob;' and 'using Bob::member;' in the same way.

Differential Revision: https://reviews.llvm.org/D102241
The file was modifiedclang/tools/libclang/CIndex.cpp
The file was modifiedclang-tools-extra/clangd/FindTarget.cpp
The file was modifiedclang/lib/AST/ASTContext.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was modifiedclang/lib/Serialization/ASTCommon.cpp
The file was modifiedclang/lib/AST/JSONNodeDumper.cpp
The file was modifiedclang/lib/CodeGen/CGDecl.cpp
The file was modifiedclang/include/clang/Serialization/ASTBitCodes.h
The file was modifiedclang/include/clang/AST/RecursiveASTVisitor.h
The file was modifiedclang/lib/Sema/SemaTemplateInstantiateDecl.cpp
The file was addedclang/test/AST/ast-dump-using-enum.cpp
The file was modifiedclang/include/clang/ASTMatchers/ASTMatchers.h
The file was modifiedclang/unittests/AST/ASTImporterTest.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticParseKinds.td
The file was modifiedclang/lib/AST/ASTImporter.cpp
The file was modifiedclang/include/clang/AST/DeclCXX.h
The file was modifiedclang/lib/AST/DeclCXX.cpp
The file was modifiedclang/lib/Sema/SemaCXXScopeSpec.cpp
The file was modifiedclang/lib/CodeGen/CGDebugInfo.h
The file was modifiedclang/lib/Serialization/ASTWriterDecl.cpp
The file was modifiedclang/include/clang/AST/TextNodeDumper.h
The file was modifiedclang/include/clang/AST/ASTContext.h
The file was modifiedclang/lib/AST/Decl.cpp
The file was modifiedclang/lib/Index/IndexSymbol.cpp
The file was modifiedclang/lib/Serialization/ASTReaderDecl.cpp
The file was modifiedclang/include/clang/Basic/DeclNodes.td
The file was modifiedclang/lib/Sema/SemaDeclCXX.cpp
The file was modifiedclang/lib/Sema/SemaCodeComplete.cpp
The file was addedclang/test/SemaCXX/cxx20-using-enum.cpp
The file was modifiedclang/lib/CodeGen/CGDebugInfo.cpp
The file was modifiedclang/lib/AST/TextNodeDumper.cpp
The file was modifiedclang/include/clang/AST/JSONNodeDumper.h
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/lib/AST/DeclBase.cpp
The file was modifiedclang/lib/AST/DeclPrinter.cpp
The file was modifiedclang/unittests/ASTMatchers/ASTMatchersNodeTest.cpp
The file was modifiedclang/include/clang/Index/IndexSymbol.h
The file was modifiedclang/include/clang/Sema/Template.h
The file was modifiedclang/lib/ASTMatchers/Dynamic/Registry.cpp
The file was modifiedclang/lib/Parse/ParseDeclCXX.cpp
The file was modifiedclang/lib/ASTMatchers/ASTMatchersInternal.cpp
The file was modifiedclang/lib/CodeGen/CodeGenModule.cpp
Commit 7e976cd4568517df4020845682d31f326907a5df by Justin Bogner
[FuzzMutate] Fix getWeight of InstDeleterIRStrategy

The comment states the following, for calculating the Line variable:

> Draw a line starting from when we only have 1k left and increasing
> linearly to double the current weight.

However, the value was not calculated as described. Instead, it would
result in a negative value, which resulted in the function always
returning 0 afterwards.

```
// Invariant: CurrentSize <= MaxSize - 200
// Invariant: CurrentWeight >= 0
int Line = (-2 * CurrentWeight) * (MaxSize - CurrentSize + 1000);
// {Line <= 0}
```

This commit fixes the issue and linearly interpolates as described.

Patch by Loris Reiff. Thanks!

Differential Revision: https://reviews.llvm.org/D96207
The file was modifiedllvm/lib/FuzzMutate/IRMutator.cpp
Commit c09b37553e7423918ff09c7b6f4d3d2ae17b2bde by craig.topper
[RISCV] Remove dead code from fixed-vectors-abs.ll test cases. NFC

We had two pointer arguments and a dead load presumably copied
from a binary operation test and modified into unary abs.
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-abs.ll
Commit f673365e1ce16293075c18d03cd2f1ae6264289f by phosek
[CMake][Fuchsia] Include llvm-otool in Fuchsia toolchain

We want to use llvm-otool in our build.

Differential Revision: https://reviews.llvm.org/D103918
The file was modifiedclang/cmake/caches/Fuchsia-stage2.cmake
Commit 9197bac297f73552882820ba25d245115e29e7af by apilipenko
Add an option to hide "cold" blocks from CFG graph

Introduce a new cl::opt to hide "cold" blocks from CFG DOT graphs.
Use BFI to get block relative frequency. Hide the block if the
frequency is below the threshold set by the command line option value.

Reviewed By: davidxl, hoy
Differential Revision: https://reviews.llvm.org/D103640
The file was modifiedllvm/lib/Analysis/CFGPrinter.cpp
Commit c0edcec630eb26e12d66dae2f0e1fbf5258cb6ac by joker.eph
Add a static assertions for custom Op<> to not defined data members (NFC)

A common mistake for newcomers to MLIR is to try to store extra member
on the Op class. However these are intended to be thing wrapper around
an Operation*, all the storage is meant to be encoded in attribute on
the underlying Operation. This can be confusing to debug, so better
catch it at build time.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D103869
The file was modifiedmlir/include/mlir/IR/OpDefinition.h
Commit f44770c32992d51586d11c352f9e825f6aa15fc2 by david.green
[ARM] A couple of extra VMOVimm tests, useful for showing BE codegen. NFC
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vmovimm.ll
Commit 2927d40f044650e787985235a1d3d76db345cf87 by Matthew.Arsenault
GlobalISel: Hide virtual register creation in MIRBuilder
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
Commit 31a9659de550b25b6bc0ad5cab73d133095c351f by Matthew.Arsenault
GlobalISel: Avoid use of G_INSERT in insertParts

G_INSERT legalization is incomplete and doesn't work very
well. Instead try to use sequences of G_MERGE_VALUES/G_UNMERGE_VALUES
padding with undef values (although this can get pretty large).

For the case of load/store narrowing, this is still performing the
load/stores in irregularly sized pieces. It might be cleaner to split
this down into equal sized pieces, and rely on load/store merging to
optimize it.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-constant.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/load-constant.96.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-xor.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
The file was modifiedllvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-and.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/load-unaligned.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/ds-alignment.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/load-local.96.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
Commit 0e8506debae3ad534b4eecfa922fc6281506a635 by Abhina.Sreeskantharajan
[SystemZ][z/OS] Pass OpenFlags when creating tmp files

This patch https://reviews.llvm.org/D102876 caused some lit regressions on z/OS because tmp files were no longer being opened based on binary/text mode. This patch passes OpenFlags when creating tmp files so we can open files in different modes.

Reviewed By: amccarth

Differential Revision: https://reviews.llvm.org/D103806
The file was modifiedllvm/lib/Support/Path.cpp
The file was modifiedllvm/include/llvm/Support/FileSystem.h
The file was modifiedclang/lib/Frontend/CompilerInstance.cpp
Commit 944b3c53aec54c205d6898ffca548a484309e139 by leonardchan
[NFC][compiler-rt][hwasan] Move allocation functions into their own file

This removes the `__sanitizer_*` allocation function definitions from
`hwasan_interceptors.cpp` and moves them into their own file. This way
implementations that do not use interceptors at all can just ignore
(almost) everything in `hwasan_interceptors.cpp`.

Also remove some unused headers in `hwasan_interceptors.cpp` after the move.

Differential Revision: https://reviews.llvm.org/D103564
The file was modifiedcompiler-rt/lib/hwasan/hwasan_interceptors.cpp
The file was modifiedcompiler-rt/lib/hwasan/CMakeLists.txt
The file was modifiedcompiler-rt/lib/hwasan/hwasan.h
The file was addedcompiler-rt/lib/hwasan/hwasan_allocation_functions.cpp
Commit 9ec6c3bb2ff0ad94edd4c09189f3a0310947fc58 by thakis
[gn build] (semi-manually) port 944b3c53aec5
The file was modifiedllvm/utils/gn/secondary/compiler-rt/lib/hwasan/BUILD.gn
Commit 2a5afb466553ae4e185d7fa50c9b8df9fe62ecda by phosek
[CMake][Fuchsia] Use PIC for Fuchsia runtimes

Disabling PIC globally also disabled PIC for runtimes which was
undesirable, manually override it.

Differential Revision: https://reviews.llvm.org/D103919
The file was modifiedclang/cmake/caches/Fuchsia-stage2.cmake
The file was modifiedclang/cmake/caches/Fuchsia.cmake
Commit d69c4372bfbe81961160a4e6cb238fb53a279515 by spatel
[CodeGen] remove instcombine from codegen tests; NFC

The FileCheck lines in these files are auto-generated and complete,
so there's very little upside (less CHECK lines) from running
-instcombine on them and violating the expected test layering
(optimizer developers shouldn't have to be aware of clang tests).

Running opt passes like this makes it harder to make changes such as:
D93817
The file was modifiedclang/test/CodeGen/aarch64-bf16-lane-intrinsics.c
The file was modifiedclang/test/CodeGen/aarch64-bf16-dotprod-intrinsics.c
The file was modifiedclang/test/CodeGen/arm-bf16-getset-intrinsics.c
The file was modifiedclang/test/CodeGen/aarch64-bf16-getset-intrinsics.c
The file was modifiedclang/test/CodeGen/arm-bf16-dotprod-intrinsics.c
The file was modifiedclang/test/CodeGen/arm-bf16-convert-intrinsics.c
Commit 64576a1be887b7afcacf0534e6c168805fba5677 by apl
[lldb][NFC] Refactor name to index maps in Symtab

The various maps in Symtab lead to some repetative code. This should
improve the situation somewhat.

Differential Revision: https://reviews.llvm.org/D103652
The file was modifiedlldb/include/lldb/Symbol/Symtab.h
The file was modifiedlldb/source/Symbol/Symtab.cpp
Commit a9ea0a6a77b30305bfbe1b06c30bf6136f64c1ad by leonardchan
Fix for failing test mentioned in https://reviews.llvm.org/D103564.

This updates the path shown in the stack trace.
The file was modifiedcompiler-rt/test/hwasan/TestCases/use-after-free.c
Commit 27332968d85e1ad4a58df884030e55abc00e91b1 by michael.hliao
[amdgpu] Add `-enable-ocl-mangling-mismatch-workaround`.

- Add `-enable-ocl-mangling-mismatch-workaround` to work around the
  mismatch on OCL name mangling so far.

Reviewed By: yaxunl, rampitec

Differential Revision: https://reviews.llvm.org/D103920
The file was modifiedllvm/test/CodeGen/AMDGPU/simplify-libcalls.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULibFunc.cpp
Commit dc0c3fe5f35eb5fc8d5b36bb79761fb374a87269 by epastor
[ms] [llvm-ml] Disambiguate size directives and variable declarations

MASM allows statements of the form:
<VAR> DWORD 5
to declare a variable with name <VAR>, while:
call dword ptr [<value>]
is a valid instruction. To disambiguate, we recognize size directives by the trailing "ptr" token.

As discussed in https://lists.llvm.org/pipermail/llvm-dev/2021-May/150774.html

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D103257
The file was addedllvm/test/tools/llvm-ml/reserved_words_conflict.asm
The file was modifiedllvm/lib/MC/MCParser/MasmParser.cpp
Commit d7853bae941006cece63013f09d524e72bbbec45 by david.green
[ARM] Generate VDUP(Const) from constant buildvectors

If we cannot otherwise use a VMOVimm/VMOVFPimm/VMVNimm, fall back to
producing a VDUP(const) as opposed to a constant pool load. This will at
least be smaller codesize and can allow the VDUP to be folded into other
instructions.

Differential Revision: https://reviews.llvm.org/D103808
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-vctpvpsel.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vmvnimm.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-shifts.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-fp16convertloops.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vmovimm.ll
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/predicated-liveout-unknown-lanes.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-gather-scatter-tailpred.ll
Commit a7142f5c91ba0e4dbe6dbd36e3f4ac6ccd33a418 by phosek
Partially revert the Fuchsia changes to avoid the use of PIC

This reverts commit:
2a5afb466553ae4e185d7fa50c9b8df9fe62ecda
de98da2eced72eee791a93b076b70a7b22175abc
1dba2a026956b0f3918dcf8bb1d3f3483db2de8c
The file was modifiedclang/cmake/caches/Fuchsia-stage2.cmake
The file was modifiedclang/cmake/caches/Fuchsia.cmake
Commit 297088d1add70cae554c8f96dde3a97a3e8d56a5 by david.green
Revert "[DSE] Remove stores in the same loop iteration"

Apparently non-dead stores are being removed, as noted in D100464.

This reverts commit 222aeb4d51a46c5a81c9e4ccb16d1d19dd21ec95.
The file was modifiedllvm/test/Other/opt-O3-pipeline.ll
The file was modifiedllvm/test/Transforms/DeadStoreElimination/multiblock-loops.ll
The file was modifiedllvm/test/Other/opt-O3-pipeline-enable-matrix.ll
The file was modifiedllvm/test/Other/opt-O2-pipeline.ll
The file was modifiedllvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/opt-pipeline.ll
The file was modifiedllvm/test/Other/opt-Os-pipeline.ll
Commit 211e584fa2a4c032e4d573e7cdbffd622aad0a8f by brendon.cahoon
Revert "[AMDGPU] Add gfx1013 target"

This reverts commit ea10a86984ea73fcec3b12d22404a15f2f59b219.

A sanitizer buildbot reports an error.
The file was modifiedclang/lib/Basic/Targets/NVPTX.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPU.td
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
The file was modifiedllvm/include/llvm/Support/TargetParser.h
The file was modifiedllvm/lib/Target/AMDGPU/GCNProcessors.td
The file was modifiedclang/test/Driver/amdgpu-mcpu.cl
The file was modifiedllvm/lib/Support/TargetParser.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
The file was modifiedllvm/test/Object/AMDGPU/elf-header-flags-mach.yaml
The file was modifiedllvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
The file was modifiedclang/lib/Basic/Cuda.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/get_elf_mach_gfx_name.cpp
The file was modifiedclang/test/Driver/amdgpu-macros.cl
The file was modifiedclang/test/Misc/target-invalid-cpu-note.c
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
The file was modifiedllvm/tools/llvm-readobj/ELFDumper.cpp
The file was modifiedllvm/lib/Target/AMDGPU/GCNSubtarget.h
The file was modifiedllvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
The file was modifiedllvm/test/MC/AMDGPU/dl-insts-err.s
The file was modifiedllvm/include/llvm/BinaryFormat/ELF.h
The file was modifiedllvm/lib/Object/ELFObjectFile.cpp
The file was modifiedllvm/lib/ObjectYAML/ELFYAML.cpp
The file was modifiedllvm/test/tools/llvm-readobj/ELF/amdgpu-elf-headers.test
The file was modifiedclang/lib/Basic/Targets/AMDGPU.cpp
The file was modifiedllvm/docs/AMDGPUUsage.rst
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedclang/test/CodeGenOpenCL/amdgpu-features.cl
The file was modifiedllvm/lib/Target/AMDGPU/MIMGInstructions.td
The file was modifiedclang/include/clang/Basic/Cuda.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
The file was modifiedllvm/test/MC/AMDGPU/gfx10_unsupported.s
Commit d5e4f28c0a45a659d45ae8a822c24d68fbadcfbd by paulsson
[SystemZ] Return true from isMaskAndCmp0FoldingBeneficial().

Return true if the mask is a constant uint of 2 bytes, in which case TMLL is
available.

Review: Ulrich Weigand
The file was modifiedllvm/lib/Target/SystemZ/SystemZISelLowering.h
The file was addedllvm/test/CodeGen/SystemZ/codegenprepare-sink-and-for-tm.ll
Commit 1683dbf0ddb28c829926b18065f692ee670693fc by phosek
[CMake][Fuchsia] Disable vcruntime for first stage as well

Using vcruntime is breaking libc++ headers so don't use it.

Differential Revision: https://reviews.llvm.org/D103926
The file was modifiedclang/cmake/caches/Fuchsia.cmake
Commit 07ef5805abe5d4576eb5528eab63e75505bfd0bd by whitneyt
Revert "[LoopNest] Fix Wdeprecated-copy warnings"

This reverts commit dee1f0cb348b0a56375d9b563fb4d6918c431ed1.

It appears that this change broke the sanitizer-windows bot:
https://lab.llvm.org/buildbot/#/builders/127/builds/12064

Differential Revision: https://reviews.llvm.org/D103752
The file was modifiedllvm/include/llvm/Analysis/LoopNestAnalysis.h
Commit 12933ba9eab2a6c0cb63a590d0b7338817fe88ed by Louis Dionne
[libc++] NFC: Rewrite the documentation for the debug mode
The file was modifiedlibcxx/docs/DesignDocs/DebugMode.rst
Commit 0178ae734ca33265fe051c39deff6d7d530f6239 by david.green
[DSE] Add another multiblock loop DSE test. NFC

As reported in D100464, the stores in these loops should not be removed.
The file was modifiedllvm/test/Transforms/DeadStoreElimination/multiblock-loops.ll
Commit 1a216fb15a188f9ac7de6d79267b3cfb2946f792 by Jonas Devlieghere
[lldb] Don't print script output twice in HandleCommand

When executing a script command in HandleCommand(s) we currently print
its output twice
You can see this issue in action when adding a breakpoint command:

(lldb) b main
Breakpoint 1: where = main.out`main + 13 at main.cpp:2:3, address = 0x0000000100003fad
(lldb) break command add 1 -o "script print(\"Hey!\")"
(lldb) r
Process 76041 launched: '/tmp/main.out' (x86_64)
Hey!
(lldb)  script print("Hey!")
Hey!
Process 76041 stopped

The issue is caused by HandleCommands using a temporary
CommandReturnObject and one of the commands (`script` in this case)
setting an immediate output stream. This causes the result to be printed
twice: once directly to the immediate output stream and once when
printing the result of HandleCommands.

This patch fixes the issue by introducing a new option to suppress
immediate output for temporary CommandReturnObjects.

Differential revision: https://reviews.llvm.org/D103349
The file was addedlldb/lldb/test/Shell/Breakpoint/breakpoint-command.test
The file was addedlldb/test/Shell/Breakpoint/breakpoint-command.test
The file was modifiedlldb/include/lldb/Interpreter/CommandReturnObject.h
The file was modifiedlldb/source/Interpreter/CommandReturnObject.cpp
The file was modifiedlldb/test/Shell/ScriptInterpreter/Lua/nested_sessions.test
The file was modifiedlldb/source/Interpreter/CommandInterpreter.cpp
Commit 2551053e8d8df464d5b60e7c9b0add8f85cc1e10 by kostyak
[scudo] Add Scudo support for Trusty OS

trusty.cpp and trusty.h define Trusty implementations of map and other
platform-specific functions. In addition to adding Trusty configurations
in allocator_config.h and size_class_map.h, MapSizeIncrement and
PrimaryEnableRandomOffset are added as configurable options in
allocator_config.h.
Background on Trusty: https://source.android.com/security/trusty

Differential Revision: https://reviews.llvm.org/D103578
The file was modifiedcompiler-rt/lib/scudo/standalone/tests/primary_test.cpp
The file was addedcompiler-rt/lib/scudo/standalone/trusty.cpp
The file was modifiedcompiler-rt/lib/scudo/standalone/tests/combined_test.cpp
The file was addedcompiler-rt/lib/scudo/standalone/trusty.h
The file was modifiedcompiler-rt/lib/scudo/standalone/allocator_config.h
The file was modifiedcompiler-rt/lib/scudo/standalone/common.h
The file was modifiedcompiler-rt/lib/scudo/standalone/primary32.h
The file was modifiedcompiler-rt/lib/scudo/standalone/platform.h
The file was modifiedcompiler-rt/lib/scudo/standalone/primary64.h
The file was modifiedcompiler-rt/lib/scudo/standalone/size_class_map.h
Commit c52ed5c4f1f2a2e54634226dc6bd305f98f0c541 by spatel
[InstCombine] add FMF tests for fneg-of-select; NFC

As noted in the post-commit comments for 3cdd05e519d,
we need to be more careful about FMF propagation.
The file was modifiedllvm/test/Transforms/InstCombine/fneg.ll
Commit d2012d965d60c3258b3a69d024491698f8aec386 by spatel
[InstCombine] fix nsz (fast-math) propagation from fneg-of-select

As discussed in the post-commit comments for:
3cdd05e519dd

It seems to be safe to propagate all flags from the final fneg
except for 'nsz' to the new select:
https://alive2.llvm.org/ce/z/J_APDc

nsz has unique FMF semantics: it is not poison, it is only
"insignificant" in the calculation according to the LangRef.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
The file was modifiedllvm/test/Transforms/InstCombine/fneg.ll
Commit ae1a699554cfa01d9fb307a964c3a9f71831a62e by Shafik Yaghmour
[LLDB][NFC] Remove parameter names from forward declarations from hand written expressions used in heap.py

heap.py has a lot of large hand written expressions and each name in the
expression will be looked up by clang during expression parsing. For
function parameters this will be in Sema::ActOnParamDeclarator(...) in order to
catch redeclarations of parameters. The names are not needed and we have seen
some rare cases where since we don't have symbols we end up in
SymbolContext::FindBestGlobalDataSymbol(...) which may conflict with other global
symbols.

There may be a way to make this lookup smarter to avoid these cases but it is
not clear how well tested this path is and how much work it would be to fix it.
So we will go with this fix while we investigate more.

Ref: rdar://78265641
The file was modifiedlldb/examples/darwin/heap_find/heap.py
Commit 8b32e25bc229f98faed002b1cc90587ca300c92a by paulsson
[SystemZ] Return true from convertSetCCLogicToBitwiseLogic for scalar integer.

Review: Ulrich Weigand
The file was modifiedllvm/lib/Target/SystemZ/SystemZISelLowering.h
The file was addedllvm/test/CodeGen/SystemZ/int-cmp-61.ll
Commit af8c59e06d281f96db101d87ec227b238045a1d8 by kda
Update and improve compiler-rt tests for -mllvm -asan_use_after_return=(never|[runtime]|always).

In addition:
  - optionally add global flag to capture compile intent for UAR:
    __asan_detect_use_after_return_always.
    The global is a SANITIZER_WEAK_ATTRIBUTE.

for issue: https://github.com/google/sanitizers/issues/1394

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D103304
The file was modifiedllvm/test/Instrumentation/AddressSanitizer/fake-stack.ll
The file was modifiedcompiler-rt/test/asan/TestCases/uar_and_exceptions.cpp
The file was modifiedcompiler-rt/lib/asan/asan_fake_stack.cpp
The file was modifiedcompiler-rt/test/asan/TestCases/Windows/stack_use_after_return.cpp
The file was modifiedcompiler-rt/test/asan/TestCases/heavy_uar_test.cpp
The file was modifiedcompiler-rt/test/asan/TestCases/Posix/stack-use-after-return.cpp
The file was modifiedcompiler-rt/test/asan/TestCases/Windows/dll_stack_use_after_return.cpp
The file was modifiedllvm/test/Instrumentation/AddressSanitizer/stack_dynamic_alloca.ll
The file was modifiedcompiler-rt/test/asan/TestCases/pass-struct-byval-uar.cpp
The file was modifiedcompiler-rt/test/asan/TestCases/scariness_score_test.cpp
The file was modifiedllvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
The file was modifiedcompiler-rt/lib/asan/asan_interface.inc
The file was modifiedllvm/test/Instrumentation/AddressSanitizer/stack-poisoning.ll
The file was modifiedcompiler-rt/test/asan/TestCases/Linux/uar_signals.cpp
Commit 9b41d0958e78c397c702c913d60946dd8c01f0a5 by patacca
[Polly][Isl] Removing nullptr constructor from C++ bindings. NFC.

[Polly][Isl] Removing nullptr constructor from C++ bindings. NFC.

This is part of an effort to reduce the differences between the custom C++ bindings used right now by polly in `lib/External/isl/include/isl/isl-noxceptions.h` and the official isl C++ interface.

Changes made:
- Removed `std::nullptr_t` constructor from all the classes in the isl C++ bindings.
- `isl-noexceptions.h` has been generated by this https://github.com/patacca/isl/commit/a7e00bea38f251a4bcf5c2c6ce5fa7ee5f661528

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D103751
The file was modifiedpolly/lib/CodeGen/PPCGCodeGeneration.cpp
The file was modifiedpolly/unittests/DeLICM/DeLICMTest.cpp
The file was modifiedpolly/lib/Transform/DeLICM.cpp
The file was modifiedpolly/lib/Support/ISLTools.cpp
The file was modifiedpolly/lib/Transform/FlattenSchedule.cpp
The file was modifiedpolly/lib/Transform/ForwardOpTree.cpp
The file was modifiedpolly/lib/Analysis/ScopBuilder.cpp
The file was modifiedpolly/lib/Transform/ZoneAlgo.cpp
The file was modifiedpolly/lib/Analysis/ScopInfo.cpp
The file was modifiedpolly/lib/Transform/FlattenAlgo.cpp
The file was modifiedpolly/lib/External/isl/include/isl/isl-noexceptions.h
The file was modifiedpolly/include/polly/ScopInfo.h
The file was modifiedpolly/lib/CodeGen/IslAst.cpp
The file was modifiedpolly/lib/Transform/ScheduleOptimizer.cpp
Commit 9b022a679b2ba79b8c7d11135b9297f0149f1433 by whitneyt
Revert "Revert "[LoopNest] Fix Wdeprecated-copy warnings""

This reverts commit 07ef5805abe5d4576eb5528eab63e75505bfd0bd.

The broke of the sanitizer-windows bot:
https://lab.llvm.org/buildbot/#/builders/127/builds/12064
is not caused by the original commit.

Differential Revision: https://reviews.llvm.org/D103752
The file was modifiedllvm/include/llvm/Analysis/LoopNestAnalysis.h
Commit 2f9ba6aa8b6d805728b5df42b7b049b3c23d28a2 by ndesaulniers
LTO: Export functions referenced by non-canonical CFI jump tables

LowerTypeTests pass adds functions with a non-canonical jump table
to cfiFunctionDecls instead of cfiFunctionDefs. As the jump table
is in the regular LTO object, these functions will also need to be
exported. This change fixes the non-canonical jump table case and
adds a test similar to the existing one for canonical jump tables.

Reviewed By: pcc

Differential Revision: https://reviews.llvm.org/D103120
The file was modifiedllvm/lib/LTO/LTO.cpp
The file was addedllvm/test/LTO/Resolution/X86/export-jumptable-noncanonical.ll
Commit 898e38a3c1593024cdb8904cdd999a0fe1193427 by albionapc
[NFC] In the future, all intrinsics defined for compatibility with the XL
compiler will be placed in this collection.

This patch has no functional changes.

Differential revision: https://reviews.llvm.org/D103921
The file was modifiedllvm/include/llvm/IR/IntrinsicsPowerPC.td
Commit 05cadc6f71555319882ccabf631d2e6410e3fea4 by rob.suderman
[mlir][tosa] Temporarily support 2D and 3D tensor types in matmul

Temporarily support 2D and 3D while the TOSA Matmul op is updated to support batched operations.

Reviewed By: rsuderman

Differential Revision: https://reviews.llvm.org/D103854
The file was modifiedmlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
The file was modifiedmlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
Commit f4c8fd12d58ed93c447081fd8f499fb503da12ff by sivachandra
[libc][NFC] Use add_library instead of add_llvm_library for a few libraries.

These libraries do not depend on LLVM libraries anymore so they do not
have to be added using add_llvm_library.
The file was modifiedlibc/utils/testutils/CMakeLists.txt
The file was modifiedlibc/utils/UnitTest/CMakeLists.txt
The file was modifiedlibc/utils/FPUtil/CMakeLists.txt
Commit 6344a583ca8d1650def86d8effd1ad8a3a9598b1 by sivachandra
[libc] Add a macro to include/exclude subprocess tests.

This is useful when bringing up LLVM libc on a new OS on which we do not
yet have the subprocess related helper functions.
The file was modifiedlibc/utils/UnitTest/LibcTest.cpp
The file was addedlibc/utils/UnitTest/PlatformDefs.h
The file was modifiedlibc/utils/UnitTest/LibcTest.h
Commit 3d515cb185d86d8f89fe60a4e5ef2a6278baa368 by sivachandra
[libc][NFC][Obvious] Compare against size_t values in ArrayRef tests.

Different platforms treat size_t differently so we should compare sizes
of ArrayRef objects with size_t values (instead of the current unsigned
long values.)
The file was modifiedlibc/test/utils/CPP/arrayref_test.cpp
Commit f9649d123db64e38bce7bcb4cc5791239820f3e2 by Lang Hames
[JITLink][MachO] Split C-string literal sections on null-terminators.

MachO C-string literal sections should be split on null-terminator boundaries,
rather than the usual symbol boundaries. This patch updates
MachOLinkGraphBuilder to do that.
The file was modifiedllvm/lib/ExecutionEngine/JITLink/MachOLinkGraphBuilder.cpp
The file was modifiedllvm/lib/ExecutionEngine/JITLink/MachOLinkGraphBuilder.h
Commit df965513a9aa0cbf0d20e8458fa07577f58e112d by huberjn
[OpenMP] Add an information flag for device data transfers

This patch adds an information flag that indicated when data is being copied to
and from the device. This will be helpful for finding redundant or unnecessary
data transfers in applications.

Reviewed By: jdoerfert, grokos

Differential Revision: https://reviews.llvm.org/D103927
The file was modifiedopenmp/docs/design/Runtimes.rst
The file was modifiedopenmp/libomptarget/src/device.cpp
The file was modifiedopenmp/libomptarget/test/offloading/info.c
The file was modifiedopenmp/libomptarget/include/Debug.h
Commit 2c8115482312fc0c7ce836f0f0886d0e153183eb by joker.eph
Add llvm_unreacheable to silence warning "not all control paths return a value" (NFC)
The file was modifiedmlir/lib/IR/SymbolTable.cpp
Commit a0ac51467697d45a353ed9710ca5c75b6bf9b763 by joker.eph
Revert "Add a static assertions for custom Op<> to not defined data members (NFC)"

This reverts commit c0edcec630eb26e12d66dae2f0e1fbf5258cb6ac.

The windows bot was broken by this change.
The file was modifiedmlir/include/mlir/IR/OpDefinition.h
Commit cb09f2b10cbebb76842998b9ac6173f9723e419e by dblaikie
Rename compiler-rt/lib/orc/endian.h to endianness.h to avoid conflict with system headers
The file was removedcompiler-rt/lib/orc/endian.h
The file was modifiedcompiler-rt/lib/orc/unittests/endian_test.cpp
The file was modifiedcompiler-rt/lib/orc/CMakeLists.txt
The file was addedcompiler-rt/lib/orc/endianness.h
The file was modifiedcompiler-rt/lib/orc/wrapper_function_utils.h
Commit 4d9cc7c244e7fe2ce60202f1a7174109efb92504 by dblaikie
Add a couple of missing includes
The file was modifiedcompiler-rt/lib/orc/stl_extras.h
The file was modifiedcompiler-rt/lib/orc/c_api.h
Commit 8051a48e65cc78ccedc9bbd590dbc34a21a07184 by dblaikie
ORTRT: Add tests for string_view equality and inequality operators
The file was modifiedcompiler-rt/lib/orc/unittests/adt_test.cpp
Commit 294efbbd3e3d55671ef8b220c231a2807c38eefe by brendon.cahoon
Reland "[AMDGPU] Add gfx1013 target"

This reverts commit 211e584fa2a4c032e4d573e7cdbffd622aad0a8f.

Fixed a use-after-free error that caused the sanitizers to fail.
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
The file was modifiedllvm/include/llvm/BinaryFormat/ELF.h
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
The file was modifiedclang/lib/Basic/Cuda.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
The file was modifiedllvm/test/MC/AMDGPU/gfx10_unsupported.s
The file was modifiedllvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/get_elf_mach_gfx_name.cpp
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
The file was modifiedclang/test/Driver/amdgpu-macros.cl
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPU.td
The file was modifiedclang/include/clang/Basic/Cuda.h
The file was modifiedllvm/lib/Object/ELFObjectFile.cpp
The file was modifiedllvm/lib/Target/AMDGPU/GCNSubtarget.h
The file was modifiedllvm/lib/Target/AMDGPU/MIMGInstructions.td
The file was modifiedllvm/include/llvm/Support/TargetParser.h
The file was modifiedclang/test/Misc/target-invalid-cpu-note.c
The file was modifiedllvm/test/Object/AMDGPU/elf-header-flags-mach.yaml
The file was modifiedclang/lib/Basic/Targets/AMDGPU.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
The file was modifiedllvm/docs/AMDGPUUsage.rst
The file was modifiedllvm/test/MC/AMDGPU/dl-insts-err.s
The file was modifiedclang/lib/Basic/Targets/NVPTX.cpp
The file was modifiedllvm/test/tools/llvm-readobj/ELF/amdgpu-elf-headers.test
The file was modifiedclang/test/CodeGenOpenCL/amdgpu-features.cl
The file was modifiedllvm/lib/ObjectYAML/ELFYAML.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
The file was modifiedclang/test/Driver/amdgpu-mcpu.cl
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
The file was modifiedllvm/lib/Support/TargetParser.cpp
The file was modifiedllvm/lib/Target/AMDGPU/GCNProcessors.td
The file was modifiedllvm/tools/llvm-readobj/ELFDumper.cpp
Commit c87c294397ea4c3dae31f5a7fd6e38602338fd57 by lkail
[PowerPC][Dwarf] Assign MMA register's dwarf register number to negative value

According to ELF V2 ABI, `0` should be the dwarf number of `r0`. Currently MMA's register also uses `0` as its dwarf number, this confuses `RegisterInfoEmitter` and generates wrong dwarf -> llvm mapping.
```
extern const MCRegisterInfo::DwarfLLVMRegPair PPCDwarfFlavour1Dwarf2L[] = {
  { 0U, PPC::VSRp31 },
```
This leads to wrong cfi output in https://reviews.llvm.org/D100290.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D103761
The file was modifiedllvm/lib/Target/PowerPC/PPCRegisterInfo.td
Commit db4ac5a63e11b90ab585abf9531edb4ed6f69be0 by esme.yi
[NFC][XCOFF] Use yaml2obj in llvm-objdump/XCOFF/section-headers.test instead of binary files.

Summary: This a minor patch to refactor the test file,
llvm-objdump/XCOFF/section-headers.test, to use yaml2obj
for this testing rather than a canned binary.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D103146
The file was removedllvm/test/tools/llvm-objdump/XCOFF/Inputs/xcoff-long-sec-names.o
The file was removedllvm/test/tools/llvm-objdump/XCOFF/Inputs/xcoff-section-headers-truncate.o
The file was modifiedllvm/test/tools/llvm-objdump/XCOFF/section-headers.test
Commit 242ddd50897cef56de3e4f993bbd0c70a22f528f by jim
[RISCV][NFC] Add a single space after comma for VType

In most of cases, it has a single space after comma in assembly operands.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D103790
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-exttrunc.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-load-store.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsof-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnsra-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamoadd-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmaccus-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-shuffles.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vlsseg-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwredsum-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfnmadd-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmaxu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwmul-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfptrunc-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vle-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnclip-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmul-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamoxor-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamomaxu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwredsum-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsub-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/rv64-vsetvli-intrinsics.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vxor-sdnode-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsub-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmset-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmul-sdnode-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmaccu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vrem-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/insertelt-fp-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitcast.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsubu.w-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vasubu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmadc-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vselect-mask.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsgeu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vshl-sdnode-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/masked-store-int.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vreductions-int-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vselect-fp-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmclr-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vrsub-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwadd-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/load-mask.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsub-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/named-vector-shuffle-reverse.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/setcc-integer-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfrsqrt7-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfnmadd-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsub-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmax-sdnode-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamomaxu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vexts-sdnode-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredmax-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-int.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmslt-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredxor-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/stepvector.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfredsum-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamomin-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsqrt-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfdiv-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredminu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vminu-sdnode-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vreductions-mask.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/setcc-fp-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfadd-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vssub-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/extload-truncstore.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vaadd-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsuxseg-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamoand-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredminu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vrgather-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmax-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/spill-fpr-scalar.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vrsub-sdnode-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfredsum-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vlsegff-rv32.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmacc-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/rvv-out-arguments.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsqrt-sdnode.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsub-rv32.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/vluxei-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfrdiv-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmulhu-rv64.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/localvar.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-emergency-slot.mir
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredxor-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmv.f.s.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmv.v.f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vssseg-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmerge-rv32.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/vitofp-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmclr-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-stepvector-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsne-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsrl-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsra-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamoswap-rv64.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsra-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/regalloc-fast-crash.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vlsseg-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vrgatherei16-rv32.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfnmsub-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsbc-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv64.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmax-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/legalize-scalable-vectortype.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfnmsub-rv64.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmaccsu-rv32.ll
The file was modifiedllvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv32.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv32.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfrdiv-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmacc-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmfge-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsbc.borrow.in-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vdiv-sdnode-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vse-rv32.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/rv32-vsetvli-intrinsics.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfabs-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vluxseg-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamoor-rv64.ll
Commit e11b5b87bebf2aad41ad769015a21567198291b9 by saugustine
Add Twine support for std::string_view.

With Twine now ubiquitous after rG92a79dbe91413f685ab19295fc7a6297dbd6c824,
it needs support for string_view when building clang with newer C++ standards.

This is similar to how StringRef is handled.

Differential Revision: https://reviews.llvm.org/D103935
The file was modifiedllvm/include/llvm/ADT/Twine.h
The file was modifiedllvm/unittests/ADT/TwineTest.cpp
The file was modifiedllvm/lib/Support/Twine.cpp
The file was modifiedllvm/include/llvm/Support/raw_ostream.h
Commit e48880078a49faeacb28fd5478948fd674d7350b by cebowleratibm
Fix LIT test failure encountered on AIX

```
fatal error: error in backend: getLangStandardForKind() on unspecified kind
```

Clang :: Modules/preprocess-module.cpp
Clang :: Modules/no-module-map.cpp
Clang :: Modules/preprocess-build-diamond.m
Clang :: Modules/preprocess-decluse.cpp
Clang :: Modules/string_names.cpp

Fix to prior commit f38eff777e46f42884d82815d0b39766520ac2bf, D103707
The file was modifiedclang/lib/Basic/Targets/OSTargets.h

Summary

  1. [VE] disable cmake caches until resolved (details)
  2. Enable retry on failed git operations (details)
Commit 99821277c29d5565a8f5c6cda80ea8b0faf097b4 by simon.moll
[VE] disable cmake caches until resolved
The file was modifiedbuildbot/osuosl/master/config/builders.py
Commit b83568a0e50fe1d8fd419721f67e82c4bda5eaf0 by kuhnel
Enable retry on failed git operations

This should address issues like
`fatal: unable to access 'https://github.com/llvm/llvm-project.git/': Could not resolve host: github.com`
in
http://lab.llvm.org:8011/#/builders/131/builds/7

Differential Revision: https://reviews.llvm.org/D91945
The file was modifiedzorg/buildbot/process/factory.py