Changes

Summary

  1. [libc] Add a "libc-fuzzer" step in full build mode. (details)
Commit d631fe591d8ff09edb895ef124e8370875d8d523 by sivachandra
[libc] Add a "libc-fuzzer" step in full build mode.
The file was modifiedzorg/buildbot/builders/annotated/libc-linux.py (diff)

Summary

  1. [libc] Remove libc-fuzzer as a dependency to check-libc. (details)
  2. [libcxx][optional] adds missing constexpr operations (details)
  3. Update my mailmap (details)
  4. [Docs] Fix incorrect return type for example code (details)
  5. [NFC] Pre-commit tests for VectorCombine scalarize (details)
  6. [mlir] Support pre-existing tokens in 'gpu-async-region' (details)
  7. [XCOFF][llvm-objdump] Dump the debug type in `--section-headers` option. (details)
  8. [LangRef] Fix missing code highlighting format (details)
  9. Revert "[AArch64LoadStoreOptimizer] Generate more STPs by renaming registers earlier" (details)
  10. Revert "[Verifier] Speed up and parallelize dominance checking.  NFC" (details)
  11. Implementation of global.get/set for reftypes in LLVM IR (details)
  12. [OpenCL] Add builtin header test (details)
  13. [OpenCL] Relax test implicit members in C++ for OpenCL (details)
  14. [mlir] make LLVMPointerType implement the data layout type interface (details)
  15. [clang][Arm] Require arm and aarch64 target for bf16 intrinsics test (details)
  16. [TargetLowering] getABIAlignmentForCallingConv - pass DataLayout by const reference. NFCI. (details)
  17. Add explicit braces to silence warning about ambiguous 'else' inside the EXPECT_EQ macro. NFCI. (details)
  18. Fix MSVC int64_t -> uint64_t "narrowing conversion" warning. (details)
  19. Revert "Implementation of global.get/set for reftypes in LLVM IR" (details)
  20. [flang][windows] Run regression tests under Windows. NFCI. (details)
  21. Reland "[gn build] port d1d36f7ad (llvm-tapi-diff)" (details)
  22. [llvm][PPC] Add missing case for 'I' asm memory operands (details)
  23. [NFC][XCOFF] Replace structs FileHeader32/SectionHeader32 with constants. (details)
  24. [llvm] Make Sequence reverse-iterable (details)
  25. [InstSimplify] Add constant fold for extractelement + splat for scalable vectors (details)
  26. [ms] [llvm-ml] Make variable redefinition match ML.EXE (details)
  27. [InstCombine] Add fold for extracting known elements from a stepvector (details)
  28. [clang-tidy] Allow disabling integer narrowing conversions for cppcoreguidelines-narrowing-conversions (details)
  29. [CodeGen] limit tests to current pass manager to avoid variability; NFC (details)
  30. [clang] Make CXXDefaultArgExpr inherit dependence from the inner Expr (details)
  31. [OpenMP] Add type to firstprivate symbol for const firstprivate values (details)
  32. Fix test hip-device-compile.hip (details)
  33. [clang][FPEnv] Clang floatng point model ffp-model=precise enables ffp-contract=on (details)
  34. [ARM] MVE VPT block tests with debug info. NFC (details)
  35. [ARM] Skip debug during vpt block creation (details)
  36. [AArch64] Add cost tests for bitreverse (details)
  37. [TableGen] Eliminate dead code in ParseForeachDeclaration [NFC] (details)
  38. [libc++abi] NFC: adding a new parameter base to functions for calculating addresses with relative encodings (details)
  39. [X86][NFC] Fix typo. (details)
  40. [clang] Do not crash when ArgTy is null in CheckArgAlignment (details)
  41. [clang][driver] Add -foperator-names (details)
  42. [clang][msvc] Define _HAS_STATIC_RTTI to 0, when compiling with -fno-rtti (details)
  43. [clang-cl] Add /permissive and /permissive- (details)
  44. [AArch64] Silence fallthrough warning. NFC. (details)
  45. [docs][llvm-ar] Add rsp-quoting option to the llvm-ar command guide. (details)
  46. [mlir][gpu] Add op to create MMA constant matrix (details)
  47. Fix range-loop-analysis warning (details)
  48. Add a page to track the status of C proposals in Clang. (details)
  49. [AIX] Build libLTO as MODULE rather than SHARED (details)
  50. Revert "[clang][FPEnv] Clang floatng point model ffp-model=precise enables ffp-contract=on" (details)
  51. [libc++abi] Remove the LIBCXXABI_ENABLE_PIC option (details)
  52. [lldb] Add 9494c510af56 to .git-blame-ignore-revs (details)
  53. [Flang][Runtime][tests] Escape regex special character. (details)
  54. [gn build] minor TODO.txt update (details)
  55. [flang] Fixed simple typo in runtime code (details)
  56. [SLP]Disable scheduling of insertelements. (details)
  57. [AArch64][GlobalISel] Mark some G_BITREVERSE types as legal + select them (details)
  58. [mlir-lsp-server] Add support for textDocument/documentSymbols (details)
  59. [mlir-lsp-server] Document the features provided by the language server (details)
  60. [lldb, win] Remove obsolete workaround for MSVC and python libs (details)
  61. [ms] [llvm-ml] Warn on command-line redefinition (details)
  62. [mlir-vscode] Fix dependencies to enable packaging the extension properly. (details)
  63. [libc] Add implementation of expm1f. (details)
  64. [lld-macho][nfc] Fix uninitialized members warning from Coverity (details)
  65. [ARM] Ensure instructions are simplified prior to GatherScatter lowering. (details)
  66. [OpenMP] Implement '#pragma omp unroll'. (details)
  67. [libcxx][ranges][nfc] moves view concepts into `__ranges/concepts.h` (details)
  68. [gn build] Port bbb3d03f93b8 (details)
  69. Move code for checking loop metadata into Analysis [nfc] (details)
  70. Move variable only used inside an assert into the assert. (details)
  71. [SCEV] Use mustprogress flag on loops (in addition to function attribute) (details)
  72. [ELF][RISCV] Resolve branch relocations referencing undefined weak to current location if not using PLT (details)
  73. [ELF] Simplify getAArch64UndefinedRelativeWeakVA. NFC (details)
  74. [libc++] Remove unnecessary header in enable_view.h (which caused a cycle) (details)
  75. [LI] Add a cover function for checking if a loop is mustprogress [nfc] (details)
  76. [ARM] Fix Changed status in MVEGatherScatterLoweringPass. (details)
  77. [clang] NRVO: Improvements and handling of more cases. (details)
  78. [SimplifyCFG] avoid 'tmp' variables in test file; NFC (details)
  79. [LV] Parallel annotated loop does not imply all loads can be hoisted. (details)
  80. 2d Arm Neon sdot op, and lowering to the intrinsic. (details)
  81. [MLIR] Document that Dialect Conversion traverses in preorder (details)
  82. [AArch64][GlobalISel] Legalize scalar G_CTTZ + G_CTTZ_ZERO_UNDEF (details)
  83. [libcxx][ranges] removes default_initializable from weakly_incrementable and view (details)
  84. Preserve more MD_mem_parallel_loop_access and MD_access_group in SROA (details)
  85. [clang] Implement P2266 Simpler implicit move (details)
  86. [Profile] Handle invalid profile data (details)
  87. [IR] make -warn-frame-size into a module attr (details)
  88. [Profile] Remove redundant check (details)
  89. LoadStoreVectorizer: support different operand orders in the add sequence match (details)
  90. [static initializers] Emit global_ctors and global_dtors in reverse order when .ctors/.dtors are used. (details)
  91. [IR] Value: Fix OpCode checks (details)
  92. [RISCV] Add test cases that show failure to use some W instructions if they are proceeded by a load. NFC (details)
  93. [SDAG] Fix pow2 assumption when splitting vectors (details)
  94. [ValueTypes] Define MVTs for v6i32, v6f32, v7i32, v7f32 (details)
  95. [AArch64][GlobalISel] Fix incorrectly generating uxtw/sxtw for addressing modes. (details)
  96. [mlir][IR] Move MemRefElementTypeInterface to a new BuiltinTypeInterfaces file (details)
  97. [mlir] Add new SubElementAttr/SubElementType Interfaces (details)
  98. [mlir-ir-printing] Prefix the dump message with the split marker(// -----) (details)
  99. [Flang] Compile fix after D99459. (details)
  100. [RISCV] Use ComputeNumSignBits/MaskedValueIsZero in RISCVDAGToDAGISel::selectSExti32/selectZExti32. (details)
  101. [VectorCombine] Fix alignment in single element store (details)
  102. Revert "[clang] Implement P2266 Simpler implicit move" (details)
  103. Revert "[clang] NRVO: Improvements and handling of more cases." (details)
  104. [RISCV] Remove extra assignment of intrinsic ID in ManualCodegen. NFC (details)
  105. [lld/mac] Make binaries written by lld strippable (details)
  106. [RISCV] Avoid scalar outgoing argumetns overwriting vector frame objects. (details)
  107. [lldb] Move once_flags in HostInfoLinux so the internal state struct (details)
  108. [PowerPC] Relax register superclasses for paired memops (details)
  109. [lldb] Fix leak in test (details)
Commit b5d6da3587469246a77d573fdf17ffa85a07673c by sivachandra
[libc] Remove libc-fuzzer as a dependency to check-libc.
The file was modifiedlibc/fuzzing/CMakeLists.txt
Commit 546449938a39dcc65f60f8d6e44e7b058a026549 by cjdb
[libcxx][optional] adds missing constexpr operations

Makes the following operations constexpr:
  * `std::swap(optional, optional)`
  * `optional(optional<U> const&)`
  * `optional(optional<U>&&)`
  * `~optional()`
  * `operator=(nullopt_t)`
  * `operator=(U&&)`
  * `operator=(optional<U> const&)`
  * `operator=(optional<U>&&)`
  * `emplace(Args&&...)`
  * `emplace(initializer_list<U>, Args&&...)`
  * `swap(optional&)`
  * `reset()`

P2231 has been accepted by plenary, with the committee recommending
implementers retroactively apply to C++20. It's necessary for us to
implement _`semiregular-box`_ and _`non-propagating-cache`_, both of
which are required for ranges (otherwise we'll need to reimplement
`std::optional` with these members `constexpr`ified).

Differential Revision: https://reviews.llvm.org/D102119
The file was modifiedlibcxx/test/std/utilities/optional/optional.object/optional.object.ctor/move.fail.cpp
The file was modifiedlibcxx/test/std/utilities/optional/optional.object/optional.object.assign/optional_U.pass.cpp
The file was modifiedlibcxx/test/std/utilities/optional/optional.object/optional.object.mod/reset.pass.cpp
The file was modifiedlibcxx/test/std/utilities/optional/optional.object/optional.object.ctor/explicit_optional_U.pass.cpp
The file was modifiedlibcxx/test/std/utilities/optional/optional.object/optional.object.ctor/explicit_const_optional_U.pass.cpp
The file was modifiedlibcxx/test/std/utilities/optional/optional.object/optional.object.assign/emplace_initializer_list.pass.cpp
The file was modifiedlibcxx/include/optional
The file was modifiedlibcxx/test/std/utilities/optional/optional.object/optional.object.ctor/optional_U.pass.cpp
The file was modifiedlibcxx/docs/Cxx2aStatusPaperStatus.csv
The file was modifiedlibcxx/test/std/utilities/optional/optional.object/optional.object.assign/emplace.pass.cpp
The file was modifiedlibcxx/test/std/utilities/optional/optional.object/optional.object.assign/nullopt_t.pass.cpp
The file was modifiedlibcxx/test/std/utilities/optional/optional.object/optional.object.ctor/const_optional_U.pass.cpp
The file was modifiedlibcxx/test/std/utilities/optional/optional.object/optional.object.dtor/dtor.pass.cpp
The file was modifiedlibcxx/test/std/utilities/optional/optional.object/optional.object.swap/swap.pass.cpp
Commit 6680538dd0bfa82037b56673071c9af7ce344549 by qiucofan
Update my mailmap
The file was modified.mailmap
Commit dec3154c161cea85f3fd66e0dbc82259dd6acc83 by jim
[Docs] Fix incorrect return type for example code
The file was modifiedllvm/docs/Vectorizers.rst
Commit a115c5247f5a6c68f99d081c970e78eeebad5414 by qiucofan
[NFC] Pre-commit tests for VectorCombine scalarize
The file was modifiedllvm/test/Transforms/VectorCombine/load-insert-store.ll
Commit 0b21371e1201f23e0f1de2de56ef8eed9c43d6db by csigg
[mlir] Support pre-existing tokens in 'gpu-async-region'

Allow gpu ops implementing the async interface to already be async when running the GpuAsyncRegionPass.
That pass threads a 'current token' through a block with ops implementing the gpu async interface.

After this change, existing async ops (returning a !gpu.async.token) set the current token.
Existing synchronous `gpu.wait` ops reset the current token.

Reviewed By: herhut

Differential Revision: https://reviews.llvm.org/D103396
The file was modifiedmlir/lib/Dialect/GPU/Transforms/AsyncRegionRewriter.cpp
The file was modifiedmlir/test/Dialect/GPU/async-region.mlir
Commit c8e980ab4accf6faa404d2650785cb2f6a7ac20a by esme.yi
[XCOFF][llvm-objdump] Dump the debug type in `--section-headers` option.

Summary: Add XCOFF recognition of debug section types
under `--section-headers` option.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D103079
The file was modifiedllvm/test/tools/llvm-objdump/XCOFF/section-headers.test
The file was modifiedllvm/lib/Object/XCOFFObjectFile.cpp
The file was modifiedllvm/include/llvm/Object/XCOFFObjectFile.h
Commit c0438a2c0f423bd6ca34c3de77503aa48029bb0e by aqjune
[LangRef] Fix missing code highlighting format
The file was modifiedllvm/docs/LangRef.rst
Commit 99653702fdca0e9a47f36456468c3a444ba50b3a by martin
Revert "[AArch64LoadStoreOptimizer] Generate more STPs by renaming registers earlier"

This reverts commit d96ea46629803641038ebe46d8cd512f8cf7e20f, as it
caused various misoptimizations, see https://reviews.llvm.org/D103597
for discussion on the issues.
The file was modifiedllvm/test/CodeGen/AArch64/stp-opt-with-renaming.mir
The file was modifiedllvm/test/CodeGen/AArch64/ldst-opt.ll
The file was modifiedllvm/test/CodeGen/AArch64/consthoist-gep.ll
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/byval-call.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
Commit ad6a84f82c4572dd92369b4f67df6e7c3536f9a2 by alexfh
Revert "[Verifier] Speed up and parallelize dominance checking.  NFC"

This reverts commit 08664d005c02003180371049b19c7e5d01541c58, which according to
https://reviews.llvm.org/D103373 was pushed accidentally, and I believe it
causes timeouts in some internal mlir tests.
The file was modifiedmlir/lib/IR/Verifier.cpp
The file was modifiedmlir/include/mlir/IR/Dominance.h
Commit 31859f896cf90d64904134ce7b31230f374c3fcc by pmatos
Implementation of global.get/set for reftypes in LLVM IR

This change implements new DAG notes GLOBAL_GET/GLOBAL_SET, and
lowering methods for load and stores of reference types from IR
globals. Once the lowering creates the new nodes, tablegen pattern
matches those and converts them to Wasm global.get/set.

Reviewed By: tlively

Differential Revision: https://reviews.llvm.org/D95425
The file was modifiedllvm/include/llvm/Support/MachineValueType.h
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
The file was addedllvm/test/CodeGen/WebAssembly/externref-globalget.ll
The file was addedllvm/test/CodeGen/WebAssembly/funcref-globalget.ll
The file was modifiedllvm/lib/CodeGen/MachineOperand.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp
The file was modifiedllvm/include/llvm/CodeGen/ValueTypes.h
The file was modifiedllvm/lib/CodeGen/CodeGenPrepare.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
The file was addedllvm/test/CodeGen/WebAssembly/externref-globalset.ll
The file was modifiedclang/lib/Basic/Targets/WebAssembly.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
The file was modifiedllvm/lib/CodeGen/TargetLoweringBase.cpp
The file was addedllvm/test/CodeGen/WebAssembly/externref-inttoptr.ll
The file was addedllvm/test/CodeGen/WebAssembly/externref-undef.ll
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyInstrTable.td
The file was addedllvm/test/CodeGen/WebAssembly/externref-unsized-load.ll
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
The file was modifiedllvm/lib/Target/WebAssembly/Utils/WebAssemblyUtilities.h
The file was addedllvm/test/CodeGen/WebAssembly/funcref-globalset.ll
The file was modifiedllvm/lib/Target/WebAssembly/Utils/WebAssemblyUtilities.cpp
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
The file was addedllvm/test/CodeGen/WebAssembly/externref-ptrtoint.ll
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyISD.def
The file was addedllvm/test/CodeGen/WebAssembly/funcref-call.ll
The file was addedllvm/test/CodeGen/WebAssembly/externref-unsized-store.ll
The file was modifiedllvm/lib/CodeGen/ValueTypes.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h
Commit c5ffc6f8bd6ae0e187de8b6a0e4300161952ba66 by sven.vanhaastregt
[OpenCL] Add builtin header test

Add a test to verify OpenCL builtin declarations using
OpenCLBuiltins.td.

This test consists of parsing a 60k line generated input file.  The
entire test takes about 60s with a debug build on a decent machine.
Admittedly this is not the fastest test, but doesn't seem excessive
compared to other tests in clang/test/Headers (with one of the tests
taking 85s for example).

RFC: https://lists.llvm.org/pipermail/cfe-dev/2021-April/067973.html

Differential Revision: https://reviews.llvm.org/D97869
The file was addedclang/test/Headers/opencl-builtins.cl
The file was addedclang/test/Headers/lit.local.cfg
Commit ac677e69bdfc84fc64bfbc83977282d5c5223206 by olemarius.strohm
[OpenCL] Relax test implicit members in C++ for OpenCL

Addresses the issue from a comment in D103252

Relaxes the test to account for some targets with added attributes
to inside the pattern.
The file was modifiedclang/test/AST/ast-dump-implicit-members.clcpp
Commit 7325aaefa52a4bee91391cda2521006c31ab8010 by zinenko
[mlir] make LLVMPointerType implement the data layout type interface

This brings us closer to replacing the LLVM data layout string with a
first-class layout modeling in MLIR.

Depends On D103945

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D103946
The file was modifiedmlir/lib/Dialect/LLVMIR/CMakeLists.txt
The file was modifiedmlir/lib/Dialect/LLVMIR/IR/LLVMTypes.cpp
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMTypes.h
The file was addedmlir/test/Dialect/LLVMIR/layout.mlir
Commit 7fb1f62d12c67d4d3193c84687f0d1267d11ba99 by david.spickett
[clang][Arm] Require arm and aarch64 target for bf16 intrinsics test
The file was modifiedclang/test/CodeGen/arm-bf16-convert-intrinsics.c
Commit 4eb47e3cd4c04a0f1fd8aceacafe2c45b174161f by llvm-dev
[TargetLowering] getABIAlignmentForCallingConv - pass DataLayout by const reference. NFCI.

Avoid unnecessary copies and match every other method in TargetLowering that takes DataLayout as an argument.
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.h
The file was modifiedllvm/lib/Target/Mips/MipsISelLowering.h
Commit 0ce61d47c03df280ce41e226527f8c72fcfa4b13 by llvm-dev
Add explicit braces to silence warning about ambiguous 'else' inside the EXPECT_EQ macro. NFCI.
The file was modifiedclang-tools-extra/clangd/unittests/SelectionTests.cpp
Commit b01d393fc0350bf85e35d07d7b02fe6fdfffbdac by llvm-dev
Fix MSVC int64_t -> uint64_t "narrowing conversion" warning.
The file was modifiedllvm/lib/Transforms/Utils/MemoryOpRemark.cpp
Commit 64de8763aa7cabc5aee4312ae2f9a68d8fd10bfa by david.spickett
Revert "Implementation of global.get/set for reftypes in LLVM IR"

This reverts commit 31859f896cf90d64904134ce7b31230f374c3fcc.

Causing SVE and RISCV-V test failures on bots.
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyISD.def
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h
The file was removedllvm/test/CodeGen/WebAssembly/externref-unsized-store.ll
The file was removedllvm/test/CodeGen/WebAssembly/funcref-globalget.ll
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
The file was modifiedllvm/lib/Target/WebAssembly/Utils/WebAssemblyUtilities.cpp
The file was removedllvm/test/CodeGen/WebAssembly/funcref-globalset.ll
The file was modifiedllvm/lib/CodeGen/ValueTypes.cpp
The file was removedllvm/test/CodeGen/WebAssembly/externref-unsized-load.ll
The file was removedllvm/test/CodeGen/WebAssembly/externref-ptrtoint.ll
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyInstrTable.td
The file was modifiedllvm/lib/CodeGen/TargetLoweringBase.cpp
The file was modifiedllvm/lib/CodeGen/CodeGenPrepare.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
The file was modifiedclang/lib/Basic/Targets/WebAssembly.cpp
The file was removedllvm/test/CodeGen/WebAssembly/externref-inttoptr.ll
The file was modifiedllvm/lib/Target/WebAssembly/Utils/WebAssemblyUtilities.h
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
The file was removedllvm/test/CodeGen/WebAssembly/externref-globalset.ll
The file was removedllvm/test/CodeGen/WebAssembly/funcref-call.ll
The file was modifiedllvm/include/llvm/Support/MachineValueType.h
The file was removedllvm/test/CodeGen/WebAssembly/externref-globalget.ll
The file was modifiedllvm/lib/CodeGen/MachineOperand.cpp
The file was removedllvm/test/CodeGen/WebAssembly/externref-undef.ll
The file was modifiedllvm/include/llvm/CodeGen/ValueTypes.h
Commit 58c3f20bbf51f454ffb38ddb700a1d5ad374dc7b by llvm-project
[flang][windows] Run regression tests under Windows. NFCI.

Allow the lit test suite to run under Windows. This encompasses the following changes:

* Define `lit_tools_dir` for flang's test configuration
* Replace `(<command> || true)` idiom with `not <command>`
* Add `REQUIRES: shell` on tests that invoke a shell script

Reviewed By: awarzynski

Differential Revision: https://reviews.llvm.org/D89368
The file was modifiedflang/test/Semantics/omp-flush01.f90
The file was modifiedflang/test/Semantics/io01.f90
The file was modifiedflang/test/Semantics/modfile05.f90
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The file was modifiedflang/test/Semantics/omp-parallel-shared04.f90
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The file was modifiedflang/test/Semantics/resolve66.f90
The file was modifiedflang/test/Semantics/dosemantics04.f90
The file was modifiedflang/test/Semantics/expr-errors03.f90
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The file was modifiedflang/test/Semantics/resolve61.f90
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The file was modifiedflang/test/Semantics/io10.f90
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The file was modifiedflang/test/Semantics/resolve87.f90
The file was modifiedflang/test/Semantics/symbol09.f90
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The file was modifiedflang/test/Semantics/omp-do04-positivecase.f90
The file was modifiedflang/test/Semantics/symbol18.f90
The file was modifiedflang/test/Semantics/modfile26.f90
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The file was modifiedflang/test/Semantics/resolve56.f90
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The file was modifiedflang/test/Semantics/OpenACC/acc-serial.f90
The file was modifiedflang/test/Semantics/omp-depend01.f90
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The file was modifiedflang/test/Semantics/omp-do-schedule04.f90
The file was modifiedflang/test/Semantics/omp-reduction06.f90
The file was modifiedflang/test/Semantics/allocate03.f90
The file was modifiedflang/test/Semantics/resolve13.f90
The file was modifiedflang/test/Semantics/data02.f90
The file was modifiedflang/test/Semantics/omp-declarative-directive.f90
The file was modifiedflang/test/Semantics/omp-device-constructs.f90
The file was modifiedflang/test/Semantics/omp-do07.f90
The file was modifiedflang/test/Semantics/modfile08.f90
The file was modifiedflang/test/Semantics/resolve78.f90
The file was modifiedflang/test/Semantics/symbol05.f90
The file was modifiedflang/test/Semantics/io08.f90
The file was modifiedflang/test/Semantics/modfile34.f90
The file was modifiedflang/test/Semantics/assign03.f90
The file was modifiedflang/test/Semantics/resolve39.f90
The file was modifiedflang/test/Semantics/OpenACC/acc-wait-validity.f90
The file was modifiedflang/test/Semantics/resolve74.f90
The file was modifiedflang/test/Semantics/call04.f90
The file was modifiedflang/test/Semantics/expr-errors01.f90
The file was modifiedflang/test/Semantics/symbol10.f90
The file was modifiedflang/test/Semantics/modfile06.f90
The file was modifiedflang/test/Semantics/omp-depend02.f90
The file was modifiedflang/test/Semantics/omp-symbol07.f90
The file was modifiedflang/test/Semantics/resolve72.f90
The file was modifiedflang/test/Evaluate/folding05.f90
The file was modifiedflang/test/Semantics/if_arith04.f90
The file was modifiedflang/test/Semantics/omp-simd-aligned.f90
The file was modifiedflang/test/Semantics/omp-no-dowhile-in-parallel.f90
The file was modifiedflang/test/Semantics/resolve75.f90
The file was modifiedflang/test/Semantics/allocate09.f90
The file was modifiedflang/test/Semantics/select-rank.f90
The file was modifiedflang/test/Semantics/resolve71.f90
The file was modifiedflang/test/Semantics/coarrays01.f90
The file was modifiedflang/test/Semantics/resolve51.f90
The file was modifiedflang/test/Semantics/resolve11.f90
The file was modifiedflang/test/Semantics/dosemantics05.f90
The file was modifiedflang/test/Evaluate/folding07.f90
The file was modifiedflang/test/Semantics/call13.f90
The file was modifiedflang/test/Semantics/doconcurrent01.f90
The file was modifiedflang/test/Semantics/init01.f90
The file was modifiedflang/test/Semantics/modfile04.f90
The file was modifiedflang/test/Semantics/resolve46.f90
The file was modifiedflang/test/Semantics/omp-private03.f90
The file was modifiedflang/test/Semantics/block-data01.f90
The file was modifiedflang/test/Semantics/associated.f90
The file was modifiedflang/test/Semantics/resolve94.f90
Commit 055770d5bcee81dfbfe2c90493678e674e51fe9a by thakis
Reland "[gn build] port d1d36f7ad (llvm-tapi-diff)"

This reverts commit d84ed15c649616a50abdd7fbd9b28ddebb9f432c
The original change relanded in 5b5ab80e3195.
The file was modifiedllvm/utils/gn/secondary/llvm/test/BUILD.gn
The file was addedllvm/utils/gn/secondary/llvm/tools/llvm-tapi-diff/BUILD.gn
Commit a9e4f91adf59bbc72541b96dd30245eaeeedf3ce by tbaeder
[llvm][PPC] Add missing case for 'I' asm memory operands

From https://llvm.org/docs/LangRef.html#asm-template-argument-modifiers:

I: Print the letter ‘i’ if the operand is an integer constant,
otherwise nothing. Used to print ‘addi’ vs ‘add’ instructions.

Differential Revision: https://reviews.llvm.org/D103968
The file was addedllvm/test/CodeGen/PowerPC/asm-template-I.ll
The file was modifiedllvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
Commit ec43c1213a16969aeec6ac7a5b894ec1389e4d71 by esme.yi
[NFC][XCOFF] Replace structs FileHeader32/SectionHeader32 with constants.

Summary: Some structs like FileHeader32/SectionHeader32
defined in llvm/include/llvm/BinaryFormat/XCOFF.h seem
unnecessary, because we only need their size. So this
patch removes them and defines size constants directly.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D103901
The file was modifiedllvm/lib/ObjectYAML/XCOFFEmitter.cpp
The file was modifiedllvm/lib/MC/XCOFFObjectWriter.cpp
The file was modifiedllvm/include/llvm/BinaryFormat/XCOFF.h
Commit e0569033e21ded970783cab557ba034b134b9c69 by gchatelet
[llvm] Make Sequence reverse-iterable

This is a roll forward of D102679.
This patch simplifies the implementation of Sequence and makes it compatible with llvm::reverse.
It exposes the reverse iterators through rbegin/rend which prevents a dangling reference in std::reverse_iterator::operator++().

Note: Compared to D102679, this patch introduces a `asSmallVector()` member function and fixes compilation issue with GCC 5.

Differential Revision: https://reviews.llvm.org/D103948
The file was modifiedmlir/lib/Conversion/PDLToPDLInterp/PDLToPDLInterp.cpp
The file was modifiedmlir/include/mlir/IR/BuiltinAttributes.td
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
The file was modifiedllvm/unittests/ADT/SequenceTest.cpp
The file was modifiedllvm/include/llvm/ADT/Sequence.h
Commit 3c1f0e9ef89f7c49fdf383e6b01a61be04614a38 by caroline.concatto
[InstSimplify] Add constant fold for extractelement + splat for scalable vectors

This patch allows that scalable vector can fold extractelement and constant splat
only when the lane index is lower than the minimum number of elements of the vector.

Differential Revision: https://reviews.llvm.org/D103180
The file was modifiedllvm/lib/IR/ConstantFold.cpp
The file was modifiedllvm/test/Transforms/InstCombine/gep-vector-indices.ll
The file was modifiedllvm/test/Transforms/InstSimplify/ConstProp/extractelement-vscale.ll
Commit 00ebbedd1c92f7461f81e79bd1474e894fd25378 by epastor
[ms] [llvm-ml] Make variable redefinition match ML.EXE

MASM specifies that all variable definitions are redefinable, except for EQU definitions to expressions. (TEXTEQU is unspecified, but appears to be fully redefinable as well.)

Also, in practice, ML.EXE allows redefinitions where the value doesn't change.

Make variable redefinition possible for text macros, suppressing expansion if written as the first argument to an EQU or TEXTEQU directive.

Reviewed By: thakis

Differential Revision: https://reviews.llvm.org/D103993
The file was modifiedllvm/lib/MC/MCParser/MasmParser.cpp
The file was addedllvm/test/tools/llvm-ml/variable_redef_errors.asm
The file was addedllvm/test/tools/llvm-ml/variable_redef.asm
Commit 1ad52105eb88bb25cb5a22e15df2ef442f553645 by caroline.concatto
[InstCombine] Add fold for extracting known elements from a stepvector

This patch allows folding stepvector + extract to the lane when the lane is
lower than the minimum size of the scalable vector. This fold is possible
because lane X of a stepvector is also X!
For instance, extracting element 3 of a <vscale x 4 x i64>stepvector is 3.

Differential Revision: https://reviews.llvm.org/D103153
The file was modifiedllvm/test/Transforms/InstCombine/vscale_extractelement.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
Commit 89c41c335dac288d991d1e99ad19493bc89439e4 by gchatelet
[clang-tidy] Allow disabling integer narrowing conversions for cppcoreguidelines-narrowing-conversions

Differential Revision: https://reviews.llvm.org/D104018
The file was modifiedclang-tools-extra/clang-tidy/cppcoreguidelines/NarrowingConversionsCheck.h
The file was addedclang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines-narrowing-conversions-narrowinginteger-option.cpp
The file was modifiedclang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines-narrowing-conversions.rst
The file was modifiedclang-tools-extra/clang-tidy/cppcoreguidelines/NarrowingConversionsCheck.cpp
Commit cc86b87a57000ba673edaf95f65913412928f003 by spatel
[CodeGen] limit tests to current pass manager to avoid variability; NFC

Post-commit feedback for d69c4372bfbe says the output
may vary between pass managers. This is hopefully a
quick fix, but we might want to investigate how to
better solve this type of problem.
The file was modifiedclang/test/CodeGen/arm-bf16-dotprod-intrinsics.c
The file was modifiedclang/test/CodeGen/aarch64-bf16-getset-intrinsics.c
The file was modifiedclang/test/CodeGen/arm-bf16-convert-intrinsics.c
The file was modifiedclang/test/CodeGen/aarch64-bf16-lane-intrinsics.c
The file was modifiedclang/test/CodeGen/aarch64-bf16-dotprod-intrinsics.c
The file was modifiedclang/test/CodeGen/arm-bf16-getset-intrinsics.c
Commit a95937452f237fad10e6b7e43154c17c6b8476c4 by adamcz
[clang] Make CXXDefaultArgExpr inherit dependence from the inner Expr

Before this change, CXXDefaultArgExpr would always have
ExprDependence::None. This can lead to issues when, for example, the
inner expression is RecoveryExpr and yet containsErrors() on the default
expression is false.

Differential Revision: https://reviews.llvm.org/D103982
The file was modifiedclang/include/clang/AST/ExprCXX.h
The file was addedclang/test/AST/ast-dump-default-arg-dep.cpp
The file was modifiedclang/include/clang/AST/ComputeDependence.h
The file was modifiedclang/lib/AST/ComputeDependence.cpp
Commit 0c32ffceedca2a0d7026fc142bab8ac259131386 by huberjn
[OpenMP] Add type to firstprivate symbol for const firstprivate values

Clang will create a global value put in constant memory if an aggregate value
is declared firstprivate in the target device. The symbol name only uses the
name of the firstprivate variable, so symbol name conflicts will occur if the
variable is allowed to have different types through templates. An example of
this behvaiour is shown in https://godbolt.org/z/EsMjYh47n. This patch adds the
mangled type name to the symbol to avoid such naming conflicts. This fixes
https://bugs.llvm.org/show_bug.cgi?id=50642.

Reviewed By: ABataev

Differential Revision: https://reviews.llvm.org/D103995
The file was modifiedclang/test/OpenMP/nvptx_target_firstprivate_codegen.cpp
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntime.cpp
Commit 734213d7b51f9ea22a9d122c0646ca5b69f88ac8 by Yaxun.Liu
Fix test hip-device-compile.hip

Add stricter check for 'ld'.
The file was modifiedclang/test/Driver/hip-device-compile.hip
Commit 8daac3714083aa5507622dba858344051f6b5574 by melanie.blower
[clang][FPEnv] Clang floatng point model ffp-model=precise enables ffp-contract=on

This patch changes the ffp-model=precise to enables -ffp-contract=on
(previously -ffp-model=precise enabled -ffp-contract=fast). This is a
follow-up to Andy Kaylor's comments in the llvm-dev discussion
"Floating Point semantic modes". From the same email thread, I put
Andy's distillation of floating point options and floating point modes
into UsersManual.rst

Differential Revision: https://reviews.llvm.org/D74436
The file was modifiedclang/test/Driver/fp-model.c
The file was modifiedclang/docs/UsersManual.rst
The file was modifiedclang/test/CodeGen/ffp-contract-option.c
The file was modifiedclang/test/CodeGen/ppc-emmintrin.c
The file was modifiedclang/test/CodeGen/ppc-xmmintrin.c
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
Commit db9ba830d4b3005a7b78f43ef055e7c490b526b4 by david.green
[ARM] MVE VPT block tests with debug info. NFC
The file was addedllvm/test/CodeGen/Thumb2/mve-vpt-block-debug.mir
Commit 9872551ca09b60f24d9090e7681de6fc9627ce33 by david.green
[ARM] Skip debug during vpt block creation

Debug info is currently preventing VPT block creation, leading to
different codegen. This patch attempts to skip any debug instructions
during vpt block creation, making sure they do not interfere.

Differential Revision: https://reviews.llvm.org/D103610
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vpt-block-debug.mir
The file was modifiedllvm/lib/Target/ARM/MVEVPTBlockPass.cpp
Commit de79919e9ec9c5ca1aaec54ca0a5f959739d48da by irina.dobrescu
[AArch64] Add cost tests for bitreverse

This patch includes cost tests for bit reverse as well as some adjustments to the cost model.

Differential Revision: https://reviews.llvm.org/D102755
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/AArch64/bitreverse.ll
Commit 407c11b56337aab1b0c9880aa2f6ad1a348083c8 by Paul C. Anagnostopoulos
[TableGen] Eliminate dead code in ParseForeachDeclaration [NFC]

Differential Revision: https://reviews.llvm.org/D103904
The file was modifiedllvm/lib/TableGen/TGParser.cpp
Commit 7f0244afa828e0ef725a3f951304577090495713 by xingxue
    [libc++abi] NFC: adding a new parameter base to functions for calculating addresses with relative encodings

    Summary:
    This NFC patch adds a new parameter base to functions invoked by scan_eh_tab() for calculating the address of the encoding with a relative value. base defaults to 0. This is in preparation for the AIX implementation which uses the DW_EH_PE_datarel encoding.

    Reviewed by: MaskRay, sfertile, compnerd, libc++abi

    Differential Revision: https://reviews.llvm.org/D101545
The file was modifiedlibcxxabi/src/cxa_personality.cpp
Commit 63233da7230a9c7c674483ccc75976aba07197cb by yuanke.luo
[X86][NFC] Fix typo.
The file was modifiedllvm/lib/Target/X86/X86FastTileConfig.cpp
The file was modifiedllvm/lib/Target/X86/X86LowerAMXType.cpp
Commit 49eba8bf1780684f1173a455b909ce37008eaa09 by adamcz
[clang] Do not crash when ArgTy is null in CheckArgAlignment

This can happen around RecoveryExpr.

Differential Revision: https://reviews.llvm.org/D103825
The file was modifiedclang/lib/Sema/SemaChecking.cpp
The file was modifiedclang/test/SemaCXX/recovery-expr-type.cpp
Commit 9833b57981c4e9402a326b5acd805e074cd2c802 by markus.boeck02
[clang][driver] Add -foperator-names

This patch adds the command line option -foperator-names which acts as the opposite of -fno-operator-names. With this command line option it is possible to reenable C++ operator keywords on the command line if -fno-operator-names had previously been passed.

Differential Revision: https://reviews.llvm.org/D103749
The file was modifiedclang/include/clang/Driver/Options.td
The file was addedclang/test/Driver/cxx-operator-names.cpp
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
Commit 936d6756ccfbe207a181b692b828f9fd8f1489f2 by markus.boeck02
[clang][msvc] Define _HAS_STATIC_RTTI to 0, when compiling with -fno-rtti

When using the -fno-rtti option of the GCC style clang++, using typeid results in an error. The MSVC STL however kindly provides a define flag called _HAS_STATIC_RTTI, which either enables or disables uses of typeid throughout the STL. By default, if undefined, it is set to 1, enabling the use of typeid.

With this patch, _HAS_STATIC_RTTI is set to 0 when -fno-rtti is specified. This way various headers of the MSVC STL like functional can be consumed without compilation failures.

Differential Revision: https://reviews.llvm.org/D103771
The file was addedclang/test/Driver/msvc-static-rtti.cpp
The file was modifiedclang/lib/Driver/ToolChains/MSVC.cpp
The file was modifiedclang/lib/Driver/ToolChains/MSVC.h
Commit c70b0e808da8e1650f3ee426698a8b87c94b8910 by markus.boeck02
[clang-cl] Add /permissive and /permissive-

This patch adds the command line options /permissive and /permissive- to clang-cl. These flags are used in MSVC to enable various /Zc language conformance options at once. In particular, /permissive is used to enable the various non standard behaviour of MSVC, while /permissive- is the opposite.

When either of two command lines are specified they are simply expanded to the various underlying /Zc options. In particular when /permissive is passed it currently expands to:

/Zc:twoPhase- (disable two phase lookup)
-fno-operator-names (disable C++ operator keywords)
/permissive- expands to the opposites of these flags + /Zc:strictStrings (/Zc:strictStrings- does not currently exist). In the future, if any more MSVC workarounds are ever added they can easily be added to the expansion. One is also able to override settings done by permissive. Specifying /permissive- /Zc:twoPhase- will apply the settings from permissive minus, but disables two phase lookup.

Motivation for this patch was mainly parity with MSVC as well as compatibility with Windows SDK headers. The /permissive page from MSVC documents various workarounds that have to be done for the Windows SDK headers [1], when MSVC is used with /permissive-. In these, Microsoft often recommends simply compiling with /permissive for the specified source files. Since some of these also apply to clang-cl (which acts like /permissive- by default mostly), and some are currently implemented as "hacks" within clang that I'd like to remove, adding /permissive and /permissive- to be in full parity with MSVC and Microsofts documentation made sense to me.

[1] https://docs.microsoft.com/en-us/cpp/build/reference/permissive-standards-conformance?view=msvc-160#windows-header-issues

Differential Revision: https://reviews.llvm.org/D103773
The file was addedclang/test/Driver/cl-permissive.c
The file was modifiedclang/include/clang/Driver/Options.td
The file was modifiedclang/lib/Driver/ToolChains/MSVC.cpp
Commit 3dceffd0fdbc8bfb3b5377b5bbe21b50d443ff43 by benny.kra
[AArch64] Silence fallthrough warning. NFC.

AArch64TargetTransformInfo.cpp:302:3: warning: unannotated fall-through between switch labels [-Wimplicit-fallthrough]
  default:
    ^
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
Commit 3b46283c1539f89619f2b40ab7732f434d7c68ff by gbreynoo
[docs][llvm-ar] Add rsp-quoting option to the llvm-ar command guide.

I noticed that I did not update the command guide when introducing the
--rsp-quoting option. This change fixes this.

Differential Revision: https://reviews.llvm.org/D103915
The file was modifiedllvm/docs/CommandGuide/llvm-ar.rst
Commit 428a62f65f16f1640b1bfe033d20e6a4f545dd3e by thomasraoux
[mlir][gpu] Add op to create MMA constant matrix

This allow creating a matrix with all elements set to a given value. This is
needed to be able to implement a simple dot op.

Differential Revision: https://reviews.llvm.org/D103870
The file was modifiedmlir/include/mlir/Dialect/GPU/GPUOps.td
The file was modifiedmlir/test/Dialect/GPU/ops.mlir
The file was modifiedmlir/test/Conversion/GPUToNVVM/wmma-ops-to-nvvm.mlir
The file was modifiedmlir/lib/Conversion/GPUToNVVM/WmmaOpsToNvvm.cpp
Commit 026170d17d1eb8956237ba88c07a60f07445ebf1 by keithbsmiley
Fix range-loop-analysis warning

```
llvm-project/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp:8024:19: warning: loop variable 'VF' of type 'const llvm::ElementCount' creates a copy from type 'const llvm::ElementCount' [-Wrange-loop-analysis]
  for (const auto VF : VFCandidates) {
                  ^
llvm-project/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp:8024:8: note: use reference type 'const llvm::ElementCount &' to prevent copying
  for (const auto VF : VFCandidates) {
       ^~~~~~~~~~~~~~~
                  &
1 warning generated.
```

Differential Revision: https://reviews.llvm.org/D103970
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Commit 3a7a7749417854827cf621eaef6012d31e7a82ab by aaron
Add a page to track the status of C proposals in Clang.
The file was modifiedclang/www/menu.html.incl
The file was addedclang/www/c_status.html
Commit 75d4f55d150cd3d38797ec228fc871bed93b8540 by daltenty
[AIX] Build libLTO as MODULE rather than SHARED

On CMake versions greater that >= 3.16 on AIX, shared libraries are
created as archives (which is the normal form for the platform). However
plugins libraries which are passed directly to a executable, like
libLTO to the linker, are usual build as plain `.so`, so this patch
restores this behaviour for libLTO on AIX (and adjust the name if need be
to account for the fact that llvm_add_library likes to force an empty
name prefix on modules), so we end up with the expected libLTO.so

Reviewed By: w2yehia

Differential Revision: https://reviews.llvm.org/D103824
The file was modifiedllvm/tools/lto/CMakeLists.txt
Commit c3cc14f87f78f8172b74175bbd2557cfb9384900 by melanie.blower
Revert "[clang][FPEnv] Clang floatng point model ffp-model=precise enables ffp-contract=on"

This reverts commit 8daac3714083aa5507622dba858344051f6b5574.
The build bots are showing some fails on broadwell and arm.
Fix to LNT test suite needs work.
The file was modifiedclang/docs/UsersManual.rst
The file was modifiedclang/test/Driver/fp-model.c
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedclang/test/CodeGen/ffp-contract-option.c
The file was modifiedclang/test/CodeGen/ppc-xmmintrin.c
The file was modifiedclang/test/CodeGen/ppc-emmintrin.c
Commit a0ae3b0789140ee9238c3052b2231ceaa777e82f by Louis Dionne
[libc++abi] Remove the LIBCXXABI_ENABLE_PIC option

Instead, people should be using CMAKE_POSITION_INDEPENDENT_CODE to control
whether they want to use PIC or not. We should try to avoid reinventing
the wheel whenever CMake natively supports something.

This makes libc++abi consistent with libc++ and libunwind.

Differential Revision: https://reviews.llvm.org/D103973
The file was modifiedlibcxxabi/src/CMakeLists.txt
The file was modifiedlibcxx/cmake/caches/Apple.cmake
The file was modifiedlibcxxabi/CMakeLists.txt
The file was modifiedlibcxx/docs/ReleaseNotes.rst
Commit cfbf61cd5994985cec81068e17c0c98773af543b by Jonas Devlieghere
[lldb] Add 9494c510af56 to .git-blame-ignore-revs

Adding 9494c510af56 to .git-blame-ignore-revs after having let it simmer
for a day.
The file was modified.git-blame-ignore-revs
Commit 0112f6ac71517de7767296eda1db26cc4bdb14ee by llvm-project
[Flang][Runtime][tests] Escape regex special character.

The second argument of `ASSERT_DEATH` describes a regular expression, in
which parentheses have special meaning. Matches of literal parentheses
need to be escaped.

Fixes failure of InvalidFormatFailure.ParenMismatch and
InvalidFormatFailure.ParenMismatch when gtest is compiled with MSVC's
regex implementation.

Reviewed By: awarzynski

Differential Revision: https://reviews.llvm.org/D104011
The file was modifiedflang/unittests/RuntimeGTest/Format.cpp
Commit 4d11ba38b47de1da1cee156a8bf8b5d3447326b9 by thakis
[gn build] minor TODO.txt update
The file was modifiedllvm/utils/gn/TODO.txt
Commit a0bd24453b14d04666ed29f856387ead5c87205b by unknown
[flang] Fixed simple typo in runtime code

Reviewed By: klausler

Differential Revision: https://reviews.llvm.org/D104034
The file was modifiedflang/runtime/random.cpp
Commit a893b441873d4dd0ba849a722797f40da8600c39 by a.bataev
[SLP]Disable scheduling of insertelements.

There is no need to schedule insertelement instructions. The compiler
did not schedule them before it started support their vectorization and
it should not do it after. We pre-schedule them manually when finding
a build vector sequence.
Disabling scheduling of insertelement instructions improves compile
time and vectorization of the very large basic blocks by saving
scheduling budget for other instructions.

Differential Revision: https://reviews.llvm.org/D104026
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/insert-element-build-vector.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/insert-element-build-vector-inseltpoison.ll
Commit 1b894ccdc9ee8419e81499b2d394a00c0b880db1 by Jessica Paquette
[AArch64][GlobalISel] Mark some G_BITREVERSE types as legal + select them

We fall back on G_CTTZ_ZERO_UNDEF a lot when building clang for arm64 with
gisel.

Handling this will require that we can handle G_BITREVERSE.

This patch marks G_BITREVERSE instructions with natively supported types as
legal. We get selection on these types for free via the importer.

Differential Revision: https://reviews.llvm.org/D103999
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/select-bitreverse.mir
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/legalize-bitreverse.mir
Commit ff81a2c95ddb944c61c162baec3521d9dd62c2cc by riddleriver
[mlir-lsp-server] Add support for textDocument/documentSymbols

This allows for building an outline of the symbols and symbol tables within the IR. This allows for easy navigations to functions/modules and other symbol/symbol table operations within the IR.

Differential Revision: https://reviews.llvm.org/D103729
The file was addedmlir/test/mlir-lsp-server/document-symbols.test
The file was modifiedmlir/lib/Tools/mlir-lsp-server/lsp/Transport.cpp
The file was modifiedmlir/include/mlir/Parser/AsmParserState.h
The file was modifiedmlir/lib/Tools/mlir-lsp-server/MLIRServer.h
The file was modifiedmlir/test/mlir-lsp-server/initialize-params.test
The file was modifiedmlir/lib/Tools/mlir-lsp-server/MLIRServer.cpp
The file was modifiedmlir/lib/Tools/mlir-lsp-server/lsp/Protocol.h
The file was modifiedmlir/lib/Tools/mlir-lsp-server/LSPServer.cpp
The file was modifiedmlir/lib/Parser/Parser.cpp
The file was modifiedmlir/lib/Tools/mlir-lsp-server/lsp/Protocol.cpp
The file was modifiedmlir/lib/Parser/AsmParserState.cpp
Commit bb97959949ff68aa7e001bab2be1b5be4d6d389a by riddleriver
[mlir-lsp-server] Document the features provided by the language server

This revision adds focused documentation on each of the individual features of the server, with images showcasing how they look in vscode.

Differential Revision: https://reviews.llvm.org/D103942
The file was modifiedmlir/docs/Tools/MLIRLSP.md
Commit ca10add5dbe4c3fb2ccaa032d9c7f3e13ca4b14b by stilis
[lldb, win] Remove obsolete workaround for MSVC and python libs

This workaround was necessary before the major changes of managing python versions, but it is not needed anymore.

Reviewed By: JDevlieghere

Differential Revision: https://reviews.llvm.org/D104047
The file was modifiedlldb/source/API/CMakeLists.txt
Commit f03a3caac5e5ac9a440bea1b8ad1485c714f156b by epastor
[ms] [llvm-ml] Warn on command-line redefinition

If a macro is defined on the command line and then overridden in the source code, this is likely to be an error in the user's build system. We should warn on this.

Reviewed By: thakis

Differential Revision: https://reviews.llvm.org/D104008
The file was modifiedllvm/lib/MC/MCParser/MasmParser.cpp
The file was addedllvm/test/tools/llvm-ml/command_line_defines_errors.asm
The file was modifiedllvm/test/tools/llvm-ml/command_line_defines.asm
Commit c0e6f2f43a4cf894173b78cc95b6c29c9fe1ab94 by riddleriver
[mlir-vscode] Fix dependencies to enable packaging the extension properly.
The file was modifiedmlir/utils/vscode/package-lock.json
The file was modifiedmlir/utils/vscode/package.json
Commit 4e5f8b4d8d9d7a6039e10b9507dac896eed92040 by lntue
[libc] Add implementation of expm1f.

Use expm1f(x) = exp(x) - 1 for |x| > ln(2).
For |x| <= ln(2), divide it into 3 subintervals: [-ln2, -1/8], [-1/8, 1/8], [1/8, ln2]
and use a degree-6 polynomial approximation generated by Sollya's fpminmax for each interval.
Errors < 1.5 ULPs when we use fma to evaluate the polynomials.

Differential Revision: https://reviews.llvm.org/D101134
The file was modifiedlibc/test/src/math/exhaustive/CMakeLists.txt
The file was addedlibc/utils/FPUtil/PolyEval.h
The file was addedlibc/utils/mathtools/expm1f.sollya
The file was addedlibc/src/math/expm1f.h
The file was modifiedlibc/utils/FPUtil/CMakeLists.txt
The file was modifiedlibc/src/math/CMakeLists.txt
The file was addedlibc/test/src/math/expm1f_test.cpp
The file was modifiedlibc/utils/FPUtil/generic/FMA.h
The file was modifiedlibc/test/src/math/CMakeLists.txt
The file was addedlibc/test/src/math/exhaustive/expm1f_test.cpp
The file was modifiedlibc/test/src/math/differential_testing/CMakeLists.txt
The file was modifiedlibc/utils/MPFRWrapper/MPFRUtils.cpp
The file was addedlibc/test/src/math/differential_testing/expm1f_perf.cpp
The file was modifiedlibc/config/linux/x86_64/entrypoints.txt
The file was modifiedlibc/utils/FPUtil/BitPatterns.h
The file was modifiedlibc/spec/stdc.td
The file was addedlibc/test/src/math/differential_testing/expm1f_diff.cpp
The file was modifiedlibc/config/linux/aarch64/entrypoints.txt
The file was modifiedlibc/utils/MPFRWrapper/MPFRUtils.h
The file was addedlibc/src/math/generic/expm1f.cpp
The file was modifiedlibc/src/math/generic/CMakeLists.txt
Commit 4b5c6c5c4b9293557ec8e76d6500527e5d8f9611 by jezng
[lld-macho][nfc] Fix uninitialized members warning from Coverity

We were always assigning to this member before using it, but just to be
safe...

See https://lists.llvm.org/pipermail/llvm-dev/2021-June/151029.html
The file was modifiedlld/MachO/InputSection.h
Commit e0c605f6383c5a3aa8f5fa34ed4be9dc51b4a2ae by david.green
[ARM] Ensure instructions are simplified prior to GatherScatter lowering.

Surprisingly, not all instructions are always simplified after unrolling
and before MVE gather/scatter lowering. Notably dead gather operations
can be left around which cause the gather/scatter lowering pass to crash
if there are multiple gathers, some of which are dead.

This patch ensures they are simplified before we modify anything, which
can change some of the existing tests, including making them no-longer
test what they originally tested. This uses a combination of disabling
the gather/scatter lowering pass and adjusting the test to keep them as
before.

Differential Revision: https://reviews.llvm.org/D103150
The file was addedllvm/test/CodeGen/Thumb2/mve-gather-unused.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-gather-scatter-optimisation.ll
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/remat-vctp.ll
The file was modifiedllvm/test/CodeGen/Thumb2/lsll0.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-phireg.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vqdmulh.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-selectcc.ll
The file was modifiedllvm/lib/Target/ARM/MVEGatherScatterLowering.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-xor.ll
Commit a22236120f17074532bec70f5916a235beddd475 by llvm-project
[OpenMP] Implement '#pragma omp unroll'.

Implementation of the unroll directive introduced in OpenMP 5.1. Follows the approach from D76342 for the tile directive (i.e. AST-based, not using the OpenMPIRBuilder). Tries to use `llvm.loop.unroll.*` metadata where possible, but has to fall back to an AST representation of the outer loop if the partially unrolled generated loop is associated with another directive (because it needs to compute the number of iterations).

Reviewed By: ABataev

Differential Revision: https://reviews.llvm.org/D99459
The file was addedclang/test/OpenMP/unroll_codegen_tile_for.cpp
The file was addedclang/test/OpenMP/unroll_codegen_for_collapse_outer.cpp
The file was modifiedclang/lib/Sema/SemaOpenMP.cpp
The file was addedclang/test/OpenMP/unroll_codegen_parallel_for_factor.cpp
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntime.cpp
The file was modifiedclang/lib/Serialization/ASTWriterStmt.cpp
The file was modifiedclang/lib/AST/StmtProfile.cpp
The file was modifiedclang/lib/CodeGen/CGStmt.cpp
The file was modifiedclang/include/clang/AST/RecursiveASTVisitor.h
The file was addedclang/test/OpenMP/unroll_codegen_partial.cpp
The file was modifiedclang/lib/Serialization/ASTWriter.cpp
The file was modifiedclang/lib/Sema/TreeTransform.h
The file was addedclang/test/OpenMP/unroll_messages.cpp
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/lib/Serialization/ASTReader.cpp
The file was modifiedclang/tools/libclang/CIndex.cpp
The file was modifiedclang/include/clang/AST/StmtOpenMP.h
The file was modifiedclang/lib/AST/OpenMPClause.cpp
The file was addedclang/test/OpenMP/unroll_ast_print.cpp
The file was modifiedclang/include/clang/Basic/StmtNodes.td
The file was modifiedclang/lib/Sema/SemaExceptionSpec.cpp
The file was modifiedclang/lib/StaticAnalyzer/Core/ExprEngine.cpp
The file was modifiedllvm/include/llvm/Frontend/OpenMP/OMP.td
The file was addedclang/test/OpenMP/unroll_codegen_for_partial.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was modifiedclang/include/clang/Serialization/ASTBitCodes.h
The file was modifiedclang/lib/CodeGen/CodeGenFunction.h
The file was modifiedclang/include/clang-c/Index.h
The file was modifiedclang/lib/Basic/OpenMPKinds.cpp
The file was addedclang/test/OpenMP/unroll_codegen_full.cpp
The file was modifiedclang/lib/CodeGen/CGStmtOpenMP.cpp
The file was modifiedclang/lib/Serialization/ASTReaderStmt.cpp
The file was modifiedclang/include/clang/AST/OpenMPClause.h
The file was addedclang/test/OpenMP/unroll_codegen_heuristic.cpp
The file was modifiedclang/tools/libclang/CXCursor.cpp
The file was modifiedclang/lib/AST/StmtOpenMP.cpp
The file was modifiedclang/lib/AST/StmtPrinter.cpp
The file was modifiedclang/lib/Parse/ParseOpenMP.cpp
The file was addedclang/test/OpenMP/unroll_codegen_factor.cpp
The file was addedclang/test/OpenMP/unroll_codegen_unroll_for.cpp
Commit bbb3d03f93b86ccef7581f34c7582ebd70c80a19 by cjdb
[libcxx][ranges][nfc] moves view concepts into `__ranges/concepts.h`
The file was modifiedlibcxx/include/CMakeLists.txt
The file was removedlibcxx/include/__ranges/view.h
The file was addedlibcxx/include/__ranges/enable_view.h
The file was modifiedlibcxx/include/__ranges/view_interface.h
The file was modifiedlibcxx/include/ranges
The file was modifiedlibcxx/include/__ranges/concepts.h
Commit 14097fbb0818dab80676c0cd909116b1720f2c9f by llvmgnsyncbot
[gn build] Port bbb3d03f93b8
The file was modifiedllvm/utils/gn/secondary/libcxx/include/BUILD.gn
Commit b6ee5f2b1df66987e65e1b636ba9ae1554b0334b by listmail
Move code for checking loop metadata into Analysis [nfc]

I need the mustprogress loop metadata in ScalarEvolution and it makes sense to keep all the accessors for quering loop metadate together.
The file was modifiedllvm/include/llvm/Transforms/Utils/LoopUtils.h
The file was modifiedllvm/lib/Analysis/LoopInfo.cpp
The file was modifiedllvm/lib/Transforms/Utils/LoopUtils.cpp
The file was modifiedllvm/include/llvm/Analysis/LoopInfo.h
Commit 1d3873d41eca67e974bafbaa91866581bcc0d973 by saugustine
Move variable only used inside an assert into the assert.

This prevents build failures with -Wunused.
The file was modifiedclang/lib/Serialization/ASTReaderStmt.cpp
Commit aaaeb4b160fe94e0ad3bcd6073eea4807f84a33a by listmail
[SCEV] Use mustprogress flag on loops (in addition to function attribute)

This addresses a performance regression reported against 3c6e4191.  That change (correctly) limited a transform based on assumed finiteness to mustprogress loops, but the previous change (38540d7) which introduced the mustprogress check utility only handled function attributes, not the loop metadata form.

It turns out that clang uses the function attribute form for C++, and the loop metadata form for C.  As a result, 3c6e4191 ended up being a large regression in practice for C code as loops weren't being considered mustprogress despite the language semantics.
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was modifiedllvm/test/Analysis/ScalarEvolution/trip-count-unknown-stride.ll
Commit c03b6305d8419fda84a67f4fe357b69a86e4b54f by i
[ELF][RISCV] Resolve branch relocations referencing undefined weak to current location if not using PLT

In a -no-pie link we optimize R_PLT_PC to R_PC. Currently we resolve a branch
relocation to the link-time zero address. However such a choice tends to cause
relocation overflow possibility for RISC architectures.

* aarch64: GNU ld: rewrite the instruction to a NOP; ld.lld: branch to the next instruction
* mips: GNU ld: branch to the start of the text segment (?); ld.lld: branch to zero
* ppc32: GNU ld: rewrite the instruction to a NOP; ld.lld: branch to the current instruction
* ppc64: GNU ld: rewrite the instruction to a NOP; ld.lld: branch to the current instruction
* riscv: GNU ld: branch to the absolute zero address (with instruction rewriting)
* i386/x86_64: GNU ld/ld.lld: branch to the link-time zero address

I think that resolving to the same location is a good choice. The instruction,
if triggered, is clearly an undefined behavior. Resolving to the same location
can cause an infinite loop (making the user aware of the issue) while ensuring
no overflow.

Reviewed By: jrtc27

Differential Revision: https://reviews.llvm.org/D103001
The file was modifiedlld/ELF/InputSection.cpp
The file was modifiedlld/test/ELF/riscv-undefined-weak.s
Commit 0995bbdb66ebd91097c344dfc6529cd05de4818d by i
[ELF] Simplify getAArch64UndefinedRelativeWeakVA. NFC
The file was modifiedlld/ELF/InputSection.cpp
Commit 859c924c5fd58865e824b02c8bea40e7cb55456e by Louis Dionne
[libc++] Remove unnecessary header in enable_view.h (which caused a cycle)
The file was modifiedlibcxx/include/__ranges/enable_view.h
Commit 7629b2a09c169bfd7f7295deb3678f3fa7755eee by listmail
[LI] Add a cover function for checking if a loop is mustprogress [nfc]

Essentially, the cover function simply combines the loop level check and the function level scope into one call.  This simplifies several callers and is (subjectively) less error prone.
The file was modifiedllvm/lib/Analysis/LoopInfo.cpp
The file was modifiedllvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was modifiedllvm/include/llvm/Analysis/LoopInfo.h
The file was modifiedllvm/lib/Transforms/Utils/LoopUtils.cpp
Commit 5d5b686f6bf6b15b8fbd9ccf957295397f27afc9 by david.green
[ARM] Fix Changed status in MVEGatherScatterLoweringPass.

Now that we are calling SimplifyInstructionsInBlock, make sure we update
Changed when it reports alterations.
The file was modifiedllvm/lib/Target/ARM/MVEGatherScatterLowering.cpp
Commit 667fbcdd0b2ee5e78f5ce9789b862e3bbca94644 by mizvekov
[clang] NRVO: Improvements and handling of more cases.

This expands NRVO propagation for more cases:

Parse analysis improvement:
* Lambdas and Blocks with dependent return type can have their variables
  marked as NRVO Candidates.

Variable instantiation improvements:
* Fixes crash when instantiating NRVO variables in Blocks.
* Functions, Lambdas, and Blocks which have auto return type have their
  variables' NRVO status propagated. For Blocks with non-auto return type,
  as a limitation, this propagation does not consider the actual return
  type.

This also implements exclusion of VarDecls which are references to
dependent types.

Signed-off-by: Matheus Izvekov <mizvekov@gmail.com>

Reviewed By: Quuxplusone

Differential Revision: https://reviews.llvm.org/D99696
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/lib/Sema/SemaStmt.cpp
The file was modifiedclang/lib/Sema/SemaExprCXX.cpp
The file was modifiedclang/lib/Sema/SemaTemplateInstantiateDecl.cpp
The file was modifiedclang/test/CodeGen/nrvo-tracking.cpp
The file was modifiedclang/lib/Sema/SemaCoroutine.cpp
The file was modifiedclang/lib/Sema/Sema.cpp
Commit 7b969ef8b4eb93d7a2be093b27280f12b8cd9ccb by spatel
[SimplifyCFG] avoid 'tmp' variables in test file; NFC
The file was modifiedllvm/test/Transforms/SimplifyCFG/two-entry-phi-return.ll
Commit 4f01122c3f6c70beee8f736f196a09976602685f by joachim
[LV] Parallel annotated loop does not imply all loads can be hoisted.

As noted in https://bugs.llvm.org/show_bug.cgi?id=46666, the current behavior of assuming if-conversion safety if a loop is annotated parallel (`!llvm.loop.parallel_accesses`), is not expectable, the documentation for this behavior was since removed from the LangRef again, and can lead to invalid reads.
This was observed in POCL (https://github.com/pocl/pocl/issues/757) and would require similar workarounds in current work at hipSYCL.

The question remains why this was initially added and what the implications of removing this optimization would be.
Do we need an alternative mechanism to propagate the information about legality of if-conversion?
Or is the idea that conditional loads in `#pragma clang loop vectorize(assume_safety)` can be executed unmasked without additional checks flawed in general?
I think this implication is not part of what a user of that pragma (and corresponding metadata) would expect and thus dangerous.

Only two additional tests failed, which are adapted in this patch. Depending on the further direction force-ifcvt.ll should be removed or further adapted.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D103907
The file was modifiedllvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
The file was modifiedllvm/test/Transforms/LoopVectorize/X86/tail_folding_and_assume_safety.ll
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
The file was removedllvm/test/Transforms/LoopVectorize/X86/force-ifcvt.ll
Commit 20daedacca803b81db6d8773b705345702bf0fc3 by ataei
2d Arm Neon sdot op, and lowering to the intrinsic.

This adds Sdot2d op, which is similar to the usual Neon
intrinsic except that it takes 2d vector operands, reflecting the
structure of the arithmetic that it's performing: 4 separate
4-dimensional dot products, whence the vector<4x4xi8> shape.

This also adds a new pass, arm-neon-2d-to-intr, lowering
this new 2d op to the 1d intrinsic.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D102504
The file was addedmlir/lib/Conversion/ArmNeon2dToIntr/CMakeLists.txt
The file was addedmlir/lib/Conversion/ArmNeon2dToIntr/ArmNeon2dToIntr.cpp
The file was modifiedmlir/include/mlir/Conversion/Passes.h
The file was addedmlir/include/mlir/Conversion/ArmNeon2dToIntr/ArmNeon2dToIntr.h
The file was addedmlir/test/Target/LLVMIR/arm-neon-2d.mlir
The file was modifiedmlir/lib/Conversion/CMakeLists.txt
The file was modifiedmlir/include/mlir/Dialect/ArmNeon/ArmNeon.td
The file was modifiedmlir/lib/Conversion/PassDetail.h
The file was modifiedmlir/include/mlir/Conversion/Passes.td
The file was addedmlir/test/Dialect/ArmNeon/invalid.mlir
Commit 4f6ec382c8b7204f3b1f48060025f970925f5804 by gcmn
[MLIR] Document that Dialect Conversion traverses in preorder

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D102525
The file was modifiedmlir/docs/DialectConversion.md
Commit 933df6ca796c0ace889bcc64706ec53462bd859a by Jessica Paquette
[AArch64][GlobalISel] Legalize scalar G_CTTZ + G_CTTZ_ZERO_UNDEF

This adds legalization for scalar G_CTTZ and G_CTTZ_ZERO_UNDEF. Vector support
requires handling vector G_BITREVERSE, which I haven't gotten around to yet.

For G_CTTZ_ZERO_UNDEF, we just lower it to G_CTTZ.

For G_CTTZ, we match SelectionDAG's lowering to a G_BITREVERSE + G_CTLZ.

e.g. https://godbolt.org/z/nPEseYh1s

(With this patch, we have slightly worse codegen than SDAG for types smaller
than s32; it seems like we're missing a combine.)

Also, this adds in a function to build G_BITREVERSE to MachineIRBuilder.

Differential Revision: https://reviews.llvm.org/D104065
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/legalize-cttz.mir
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/legalize-cttz-zero-undef.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.h
Commit 462f8f06113616ac5646144972d3f453639aac69 by cjdb
[libcxx][ranges] removes default_initializable from weakly_incrementable and view

also:

* removes default constructors from predefined iterators
* makes span and string_view views

Partially implements P2325.
Partially resolves LWG3326.

Differential Revision: https://reviews.llvm.org/D102468
The file was modifiedlibcxx/docs/Cxx2aStatusIssuesStatus.csv
The file was modifiedlibcxx/test/std/containers/views/range_concept_conformance.compile.pass.cpp
The file was removedlibcxx/test/std/iterators/iterator.requirements/iterator.concepts/iterator.concept.winc/subsumption.compile.pass.cpp
The file was removedlibcxx/test/std/iterators/stream.iterators/ostreambuf.iterator/ostreambuf.iter.cons/default.pass.cpp
The file was modifiedlibcxx/docs/Cxx2aStatusPaperStatus.csv
The file was modifiedlibcxx/include/span
The file was modifiedlibcxx/test/std/ranges/range.req/range.view/view.compile.pass.cpp
The file was modifiedlibcxx/include/__iterator/concepts.h
The file was modifiedlibcxx/include/__ranges/enable_view.h
The file was modifiedlibcxx/test/std/ranges/range.req/range.view/view.subsumption.compile.pass.cpp
The file was removedlibcxx/test/std/iterators/predef.iterators/insert.iterators/back.insert.iter.ops/back.insert.iter.cons/default.pass.cpp
The file was modifiedlibcxx/test/std/iterators/iterator.requirements/iterator.concepts/iterator.concept.winc/weakly_incrementable.compile.pass.cpp
The file was removedlibcxx/test/std/iterators/predef.iterators/insert.iterators/front.insert.iter.ops/front.insert.iter.cons/default.pass.cpp
The file was modifiedlibcxx/include/string_view
The file was removedlibcxx/test/std/iterators/stream.iterators/ostream.iterator/ostream.iterator.cons.des/default.pass.cpp
The file was removedlibcxx/test/std/iterators/predef.iterators/insert.iterators/insert.iter.ops/insert.iter.cons/default.pass.cpp
The file was modifiedlibcxx/include/iterator
The file was modifiedlibcxx/test/std/strings/string.view/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/include/__ranges/concepts.h
Commit 41555eaf65b12db00c8a18e7fe530f72ab9ebfc0 by andrew.kaylor
Preserve more MD_mem_parallel_loop_access and MD_access_group in SROA

SROA sometimes preserves MD_mem_parallel_loop_access and MD_access_group metadata on loads/stores, and sometimes fails to do so. This change adds copying of the MD after other CreateAlignedLoad/CreateAlignedStores. Also fix a case where the metadata was being copied from a load, rather than the store.

Added a LIT test to catch one case.

Patch by Mark Mendell

Differential Revision: https://reviews.llvm.org/D103254
The file was modifiedllvm/lib/Transforms/Scalar/SROA.cpp
The file was addedllvm/test/Transforms/SROA/mem-par-metadata-sroa-cast.ll
Commit cbd0054b9eb17ec48f0702e3828209646c8f5ebd by mizvekov
[clang] Implement P2266 Simpler implicit move

This Implements [[http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2021/p2266r1.html|P2266 Simpler implicit move]].

Signed-off-by: Matheus Izvekov <mizvekov@gmail.com>

Reviewed By: Quuxplusone

Differential Revision: https://reviews.llvm.org/D99005
The file was modifiedclang/lib/Sema/SemaCoroutine.cpp
The file was modifiedclang/test/SemaCXX/deduced-return-type-cxx14.cpp
The file was modifiedclang/test/SemaCXX/coroutines.cpp
The file was modifiedclang/test/CXX/temp/temp.decls/temp.mem/p5.cpp
The file was modifiedclang/test/SemaCXX/constant-expression-cxx11.cpp
The file was modifiedclang/lib/Sema/SemaExprCXX.cpp
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/lib/Sema/SemaType.cpp
The file was modifiedclang/test/CXX/class/class.init/class.copy.elision/p3.cpp
The file was modifiedclang/lib/Sema/SemaStmt.cpp
The file was modifiedclang/test/CXX/dcl.dcl/dcl.spec/dcl.type/dcl.spec.auto/p7-cxx14.cpp
The file was modifiedclang/test/CXX/drs/dr3xx.cpp
The file was modifiedclang/test/SemaCXX/warn-return-std-move.cpp
The file was modifiedclang/test/CXX/expr/expr.prim/expr.prim.lambda/p4-cxx14.cpp
The file was modifiedclang/test/SemaCXX/constant-expression-cxx14.cpp
The file was modifiedclang/test/SemaCXX/return-stack-addr.cpp
The file was modifiedclang/test/SemaCXX/coroutine-rvo.cpp
Commit 189428c8fc2465c25efbf4f0bb73e26fecf150ce by aeubanks
[Profile] Handle invalid profile data

This mostly follows LLVM's InstrProfReader.cpp error handling.
Previously, attempting to merge corrupted profile data would result in
crashes. See https://crbug.com/1216811#c4.

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D104050
The file was modifiedcompiler-rt/test/profile/Linux/instrprof-merge-vp.c
The file was modifiedcompiler-rt/lib/profile/InstrProfiling.h
The file was modifiedcompiler-rt/lib/profile/InstrProfilingFile.c
The file was modifiedcompiler-rt/test/profile/instrprof-without-libc.c
The file was addedcompiler-rt/test/profile/Linux/corrupted-profile.c
The file was modifiedcompiler-rt/lib/profile/InstrProfilingMerge.c
The file was modifiedcompiler-rt/test/profile/instrprof-merge.c
Commit fc018ebb608ee0c1239b405460e49f1835ab6175 by ndesaulniers
[IR] make -warn-frame-size into a module attr

-Wframe-larger-than= is an interesting warning; we can't know the frame
size until PrologueEpilogueInsertion (PEI); very late in the compilation
pipeline.

-Wframe-larger-than= was propagated through CC1 as an -mllvm flag, then
was a cl::opt in LLVM's PEI pass; this meant it was dropped during LTO
and needed to be re-specified via -plugin-opt.

Instead, make it part of the IR proper as a module level attribute,
similar to D103048. Introduce -fwarn-stack-size CC1 option.

Reviewed By: rsmith, qcolombet

Differential Revision: https://reviews.llvm.org/D103928
The file was modifiedclang/include/clang/Driver/Options.td
The file was modifiedllvm/lib/IR/Module.cpp
The file was modifiedllvm/lib/CodeGen/PrologEpilogInserter.cpp
The file was modifiedllvm/include/llvm/IR/Module.h
The file was modifiedllvm/test/CodeGen/ARM/warn-stack.ll
The file was modifiedclang/test/Misc/backend-stack-frame-diagnostics-fallback.cpp
The file was modifiedclang/lib/CodeGen/CodeGenModule.cpp
The file was modifiedllvm/test/CodeGen/X86/warn-stack.ll
The file was modifiedclang/test/Frontend/backend-diagnostic.c
The file was modifiedclang/include/clang/Basic/CodeGenOptions.def
The file was addedclang/test/Driver/Wframe-larger-than.c
The file was addedllvm/test/Linker/warn-stack-frame.ll
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
Commit b73742bc8d2ec53f0892f1609837c088f9cfcf64 by aeubanks
[Profile] Remove redundant check

This is already checked outside the loop.

Followup to D104050.
The file was modifiedcompiler-rt/lib/profile/InstrProfilingMerge.c
Commit 119965865cc730060e4cc95690ee7dab91c2c440 by vkeles
LoadStoreVectorizer: support different operand orders in the add sequence match

First we refactor the code which does no wrapping add sequences
match: we need to allow different operand orders for
the key add instructions involved in the match.

Then we use the refactored code trying 4 variants of matching operands.

Originally the code relied on the fact that the matching operands
of the two last add instructions of memory index calculations
had the same LHS argument. But which operand is the same
in the two instructions is actually not essential, so now we allow
that to be any of LHS or RHS of each of the two instructions.
This increases the chances of vectorization to happen.

Reviewed By: volkan

Differential Revision: https://reviews.llvm.org/D103912
The file was modifiedllvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
The file was modifiedllvm/test/Transforms/LoadStoreVectorizer/X86/vectorize-i8-nested-add.ll
Commit 5a1589fc6d1131e6d73c498cc5987433d1c5e098 by wolfgang_pieb
[static initializers] Emit global_ctors and global_dtors in reverse order when .ctors/.dtors are used.

Reviewed By: rnk, MaskRay, efriedma

Differential Revision: https://reviews.llvm.org/D103495
The file was modifiedllvm/test/CodeGen/X86/constructor.ll
The file was modifiedllvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
The file was modifiedllvm/test/CodeGen/SPARC/constructor.ll
The file was modifiedllvm/test/CodeGen/X86/2011-08-29-InitOrder.ll
Commit ffaca140d01b0b93723c3322b08351b03b95831f by ndesaulniers
[IR] Value: Fix OpCode checks

Value::SubclassID cannot be directly compared to Instruction enums, such as
Instruction::{Call,Invoke,CallBr}. We have to first subtract InstructionVal
from the SubclassID to get the OpCode, similar to Instruction::getOpCode().

Reviewed By: nickdesaulniers

Differential Revision: https://reviews.llvm.org/D104043
The file was modifiedllvm/lib/IR/Value.cpp
Commit b35a842581f089daa57dd7e6b78ccb08d92709b2 by craig.topper
[RISCV] Add test cases that show failure to use some W instructions if they are proceeded by a load. NFC

The loads end up becoming sextload/zextload which prevent our
isel patterns from finding the sign_extend_inreg or AND instruction
we need.

The easiest way to fix this is to use computeKnownBits or
ComputeNumSignBits in our isel matching to catch this.
The file was modifiedllvm/test/CodeGen/RISCV/half-convert.ll
The file was modifiedllvm/test/CodeGen/RISCV/double-convert.ll
The file was modifiedllvm/test/CodeGen/RISCV/float-convert.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv64zbb.ll
Commit cfbb92441f17d1f5a9d9c3e195646df4117cb0ca by carl.ritson
[SDAG] Fix pow2 assumption when splitting vectors

When reducing vector builds to shuffles it possible that
the DAG combiner may try to extract invalid subvectors.

This happens as the existing code assumes vectors will be power
of 2 sizes, which is already untrue, but becomes more noticable
with v6 and v7 types.
Specifically the existing code assumes that half PowerOf2Ceil of
a given vector index will fit twice into a given vector.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D103880
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Commit 2c2d2922a24b7fa8a92f38d9043ab476d330210d by carl.ritson
[ValueTypes] Define MVTs for v6i32, v6f32, v7i32, v7f32

For use in AMDGPU selection DAG.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D103881
The file was modifiedllvm/include/llvm/Support/MachineValueType.h
The file was modifiedllvm/lib/CodeGen/ValueTypes.cpp
The file was modifiedllvm/utils/TableGen/CodeGenTarget.cpp
The file was modifiedllvm/include/llvm/CodeGen/ValueTypes.td
Commit 670edf3ee0045ce007f2f6aec94a2c3344c5682e by Amara Emerson
[AArch64][GlobalISel] Fix incorrectly generating uxtw/sxtw for addressing modes.

When the extend is from 8 or 16 bits, the addressing modes don't support those
extensions, but we weren't checking that and therefore always generated the 32->64b
extension mode. Fun.

Differential Revision: https://reviews.llvm.org/D104070
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/select-arith-extended-reg.mir
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
Commit f8a1d652da00ecff448213c58522da5a61d9bc4b by riddleriver
[mlir][IR] Move MemRefElementTypeInterface to a new BuiltinTypeInterfaces file

This allows for using other type interfaces in the builtin dialect, which currently results in a compile time failure (as it generates duplicate interface declarations).
The file was modifiedmlir/lib/IR/CMakeLists.txt
The file was addedmlir/include/mlir/IR/BuiltinTypeInterfaces.td
The file was modifiedmlir/include/mlir/IR/BuiltinTypes.td
The file was modifiedmlir/include/mlir/IR/CMakeLists.txt
Commit c42dd5dbb015afaef99cf876195c474c63c2393e by riddleriver
[mlir] Add new SubElementAttr/SubElementType Interfaces

These interfaces allow for a composite attribute or type to opaquely provide access to any held attributes or types. There are several intended use cases for this interface. The first of which is to allow the printer to create aliases for non-builtin dialect attributes and types. In the future, this interface will also be extended to allow for SymbolRefAttr to be placed on other entities aside from just DictionaryAttr and ArrayAttr.

To limit potential test breakages, this revision only adds the new interfaces to the builtin attributes/types that are currently hardcoded during AsmPrinter alias generation. In a followup the remaining builtin attributes/types, and non-builtin attributes/types can be extended to support it.

Differential Revision: https://reviews.llvm.org/D102945
The file was modifiedmlir/unittests/IR/CMakeLists.txt
The file was modifiedmlir/include/mlir/IR/BuiltinTypes.h
The file was modifiedmlir/include/mlir/IR/CMakeLists.txt
The file was addedmlir/include/mlir/IR/SubElementInterfaces.td
The file was modifiedmlir/lib/IR/BuiltinTypes.cpp
The file was modifiedmlir/lib/IR/AsmPrinter.cpp
The file was modifiedmlir/include/mlir/IR/BuiltinAttributes.h
The file was addedmlir/lib/IR/SubElementInterfaces.cpp
The file was modifiedmlir/lib/IR/BuiltinAttributes.cpp
The file was modifiedmlir/include/mlir/IR/BuiltinAttributes.td
The file was modifiedmlir/include/mlir/IR/BuiltinTypes.td
The file was addedmlir/unittests/IR/SubElementInterfaceTest.cpp
The file was addedmlir/include/mlir/IR/SubElementInterfaces.h
The file was modifiedmlir/lib/IR/CMakeLists.txt
Commit 8800047707a9cd86fb7143699af0e5564c28f4aa by riddleriver
[mlir-ir-printing] Prefix the dump message with the split marker(// -----)

This allows for better interaction with tools (such as mlir-lsp-server), as it separates the IR into separate modules for consecutive dumps.

Differential Revision: https://reviews.llvm.org/D104073
The file was modifiedmlir/lib/Pass/IRPrinting.cpp
The file was modifiedmlir/test/Pass/ir-printing.mlir
The file was modifiedmlir/test/Pass/run-reproducer.mlir
Commit 7836d058c7e115eace62e324ef6c01670326f518 by llvm-project
[Flang] Compile fix after D99459.

Fix Flang build after addition of a new OpenMP clauses for a Clang
patch (D99459). Flang is using TableGen to generation the declaration
of clause checks and the new clause was missing a definiton.
The file was modifiedflang/lib/Semantics/check-omp-structure.cpp
Commit 420bd5ee8ec996a2c2e305541e59465a5ba436e3 by craig.topper
[RISCV] Use ComputeNumSignBits/MaskedValueIsZero in RISCVDAGToDAGISel::selectSExti32/selectZExti32.

This helps us select W instructions in more cases. Most of the
affected tests have had the sign_extend_inreg or AND folded into
sextload/zextload.

Differential Revision: https://reviews.llvm.org/D104079
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoB.td
The file was modifiedllvm/test/CodeGen/RISCV/float-convert.ll
The file was modifiedllvm/test/CodeGen/RISCV/double-convert.ll
The file was modifiedllvm/test/CodeGen/RISCV/half-convert.ll
The file was modifiedllvm/test/CodeGen/RISCV/rem.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rv64zbb.ll
Commit 2670c7dd5b25e87825edc0aca7729c1d3dba5afc by qiucofan
[VectorCombine] Fix alignment in single element store

This fixes the concern in single element store scalarization that the
alignment of new store may be larger than it should be. It calculates
the largest alignment if index is constant, and a safe one if not.

Reviewed By: lebedev.ri, spatel

Differential Revision: https://reviews.llvm.org/D103419
The file was modifiedllvm/lib/Transforms/Vectorize/VectorCombine.cpp
The file was modifiedllvm/test/Transforms/VectorCombine/load-insert-store.ll
Commit db26615aa6a165483e6540b3f6ed684a0cbe06df by aeubanks
Revert "[clang] Implement P2266 Simpler implicit move"

This reverts commit cbd0054b9eb17ec48f0702e3828209646c8f5ebd.
The file was modifiedclang/lib/Sema/SemaExprCXX.cpp
The file was modifiedclang/test/SemaCXX/constant-expression-cxx11.cpp
The file was modifiedclang/lib/Sema/SemaStmt.cpp
The file was modifiedclang/test/CXX/class/class.init/class.copy.elision/p3.cpp
The file was modifiedclang/test/SemaCXX/coroutines.cpp
The file was modifiedclang/test/CXX/expr/expr.prim/expr.prim.lambda/p4-cxx14.cpp
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/lib/Sema/SemaType.cpp
The file was modifiedclang/test/SemaCXX/constant-expression-cxx14.cpp
The file was modifiedclang/test/CXX/temp/temp.decls/temp.mem/p5.cpp
The file was modifiedclang/test/SemaCXX/warn-return-std-move.cpp
The file was modifiedclang/test/CXX/dcl.dcl/dcl.spec/dcl.type/dcl.spec.auto/p7-cxx14.cpp
The file was modifiedclang/test/SemaCXX/coroutine-rvo.cpp
The file was modifiedclang/lib/Sema/SemaCoroutine.cpp
The file was modifiedclang/test/CXX/drs/dr3xx.cpp
The file was modifiedclang/test/SemaCXX/return-stack-addr.cpp
The file was modifiedclang/test/SemaCXX/deduced-return-type-cxx14.cpp
Commit 85ca7e424fd050582026a299906c9e8397043c52 by aeubanks
Revert "[clang] NRVO: Improvements and handling of more cases."

This reverts commit 667fbcdd0b2ee5e78f5ce9789b862e3bbca94644.

Causes crashes on a stage 2 build on Windows.
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/lib/Sema/SemaExprCXX.cpp
The file was modifiedclang/lib/Sema/SemaStmt.cpp
The file was modifiedclang/lib/Sema/Sema.cpp
The file was modifiedclang/test/CodeGen/nrvo-tracking.cpp
The file was modifiedclang/lib/Sema/SemaCoroutine.cpp
The file was modifiedclang/lib/Sema/SemaTemplateInstantiateDecl.cpp
Commit 081ae5fe1aa3ead6d9da75747d3698f09ff89cb9 by craig.topper
[RISCV] Remove extra assignment of intrinsic ID in ManualCodegen. NFC

There's already an autogenerated assignment.

Fixes static analyzer warning reported in PR50593.
The file was modifiedclang/include/clang/Basic/riscv_vector.td
Commit 54418c5a355eda7ff77a221c692ee90944c25196 by thakis
[lld/mac] Make binaries written by lld strippable

Be less clever when writing the indirect symbols in LC_DYSYMTAB:
lld used to make point __stubs and __la_symbol_ptr point at the
same bytes in the indirect symbol table in the __LINKEDIT segment.
That confused strip, so write the same bytes twice and make
__stubs and __la_symbol_ptr point at one copy each, so that they
don't share data. This unconfuses strip, and seems to be what ld64
does too, so hopefully tools are generally more used to this.

This makes the output binaries a bit larger, but not much: 4 bytes
for roughly each called function from a dylib and each weak function.
Chromium Framewoork grows by 6536 bytes, clang-format by a few hundred.

With this, `strip -x Chromium\ Framework` works (244 MB before stripping
to 171 MB after stripping, compared to 236 MB=>164 MB with ld64). Running
strip without `-x` produces the same error message now for lld-linked
Chromium Framework as for when using ld64 as a linker.

`strip clang-format` also works now but didn't previously.

Fixes PR50657.

Differential Revision: https://reviews.llvm.org/D104081
The file was modifiedlld/test/MachO/indirect-symtab.s
The file was modifiedlld/MachO/SyntheticSections.cpp
Commit 643b6407faf460915679f304420cfbee87c47734 by kai.wang
[RISCV] Avoid scalar outgoing argumetns overwriting vector frame objects.

When using FP to access stack objects, the scalable stack objects will
be put at the lower end of the frame. It looks like

```
|-------------------|  <-- FP
| callee-saved regs |
|-------------------|
| scalar local vars |
|-------------------|
| RVV local vars    |
|-------------------|  <-- SP
```

If there are scalar arguments that need to pass through memory and there
are vector objects on the stack using FP to access. The outgoing scalar
arguments will overwrite the vector objects. It looks like

```
|-------------------|  <-- FP
| callee-saved regs |
|-------------------|
| scalar local vars |
|-------------------|         |-------------------|
| RVV local vars    |         | outgoing args     | <- outgoing arguments
|-------------------|  <-- SP |-------------------|    overwrite from here.
```

In this patch, we reserve the stack for the outgoing arguments before
function calls if using FP to access and there are scalable vector frame
objects. It looks like

```
|-------------------|  <-- FP
| callee-saved regs |
|-------------------|
| scalar local vars |
|-------------------|
| RVV local vars    |
|-------------------|
| outgoing args     |
|-------------------|  <-- SP
```

Differential Revision: https://reviews.llvm.org/D103622
The file was modifiedllvm/lib/Target/RISCV/RISCVFrameLowering.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/rvv-out-arguments.ll
Commit 632cbcac79065a62a306dbda7b3a6e1f315e3260 by Raphael Isemann
[lldb] Move once_flags in HostInfoLinux so the internal state struct

The HostInfoLinuxFields struct is supposed to be set up/torn down on
Initialize/Terminate and should contain all the state of the plugin.
`once_flags` are part of this state and should also be reset on `Terminate` so
we can re-initialize these lazy values after the next `Initialize` call.

This itself is NFC as the HostInfoLinux was broken before this patch and is
still broken afterwards. D104091 will be the proper fix.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D104093
The file was modifiedlldb/source/Host/linux/HostInfoLinux.cpp
Commit bc104fdcecc0da1650177f3587ffe233b37f071b by qiucofan
[PowerPC] Relax register superclasses for paired memops

Relaxing superclass constraint for VSX register classes helps reducing
32-byte spills and copies when register pressure is high.

In test case affected, some of them introduces more copies due to new
allocation order. However, this patch should not be the root cause, and
we may be able to fix it in other places of register allocation.

Reviewed By: nemanjai

Differential Revision: https://reviews.llvm.org/D104006
The file was modifiedllvm/test/CodeGen/PowerPC/mma-intrinsics.ll
The file was modifiedllvm/test/CodeGen/PowerPC/paired-vector-intrinsics.ll
The file was modifiedllvm/test/CodeGen/PowerPC/vsx.ll
The file was modifiedllvm/test/CodeGen/PowerPC/p9-xxinsertw-xxextractuw.ll
The file was modifiedllvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
The file was modifiedllvm/test/CodeGen/PowerPC/aix-p9-xxinsertw-xxextractuw.ll
The file was modifiedllvm/test/CodeGen/PowerPC/constant-pool.ll
The file was modifiedllvm/test/CodeGen/PowerPC/mma-outer-product.ll
The file was modifiedllvm/test/CodeGen/PowerPC/mma-acc-spill.ll
The file was modifiedllvm/test/CodeGen/PowerPC/vec_conv_i64_to_fp32_elts.ll
The file was modifiedllvm/test/CodeGen/PowerPC/remove-redundant-moves.ll
Commit f3f904563ec9ce8c7bfda83bbca19790cc4d9afc by Vitaly Buka
[lldb] Fix leak in test

Test leaks if we run
tools/lldb/unittests/Host/HostTests without --gtest_filter

Reviewed By: teemperor

Differential Revision: https://reviews.llvm.org/D104091
The file was modifiedlldb/source/Host/linux/HostInfoLinux.cpp
The file was modifiedlldb/unittests/Host/HostInfoTest.cpp
The file was modifiedlldb/include/lldb/Host/linux/HostInfoLinux.h

Summary

  1. [libc] Add a "libc-fuzzer" step in full build mode. (details)
Commit d631fe591d8ff09edb895ef124e8370875d8d523 by sivachandra
[libc] Add a "libc-fuzzer" step in full build mode.
The file was modifiedzorg/buildbot/builders/annotated/libc-linux.py