Changes

Summary

  1. Enable LLD tests together with the expensive checks on the expensive check builders. (details)
Commit 08662254487c6c6f01947e05925f1502e27367c9 by vvereschaka
Enable LLD tests together with the expensive checks on the expensive check builders.

nclude LLD project to build and run the tests together with LLVM expensive checks on all
appropriate builders:

llvm-clang-x86_64-expensive-checks-ubuntu
llvm-clang-x86_64-expensive-checks-win
llvm-clang-x86_64-expensive-checks-debian
llvm-clang-x86_64-expensive-checks-ubuntu-release
llvm-clang-x86_64-expensive-checks-win-release
llvm-clang-x86_64-expensive-checks-debian-release

The LLD test use the expensive check data structures and it would be good to detect
the failures when they configured with -DLLVM_ENABLE_EXPENSIVE_CHECKS=ON (ref: D105071)

Differential Revision: https://reviews.llvm.org/D105369
The file was modifiedbuildbot/osuosl/master/config/release_builders.py (diff)
The file was modifiedbuildbot/osuosl/master/config/builders.py (diff)

Summary

  1. [analyzer][solver] Use all sources of constraints (details)
  2. [lldb][docs] Fix reference warnings in python-reference.rst (details)
  3. Revert "[clang] fixes named return of variables with dependent alignment" (details)
  4. [Polly][Isl] Use isl::set::tuple_dim, isl::map::domain_tuple_dim and isl::map::range_tuple_dim. NFC (details)
  5. [LV] Collect a list of all element types found in the loop (NFC) (details)
  6. [MLIR] Fix dialect conversion cancelRootUpdate (details)
  7. [AMDGPU] Set optional PAL metadata (details)
  8. [hwasan] Check for overflow when searching candidates. (details)
  9. [VPlan] Add VPReductionPHIRecipe (NFC). (details)
  10. [AMDGPU] Remove outdated comment and tidy up. NFC. (details)
  11. [VPlan] Add destructor to VPReductionRecipe to unbreak build. (details)
  12. [VPlan] Mark overriden function in VPWidenPHIRecipe as virtual. (details)
  13. Revert "[VPlan] Add VPReductionPHIRecipe (NFC)." and follow-ups (details)
  14. [hwasan] Fix incorrect candidate matching for stack OOB. (details)
  15. [CodeGen][AArch64][SVE] Use ld1r[bhsd] for vector splat from memory (details)
  16. [LV] Prevent vectorization with unsupported element types. (details)
  17. [runtimes] Move enable_32bit to the DSL (details)
  18. Revert "[profile][test] Improve coverage-linkage.cpp" (details)
  19. [CostModel][X86] i8/i16 sitofp/uitofp are sext/zext to i32 for sitofp (details)
  20. Recommit "[VPlan] Add VPReductionPHIRecipe (NFC)." and follow-ups. (details)
  21. [libc++] NFC: Move the status docs to their own subdirectory (details)
  22. [libc++] NFC: Remove outdated link to TS status (details)
  23. [AArch64][SVE] Fix selection failures for scalable MLOAD nodes with passthru (details)
  24. [lld/mac] Partially implement -export_dynamic (details)
  25. Use swift mangling for resume functions (details)
  26. [SLP]Fix non-determinism in PHI sorting. (details)
  27. [libomptarget][nfc] Group environment variables, drop accesses to DeviceInfo global (details)
  28. [SystemZ]  Generate XC loop for memset 0 of variable length. (details)
  29. [RISCV] Remove Zvamo implication for v1.0-rc change (details)
  30. [CostModel][X86] fptosi/fptoui to i8/i16 are truncated from fptosi to i32 (details)
  31. Fix coro lowering of single predecessor phis (details)
  32. [RISCV] Add support for matching vwmul(u) and vwmacc(u) from fixed vectors. (details)
  33. [DebugInfo][InstrRef][3/4] Produce DBG_INSTR_REFs for all variable locations (details)
  34. [SystemZ] Support the 'N' code for the odd register in inline-asm. (details)
  35. [ScalarEvolution] Make getMinusSCEV() fail for unrelated pointers. (details)
  36. [LoopVersion] Move an assert [nfc-ish] (details)
  37. [LV] Disable epilogue vectorization for non-latch exits (details)
  38. [libcxx][modularisation] splices `<iterator>` into individual headers (details)
  39. [InstSimplify][test] add tests for poison propagation through FP calls; NFC (details)
  40. [InstSimplify] fix bug in poison propagation for FP ops (details)
  41. [profile][test] Improve coverage-linkage.cpp with ld.lld --gc-sections (details)
  42. [libc++][docs] Overhaul the documentation for building and using libc++ (details)
  43. [AIX] Define __TOS_AIX__ predefined macro (details)
  44. Revert "[ScalarEvolution] Make getMinusSCEV() fail for unrelated pointers." (details)
  45. [gn build] Port 8517a26d442f (details)
  46. [Tests] Update some tests for D104765. NFC (details)
  47. [openmp] [test] Add missing <limits> include to capacity_nthreads (details)
  48. [compiler-rt] [test] Fix asan symbolize tests on py3.10 (details)
  49. [RISCV] Implement lround*/llround*/lrint*/llrint* with fcvt instruction with -fno-math-errno (details)
  50. [libc++] NFC: Sort header lists and remove outdated comments in modulemap (details)
  51. [libc++] Do not set CMAKE_BUILD_WITH_INSTALL_NAME_DIR (details)
  52. Recommit [ScalarEvolution] Make getMinusSCEV() fail for unrelated pointers. (details)
  53. [lld/mac] Give several LTO tests an "lto-" prefix (details)
  54. [Hexagon] Generate trap/undef if misaligned access is detected (details)
  55. [NFC][AMDGPU] Add link to AMD GPU gfx906 instruction set architecture (details)
  56. [AMDGPU] Fix pass name of AMDGPULowerKernelAttributes. NFC. (details)
  57. [AMDGPU] Do not run IR optimizations at -O0 (details)
  58. [AMDGPU] Move atomic expand past infer address spaces (details)
  59. DebugInfo: Mangle K&R declarations for debug info linkage names (details)
  60. [AArch64] Sync isDef32 to the current x86 version. (details)
  61. [AArch64] Add more tests related to vselect with constant condition. (details)
  62. [clang] fixes named return of variables with dependent alignment (details)
  63. [PowerPC] Re-enable combine for i64 BSWAP on targets without LDBRX (details)
  64. tests/CodeGen: Use %python lit substitution when invoking python (details)
  65. [MLIR][NFC] Move normalizeAffine methods to Affine utils (details)
  66. [Attributor] Simplify operands inside of simplification AAs first (details)
  67. [Attributor] Introduce a helper function to deal with undef + none (details)
  68. [Attriibutor][NFC] Precommit heap-2-stack test case (details)
  69. [Attributor][FIX] Replace uses first, then values (details)
Commit 6017cb31bb3548641465ea66219e11abc3106d38 by vsavchenko
[analyzer][solver] Use all sources of constraints

Prior to this patch, we always gave priority to constraints that we
actually know about symbols in question.  However, these can get
outdated and we can get better results if we look at all possible
sources of knowledge, including sub-expressions.

Differential Revision: https://reviews.llvm.org/D105436
The file was modifiedclang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp
The file was modifiedclang/test/Analysis/constant-folding.c
Commit 51ab17b91d2e3280d08c09648bb4950c0e217d20 by Raphael Isemann
[lldb][docs] Fix reference warnings in python-reference.rst

References with a single '`' around them are interpreted as references instead
of text with monospaced font since the introduction of the new Python API
generator. This meant that all the single-quoted code in this document that
doesn't reference any Python class was throwing sphinx errors. This just adds
the neede extra ` around this code and fixed up the legitimate typos
(e.g. `SBframe` -> `SBFrame`).
The file was modifiedlldb/docs/use/python-reference.rst
Commit cbb09c5b2c2e0558de50355f4cbbbe2d2840073e by akuegel
Revert "[clang] fixes named return of variables with dependent alignment"

This reverts commit 21106388eb96c87b3f580c42a322c76a61605261.
It causes a segfault in certain cases.
The file was modifiedclang/lib/Sema/SemaStmt.cpp
The file was modifiedclang/include/clang/AST/Decl.h
The file was modifiedclang/lib/Sema/SemaDecl.cpp
The file was modifiedclang/lib/AST/Decl.cpp
The file was modifiedclang/test/CodeGen/nrvo-tracking.cpp
Commit f482497c381cf9beee513864123cf975bd72babf by patacca
[Polly][Isl] Use isl::set::tuple_dim, isl::map::domain_tuple_dim and isl::map::range_tuple_dim. NFC

This is part of an effort to reduce the differences between the custom C++ bindings used right now by polly in `lib/External/isl/include/isl/isl-noxceptions.h` and the official isl C++ interface.

Changes made:
- Use `isl::set::tuple_dim` instead of `isl::set::dim` and `isl::set::n_dim`
- Use `isl::map::domain_tuple_dim` instead of `isl::map::dim`
- Use `isl::map::range_tuple_dim` instead of `isl::map::dim`
- isl-noexceptions.h has been generated by this https://github.com/patacca/isl/commit/45576e1b4260f91946e4cf819485f57bd2ed5490

Note that not all the usage of `isl::{set,map}::dim` where replaced

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D104994
The file was modifiedpolly/lib/Transform/ZoneAlgo.cpp
The file was modifiedpolly/lib/Analysis/DependenceInfo.cpp
The file was modifiedpolly/lib/Analysis/ScopBuilder.cpp
The file was modifiedpolly/lib/Transform/MatmulOptimizer.cpp
The file was modifiedpolly/lib/Analysis/ScopInfo.cpp
The file was modifiedpolly/lib/Support/ISLTools.cpp
The file was modifiedpolly/lib/External/isl/include/isl/isl-noexceptions.h
The file was modifiedpolly/lib/Transform/ScheduleTreeTransform.cpp
The file was modifiedpolly/lib/CodeGen/PPCGCodeGeneration.cpp
The file was modifiedpolly/lib/Transform/FlattenAlgo.cpp
The file was modifiedpolly/lib/Transform/MaximalStaticExpansion.cpp
Commit 17b701c43ca6459db020bff075b119f33a4a8ec5 by kerry.mclaughlin
[LV] Collect a list of all element types found in the loop (NFC)

Splits `getSmallestAndWidestTypes` into two functions, one of which now collects
a list of all element types found in the loop (`ElementTypesInLoop`). This ensures we do not
have to iterate over all instructions in the loop again in other places, such as in D102253
which disables scalable vectorization of a loop if any of the instructions use invalid types.

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D105437
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Commit 0c29f45ac9e8e67a6481c0810e2e335a12bf3877 by uday
[MLIR] Fix dialect conversion cancelRootUpdate

Fix dialect conversion ConversionPatternRewriter::cancelRootUpdate: the
erasure of operations here from the list of root update was off by one.
Should have been:
```
rootUpdates.erase(rootUpdates.begin() + (rootUpdates.rend() - it - 1));
```
instead of
```
rootUpdates.erase(rootUpdates.begin() + (rootUpdates.rend() - it));
```

or more directly:
```
rootUpdates.erase(it.base() - 1)
```

While on this, add an assertion to improve dev experience when a cancel is
called on an op on which a root update hasn't been started.

Differential Revision: https://reviews.llvm.org/D105397
The file was modifiedmlir/lib/Transforms/Utils/DialectConversion.cpp
Commit db646de3ee0181c93744b69cb51baeff17d70a00 by sebastian.neubauer
[AMDGPU] Set optional PAL metadata

Set informational fields in the .shader_functions table.

Also correct the documentation, .scratch_memory_size and .lds_size are
integers.

Differential Revision: https://reviews.llvm.org/D105116
The file was modifiedllvm/test/CodeGen/AMDGPU/amdpal-callable.ll
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
The file was modifiedllvm/docs/AMDGPUUsage.rst
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp
Commit a0b1f3aac57a9becb28d6a9c50f4d2eee7ba6c82 by fmayer
[hwasan] Check for overflow when searching candidates.

If the fault address is at the boundary of memory regions, this could
cause us to segfault otherwise.

Ran test with old compiler_rt to make sure it fails.

Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D105032
The file was modifiedcompiler-rt/lib/hwasan/hwasan_report.cpp
The file was modifiedcompiler-rt/lib/hwasan/hwasan_mapping.h
The file was addedcompiler-rt/test/hwasan/TestCases/tag-mismatch-border-address.c
Commit 6c3451cd76cbd0cd973d9c2b08b168dcd0bce3c2 by flo
[VPlan] Add VPReductionPHIRecipe (NFC).

This patch is a first step towards splitting up VPWidenPHIRecipe into
separate recipes for the 3 distinct cases they model:

    1. reduction phis,
    2. first-order recurrence phis,
    3. pointer induction phis.

This allows untangling the code generation and allows us to reduce the
reliance on LoopVectorizationCostModel during VPlan code generation.

Discussed/suggested in D100102, D100113, D104197.

Reviewed By: Ayal

Differential Revision: https://reviews.llvm.org/D104989
The file was modifiedllvm/test/Transforms/LoopVectorize/vplan-printing.ll
The file was modifiedllvm/lib/Transforms/Vectorize/VPlanValue.h
The file was modifiedllvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.h
The file was modifiedllvm/test/Transforms/LoopVectorize/first-order-recurrence-sink-replicate-region.ll
Commit c9d747e9cd6db4a104980ad4358f70cba0a1a634 by jay.foad
[AMDGPU] Remove outdated comment and tidy up. NFC.

This was left over from D94746.
The file was modifiedllvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
Commit bbcbf21ae60c928e07dde6a1c468763b3209d1e6 by flo
[VPlan] Add destructor to VPReductionRecipe to unbreak build.

Attempt to unbreak
https://lab.llvm.org/buildbot/#/builders/67/builds/3363/steps/6/logs/stdio
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.h
Commit 3fed6d443f802c43aade1b5b1b09f5e2f8b3edb1 by flo
[VPlan] Mark overriden function in VPWidenPHIRecipe as virtual.

VPReductionRecipe overrides those implementations. Mark them as virtual
in the VPWidenPHIRecipe to unbreak build in certain configurations.
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.h
Commit 706bbfb35bd31051e46ac77aab3e9b2dbc3abe78 by flo
Revert "[VPlan] Add VPReductionPHIRecipe (NFC)." and follow-ups

This reverts commit 3fed6d443f802c43aade1b5b1b09f5e2f8b3edb1,
bbcbf21ae60c928e07dde6a1c468763b3209d1e6 and
6c3451cd76cbd0cd973d9c2b08b168dcd0bce3c2.

The changes causing build failures with certain configurations, e.g.
https://lab.llvm.org/buildbot/#/builders/67/builds/3365/steps/6/logs/stdio

    lib/libLLVMVectorize.a(LoopVectorize.cpp.o): In function `llvm::VPRecipeBuilder::tryToCreateWidenRecipe(llvm::Instruction*, llvm::ArrayRef<llvm::VPValue*>, llvm::VFRange&, std::unique_ptr<llvm::VPlan, std::default_delete<llvm::VPlan> >&) [clone .localalias.8]':
    LoopVectorize.cpp:(.text._ZN4llvm15VPRecipeBuilder22tryToCreateWidenRecipeEPNS_11InstructionENS_8ArrayRefIPNS_7VPValueEEERNS_7VFRangeERSt10unique_ptrINS_5VPlanESt14default_deleteISA_EE+0x63b): undefined reference to `vtable for llvm::VPReductionPHIRecipe'
    collect2: error: ld returned 1 exit status
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.h
The file was modifiedllvm/lib/Transforms/Vectorize/VPlanValue.h
The file was modifiedllvm/test/Transforms/LoopVectorize/vplan-printing.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/first-order-recurrence-sink-replicate-region.ll
The file was modifiedllvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.cpp
Commit 745758acf3c295e3bf9f9dd283a3568c912a1827 by fmayer
[hwasan] Fix incorrect candidate matching for stack OOB.

We would find an address with matching tag, only to discover in
ShowCandidate that it's very far away from [stack].

Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D105197
The file was modifiedcompiler-rt/lib/hwasan/hwasan_report.cpp
The file was modifiedcompiler-rt/test/hwasan/TestCases/stack-oob.c
Commit c5dfee44b983d7a96f2c1a234f83abf41c7e2443 by peter.waller
[CodeGen][AArch64][SVE] Use ld1r[bhsd] for vector splat from memory

This avoids the use of the vector unit for copying from scalar to
vector. There is an extra ptrue instruction, but a predicate register
with the ptrue pattern populated is likely to be free in the context of
real code.

Tests were generated from a template to cover the axes mentioned at the
top of the test file.

Co-authored-by: Francesco Petrogalli <francesco.petrogalli@arm.com>

Differential Revision: https://reviews.llvm.org/D103170
The file was modifiedllvm/test/CodeGen/AArch64/sve-ld-post-inc.ll
The file was addedllvm/test/CodeGen/AArch64/sve-ld1r.mir
The file was modifiedllvm/test/CodeGen/AArch64/sve-vector-splat.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
The file was addedllvm/test/CodeGen/AArch64/sve-ld1r.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrFormats.td
Commit a7512401e5a2cc7a1d0805fc4daf0c808e9d502d by kerry.mclaughlin
[LV] Prevent vectorization with unsupported element types.

This patch adds a TTI function, isElementTypeLegalForScalableVector, to query
whether it is possible to vectorize a given element type. This is called by
isLegalToVectorizeInstTypesForScalable to reject scalable vectorization if
any of the instruction types in the loop are unsupported, e.g:

  int foo(__int128_t* ptr, int N)
    #pragma clang loop vectorize_width(4, scalable)
    for (int i=0; i<N; ++i)
      ptr[i] = ptr[i] + 42;

This example currently crashes if we attempt to vectorize since i128 is not a
supported type for scalable vectorization.

Reviewed By: sdesmalen, david-arm

Differential Revision: https://reviews.llvm.org/D102253
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
The file was addedllvm/test/Transforms/LoopVectorize/AArch64/sve-illegal-type.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/scalable-reductions.ll
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h
Commit f7d8754312bf3d10fb902d94f2bc84e3adf12ba4 by Louis Dionne
[runtimes] Move enable_32bit to the DSL

This is necessary for from-scratch configurations to support the 32-bit
mode of the test suite.

Differential Revision: https://reviews.llvm.org/D105435
The file was modifiedlibunwind/test/lit.site.cfg.in
The file was modifiedlibcxx/test/configs/legacy.cfg.in
The file was modifiedlibcxx/utils/libcxx/test/params.py
The file was modifiedlibcxx/utils/libcxx/test/config.py
The file was modifiedlibcxx/test/CMakeLists.txt
The file was modifiedlibcxxabi/test/CMakeLists.txt
The file was modifiedlibunwind/test/CMakeLists.txt
The file was modifiedlibcxxabi/test/lit.site.cfg.in
Commit f814cd7406aa13e082fdf6fe8296178a77735a5a by thakis
Revert "[profile][test] Improve coverage-linkage.cpp"

This reverts commit 36ba86fe8a29cdf3251b786db7f342efde666cb2.
Fails on some bots, see comments on
https://reviews.llvm.org/rG36ba86fe8a29cdf3251b786db7f342efde666cb2
The file was modifiedcompiler-rt/test/profile/Linux/coverage-linkage.cpp
Commit 6f3f9535fcafcde11d3b3ef72fdc0f357813e9da by llvm-dev
[CostModel][X86] i8/i16 sitofp/uitofp are sext/zext to i32 for sitofp

Provide a generic fallback that extends sub-i32 scalars before using the existing sitofp instructions.

These numbers can be tweaked for specific sse levels, but we should get the default handling in place first.

We get the extension for free for non-vector loads.
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/alternate-cast.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/sitofp.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/alternate-cast-inseltpoison.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/sitofp.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/uitofp.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/uitofp.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/sitofp-inseltpoison.ll
Commit ef0d147cdcaf170de80ca6bb0208a2a519fbf083 by flo
Recommit "[VPlan] Add VPReductionPHIRecipe (NFC)." and follow-ups.

This reverts commit 706bbfb35bd31051e46ac77aab3e9b2dbc3abe78.

The committed version moves the definition of VPReductionPHIRecipe out
of an ifdef only intended for ::print helpers. This should resolve the
build failures that caused the revert
The file was modifiedllvm/test/Transforms/LoopVectorize/vplan-printing.ll
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.h
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/first-order-recurrence-sink-replicate-region.ll
The file was modifiedllvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/VPlanValue.h
Commit cf005c4c5061ed34b2bd21ae104923c28b8a1b04 by Louis Dionne
[libc++] NFC: Move the status docs to their own subdirectory

This cleans up the libcxx/doc directory quite a bit and will avoid the
proliferation of status files in that directory as new standards are voted.
The file was addedlibcxx/docs/Status/Cxx2b.rst
The file was addedlibcxx/docs/Status/Cxx20Issues.csv
The file was removedlibcxx/docs/Cxx2bStatus.rst
The file was removedlibcxx/docs/FormatStatus.rst
The file was addedlibcxx/docs/Status/Cxx14.rst
The file was addedlibcxx/docs/Status/Cxx14Issues.csv
The file was removedlibcxx/docs/Cxx1yStatusIssuesStatus.csv
The file was removedlibcxx/docs/Cxx2aStatusIssuesStatus.csv
The file was addedlibcxx/docs/Status/FormatIssues.csv
The file was modifiedlibcxx/docs/index.rst
The file was addedlibcxx/docs/Status/Cxx14Papers.csv
The file was addedlibcxx/docs/Status/Cxx17Papers.csv
The file was removedlibcxx/docs/Cxx2bStatusIssuesStatus.csv
The file was addedlibcxx/docs/Status/Cxx17Issues.csv
The file was addedlibcxx/docs/Status/RangesIssues.csv
The file was addedlibcxx/docs/Status/Cxx2bPapers.csv
The file was addedlibcxx/docs/Status/Format.rst
The file was addedlibcxx/docs/Status/Ranges.rst
The file was removedlibcxx/docs/FormatProposalStatus.csv
The file was removedlibcxx/docs/Cxx1yStatusPaperStatus.csv
The file was addedlibcxx/docs/Status/Cxx17.rst
The file was removedlibcxx/docs/Cxx1yStatus.rst
The file was removedlibcxx/docs/Cxx2aStatus.rst
The file was addedlibcxx/docs/Status/Cxx2bIssues.csv
The file was removedlibcxx/docs/RangesStatus.rst
The file was removedlibcxx/docs/RangesIssuePaperStatus.csv
The file was addedlibcxx/docs/Status/RangesPaper.csv
The file was removedlibcxx/docs/Cxx1zStatusIssuesStatus.csv
The file was removedlibcxx/docs/Cxx1zStatusPaperStatus.csv
The file was addedlibcxx/docs/Status/Cxx20.rst
The file was removedlibcxx/docs/Cxx2aStatusPaperStatus.csv
The file was addedlibcxx/docs/Status/FormatPaper.csv
The file was removedlibcxx/docs/Cxx2bStatusPaperStatus.csv
The file was removedlibcxx/docs/FormatIssuePaperStatus.csv
The file was removedlibcxx/docs/OneRangesProposalStatus.csv
The file was removedlibcxx/docs/Cxx1zStatus.rst
The file was addedlibcxx/docs/Status/Cxx20Papers.csv
Commit 5ffa051447c103b3950d7642c36e7c7f59c1a86d by Louis Dionne
[libc++] NFC: Remove outdated link to TS status
The file was modifiedlibcxx/docs/index.rst
Commit 5ab9000fbb3057336ca33721096bb8766cb5b675 by bradley.smith
[AArch64][SVE] Fix selection failures for scalable MLOAD nodes with passthru

Differential Revision: https://reviews.llvm.org/D105348
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/AArch64/sve-masked-ldst-nonext.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-masked-ldst-zext.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-masked-ldst-sext.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h
Commit 3eb2fc4b505159cd34f1cfe4ec2359420e44b916 by thakis
[lld/mac] Partially implement -export_dynamic

This implements the part of -export_dynamic that adds external
symbols as dead strip roots even for executables.

It does not yet implement the effect -export_dynamic has for LTO.
I tried just replacing `config->outputType != MH_EXECUTE` with
`(config->outputType != MH_EXECUTE || config->exportDynamic)` in
LTO.cpp, but then local symbols make it into the symbol table too,
which is too much (and also doesn't match ld64). So punt on this
for now until I understand it better.
(D91583 may or may not be related too).

Differential Revision: https://reviews.llvm.org/D105482
The file was modifiedlld/MachO/Config.h
The file was modifiedlld/MachO/LTO.cpp
The file was modifiedlld/MachO/Options.td
The file was modifiedlld/MachO/Driver.cpp
The file was modifiedlld/MachO/MarkLive.cpp
The file was modifiedlld/test/MachO/dead-strip.s
Commit 130ea3ceb47d36d247da83c897011d1b374e54fe by aschwaighofer
Use swift mangling for resume functions

The resume partial functions generated for swift suspend points will now
use a Swift mangling suffix.

Await resume partial functions will use the suffix 'TQ'[0-9]+'_' (e.g "...TQ0_")
and suspend resume partial functions will use the suffix 'TY'[0-9]+'_'
(e.g "...TY1_").

Reviewed By: nate_chandler

Differential Revision: https://reviews.llvm.org/D104144
The file was modifiedllvm/test/Transforms/Coroutines/coro-async.ll
The file was modifiedllvm/lib/Transforms/Coroutines/CoroSplit.cpp
Commit 4e1a0684f13d833e6ddec94d9f7738b0a004e4c1 by a.bataev
[SLP]Fix non-determinism in PHI sorting.

Compare type IDs and DFS numbering for basic block instead of addresses
to fix non-determinism.

Differential Revision: https://reviews.llvm.org/D105031
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/remark_unsupported.ll
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Commit ddfb074a80a24f94290d895b74d2c80626d953ba by jonathanchesterfield
[libomptarget][nfc] Group environment variables, drop accesses to DeviceInfo global

[libomptarget][nfc] Group environment variables, drop accesses to DeviceInfo global

Folds some duplicates logic into a helper function, passes the new environment
struct into getLaunchVals which no longer reads the DeviceInfo global.

Implemented on top of D105237

Reviewed By: dhruvachak

Differential Revision: https://reviews.llvm.org/D105239
The file was modifiedopenmp/libomptarget/plugins/amdgpu/src/rtl.cpp
Commit 37a92f3b03bf165245a9d0dc4830dcc6fed7c253 by paulsson
[SystemZ]  Generate XC loop for memset 0 of variable length.

Benchmarking has shown that it is worthwhile to implement a variable length
memset of 0 with XC (exclusive or) like gcc does, instead of using a libcall.

This requires the use of the EXecute Relative Long (EXRL) instruction which
can now be done in a framework that can also be used with other target
instructions (not just XC).

Review: Ulrich Weigand

Differential Revision: https://reviews.llvm.org/D103865
The file was modifiedllvm/lib/Target/SystemZ/SystemZAsmPrinter.h
The file was modifiedllvm/lib/Target/SystemZ/SystemZInstrFormats.td
The file was modifiedllvm/lib/Target/SystemZ/SystemZInstrInfo.td
The file was modifiedllvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
The file was modifiedllvm/lib/Target/SystemZ/SystemZISelLowering.cpp
The file was addedllvm/test/CodeGen/SystemZ/memset-05.ll
The file was modifiedllvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp
Commit f1cbea3e527547fc08c55235c11970a8d9f2637e by shihpo.hung
[RISCV] Remove Zvamo implication for v1.0-rc change

As v1.0-rc specs say Zvamo is removed from standard extension,
Zvamo has to be specified explicitly.

Reviewed By: evandro

Differential Revision: https://reviews.llvm.org/D105396
The file was modifiedclang/lib/Driver/ToolChains/Arch/RISCV.cpp
The file was modifiedclang/test/Preprocessor/riscv-target-features.c
Commit b298308ba2544a00c3e2ae0c1cc06fa058a4000c by llvm-dev
[CostModel][X86] fptosi/fptoui to i8/i16 are truncated from fptosi to i32

Provide a generic fallback that performs the fptosi to i32 types, then truncates to sub-i32 scalars.

These numbers can be tweaked for specific sse levels, but we should get the default handling in place first.
The file was modifiedllvm/test/Analysis/CostModel/X86/fptoui.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/fptosi.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
Commit 846a530e7db28bdd50c9a9fb08cddc210134b579 by aschwaighofer
Fix coro lowering of single predecessor phis

Code assumes that uses of single predecessor phis are not live accross
suspend points. Cleanup any single predecessor phis preceeding the code
making this assumption.

rdar://76020301

Differential Revision: https://reviews.llvm.org/D105488
The file was addedllvm/test/Transforms/Coroutines/coro-async-phi.ll
The file was modifiedllvm/lib/Transforms/Coroutines/CoroFrame.cpp
Commit 2b5e53111a24eebaa025d12832380638cb0598a1 by craig.topper
[RISCV] Add support for matching vwmul(u) and vwmacc(u) from fixed vectors.

This adds a DAG combine to detect sext/zext inputs and emit a
new ISD opcode. The extends will either be removed or replaced
with narrower extends.

Isel patterns are used to match add and widening mul to vwmacc
similar to the recently added vmacc patterns.

There's still some work to be to match vmulsu.
We should also rewrite splats that were extended as scalars and
then splatted.

Reviewed By: arcbbb

Differential Revision: https://reviews.llvm.org/D104802
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.h
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was addedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwacc.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmulu.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmul.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwaccu.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
Commit 2b2ffb7bdc21bce33372fdd02571b94c2a5e774a by jeremy.morse
[DebugInfo][InstrRef][3/4] Produce DBG_INSTR_REFs for all variable locations

This patch emits DBG_INSTR_REFs for two remaining flavours of variable
locations that weren't supported: copies, and inter-block VRegs. There are
still some locations that must be represented by DBG_VALUE such as
constants, but they're mostly independent of optimisations.

For variable locations that refer to values defined in different blocks,
vregs are allocated before isel begins, but the defining instruction
might not exist until late in isel. To get around this, emit
DBG_INSTR_REFs in a "half done" state, where the first operand refers to a
VReg. Then at the end of isel, patch these back up to refer to
instructions, using the finalizeDebugInstrRefs method.

Copies are something that I complained about the original RFC, and I
really don't want to have to put instruction numbers on copies. They don't
define a value: they move them. To address this isel, salvageCopySSA
interprets:
* COPYs,
* SUBREG_TO_REG,
* Anything that isCopyInstr thinks is a copy.
And follows chains of copies back to the defining instruction that they
read from. This relies on any physical registers that COPYs read being
defined in the same block, or being entry-block arguments. For the former
we can put an instruction number on the defining instruction; for the
latter we can drop a DBG_PHI that reads the incoming value.

Differential Revision: https://reviews.llvm.org/D88896
The file was modifiedllvm/test/DebugInfo/X86/invalidated-dbg-value-is-undef.ll
The file was modifiedllvm/include/llvm/CodeGen/MachineFunction.h
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
The file was modifiedllvm/test/DebugInfo/X86/dbg-val-list-undef.ll
The file was modifiedllvm/test/DebugInfo/X86/arg-dbg-value-list.ll
The file was modifiedllvm/test/DebugInfo/X86/instr-ref-selectiondag.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
The file was modifiedllvm/lib/CodeGen/MachineFunction.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/InstrEmitter.h
Commit 458eac2573772a2b50e550360d1308b1b0c0f2bc by paulsson
[SystemZ] Support the 'N' code for the odd register in inline-asm.

The odd register of a (128 bit) register pair is accessed with the 'N' code
with an inline assembly operand.

Review: Ulrich Weigand

Differential Revision: https://reviews.llvm.org/D105502
The file was modifiedllvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
The file was modifiedllvm/test/CodeGen/SystemZ/inline-asm-i128.ll
Commit 74d6ce5d5f169e9cf3fac0eb1042602e286dd2b9 by efriedma
[ScalarEvolution] Make getMinusSCEV() fail for unrelated pointers.

As part of making ScalarEvolution's handling of pointers consistent, we
want to forbid multiplying a pointer by -1 (or any other value). This
means we can't blindly subtract pointers.

There are a few ways we could deal with this:
1. We could completely forbid subtracting pointers in getMinusSCEV()
2. We could forbid subracting pointers with different pointer bases
(this patch).
3. We could try to ptrtoint pointer operands.

The option in this patch is more friendly to non-integral pointers: code
that works with normal pointers will also work with non-integral
pointers. And it seems like there are very few places that actually
benefit from the third option.

As a minimal patch, the ScalarEvolution implementation of getMinusSCEV
still ends up subtracting pointers if they have the same base.  This
should eliminate the shared pointer base, but eventually we'll need to
rewrite it to avoid negating the pointer base. I plan to do this as a
separate step to allow measuring the compile-time impact.

This doesn't cause obvious functional changes in most cases; the one
case that is significantly affected is ICmpZero handling in LSR (which
is the source of almost all the test changes).  The resulting changes
seem okay to me, but suggestions welcome.  As an alternative, I tried
explicitly ptrtoint'ing the operands, but the result doesn't seem
obviously better.

I deleted the test lsr-undef-in-binop.ll becuase I couldn't figure out
how to repair it to test what it was actually trying to test.

Differential Revision: https://reviews.llvm.org/D104806
The file was removedllvm/test/CodeGen/ARM/lsr-undef-in-binop.ll
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/X86/eh-insertion-point-2.ll
The file was modifiedllvm/lib/Analysis/StackSafetyAnalysis.cpp
The file was modifiedllvm/test/CodeGen/ARM/test-sharedidx.ll
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/X86/eh-insertion-point.ll
The file was modifiedllvm/include/llvm/Analysis/ScalarEvolution.h
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/pr27056.ll
The file was modifiedllvm/test/CodeGen/PowerPC/pr42492.ll
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/X86/ivchain-X86.ll
The file was modifiedllvm/test/CodeGen/X86/update-terminator-debugloc.ll
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-postinc-pos-addrspace.ll
The file was modifiedllvm/lib/Transforms/Scalar/AlignmentFromAssumptions.cpp
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/funclet.ll
The file was modifiedllvm/lib/Analysis/ScalarEvolutionAliasAnalysis.cpp
The file was modifiedllvm/lib/Transforms/Scalar/LoopRerollPass.cpp
The file was modifiedllvm/test/Analysis/StackSafetyAnalysis/local.ll
The file was modifiedllvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/X86/expander-reused-value-insert-point.ll
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/X86/expander-crashes.ll
Commit 600624a10326ad4be32be409e88b9b8580cef85d by listmail
[LoopVersion] Move an assert [nfc-ish]
The file was modifiedllvm/lib/Transforms/Utils/LoopVersioning.cpp
Commit 9ffa90d6c27e583bec9656a0aae5062ea5499094 by listmail
[LV] Disable epilogue vectorization for non-latch exits

When skimming through old review discussion, I noticed a post commit comment on an earlier patch which had gone unaddressed.  Better late (4 months), than never right?

I'm not aware of an active problem with the combination of non-latch exits and epilogue vectorization, but the interaction was not considered and I'm not modivated to make epilogue vectorization work with early exits. If there were a bug in the interaction, it would be pretty hard to hit right now (as we canonicalize towards bottom tested loops), but an upcoming change to allow multiple exit loops will greatly increase the chance for error.  Thus, let's play it safe for now.
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Commit 8517a26d442fa1b3d01e52a83ae76023ba7c9784 by cjdb
[libcxx][modularisation] splices `<iterator>` into individual headers

Differential Revision: https://reviews.llvm.org/D105076
The file was modifiedlibcxx/include/CMakeLists.txt
The file was modifiedlibcxx/include/__iterator/back_insert_iterator.h
The file was modifiedlibcxx/include/__iterator/ostream_iterator.h
The file was addedlibcxx/include/__iterator/reverse_access.h
The file was modifiedlibcxx/include/module.modulemap
The file was modifiedlibcxx/test/support/test_iterators.h
The file was modifiedlibcxx/include/__iterator/insert_iterator.h
The file was modifiedlibcxx/include/iterator
The file was addedlibcxx/include/__iterator/empty.h
The file was addedlibcxx/include/__iterator/access.h
The file was modifiedlibcxx/include/__iterator/istreambuf_iterator.h
The file was addedlibcxx/include/__iterator/data.h
The file was modifiedlibcxx/include/__iterator/ostreambuf_iterator.h
The file was addedlibcxx/include/__iterator/distance.h
The file was addedlibcxx/include/__iterator/size.h
The file was addedlibcxx/include/__iterator/erase_if_container.h
The file was modifiedlibcxx/include/__iterator/reverse_iterator.h
The file was modifiedlibcxx/include/__iterator/front_insert_iterator.h
The file was modifiedlibcxx/include/__iterator/istream_iterator.h
Commit 35e8cc4979eaa61377c323fc8ff17dd7d09e1f20 by spatel
[InstSimplify][test] add tests for poison propagation through FP calls; NFC
The file was modifiedllvm/test/Transforms/InstSimplify/call.ll
Commit 4ec7c021970d83ce49273ca5623953665720515f by spatel
[InstSimplify] fix bug in poison propagation for FP ops

If any operand of a math op is poison, that takes
precedence over general undef/NaN.

This should not be visible with binary ops because
it requires 2 constant operands to trigger (and if
both operands of a binop are constant, that should
get handled first in ConstantFolding).
The file was modifiedllvm/test/Transforms/InstSimplify/call.ll
The file was modifiedllvm/lib/Analysis/InstructionSimplify.cpp
Commit 7b6b15e010664ec444f3c20a9b15ff4324c8971c by i
[profile][test] Improve coverage-linkage.cpp with ld.lld --gc-sections

The __llvm_prf_names section uses SHF_GNU_RETAIN.  However, GNU ld before 2015-10
(https://sourceware.org/bugzilla/show_bug.cgi?id=19161) neither supports it nor
retains __llvm_prf_names according to __start___llvm_prf_names. So --gc-sections
does not work on such old GNU ld.

This is not a problem for gold and sufficiently new lld.
The file was modifiedcompiler-rt/test/profile/Linux/coverage-linkage.cpp
Commit 2ce0df4dfbead9eb0a91861c529910940c87593b by Louis Dionne
[libc++][docs] Overhaul the documentation for building and using libc++

This patch overhauls the documentation around building libc++
for vendors, and using libc++ for end-users. It also:

- Removes mention of the standalone build, which we've been trying to
  get rid of for a long time.
- Removes mention of using a local ABI installation, which we don't do
  and is documented as "not recommended".
- Removes mention of the separate libc++filesystem.a library, which isn't
  relevant anymore since filesystem support is in the main library.
- Adds mention of the GDB pretty printers and how to use them.
The file was modifiedlibcxx/docs/BuildingLibcxx.rst
The file was modifiedlibcxx/utils/ci/run-buildbot
The file was modifiedlibcxx/docs/UsingLibcxx.rst
The file was modifiedlibcxx/docs/index.rst
Commit 045872f42203223450c96a518b6478d255a5d586 by wanyu9511
[AIX] Define __TOS_AIX__ predefined macro

%%%
Transfer the predefined macro, __TOS_AIX__, from the AIX XL C/C++ compilers.

__TOS_AIX__ indicates that the target operating system is AIX.
%%%

Reviewed By: cebowleratibm

Differential Revision: https://reviews.llvm.org/D103587
The file was modifiedclang/lib/Basic/Targets/OSTargets.h
The file was modifiedclang/test/Preprocessor/init-ppc.c
Commit a6d081b2cbc3348ed7261254ae7a563146b76d23 by efriedma
Revert "[ScalarEvolution] Make getMinusSCEV() fail for unrelated pointers."

This reverts commit 74d6ce5d5f169e9cf3fac0eb1042602e286dd2b9.

Seeing crashes on buildbots in MemoryDepChecker::isDependent.
The file was addedllvm/test/CodeGen/ARM/lsr-undef-in-binop.ll
The file was modifiedllvm/test/CodeGen/PowerPC/pr42492.ll
The file was modifiedllvm/lib/Transforms/Scalar/AlignmentFromAssumptions.cpp
The file was modifiedllvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
The file was modifiedllvm/test/CodeGen/X86/update-terminator-debugloc.ll
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/X86/expander-crashes.ll
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-postinc-pos-addrspace.ll
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/X86/expander-reused-value-insert-point.ll
The file was modifiedllvm/test/Analysis/StackSafetyAnalysis/local.ll
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/funclet.ll
The file was modifiedllvm/include/llvm/Analysis/ScalarEvolution.h
The file was modifiedllvm/lib/Analysis/StackSafetyAnalysis.cpp
The file was modifiedllvm/lib/Transforms/Scalar/LoopRerollPass.cpp
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/pr27056.ll
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/X86/eh-insertion-point.ll
The file was modifiedllvm/test/CodeGen/ARM/test-sharedidx.ll
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/X86/ivchain-X86.ll
The file was modifiedllvm/lib/Analysis/ScalarEvolutionAliasAnalysis.cpp
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/X86/eh-insertion-point-2.ll
Commit 7a46d8f50c59e9ca0f180e7dbdd7db7bbe4b272b by llvmgnsyncbot
[gn build] Port 8517a26d442f
The file was modifiedllvm/utils/gn/secondary/libcxx/include/BUILD.gn
Commit be0924ad179eb7113fb7539bb2d7fc681ffd9ed9 by david.green
[Tests] Update some tests for D104765. NFC
The file was modifiedllvm/test/CodeGen/Hexagon/isel-global-offset-alignment.ll
The file was modifiedllvm/test/CodeGen/SystemZ/addr-02.ll
The file was modifiedllvm/test/CodeGen/SystemZ/addr-01.ll
The file was modifiedllvm/test/CodeGen/ARM/add-like-or.ll
Commit 2b0d95fb584e6d6409c57c84bd992f3d62b0eac6 by mgorny
[openmp] [test] Add missing <limits> include to capacity_nthreads

Differential Revision: https://reviews.llvm.org/D105474
The file was modifiedopenmp/runtime/test/tasking/hidden_helper_task/capacity_nthreads.cpp
Commit 2d68bb1765f978f0426f1face22e4ff37439a224 by mgorny
[compiler-rt] [test] Fix asan symbolize tests on py3.10

Update the asan_symbolize_script for changes in argparse output
in Python 3.10.  The parser output 'options' instead of 'optional
arguments'.

Differential Revision: https://reviews.llvm.org/D105489
The file was modifiedcompiler-rt/test/asan/TestCases/Posix/asan_symbolize_script/plugin_no_op_help_output.cpp
The file was modifiedcompiler-rt/test/asan/TestCases/Posix/asan_symbolize_script/logging_options_in_help.cpp
Commit 12d51f95fe7fe8d4aec234c2b842478f75154273 by craig.topper
[RISCV] Implement lround*/llround*/lrint*/llrint* with fcvt instruction with -fno-math-errno

These are fp->int conversions using either RMM or dynamic rounding modes.

The lround and lrint opcodes have a return type of either i32 or
i64 depending on sizeof(long) in the frontend which should follow
xlen. llround/llrint should always return i64 so we'll need a libcall
for those on rv32.

The frontend will only emit the intrinsics if -fno-math-errno is in
effect otherwise a libcall will be emitted which will not use
these ISD opcodes.

gcc also does this optimization.

Reviewed By: arcbbb

Differential Revision: https://reviews.llvm.org/D105206
The file was modifiedllvm/test/CodeGen/RISCV/float-intrinsics.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoF.td
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoD.td
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoZfh.td
The file was modifiedllvm/test/CodeGen/RISCV/half-intrinsics.ll
The file was modifiedllvm/test/CodeGen/RISCV/double-intrinsics.ll
Commit 5d2511c38988af69af4b4162ef40f2eb0268a610 by Louis Dionne
[libc++] NFC: Sort header lists and remove outdated comments in modulemap
The file was modifiedlibcxx/include/module.modulemap
The file was modifiedlibcxx/include/CMakeLists.txt
Commit 6e43f3fc141f73a50638aab159de92c1c6d257da by Louis Dionne
[libc++] Do not set CMAKE_BUILD_WITH_INSTALL_NAME_DIR

I'm not sure what that gains us, and it creates a problem when
trying to run the tests against libc++ with a custom install name
dir (e.g. /usr/lib), since the library that we link against (in
the build tree) will advertise itself as /usr/lib/libc++.dylib,
so we end up linking against the system dylib at runtime.

Differential Revision: https://reviews.llvm.org/D105499
The file was modifiedlibcxx/utils/ci/runtimes/CMakeLists.txt
The file was modifiedlibcxx/CMakeLists.txt
Commit 7ac1c7bead90757b5a135747810e41e8ffae5951 by efriedma
Recommit [ScalarEvolution] Make getMinusSCEV() fail for unrelated pointers.

As part of making ScalarEvolution's handling of pointers consistent, we
want to forbid multiplying a pointer by -1 (or any other value). This
means we can't blindly subtract pointers.

There are a few ways we could deal with this:
1. We could completely forbid subtracting pointers in getMinusSCEV()
2. We could forbid subracting pointers with different pointer bases
(this patch).
3. We could try to ptrtoint pointer operands.

The option in this patch is more friendly to non-integral pointers: code
that works with normal pointers will also work with non-integral
pointers. And it seems like there are very few places that actually
benefit from the third option.

As a minimal patch, the ScalarEvolution implementation of getMinusSCEV
still ends up subtracting pointers if they have the same base.  This
should eliminate the shared pointer base, but eventually we'll need to
rewrite it to avoid negating the pointer base. I plan to do this as a
separate step to allow measuring the compile-time impact.

This doesn't cause obvious functional changes in most cases; the one
case that is significantly affected is ICmpZero handling in LSR (which
is the source of almost all the test changes).  The resulting changes
seem okay to me, but suggestions welcome.  As an alternative, I tried
explicitly ptrtoint'ing the operands, but the result doesn't seem
obviously better.

I deleted the test lsr-undef-in-binop.ll becuase I couldn't figure out
how to repair it to test what it was actually trying to test.

Recommitting with fix to MemoryDepChecker::isDependent.

Differential Revision: https://reviews.llvm.org/D104806
The file was modifiedllvm/lib/Analysis/LoopAccessAnalysis.cpp
The file was modifiedllvm/lib/Analysis/StackSafetyAnalysis.cpp
The file was removedllvm/test/CodeGen/ARM/lsr-undef-in-binop.ll
The file was modifiedllvm/test/Analysis/StackSafetyAnalysis/local.ll
The file was modifiedllvm/test/CodeGen/PowerPC/pr42492.ll
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/X86/expander-reused-value-insert-point.ll
The file was modifiedllvm/test/CodeGen/X86/update-terminator-debugloc.ll
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/funclet.ll
The file was modifiedllvm/lib/Transforms/Scalar/AlignmentFromAssumptions.cpp
The file was modifiedllvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
The file was modifiedllvm/lib/Transforms/Scalar/LoopRerollPass.cpp
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-postinc-pos-addrspace.ll
The file was modifiedllvm/lib/Analysis/ScalarEvolutionAliasAnalysis.cpp
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/X86/ivchain-X86.ll
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/X86/expander-crashes.ll
The file was modifiedllvm/include/llvm/Analysis/ScalarEvolution.h
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/X86/eh-insertion-point-2.ll
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was modifiedllvm/test/CodeGen/ARM/test-sharedidx.ll
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/X86/eh-insertion-point.ll
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/pr27056.ll
Commit 76f734040a54622b847729e5acb4480e667d2c74 by thakis
[lld/mac] Give several LTO tests an "lto-" prefix

Differential Revision: https://reviews.llvm.org/D105476
The file was removedlld/test/MachO/objc-arc-contract.ll
The file was addedlld/test/MachO/lto-codemodel.ll
The file was removedlld/test/MachO/cpu-string.ll
The file was removedlld/test/MachO/internalize.ll
The file was addedlld/test/MachO/lto-mattrs.ll
The file was removedlld/test/MachO/bitcode-nodatalayout.ll
The file was addedlld/test/MachO/lto-cpu-string.ll
The file was removedlld/test/MachO/mattrs.ll
The file was addedlld/test/MachO/lto-module-asm.ll
The file was addedlld/test/MachO/invalid/lto-bitcode-nodatalayout.ll
The file was addedlld/test/MachO/lto-internalize.ll
The file was removedlld/test/MachO/linkonce.ll
The file was removedlld/test/MachO/codemodel.ll
The file was addedlld/test/MachO/lto-linkonce.ll
The file was addedlld/test/MachO/lto-objc-arc-contract.ll
The file was removedlld/test/MachO/module-asm.ll
Commit 94e01d579c1954bed2dbd2d82a64ff72baf72223 by kparzysz
[Hexagon] Generate trap/undef if misaligned access is detected

This applies to memory accesses to (compile-time) constant addresses
(such as memory-mapped registers). Currently when a misaligned access
to such an address is detected, a fatal error is reported. This change
will emit a remark, and the compilation will continue with a trap,
and "undef" (for loads) emitted.

This fixes https://llvm.org/PR50838.

Differential Revision: https://reviews.llvm.org/D50524
The file was modifiedllvm/lib/Target/Hexagon/HexagonISelLowering.h
The file was modifiedllvm/test/CodeGen/Hexagon/misaligned-const-store.ll
The file was modifiedllvm/lib/Target/Hexagon/HexagonISelLowering.cpp
The file was modifiedllvm/test/CodeGen/Hexagon/misaligned-const-load.ll
Commit 8d69635ed9ecf36fd0ca85906bfde17949671cbe by Tony.Tye
[NFC][AMDGPU] Add link to AMD GPU gfx906 instruction set architecture

Reviewed By: kzhuravl

Differential Revision: https://reviews.llvm.org/D105377
The file was modifiedllvm/docs/AMDGPUUsage.rst
Commit aff66b7eef467e2f8d89877b2864daa3888b1c13 by Stanislav.Mekhanoshin
[AMDGPU] Fix pass name of AMDGPULowerKernelAttributes. NFC.

This was obviously copy-pasted.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULowerKernelAttributes.cpp
Commit 5915d33874fd0278f72f2c1a8cf2047bdf0ffd31 by Stanislav.Mekhanoshin
[AMDGPU] Do not run IR optimizations at -O0

Differential Revision: https://reviews.llvm.org/D105515
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/llc-pipeline.ll
Commit a0ab45799b597f5523b14e5910e25256f5b8a489 by Stanislav.Mekhanoshin
[AMDGPU] Move atomic expand past infer address spaces

There are cases where infer address spaces pass cannot yet
infer an address space in the opt pipeline and then in the
llc pipeline it runs too late for atomic expand pass to
benefit from a specific address space.

Move atomic expand pass past the infer address spaces.

Fixes: SWDEV-293410

Differential Revision: https://reviews.llvm.org/D105511
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/llc-pipeline.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/global-atomics-fp.ll
Commit 6c9559b67b91966bfeff9e17808a3e84a92e64a0 by dblaikie
DebugInfo: Mangle K&R declarations for debug info linkage names

This fixes a gap in the `overloadable` attribute support (K&R declared
functions would get mangled symbol names, but that name wouldn't be
represented in the debug info linkage name field for the function) and
in -funique-internal-linkage-names (this came up in review discussion on
D98799) where K&R static declarations would not get the uniqued linkage
names.
The file was addedclang/test/CodeGen/overloadable-debug.c
The file was modifiedclang/lib/CodeGen/CGDebugInfo.cpp
The file was modifiedclang/lib/AST/ItaniumMangle.cpp
The file was modifiedclang/test/CodeGen/unique-internal-linkage-names-dwarf.c
Commit 56b3e9edc49314e874c9d52e9d5f5cf08f62c948 by efriedma
[AArch64] Sync isDef32 to the current x86 version.

We should probably come up with some better way to do this, but let's
make sure to catch known issues for now.
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h
Commit 75eb43ab490fd8e16c231fc40e9ec589c867cee5 by efriedma
[AArch64] Add more tests related to vselect with constant condition.

Not a complete set of tests, but a starting point if anyone wants to
look at improving this.
The file was modifiedllvm/test/CodeGen/AArch64/neon-bitwise-instructions.ll
Commit f2d5fce86e81a8b37fbc0829a1c68b6eb48f8365 by mizvekov
[clang] fixes named return of variables with dependent alignment

Named return of a variable with aligned attribute would
trip an assert in case alignment was dependent.

Signed-off-by: Matheus Izvekov <mizvekov@gmail.com>

Reviewed By: rsmith

Differential Revision: https://reviews.llvm.org/D105380
The file was modifiedclang/lib/Sema/SemaDecl.cpp
The file was modifiedclang/lib/Sema/SemaStmt.cpp
The file was modifiedclang/lib/AST/Decl.cpp
The file was modifiedclang/test/CXX/class/class.init/class.copy.elision/p3.cpp
The file was modifiedclang/test/CodeGen/nrvo-tracking.cpp
The file was modifiedclang/include/clang/AST/Decl.h
Commit 3553698de7a1033bd9ca79f9cfee83c85f4e20d4 by nemanja.i.ibm
[PowerPC] Re-enable combine for i64 BSWAP on targets without LDBRX

The combine was disabled in 4e22c7265d86 as it caused failures in
the ppc64be-multistage (bootstrap) bot.
It turns out that the combine did not correctly update the MMO for
the high load which caused aliased stores to be reported as unaliased.
This patch fixes that problem and re-enables the combine.
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
The file was modifiedllvm/test/CodeGen/PowerPC/bswap-load-store.ll
The file was modifiedllvm/test/CodeGen/PowerPC/ld-bswap64-no-ldbrx.ll
Commit 7f1c077c3014760030cbaebdfccb8f99a4ec41c5 by tstellar
tests/CodeGen: Use %python lit substitution when invoking python

This will use the python that LLVM was configured to use rather than
python from PATH.

Reviewed By: serge-sans-paille

Differential Revision: https://reviews.llvm.org/D105224
The file was modifiedllvm/test/CodeGen/SystemZ/Large/branch-range-02.py
The file was modifiedllvm/test/CodeGen/SystemZ/Large/branch-range-03.py
The file was modifiedllvm/test/CodeGen/SystemZ/Large/branch-range-04.py
The file was modifiedllvm/test/CodeGen/SystemZ/Large/branch-range-07.py
The file was modifiedllvm/test/CodeGen/SystemZ/Large/branch-range-11.py
The file was modifiedllvm/test/CodeGen/SystemZ/Large/branch-range-05.py
The file was modifiedllvm/test/CodeGen/SystemZ/Large/branch-range-09.py
The file was modifiedllvm/test/CodeGen/NVPTX/ld-st-addrrspace.py
The file was modifiedllvm/test/CodeGen/SystemZ/Large/spill-02.py
The file was modifiedllvm/test/CodeGen/NVPTX/wmma.py
The file was modifiedllvm/test/CodeGen/SystemZ/Large/branch-range-13.py
The file was modifiedllvm/test/CodeGen/SystemZ/Large/branch-range-06.py
The file was modifiedllvm/test/CodeGen/SystemZ/Large/branch-range-08.py
The file was modifiedllvm/test/CodeGen/SystemZ/Large/branch-range-10.py
The file was modifiedllvm/test/CodeGen/SystemZ/Large/spill-01.py
The file was modifiedllvm/test/CodeGen/SystemZ/Large/branch-range-01.py
The file was modifiedllvm/test/CodeGen/SystemZ/Large/branch-range-12.py
Commit 11d88c4acb682d672a216ec1b684ea0b53ce94e7 by uday
[MLIR][NFC] Move normalizeAffine methods to Affine utils

The normalizeAffineForOp and normalizedAffineParallel methods were
misplaced in the AffineLoopNormalize pass file while their declarations
were in affine utils. Move these to affine Utils.cpp. NFC.

Differential Revision: https://reviews.llvm.org/D105468
The file was modifiedmlir/lib/Dialect/Affine/Transforms/AffineLoopNormalize.cpp
The file was modifiedmlir/lib/Dialect/Affine/Utils/Utils.cpp
Commit fc82409b5ce5ddcd038ff0bf192a9a2a03b23020 by johannes
[Attributor] Simplify operands inside of simplification AAs first

When we do simplification via AAPotentialValues or AAValueConstantRange
we need to simplify the operands of an instruction we deconstruct first.
This does not only improve the result, see for example range.ll, but is
required as we allow outside AAs to provide simplification rules via
callbacks. If we do ignore the simplification rules and base other
simplifications on the IR instead we can create an inconsistent state.
The file was modifiedllvm/test/Transforms/Attributor/value-simplify-pointer-info.ll
The file was modifiedllvm/lib/Transforms/IPO/Attributor.cpp
The file was modifiedllvm/test/Transforms/Attributor/callgraph.ll
The file was modifiedllvm/test/Transforms/Attributor/willreturn.ll
The file was modifiedllvm/test/Transforms/Attributor/potential.ll
The file was modifiedllvm/test/Transforms/Attributor/IPConstantProp/PR16052.ll
The file was modifiedllvm/test/Transforms/Attributor/liveness.ll
The file was modifiedllvm/test/Transforms/Attributor/nonnull.ll
The file was modifiedllvm/test/Transforms/Attributor/range.ll
The file was modifiedllvm/test/Transforms/Attributor/cgscc_bugs.ll
The file was modifiedllvm/test/Transforms/Attributor/ArgumentPromotion/inalloca.ll
The file was modifiedllvm/lib/Transforms/IPO/AttributorAttributes.cpp
The file was modifiedllvm/test/Transforms/Attributor/dereferenceable-1.ll
The file was modifiedllvm/include/llvm/Transforms/IPO/Attributor.h
The file was modifiedllvm/test/Transforms/Attributor/cb_range_enabled.ll
The file was modifiedllvm/test/Transforms/Attributor/internalize.ll
The file was modifiedllvm/test/Transforms/Attributor/lvi-after-jumpthreading.ll
The file was modifiedllvm/test/Transforms/Attributor/value-simplify.ll
The file was modifiedllvm/test/Transforms/Attributor/depgraph.ll
Commit aa3768278d4b1c91e6e55b596fa0d832a25428dc by johannes
[Attributor] Introduce a helper function to deal with undef + none

We often need to deal with the value lattice that contains none and
undef as special values. A simple helper makes this much nicer.

Differential Revision: https://reviews.llvm.org/D103857
The file was modifiedllvm/test/Transforms/Attributor/range.ll
The file was modifiedllvm/include/llvm/Transforms/IPO/Attributor.h
The file was modifiedllvm/test/Transforms/Attributor/nonnull.ll
The file was modifiedllvm/test/Transforms/Attributor/dereferenceable-1.ll
The file was modifiedllvm/test/Transforms/Attributor/value-simplify.ll
The file was modifiedllvm/lib/Transforms/IPO/Attributor.cpp
The file was modifiedllvm/test/Transforms/Attributor/potential.ll
The file was modifiedllvm/test/Transforms/Attributor/lvi-after-jumpthreading.ll
The file was modifiedllvm/test/Transforms/Attributor/returned.ll
The file was modifiedllvm/lib/Transforms/IPO/AttributorAttributes.cpp
The file was modifiedllvm/test/Transforms/Attributor/liveness.ll
The file was modifiedllvm/test/Transforms/Attributor/nocapture-2.ll
Commit 9bd2ee07885cc1ef47dedd0b827908f51fb3565f by johannes
[Attriibutor][NFC] Precommit heap-2-stack test case
The file was modifiedllvm/test/Transforms/Attributor/heap_to_stack.ll
Commit 168a9234d7bbeebec3a5f16c619b68a3eba7b114 by johannes
[Attributor][FIX] Replace uses first, then values

Before we replaced value by registering all their uses. However, as we
replace a value old uses become stale. We now replace values explicitly
and keep track of "new values" when doing so to avoid replacing only
uses in stale/old values but not their replacements.
The file was modifiedllvm/lib/Transforms/IPO/Attributor.cpp
The file was modifiedllvm/test/Transforms/Attributor/potential.ll
The file was modifiedllvm/include/llvm/Transforms/IPO/Attributor.h

Summary

  1. Enable LLD tests together with the expensive checks on the expensive check builders. (details)
Commit 08662254487c6c6f01947e05925f1502e27367c9 by vvereschaka
Enable LLD tests together with the expensive checks on the expensive check builders.

nclude LLD project to build and run the tests together with LLVM expensive checks on all
appropriate builders:

llvm-clang-x86_64-expensive-checks-ubuntu
llvm-clang-x86_64-expensive-checks-win
llvm-clang-x86_64-expensive-checks-debian
llvm-clang-x86_64-expensive-checks-ubuntu-release
llvm-clang-x86_64-expensive-checks-win-release
llvm-clang-x86_64-expensive-checks-debian-release

The LLD test use the expensive check data structures and it would be good to detect
the failures when they configured with -DLLVM_ENABLE_EXPENSIVE_CHECKS=ON (ref: D105071)

Differential Revision: https://reviews.llvm.org/D105369
The file was modifiedbuildbot/osuosl/master/config/builders.py
The file was modifiedbuildbot/osuosl/master/config/release_builders.py