Started 3 mo 22 days ago
Took 17 min

Build #1906 (Jul 7, 2021 10:01:07 PM)

Changes
  1. [AMDGPU] isPassEnabled() helper to check cl::opt and OptLevel (details)
  2. [Clang][RISCV] Implement vlseg and vlsegff. (details)
  3. [MLIR] Split out GPU ops library from Transforms (details)
  4. [llvm-readobj][test] Improve grouped option test (details)
  5. [MLIR] Simplify affine.if having yield values and trivial conditions (details)
  6. [flang] Create HostAssocDetails symbols when needed for mis-parsed ArrayRef (details)
  7. [AMDGPU] Simplify tablegen files. NFC. (details)
  8. [mlir][Linalg] Add an InitTensor -> DimOp canonicalization pattern. (details)
  9. [mlir] factor out common parts of the converstion to the LLVM dialect (details)
  10. [SVE] Fix cast<FixedVectorType> in truncateToMinimalBitwidths (details)
  11. [Clang] Add test dependency on llvm-ar (details)
  12. [DAG] Reassociate Add with Or (details)
  13. [mlir][CAPI] Export mlirValueEqual in C API (details)
  14. Add Log1pOp to complex dialect. (details)
  15. [SVE] Fixed cast<FixedVectorType> on scalable vector in SelectionDAGBuilder::getUniformBase (details)
  16. [NFC] Remove duplicate function calls (details)
  17. [libc++] Implement copyable-box from Ranges (details)
  18. [gn build] Port 6829db727e9e (details)
  19. [CostModel][X86] Adjust sitofp/uitofp SSE/AVX legalized costs based on llvm-mca reports. (details)
  20. [mlir][Linalg] Proper handling of ForOp and TiledLoopOp (details)
  21. Refactor GenericPadTensorOpVectorizationPattern (details)
  22. [mlir][Linalg] Rewrite PadTensorOp to enable its comprehensive bufferization. (details)
  23. [mlir] Move common reshapeops-related code to ReshapeOpsUtils.h. (details)
  24. [OPENMP]Remove const firstprivate allocation as a variable in a constant space. (details)
  25. [CostModel][X86] Adjust sext/zext SSE/AVX legalized costs based on llvm-mca reports. (details)
  26. [IndVarSimplify][X86] Regenerate loop-invariant-conditions.ll test checks (details)
  27. [AIX] Use VSSRC/VSFRC Register classes for f32/f64 callee arguments on P8 and above (details)
  28. [coro async] Move code to proper switch (details)
  29. [mlir] Use indices instead of affine maps when composing 2 reshape ops. (details)
  30. [CostModel] Express cost(urem) as cost(div+mul+sub) when set to Expand. (details)
  31. [libc++] NFC: Fix incorrect comments in CMake (details)
  32. unittests: Fix build with LLVM_LINK_LLVM_DYLIB=ON (details)
  33. unittests: Fix library dependency name (details)
  34. [Polly][Isl] Use isl::union_set::unite() instead of isl::union_set::add_set(). NFC (details)
  35. [SVE] Fix ShuffleVector cast<FixedVectorType> in truncateToMinimalBitwidths (details)
  36. [AArch64][GlobalISel] Lower vector types for min/max (details)
  37. [LV] Unconditionally branch from middle to scalar preheader if the scalar loop must execute (try 4) (details)
  38. [SystemZ][z/OS][libcxx] mark aligned allocation tests UNSUPPORTED on z/OS (details)
  39. [LIBC] Add an optimized memcmp implementation for AArch64 (details)
  40. [coro async] Cap the alignment of spilled values (vs.  allocas) at the max frame alignment (details)
  41. [LLDB][GUI] Add initial forms support (details)
  42. [Flang][Docs] Update meeting URL (details)
  43. [lld/mac] Tweak reserve() argument in unwind code (details)
  44. [X86][Atom] Fix vector fp<->int resource/throughputs (details)
  45. Fix broken libc test (details)
  46. [NFC][lldb-vscode] Fix launch test (details)
  47. [lld/mac] Don't crash when dead-stripping removes all unwind info (details)
  48. [lld-macho][nfc] Rename test file to be more descriptive (rather than referencing the bug number) (details)
  49. [ScalarEvolution] Make sure getMinusSCEV doesn't negate pointers. (details)
  50. [libTooling] Add support for implicit `this` to `buildAddressOf`. (details)
  51. [lldb][docs] Force documentation emission of special Python class members (details)
  52. [lldb/lua] Add scripted watchpoints for Lua (details)
  53. Fix a failing assertion with -Wcast-align (details)
  54. [mlir][vector] Refactor Vector Unrolling and remove Tuple ops (details)
  55. [dfsan][NFC] Add Origin Tracking into doc (details)
  56. [mlir] Allow conversion to LLVM for ElementsAttr's with size 0 (details)
  57. [SLP] rename variable to not be misleading; NFC (details)
  58. [SCEVExpander] Support opaque pointers (details)
  59. [PowerPC] Disable permuted SCALAR_TO_VECTOR on LE without direct moves (details)
  60. [COFF] [CodeView] Add a few new enum values (details)
  61. [LLD] [COFF] Avoid thread exhaustion on 32-bit Windows host (details)
  62. [CodeView] Add missing cases for new enum values (details)
  63. [MLIR] Provide lowering of std switch to llvm switch (details)
  64. [SCF] Handle lowering of Execute region to Standard CFG (details)
  65. [AArch64] Simplify sve-breakdown-scalable-vectortype.ll. (details)
  66. GlobalISel/AArch64: don't optimize away redundant branches at -O0 (details)
  67. [IR] Make some pointer element type accesses explicit (NFC) (details)
  68. [llvm-nm] Switch command line parsing from llvm::cl to OptTable (details)
  69. [IR] Simplify Attribute::getAsString() (NFC) (details)
  70. [AsmWriter] Simplify type attribute printing (NFC) (details)
  71. [ARM] Add some opaque pointer gather/scatter tests. NFC (details)
  72. [MCA] [AMDGPU] Adding an implementation to AMDGPUCustomBehaviour for handling s_waitcnt instructions. (details)
  73. utils: add a revert checker (details)
  74. [OpaquePtr] Remove checking pointee type for byval/preallocated type (details)
  75. [PowerPC] Add P7 RUN line for load and splat test (details)
  76. [OpaquePtr] Use ArgListEntry::IndirectType for lowering ABI attributes (details)
  77. [llvm-nm][test] Fix just-symbols.test (details)
  78. [compiler-rt][hwasan] Setup hwasan thread handling on Fuchsia (details)
  79. [clang] disable P2266 simpler implicit moves under -fms-compatibility (details)
  80. [compiler-rt][Fuchsia] Disable interceptors while enabling new/delete replacements (details)
  81. [AMDGPU] Disable garbage collection passes (details)
  82. [gn build] (semi-manually) port 966386514bec (details)
  83. [Bazel] Fixes for b5d847b1b95750d0af40cfc8c71a8fec50bb8613 and 6412a13539ab2914eed8e1df83c399b9a16e3408 (details)
  84. [gn build] (manually) port ef16c8eaa5cd5679759 (MCACustomBehaviorAMDGPU) (details)
  85. [AIX] Don't pass no-integrated-as by default (details)
  86. [PowerPC] Fix i64 to vector lowering on big endian (details)
  87. Revert "[MCA] [AMDGPU] Adding an implementation to AMDGPUCustomBehaviour for handling s_waitcnt instructions." (details)
  88. [ORC] Fix file comments. (details)
  89. [ORC] Replace MachOJITDylibInitializers::SectionExtent with ExecutorAddressRange (details)

Started by timer

This run spent:

  • 7 ms waiting;
  • 17 min build duration;
  • 17 min total from scheduled to completion.
Revision: 08662254487c6c6f01947e05925f1502e27367c9
Repository: https://github.com/llvm/llvm-zorg.git
  • refs/remotes/origin/main
Revision: 5471766f9d16fbc5a82dd9503729747d901242a1
Repository: http://labmaster3.local/git/llvm-project.git
  • refs/remotes/origin/main
Revision: 08662254487c6c6f01947e05925f1502e27367c9
Repository: http://labmaster3.local/git/llvm-zorg.git
  • refs/remotes/origin/main

Identified problems

Compile Error

This build failed because of a compile error. Below is a list of all errors in the build log:
Indication 1

Missing test results

The test result file Jenkins is looking for does not exist after the build.
Indication 2

Ninja target failed

Below is a link to the first failed ninja target.
Indication 3