Changes

Summary

  1. [AMDGPU] isPassEnabled() helper to check cl::opt and OptLevel (details)
  2. [Clang][RISCV] Implement vlseg and vlsegff. (details)
  3. [MLIR] Split out GPU ops library from Transforms (details)
  4. [llvm-readobj][test] Improve grouped option test (details)
  5. [MLIR] Simplify affine.if having yield values and trivial conditions (details)
  6. [flang] Create HostAssocDetails symbols when needed for mis-parsed ArrayRef (details)
  7. [AMDGPU] Simplify tablegen files. NFC. (details)
  8. [mlir][Linalg] Add an InitTensor -> DimOp canonicalization pattern. (details)
  9. [mlir] factor out common parts of the converstion to the LLVM dialect (details)
  10. [SVE] Fix cast<FixedVectorType> in truncateToMinimalBitwidths (details)
  11. [Clang] Add test dependency on llvm-ar (details)
  12. [DAG] Reassociate Add with Or (details)
  13. [mlir][CAPI] Export mlirValueEqual in C API (details)
  14. Add Log1pOp to complex dialect. (details)
  15. [SVE] Fixed cast<FixedVectorType> on scalable vector in SelectionDAGBuilder::getUniformBase (details)
  16. [NFC] Remove duplicate function calls (details)
  17. [libc++] Implement copyable-box from Ranges (details)
  18. [gn build] Port 6829db727e9e (details)
  19. [CostModel][X86] Adjust sitofp/uitofp SSE/AVX legalized costs based on llvm-mca reports. (details)
  20. [mlir][Linalg] Proper handling of ForOp and TiledLoopOp (details)
  21. Refactor GenericPadTensorOpVectorizationPattern (details)
  22. [mlir][Linalg] Rewrite PadTensorOp to enable its comprehensive bufferization. (details)
  23. [mlir] Move common reshapeops-related code to ReshapeOpsUtils.h. (details)
  24. [OPENMP]Remove const firstprivate allocation as a variable in a constant space. (details)
  25. [CostModel][X86] Adjust sext/zext SSE/AVX legalized costs based on llvm-mca reports. (details)
  26. [IndVarSimplify][X86] Regenerate loop-invariant-conditions.ll test checks (details)
  27. [AIX] Use VSSRC/VSFRC Register classes for f32/f64 callee arguments on P8 and above (details)
  28. [coro async] Move code to proper switch (details)
  29. [mlir] Use indices instead of affine maps when composing 2 reshape ops. (details)
  30. [CostModel] Express cost(urem) as cost(div+mul+sub) when set to Expand. (details)
  31. [libc++] NFC: Fix incorrect comments in CMake (details)
  32. unittests: Fix build with LLVM_LINK_LLVM_DYLIB=ON (details)
  33. unittests: Fix library dependency name (details)
  34. [Polly][Isl] Use isl::union_set::unite() instead of isl::union_set::add_set(). NFC (details)
  35. [SVE] Fix ShuffleVector cast<FixedVectorType> in truncateToMinimalBitwidths (details)
  36. [AArch64][GlobalISel] Lower vector types for min/max (details)
  37. [LV] Unconditionally branch from middle to scalar preheader if the scalar loop must execute (try 4) (details)
  38. [SystemZ][z/OS][libcxx] mark aligned allocation tests UNSUPPORTED on z/OS (details)
  39. [LIBC] Add an optimized memcmp implementation for AArch64 (details)
  40. [coro async] Cap the alignment of spilled values (vs.  allocas) at the max frame alignment (details)
  41. [LLDB][GUI] Add initial forms support (details)
  42. [Flang][Docs] Update meeting URL (details)
  43. [lld/mac] Tweak reserve() argument in unwind code (details)
  44. [X86][Atom] Fix vector fp<->int resource/throughputs (details)
  45. Fix broken libc test (details)
  46. [NFC][lldb-vscode] Fix launch test (details)
  47. [lld/mac] Don't crash when dead-stripping removes all unwind info (details)
  48. [lld-macho][nfc] Rename test file to be more descriptive (rather than referencing the bug number) (details)
  49. [ScalarEvolution] Make sure getMinusSCEV doesn't negate pointers. (details)
  50. [libTooling] Add support for implicit `this` to `buildAddressOf`. (details)
  51. [lldb][docs] Force documentation emission of special Python class members (details)
  52. [lldb/lua] Add scripted watchpoints for Lua (details)
  53. Fix a failing assertion with -Wcast-align (details)
  54. [mlir][vector] Refactor Vector Unrolling and remove Tuple ops (details)
  55. [dfsan][NFC] Add Origin Tracking into doc (details)
  56. [mlir] Allow conversion to LLVM for ElementsAttr's with size 0 (details)
  57. [SLP] rename variable to not be misleading; NFC (details)
  58. [SCEVExpander] Support opaque pointers (details)
  59. [PowerPC] Disable permuted SCALAR_TO_VECTOR on LE without direct moves (details)
  60. [COFF] [CodeView] Add a few new enum values (details)
  61. [LLD] [COFF] Avoid thread exhaustion on 32-bit Windows host (details)
  62. [CodeView] Add missing cases for new enum values (details)
  63. [MLIR] Provide lowering of std switch to llvm switch (details)
  64. [SCF] Handle lowering of Execute region to Standard CFG (details)
  65. [AArch64] Simplify sve-breakdown-scalable-vectortype.ll. (details)
  66. GlobalISel/AArch64: don't optimize away redundant branches at -O0 (details)
  67. [IR] Make some pointer element type accesses explicit (NFC) (details)
  68. [llvm-nm] Switch command line parsing from llvm::cl to OptTable (details)
  69. [IR] Simplify Attribute::getAsString() (NFC) (details)
  70. [AsmWriter] Simplify type attribute printing (NFC) (details)
  71. [ARM] Add some opaque pointer gather/scatter tests. NFC (details)
  72. [MCA] [AMDGPU] Adding an implementation to AMDGPUCustomBehaviour for handling s_waitcnt instructions. (details)
  73. utils: add a revert checker (details)
  74. [OpaquePtr] Remove checking pointee type for byval/preallocated type (details)
  75. [PowerPC] Add P7 RUN line for load and splat test (details)
  76. [OpaquePtr] Use ArgListEntry::IndirectType for lowering ABI attributes (details)
  77. [llvm-nm][test] Fix just-symbols.test (details)
  78. [compiler-rt][hwasan] Setup hwasan thread handling on Fuchsia (details)
  79. [clang] disable P2266 simpler implicit moves under -fms-compatibility (details)
  80. [compiler-rt][Fuchsia] Disable interceptors while enabling new/delete replacements (details)
  81. [AMDGPU] Disable garbage collection passes (details)
  82. [gn build] (semi-manually) port 966386514bec (details)
  83. [Bazel] Fixes for b5d847b1b95750d0af40cfc8c71a8fec50bb8613 and 6412a13539ab2914eed8e1df83c399b9a16e3408 (details)
  84. [gn build] (manually) port ef16c8eaa5cd5679759 (MCACustomBehaviorAMDGPU) (details)
  85. [AIX] Don't pass no-integrated-as by default (details)
  86. [PowerPC] Fix i64 to vector lowering on big endian (details)
  87. Revert "[MCA] [AMDGPU] Adding an implementation to AMDGPUCustomBehaviour for handling s_waitcnt instructions." (details)
  88. [ORC] Fix file comments. (details)
  89. [ORC] Replace MachOJITDylibInitializers::SectionExtent with ExecutorAddressRange (details)
Commit b16400449fc763fdae2d2ce809ce61c88acb6684 by Stanislav.Mekhanoshin
[AMDGPU] isPassEnabled() helper to check cl::opt and OptLevel

We have several checks for both cl::opt and OptLevel over our
pass config, although these checks do not properly work if
default value of a cl::opt will be false. Create a helper to
use instead and properly handle it. NFC for now.

Differential Revision: https://reviews.llvm.org/D105517
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
Commit 593bf9b4ded318a1d14c9aacfcaa0cf8dd0d9b62 by kai.wang
[Clang][RISCV] Implement vlseg and vlsegff.

Differential Revision: https://reviews.llvm.org/D103527
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
The file was addedclang/test/CodeGen/RISCV/rvv-intrinsics/vlseg.c
The file was modifiedclang/include/clang/Basic/IdentifierTable.h
The file was modifiedclang/include/clang/Basic/riscv_vector.td
The file was addedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vlseg.c
The file was addedclang/test/CodeGen/RISCV/rvv-intrinsics/vlsegff.c
The file was addedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vlsegff.c
The file was modifiedclang/utils/TableGen/RISCVVEmitter.cpp
Commit 4acf3807e35805548074b95a93fe441f4dd20fa1 by uday
[MLIR] Split out GPU ops library from Transforms

Split out GPU ops library from GPU transforms. This allows libraries to
depend on GPU Ops without needing/building its transforms.

Differential Revision: https://reviews.llvm.org/D105472
The file was modifiedmlir/lib/Conversion/GPUToVulkan/CMakeLists.txt
The file was modifiedmlir/tools/mlir-spirv-cpu-runner/CMakeLists.txt
The file was modifiedmlir/lib/Conversion/VectorToGPU/CMakeLists.txt
The file was modifiedmlir/lib/Conversion/SPIRVToLLVM/CMakeLists.txt
The file was modifiedmlir/lib/Conversion/SCFToGPU/CMakeLists.txt
The file was modifiedmlir/lib/Conversion/GPUToSPIRV/CMakeLists.txt
The file was modifiedmlir/tools/mlir-vulkan-runner/CMakeLists.txt
The file was modifiedmlir/test/lib/Dialect/SPIRV/CMakeLists.txt
The file was modifiedmlir/lib/Conversion/GPUToNVVM/CMakeLists.txt
The file was modifiedmlir/lib/Conversion/GPUToROCDL/CMakeLists.txt
The file was modifiedmlir/test/lib/Dialect/GPU/CMakeLists.txt
The file was modifiedmlir/test/lib/Dialect/Linalg/CMakeLists.txt
The file was modifiedmlir/lib/CAPI/Dialect/CMakeLists.txt
The file was modifiedmlir/lib/Conversion/GPUCommon/CMakeLists.txt
The file was modifiedmlir/lib/Dialect/GPU/CMakeLists.txt
Commit 1894c8938979915ee12217f9b7da00ecb53d2ed3 by i
[llvm-readobj][test] Improve grouped option test
The file was removedllvm/test/tools/llvm-readobj/ELF/merged.test
The file was addedllvm/test/tools/llvm-readobj/ELF/grouped.test
Commit 0c1a7730f5372e862150f313df4d9c44757352f4 by uday
[MLIR] Simplify affine.if having yield values and trivial conditions

When an affine.if operation is returning/yielding results and has a
trivially true or false condition, then its 'then' or 'else' block,
respectively, is promoted to the affine.if's parent block and then, the
affine.if operation is replaced by the correct results/yield values.
Relevant test cases are also added.

Signed-off-by: Srishti Srivastava <srishti.srivastava@polymagelabs.com>

Differential Revision: https://reviews.llvm.org/D105418
The file was modifiedmlir/test/Dialect/Affine/simplify-affine-structures.mlir
The file was modifiedmlir/lib/Dialect/Affine/IR/AffineOps.cpp
Commit c2d4d6a1fde127316aae2fdd48b4322857987be3 by jperier
[flang] Create HostAssocDetails symbols when needed for mis-parsed ArrayRef

Name resolution is always creating symbols with HostAssocDetails
for host variable names inside internal procedures. This helps lowering
identifying and dealing with such variables inside internal procedures.

However, the case where the variable appears in an ArrayRef mis-parsed
as a FunctionRef goes through a different name resolution path that did
not create such HostAssocDetails when needed. Pointer assignment RHS
are also skipping this path.

Add the logic to create HostAssocDetails for host symbols inisde internal
procedures that appear in mis-parsed ArrayRef or in pointer assignment RHS.

Differential Revision: https://reviews.llvm.org/D105464
The file was modifiedflang/test/Semantics/symbol03.f90
The file was modifiedflang/lib/Semantics/resolve-names.cpp
Commit ce098ccc1cd154d0c84d6a0bbe0f75c86f726c03 by jay.foad
[AMDGPU] Simplify tablegen files. NFC.

There is no need to cast records to strings before comparing them.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructions.td
The file was modifiedllvm/lib/Target/AMDGPU/BUFInstructions.td
Commit 0c4e538d8fdaf66b4eb9f361f156d068e4f90abd by nicolas.vasilache
[mlir][Linalg] Add an InitTensor -> DimOp canonicalization pattern.

Differential Revision: https://reviews.llvm.org/D105537
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
The file was modifiedmlir/test/Dialect/Linalg/canonicalize.mlir
Commit b5d847b1b95750d0af40cfc8c71a8fec50bb8613 by zinenko
[mlir] factor out common parts of the converstion to the LLVM dialect

"Standard-to-LLVM" conversion is one of the oldest passes in existence. It has
become quite large due to the size of the Standard dialect itself, which is
being split into multiple smaller dialects. Furthermore, several conversion
features are useful for any dialect that is being converted to the LLVM
dialect, which, without this refactoring, creates a dependency from those
conversions to the "standard-to-llvm" one.

Put several of the reusable utilities from this conversion to a separate
library, namely:
- type converter from builtin to LLVM dialect types;
- utility for building and accessing values of LLVM structure type;
- utility for building and accessing values that represent memref in the LLVM
  dialect;
- lowering options applicable everywhere.

Additionally, remove the type wrapping/unwrapping notion from the type
converter that is no longer relevant since LLVM types has been reimplemented as
first-class MLIR types.

Reviewed By: pifon2a

Differential Revision: https://reviews.llvm.org/D105534
The file was addedmlir/lib/Conversion/LLVMCommon/StructBuilder.cpp
The file was modifiedmlir/lib/Conversion/ComplexToLLVM/CMakeLists.txt
The file was modifiedmlir/lib/Conversion/SPIRVToLLVM/CMakeLists.txt
The file was addedmlir/include/mlir/Conversion/LLVMCommon/LoweringOptions.h
The file was modifiedmlir/lib/Conversion/GPUToNVVM/CMakeLists.txt
The file was addedmlir/lib/Conversion/LLVMCommon/TypeConverter.cpp
The file was modifiedmlir/tools/mlir-vulkan-runner/mlir-vulkan-runner.cpp
The file was modifiedmlir/lib/Conversion/SPIRVToLLVM/ConvertLaunchFuncToLLVMCalls.cpp
The file was modifiedmlir/tools/mlir-vulkan-runner/CMakeLists.txt
The file was modifiedmlir/lib/Conversion/StandardToLLVM/CMakeLists.txt
The file was modifiedmlir/include/mlir/Conversion/GPUToROCDL/GPUToROCDLPass.h
The file was modifiedmlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
The file was addedmlir/lib/Conversion/LLVMCommon/MemRefBuilder.cpp
The file was modifiedmlir/lib/Conversion/ComplexToLLVM/ComplexToLLVM.cpp
The file was modifiedmlir/lib/Conversion/GPUToROCDL/CMakeLists.txt
The file was addedmlir/lib/Conversion/LLVMCommon/LoweringOptions.cpp
The file was addedmlir/lib/Conversion/LLVMCommon/CMakeLists.txt
The file was modifiedmlir/include/mlir/Conversion/StandardToLLVM/ConvertStandardToLLVM.h
The file was addedmlir/include/mlir/Conversion/LLVMCommon/MemRefBuilder.h
The file was modifiedmlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp
The file was modifiedmlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
The file was addedmlir/lib/Conversion/LLVMCommon/MemRefDescriptor.h
The file was modifiedmlir/include/mlir/Conversion/ComplexToLLVM/ComplexToLLVM.h
The file was modifiedmlir/include/mlir/Conversion/StandardToLLVM/ConvertStandardToLLVMPass.h
The file was addedmlir/include/mlir/Conversion/LLVMCommon/TypeConverter.h
The file was modifiedmlir/include/mlir/Conversion/GPUToNVVM/GPUToNVVMPass.h
The file was addedmlir/include/mlir/Conversion/LLVMCommon/StructBuilder.h
The file was modifiedmlir/lib/Conversion/CMakeLists.txt
Commit 7586b47fb63dec619c209a395d12b35d01a54cd1 by Dylan.Fleming
[SVE] Fix cast<FixedVectorType> in truncateToMinimalBitwidths

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D104239
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was addedllvm/test/Transforms/LoopVectorize/scalable-trunc-min-bitwidth.ll
Commit 94d5f2afbef0bc18cf92f6d147c336da990e7a40 by Saiyedul.Islam
[Clang] Add test dependency on llvm-ar

Following clang driver tests invoke llvm-ar, so ensure that
check-clang rebuilds llvm-ar.

* test/Driver/clang-offload-bundler.c
* test/Driver/hip-link-save-temps.hip
* test/Driver/hip-link-static-library.hip
* test/Driver/hip-toolchain-rdc-static-lib.hip

Differential Revision: https://reviews.llvm.org/D105285
The file was modifiedclang/test/CMakeLists.txt
Commit 4ce26deac2a69492d5af349c25f285f6d493f82c by david.green
[DAG] Reassociate Add with Or

We already have reassociation code for Adds and Ors separately in DAG
combiner, this adds it for the combination of the two where Ors act like
Adds. It reassociates (add (or (x, c), y) -> (add (add (x, y), c)) where
we know that the Ors operands have no common bits set, and the Or has
one use.

Differential Revision: https://reviews.llvm.org/D104765
The file was modifiedllvm/test/CodeGen/Hexagon/isel-global-offset-alignment.ll
The file was modifiedllvm/test/CodeGen/SystemZ/addr-02.ll
The file was modifiedllvm/test/CodeGen/ARM/add-like-or.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/test/CodeGen/SystemZ/addr-01.ll
Commit 50ad774777d28918c0b705712e59f8e9cd6d8e26 by zinenko
[mlir][CAPI] Export mlirValueEqual in C API

Somehow it is not exported in C API.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D105422
The file was modifiedmlir/include/mlir-c/IR.h
Commit 6e80e3bd1bef3e7408b29a6d7eda0efbb829a65f by akuegel
Add Log1pOp to complex dialect.

Also add a lowering pattern from Complex to Standard/Math dialect.

Differential Revision: https://reviews.llvm.org/D105538
The file was modifiedmlir/test/Conversion/ComplexToStandard/convert-to-standard.mlir
The file was modifiedmlir/test/Dialect/Complex/ops.mlir
The file was modifiedmlir/lib/Conversion/ComplexToStandard/ComplexToStandard.cpp
The file was modifiedmlir/include/mlir/Dialect/Complex/IR/ComplexOps.td
Commit 8ae9ab43dd9eca7802db294d43d3192edddaf50e by Dylan.Fleming
[SVE] Fixed cast<FixedVectorType> on scalable vector in SelectionDAGBuilder::getUniformBase

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D105350
The file was modifiedllvm/test/CodeGen/AArch64/sve-masked-scatter.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
Commit 19885c7adf550ecaaf6191f45c5279d45290ca08 by mkazantsev
[NFC] Remove duplicate function calls

Removed repeated call of L->getHeader(). Now using previously stored return value.

Patch by Dmitry Makogon!

Differential Revision: https://reviews.llvm.org/D105535
Reviewed By: mkazantsev
The file was modifiedllvm/lib/Transforms/Scalar/LoopDeletion.cpp
Commit 6829db727e9e67dfdb70dd0846ffd4e48e00a98d by Louis Dionne
[libc++] Implement copyable-box from Ranges

Differential Revision: https://reviews.llvm.org/D102135
The file was addedlibcxx/test/libcxx/ranges/range.adaptors/range.copy.wrap/types.h
The file was addedlibcxx/include/__ranges/copyable_box.h
The file was addedlibcxx/test/libcxx/ranges/range.adaptors/range.copy.wrap/no_unique_address.pass.cpp
The file was addedlibcxx/test/libcxx/ranges/range.adaptors/range.copy.wrap/has_value.pass.cpp
The file was addedlibcxx/test/libcxx/ranges/range.adaptors/range.copy.wrap/assign.copy.pass.cpp
The file was addedlibcxx/test/libcxx/ranges/range.adaptors/range.copy.wrap/ctor.default.pass.cpp
The file was addedlibcxx/test/libcxx/ranges/range.adaptors/range.copy.wrap/deref.pass.cpp
The file was modifiedlibcxx/include/module.modulemap
The file was addedlibcxx/test/libcxx/ranges/range.adaptors/range.copy.wrap/assign.move.pass.cpp
The file was addedlibcxx/test/libcxx/ranges/range.adaptors/range.copy.wrap/ctor.in_place.pass.cpp
The file was addedlibcxx/test/libcxx/ranges/range.adaptors/range.copy.wrap/properties.compile.pass.cpp
The file was modifiedlibcxx/include/CMakeLists.txt
Commit 645e599e9361afc85c77ec76f724e6ffd1822ca8 by llvmgnsyncbot
[gn build] Port 6829db727e9e
The file was modifiedllvm/utils/gn/secondary/libcxx/include/BUILD.gn
Commit a7da0296a663094e661c54a5ba2c4ce0239c312b by llvm-dev
[CostModel][X86] Adjust sitofp/uitofp SSE/AVX legalized costs based on llvm-mca reports.

Update (mainly) vXi8/vXi16 -> vXf32/vXf64 sitofp/uitofp costs based on the worst case costs from the script in D103695.

Move to using legalized types wherever possible, which allows us to prune the cost tables.
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/sitofp-inseltpoison.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/sitofp.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/uitofp.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/sitofp.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/cast.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/uitofp.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
Commit 9a0af63d05eeec8d333af147f3f1bda1efe63b30 by nicolas.vasilache
[mlir][Linalg] Proper handling of ForOp and TiledLoopOp

The `bufferizesToMemoryRead` condition was too optimistics in the case
of operands that map to a block argument.
This is the case for ForOp and TiledLoopOp.
For such ops, forward the call to all uses of the matching BBArg.

Differential Revision: https://reviews.llvm.org/D105540
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/ComprehensiveBufferize.cpp
The file was modifiedmlir/test/Dialect/Linalg/comprehensive-module-bufferize-analysis.mlir
Commit 35df2f6fbd1ae2e6f9313454e5446212fcbcf90a by nicolas.vasilache
Refactor GenericPadTensorOpVectorizationPattern

Refactor the original code to rewrite a PadTensorOp into a
sequence of InitTensorOp, FillOp and InsertSliceOp without
vectorization by default. `GenericPadTensorOpVectorizationPattern`
provides a customized OptimizeCopyFn to vectorize the
copying step.

Reviewed By: silvas, nicolasvasilache, springerm

Differential Revision: https://reviews.llvm.org/D105293
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Bufferize.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
The file was addedmlir/test/Dialect/Linalg/generalize-pad-tensor.mlir
The file was modifiedmlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
The file was addedmlir/test/Integration/Dialect/Linalg/CPU/test-padtensor.mlir
The file was modifiedmlir/test/lib/Dialect/Linalg/TestLinalgTransforms.cpp
Commit d0b282e10bc91ea19a9b1a0ca4ed81d0c65e7cd3 by nicolas.vasilache
[mlir][Linalg] Rewrite PadTensorOp to enable its comprehensive bufferization.

Add the rewrite of PadTensorOp to InitTensor + InsertSlice before the
bufferization analysis starts.

This is exercised via a more advanced integration test.

Since the new behavior triggers folding, 2 tests need to be updated.
One of those seems to exhibit a folding issue with `switch` and is modified.

Differential Revision: https://reviews.llvm.org/D105549
The file was modifiedmlir/test/Dialect/Linalg/comprehensive-module-bufferize-analysis.mlir
The file was modifiedmlir/test/Integration/Dialect/Linalg/CPU/test-comprehensive-bufferize.mlir
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/ComprehensiveBufferize.cpp
The file was modifiedmlir/test/Dialect/Linalg/comprehensive-module-bufferize-invalid.mlir
Commit 6412a13539ab2914eed8e1df83c399b9a16e3408 by pifon
[mlir] Move common reshapeops-related code to ReshapeOpsUtils.h.

This is a first step to move (Tensor)Expand/CollapseShapeOp to tensor/memref
dialects.

Differential Revision: https://reviews.llvm.org/D105547
The file was addedmlir/include/mlir/Dialect/Utils/ReshapeOpsUtils.h
The file was modifiedmlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgOps.h
The file was modifiedmlir/lib/Conversion/TosaToLinalg/CMakeLists.txt
The file was modifiedmlir/lib/Dialect/Utils/CMakeLists.txt
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
The file was addedmlir/lib/Dialect/Utils/ReshapeOpsUtils.cpp
Commit b3c80dd8943a0d962bea1969b7a9e0147504d293 by a.bataev
[OPENMP]Remove const firstprivate allocation as a variable in a constant space.

Current implementation is not compatible with asynchronous target
regions, need to remove it.

Differential Revision: https://reviews.llvm.org/D105375
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntime.h
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntimeGPU.h
The file was modifiedclang/lib/CodeGen/CGStmtOpenMP.cpp
The file was modifiedclang/test/OpenMP/target_firstprivate_codegen.cpp
The file was modifiedclang/test/OpenMP/nvptx_target_firstprivate_codegen.cpp
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntime.cpp
Commit 4c7e9a38529341293d8a4096ed2354aa518237f2 by llvm-dev
[CostModel][X86] Adjust sext/zext SSE/AVX legalized costs based on llvm-mca reports.

Update costs based on the worst case costs from the script in D103695.

Move to using legalized types wherever possible, which allows us to prune the cost tables.
The file was modifiedllvm/test/Analysis/CostModel/X86/arith.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/sitofp.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/sse-itoi.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/rem.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/extend.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/uitofp.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/min-legal-vector-width.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/sext.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/arith-fix.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/masked-intrinsic-cost.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/sext-inseltpoison.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/zext.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/arith-overflow.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/reduce-mul.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/zext-inseltpoison.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/intrinsic-cost-kinds.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/masked-intrinsic-cost-inseltpoison.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/cast.ll
Commit 6de42e104f325f5f4bcb67d808fc3ad9fe4a66bb by llvm-dev
[IndVarSimplify][X86] Regenerate loop-invariant-conditions.ll test checks
The file was modifiedllvm/test/Transforms/IndVarSimplify/X86/loop-invariant-conditions.ll
Commit ee6ca9c7dfd900b2906e5e457666287212b2c378 by zarko
[AIX] Use VSSRC/VSFRC Register classes for f32/f64 callee arguments on P8 and above

Adding usage of VSSRC and VSFRC when adding the live in registers on AIX.
This matches the behaviour of the rest of PPC Subtargets.

Reviewed By: nemanjai, #powerpc

Differential Revision: https://reviews.llvm.org/D104396
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
The file was addedllvm/test/CodeGen/PowerPC/aix-p8vector-liveins.ll
Commit 033de11150d3f34679ff5447600b99bb0c511ea6 by aschwaighofer
[coro async] Move code to proper switch

While upstreaming patches this code somehow was applied to the wrong switch statement.

Differential Revision: https://reviews.llvm.org/D105504
The file was modifiedllvm/lib/Transforms/Coroutines/CoroSplit.cpp
Commit d6595278291425804d05985652831d2781abdf06 by pifon
[mlir] Use indices instead of affine maps when composing 2 reshape ops.

https://llvm.discourse.group/t/rfc-reshape-ops-restructuring/3310

Differential Revision: https://reviews.llvm.org/D105550
The file was modifiedmlir/include/mlir/Dialect/Utils/ReshapeOpsUtils.h
The file was modifiedmlir/lib/Dialect/Utils/ReshapeOpsUtils.cpp
Commit 97215fe3f4d51977d7f4bbc65249ccfc0212a8ae by sander.desmalen
[CostModel] Express cost(urem) as cost(div+mul+sub) when set to Expand.

The Legalizer expands the operations of urem/srem into a div+mul+sub or divrem
when those are legal/custom. This patch changes the cost-model to reflect that
cost.

Since there is no 'divrem' Instruction in LLVM IR, the cost of divrem
is assumed to be the same as div+mul+sub since the three operations will
need to be executed at runtime regardless.

Patch co-authored by David Sherwood (@david-arm)

Reviewed By: RKSimon, paulwalker-arm

Differential Revision: https://reviews.llvm.org/D103799
The file was modifiedllvm/test/Analysis/CostModel/X86/rem.ll
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h
The file was modifiedllvm/test/Analysis/CostModel/ARM/divrem.ll
The file was modifiedllvm/test/Analysis/CostModel/AArch64/sve-remainder.ll
Commit feef171f762aa205b5f993e127b364f501a4d002 by Louis Dionne
[libc++] NFC: Fix incorrect comments in CMake
The file was modifiedlibcxx/test/CMakeLists.txt
The file was modifiedlibcxxabi/test/CMakeLists.txt
Commit 2e4ec3e5d6a3bf7f61bea6898286cba64be7b764 by tstellar
unittests: Fix build with LLVM_LINK_LLVM_DYLIB=ON

The build system was linking the PluginsTests unittest against libLLVM.so
and LLVMAsmParser which was causing the test to fail with this error:

LLVM ERROR: inconsistency in registered CommandLine options

We need to add llvm libraries to LLVM_LINK_COMPONENTS so that
they are dropped from the linker arguments when linking with
LLVM_LINK_LLVM_DYLIB=ON

Reviewed By: aeubanks

Differential Revision: https://reviews.llvm.org/D105523
The file was modifiedllvm/unittests/Passes/CMakeLists.txt
Commit 2c03d92ee637537c0d6ea4ba05474d41b3131bd7 by tstellar
unittests: Fix library dependency name

Corrects the library name of LLVMAsmParser added in
2e4ec3e5d6a3bf7f61bea6898286cba64be7b764.
The file was modifiedllvm/unittests/Passes/CMakeLists.txt
Commit b55aedd0b8cf6dbd6d3d08e1a9a40fd73eb6b2dc by patacca
[Polly][Isl] Use isl::union_set::unite() instead of isl::union_set::add_set(). NFC

This is part of an effort to reduce the differences between the custom C++ bindings used right now by polly in `lib/External/isl/include/isl/isl-noxceptions.h` and the official isl C++ interface.

Changes made:
- Use `isl::union_set::unite()` instead of `isl::union_set::add_set()`
- `isl-noexceptions.h` has been generated by this https://github.com/patacca/isl/commit/390c44982b5cee7eb43f8f7a80e185e6d21466b2

Depends on D104994

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D105444
The file was modifiedpolly/lib/External/isl/include/isl/isl-noexceptions.h
The file was modifiedpolly/lib/Transform/ZoneAlgo.cpp
The file was modifiedpolly/lib/Support/ISLTools.cpp
The file was modifiedpolly/lib/Transform/DeLICM.cpp
The file was modifiedpolly/lib/Transform/MaximalStaticExpansion.cpp
The file was modifiedpolly/unittests/DeLICM/DeLICMTest.cpp
The file was modifiedpolly/lib/Analysis/DependenceInfo.cpp
Commit 7215dcfe3688eea82648136e812753539f30c08f by Dylan.Fleming
[SVE] Fix ShuffleVector cast<FixedVectorType> in truncateToMinimalBitwidths

Depends on D104239

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D105341
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/scalable-trunc-min-bitwidth.ll
Commit 5888a194c1043b20bb2e4039ca28ef2a1e63e796 by irina.dobrescu
[AArch64][GlobalISel] Lower vector types for min/max

Differential Revision: https://reviews.llvm.org/D105433
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-min-max.mir
Commit 723144665b7f7afe1555e69eeb3c705c8044d7d0 by listmail
[LV] Unconditionally branch from middle to scalar preheader if the scalar loop must execute (try 4)

Resubmit after the following changes:

* Fix a latent bug related to unrolling with required epilogue (see e49d65f). I believe this is the cause of the prior PPC buildbot failure.
* Disable non-latch exits for epilogue vectorization to be safe (9ffa90d)
* Split out assert movement (600624a) to reduce churn if this gets reverted again.

Previous commit message (try 3)

Resubmit after fixing test/Transforms/LoopVectorize/ARM/mve-gather-scatter-tailpred.ll

Previous commit message...

This is a resubmit of 3e5ce4 (which was reverted by 7fe41ac).  The original commit caused a PPC build bot failure we never really got to the bottom of.  I can't reproduce the issue, and the bot owner was non-responsive.  In the meantime, we stumbled across an issue which seems possibly related, and worked around a latent bug in 80e8025.  My best guess is that the original patch exposed that latent issue at higher frequency, but it really is just a guess.

Original commit message follows...

If we know that the scalar epilogue is required to run, modify the CFG to end the middle block with an unconditional branch to scalar preheader. This is instead of a conditional branch to either the preheader or the exit block.

The motivation to do this is to support multiple exit blocks. Specifically, the current structure forces us to identify immediate dominators and *which* exit block to branch from in the middle terminator. For the multiple exit case - where we know require scalar will hold - these questions are ill formed.

This is the last change needed to support multiple exit loops, but since the diffs are already large enough, I'm going to land this, and then enable separately. You can think of this as being NFCIish prep work, but the changes are a bit too involved for me to feel comfortable tagging the review that way.

Differential Revision: https://reviews.llvm.org/D94892
The file was modifiedllvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/loop-form.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/ARM/mve-gather-scatter-tailpred.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/unroll_nonlatch.ll
Commit d0fe294729a2ac45625ed45a5619c8405a14db49 by Daniel.McIntosh
[SystemZ][z/OS][libcxx] mark aligned allocation tests UNSUPPORTED on z/OS

zOS doesn't support aligned allocation, so these tests are failing.
For more details on aligned allocation in zOS, see
https://reviews.llvm.org/D87611 and https://reviews.llvm.org/D90178

Reviewed By: ldionne, #libc

Differential Revision: https://reviews.llvm.org/D102798
The file was modifiedlibcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/delete_align_val_t_replace.pass.cpp
The file was modifiedlibcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new_align_val_t_nothrow_replace.pass.cpp
The file was modifiedlibcxx/test/libcxx/language.support/support.dynamic/libcpp_deallocate.sh.cpp
The file was modifiedlibcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new_align_val_t.pass.cpp
The file was modifiedlibcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new_align_val_t.pass.cpp
The file was modifiedlibcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new_align_val_t_replace.pass.cpp
The file was modifiedlibcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/delete_align_val_t_replace.pass.cpp
The file was modifiedlibcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new_align_val_t_nothrow_replace.pass.cpp
The file was modifiedlibcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new_align_val_t_replace.pass.cpp
The file was modifiedlibcxx/test/libcxx/language.support/support.dynamic/new_faligned_allocation.pass.cpp
The file was modifiedlibcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new_align_val_t_nothrow.pass.cpp
The file was modifiedlibcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new_align_val_t_nothrow.pass.cpp
Commit 366805ea175e12d98903e35854c9898964fecde2 by andre.simoesdiasvieira
[LIBC] Add an optimized memcmp implementation for AArch64

Differential Revision: https://reviews.llvm.org/D105441
The file was modifiedlibc/test/src/string/CMakeLists.txt
The file was addedlibc/src/string/aarch64/memcmp.cpp
The file was modifiedlibc/test/src/string/memcmp_test.cpp
The file was addedlibc/src/string/memory_utils/elements_aarch64.h
The file was modifiedlibc/src/string/CMakeLists.txt
The file was modifiedlibc/src/string/memory_utils/elements.h
Commit 2937f8d14840f54bb10daf71c7af236f4d897884 by aschwaighofer
[coro async] Cap the alignment of spilled values (vs.  allocas) at the max frame alignment

Before this patch we would normally use the ABI alignment which can be
to high for the context alginment.

For spilled values we don't need ABI alignment, since the frame entry's
address is not escaped.

rdar://79664965

Differential Revision: https://reviews.llvm.org/D105288
The file was modifiedllvm/lib/Transforms/Coroutines/CoroFrame.cpp
The file was modifiedllvm/test/Transforms/Coroutines/coro-async.ll
Commit 29cc50e17a6800ca75cd23ed85ae1ddf3e3dcc14 by Raphael Isemann
[LLDB][GUI] Add initial forms support

This patch adds initial support for forms for the LLDB GUI. The currently
supported form elements are Text fields, Integer fields, Boolean fields, Choices
fields, File fields, Directory fields, and List fields.

A form can be created by subclassing FormDelegate. In the constructor, field
factory methods can be used to add new fields, storing the returned pointer in a
member variable. One or more actions can be added using the AddAction method.
The method takes a function with an interface void(Window &). This function will
be executed whenever the user executes the action.

Example form definition:

```lang=cpp
class TestFormDelegate : public FormDelegate {
public:
  TestFormDelegate() {
    m_text_field = AddTextField("Text", "The big brown fox.");
    m_file_field = AddFileField("File", "/tmp/a");
    m_directory_field = AddDirectoryField("Directory", "/tmp/");
    m_integer_field = AddIntegerField("Number", 5);
    std::vector<std::string> choices;
    choices.push_back(std::string("Choice 1"));
    choices.push_back(std::string("Choice 2"));
    choices.push_back(std::string("Choice 3"));
    choices.push_back(std::string("Choice 4"));
    choices.push_back(std::string("Choice 5"));
    m_choices_field = AddChoicesField("Choices", 3, choices);
    m_bool_field = AddBooleanField("Boolean", true);
    TextFieldDelegate default_field =
        TextFieldDelegate("Text", "The big brown fox.");
    m_text_list_field = AddListField("Text List", default_field);

    AddAction("Submit", [this](Window &window) { Submit(window); });
  }

  void Submit(Window &window) { SetError("An example error."); }

protected:
  TextFieldDelegate *m_text_field;
  FileFieldDelegate *m_file_field;
  DirectoryFieldDelegate *m_directory_field;
  IntegerFieldDelegate *m_integer_field;
  BooleanFieldDelegate *m_bool_field;
  ChoicesFieldDelegate *m_choices_field;
  ListFieldDelegate<TextFieldDelegate> *m_text_list_field;
};
```

Reviewed By: clayborg

Differential Revision: https://reviews.llvm.org/D104395
The file was modifiedlldb/source/Core/IOHandlerCursesGUI.cpp
Commit d8fc4e9c0d697b0a3569c2652a2eff284c4d38c8 by johannes
[Flang][Docs] Update meeting URL
The file was modifiedflang/docs/GettingInvolved.md
Commit d7e65757ed8f2dfe17b71cf169a3c83a155d1c2b by thakis
[lld/mac] Tweak reserve() argument in unwind code

addEntriesForFunctionsWithoutUnwindInfo() can add entries to cuVector, so
cuCount can be stale. Use cuVector.size() instead.

No behavior change.
The file was modifiedlld/MachO/UnwindInfoSection.cpp
Commit ded8866f4a4600c69f3d1d6f5e0c9ec7bd9ade45 by llvm-dev
[X86][Atom] Fix vector fp<->int resource/throughputs

Match whats documented in the Intel AOM - almost all the conversion instructions requires BOTH ports (apart from the MMX cvtpi2ps/cvtpi2ps instructions which we already override) - this was being incorrectly modelled as EITHER port.

Now that we can use in-order models in llvm-mca, the atom model is a good "worst case scenario" analysis for x86.
The file was modifiedllvm/test/tools/llvm-mca/X86/Atom/resources-sse2.s
The file was modifiedllvm/lib/Target/X86/X86ScheduleAtom.td
The file was modifiedllvm/test/tools/llvm-mca/X86/Atom/resources-sse1.s
Commit 223261cbaa6b4c74cf9eebca3452ec0d15ea018e by gchatelet
Fix broken libc test
The file was modifiedlibc/test/src/string/memcmp_test.cpp
Commit d4cb286b05f5192f6cbae310bd30cad3f05f13ac by walter erquinigo
[NFC][lldb-vscode] Fix launch test

Using br for creating breakpoints fails if there are other commands that
start with br.
The file was modifiedlldb/test/API/tools/lldb-vscode/launch/TestVSCode_launch.py
Commit 8a7b5ebf4d8fd5f4cfe1daf72e0e58df7f716e4c by thakis
[lld/mac] Don't crash when dead-stripping removes all unwind info

If the input has compact unwind info but all of it is removed
after dead stripping, we would crash. Now we don't write any
__unwind_info section at all, like ld64.

This is a bit awkward to implement because we only know the final
state of unwind info after UnwindInfoSectionImpl<Ptr>::finalize(),
which is called after sections are added. So add a small amount of
bookkeeping to relocateCompactUnwind() instead (which runs earlier)
so that we can predict what finalize() will do before it runs.

Fixes PR51010.

Differential Revision: https://reviews.llvm.org/D105557
The file was modifiedlld/MachO/UnwindInfoSection.cpp
The file was modifiedlld/MachO/UnwindInfoSection.h
The file was modifiedlld/test/MachO/compact-unwind.s
Commit e25a384055fc19f7dd300a4cdaed73f7ff6d0770 by vyng
[lld-macho][nfc] Rename test file to be more descriptive (rather than referencing the bug number)

Differential Revision: https://reviews.llvm.org/D105559
The file was addedlld/test/MachO/obj-file-with-stabs.s
The file was removedlld/test/MachO/bug_50812.s
Commit f5603aa050cefff9052e9085920f3aa2d1d31b86 by efriedma
[ScalarEvolution] Make sure getMinusSCEV doesn't negate pointers.

Add a function removePointerBase that returns, essentially, S -
getPointerBase(S).  Use it in getMinusSCEV instead of actually
subtracting pointers.

Differential Revision: https://reviews.llvm.org/D105503
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
Commit d2e32fa493a272c21dee2c6cbf52e501f9ee3908 by yitzhakm
[libTooling] Add support for implicit `this` to `buildAddressOf`.

Changes `buildAddressOf` to return `this` when given an implicit `this` expression.

Differential Revision: https://reviews.llvm.org/D105551
The file was modifiedclang/unittests/Tooling/SourceCodeBuildersTest.cpp
The file was modifiedclang/lib/Tooling/Transformer/SourceCodeBuilders.cpp
Commit 3ebfeb258698db82b7525cfaa1efd04db93d72ba by Raphael Isemann
[lldb][docs] Force documentation emission of special Python class members

The current LLDB Python docs are missing documentation for all the special
members such as conversion functions (`__int__`) and other special functions
(`__len__`).

The reason for that is that the `automodapi` plugin we're using to generate the
*.rst files simply doesn't emit them. There doesn't seem to be any config option
to enable those in `automodapi` and it's not even clear why they are filtered. I
assume the leading underscore in their names makes them look like private
methods.

This patch just forcibly adds a few selected special members functions to the
list of functions that sphinx should always document.  This will cause sphinx to
warn if a class doesn't have one of those functions but it's better than not
having them documented.

The main motivation here is that since `SBAddress.__int__` is one of the few
functions that is only available in the embedded Python REPL which would be good
to have in the public documentation.

Fixes rdar://64647665

Reviewed By: JDevlieghere

Differential Revision: https://reviews.llvm.org/D105480
The file was modifiedlldb/docs/conf.py
Commit e81ba283131cf76ae62fa9b601a24d080578efaa by pctammela
[lldb/lua] Add scripted watchpoints for Lua

Add support for Lua scripted watchpoints, with basic tests.

Differential Revision: https://reviews.llvm.org/D105034
The file was modifiedlldb/bindings/lua/lua-swigsafecast.swig
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Lua/Lua.h
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Lua/ScriptInterpreterLua.cpp
The file was modifiedlldb/bindings/lua/lua-wrapper.swig
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Lua/Lua.cpp
The file was modifiedlldb/test/Shell/ScriptInterpreter/Lua/watchpoint_callback.test
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Lua/ScriptInterpreterLua.h
The file was modifiedlldb/unittests/ScriptInterpreter/Lua/LuaTests.cpp
Commit 3c5721d77275d2a7bdaeeadd0b1c3864f1166110 by aaron
Fix a failing assertion with -Wcast-align

When there is unknown type in a struct in code compiled with
-Wcast-align, the compiler crashes due to
clang::ASTContext::getASTRecordLayout() failing an assert.

Added check that the RecordDecl is valid before calling
getASTRecordLayout().
The file was modifiedclang/lib/Sema/SemaChecking.cpp
The file was modifiedclang/test/Sema/warn-cast-align.c
Commit 291025389c2c84cde840c54f6c400d59d79be8b9 by thomasraoux
[mlir][vector] Refactor Vector Unrolling and remove Tuple ops

Simplify vector unrolling pattern to be more aligned with rest of the
patterns and be closer to vector distribution.
The new implementation uses ExtractStridedSlice/InsertStridedSlice
instead of the Tuple ops. After this change the ops based on Tuple don't
have any more used so they can be removed.

This allows removing signifcant amount of dead code and will allow
extending the unrolling code going forward.

Differential Revision: https://reviews.llvm.org/D105381
The file was modifiedmlir/test/Dialect/Vector/vector-transforms.mlir
The file was modifiedmlir/lib/Dialect/Vector/VectorUtils.cpp
The file was modifiedmlir/include/mlir/Dialect/Vector/VectorOps.h
The file was modifiedmlir/include/mlir/Dialect/Vector/VectorOps.td
The file was modifiedmlir/lib/Dialect/Vector/VectorOps.cpp
The file was modifiedmlir/test/Dialect/Vector/invalid.mlir
The file was modifiedmlir/test/Dialect/Vector/vector-transfer-unroll.mlir
The file was modifiedmlir/test/Integration/Dialect/Vector/CPU/test-transpose.mlir
The file was modifiedmlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
The file was removedmlir/test/Integration/Dialect/Vector/CPU/test-insert-slices.mlir
The file was modifiedmlir/lib/Dialect/Vector/VectorTransforms.cpp
The file was removedmlir/test/Integration/Dialect/Vector/CPU/test-extract-slices.mlir
The file was removedmlir/test/Dialect/Vector/vector-slices-transforms.mlir
The file was modifiedmlir/include/mlir/Dialect/Vector/VectorUtils.h
The file was modifiedmlir/include/mlir/Dialect/Vector/VectorTransforms.h
The file was modifiedmlir/test/Integration/Dialect/Vector/CPU/test-contraction.mlir
The file was modifiedmlir/test/Dialect/Vector/ops.mlir
The file was modifiedmlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp
The file was modifiedmlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
Commit 71dc0f1c02cd00a431fc327b0ea86524fad28afe by jianzhouzh
[dfsan][NFC] Add Origin Tracking into doc

Reviewed By: morehouse

Differential Revision: https://reviews.llvm.org/D105378
The file was modifiedclang/docs/DataFlowSanitizer.rst
Commit da289a174fc6617c7be37be2947480510fd4f02a by silvasean
[mlir] Allow conversion to LLVM for ElementsAttr's with size 0

The code seems to correctly handle the case that this assertion was
guarding.

Differential Revision: https://reviews.llvm.org/D105379
The file was modifiedmlir/test/Target/LLVMIR/llvmir.mlir
The file was modifiedmlir/lib/Target/LLVMIR/ModuleTranslation.cpp
Commit 97c473ad394ad9360cd89eda5a8e5aeb4b5d90fe by spatel
[SLP] rename variable to not be misleading; NFC

The reduction matching was probably only dealing with binops
when it was written, but we have now generalized it to handle
select and intrinsics too, so assert on that too.
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Commit 84c15bc018fa2b64f36790ae06f76c418a5407ad by nikita.ppv
[SCEVExpander] Support opaque pointers

This adds support for opaque pointers to expandAddToGEP() by always
generating an i8 GEP for opaque pointers. After looking at some other
cases (constexpr GEP folding, SROA GEP generation), I've come around
to the idea that we should use i8 GEPs for opaque pointers, because
the alternative would be to guess a GEP type from surrounding code,
which will not be reliable. Ultimately, i8 GEPs is where we want to
end up anyway, and opaque pointers just make that the natural choice.

There are a couple of other places in SCEVExpander that check pointer
element types, I plan to update those when I run across usable test
coverage that doesn't assert elsewhere.

Differential Revision: https://reviews.llvm.org/D105398
The file was modifiedllvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
The file was addedllvm/test/Transforms/LoopStrengthReduce/opaque-ptr.ll
Commit 6a06dbafa14e3bdd8eef604254e8acea8f513b2c by nemanja.i.ibm
[PowerPC] Disable permuted SCALAR_TO_VECTOR on LE without direct moves

There are some patterns involving the permuted scalar to vector node
for which we don't have patterns without direct moves on little endian
subtargets. This causes selection errors. While we can of course add
the missing patterns, any additional effort to make this work is not
useful since there is no support for any CPU that can run in
little endian mode and does not support direct moves.
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
The file was modifiedllvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
The file was modifiedllvm/test/CodeGen/PowerPC/pr47916.ll
Commit d20b013b490e0603ba21b5ccff966d7e11025775 by martin
[COFF] [CodeView] Add a few new enum values

These are undocumented, but are visible in the SDK headers since some
versions ago.

Differential Revision: https://reviews.llvm.org/D105513
The file was modifiedllvm/lib/DebugInfo/CodeView/EnumTables.cpp
The file was modifiedllvm/include/llvm/BinaryFormat/COFF.h
The file was modifiedllvm/lib/ObjectYAML/COFFYAML.cpp
The file was modifiedllvm/include/llvm/DebugInfo/CodeView/CodeView.h
Commit 7a7da69fbe288de088bfee47d2f7c21da2132085 by martin
[LLD] [COFF] Avoid thread exhaustion on 32-bit Windows host

LLD on 32-bit Windows would frequently fail on large projects with
an exception "thread constructor failed: Exec format error".  The stack
trace pointed to this usage of std::async, and looking at the
implementation in libc++ it seems using std::async with
std::launch::async results in the immediate creation of a new thread
for every call.  This could result in a potentially unbounded number
of threads, depending on the number of input files.  This seems to
be hitting some limit in 32-bit Windows host.

I took the easy route, and only use threads on 64-bit Windows, not all
Windows as before.  I was thinking a more proper solution might
involve using a thread pool rather than blindly spawning any number
of new threads, but that may have other unforeseen consequences.

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D105506
The file was modifiedlld/COFF/Driver.cpp
Commit 9bcce1c9aab0b1752a6758eede23817bac80c489 by martin
[CodeView] Add missing cases for new enum values

This fixes warnings while building llvm-pdbutil after
d20b013b490e0603ba21b5ccff966d7e11025775.
The file was modifiedllvm/tools/llvm-pdbutil/MinimalSymbolDumper.cpp
Commit eaf22ba0118a70c04ea866441207f54fb93e804a by gh
[MLIR] Provide lowering of std switch to llvm switch

This patch allows lowering of std switch to llvm switch

Differential Revision: https://reviews.llvm.org/D105580
The file was modifiedmlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp
The file was modifiedmlir/test/Conversion/StandardToLLVM/convert-to-llvmir.mlir
Commit 9a11c70c1856f4e801d0863c552c754f28110237 by gh
[SCF] Handle lowering of Execute region to Standard CFG

Lower SCF.executeregionop to llvm by essentially inlining the region and replacing the return

Differential Revision: https://reviews.llvm.org/D105567
The file was modifiedmlir/lib/Conversion/SCFToStandard/SCFToStandard.cpp
The file was modifiedmlir/test/Conversion/SCFToStandard/convert-to-cfg.mlir
Commit 85bac9d7f93419ad73cee42a87465d50286a46fe by efriedma
[AArch64] Simplify sve-breakdown-scalable-vectortype.ll.

Fix the calling convention so we don't spill every SVE register.
The file was modifiedllvm/test/CodeGen/AArch64/sve-breakdown-scalable-vectortype.ll
Commit 458c230b5ef893238d2471fcff27cd275e8026d5 by Adrian Prantl
GlobalISel/AArch64: don't optimize away redundant branches at -O0

This patch prevents GlobalISel from optimizing out redundant branch
instructions when compiling without optimizations.

The motivating example is code like the following common pattern in
Swift, where users expect to be able to set a breakpoint on the early
exit:

public func f(b: Bool) {
  guard b else {
    return // I would like to set a breakpoint here.
  }
  ...
}

The patch modifies two places in GlobalISEL: The first one is in
IRTranslator.cpp where the removal of redundant branches is made
conditional on the optimization level. The second one is in
AArch64InstructionSelector.cpp where an -O0 *only* optimization is
being removed.

Disabling these optimizations increases code size at -O0 by
~8%. However, doing so improves debuggability, and debug builds are
the primary reason why developers compile without optimizations. We
thus concluded that this is the right trade-off.

rdar://79515454

Differential Revision: https://reviews.llvm.org/D105238
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/phi.ll
The file was modifiedllvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/long_ambiguous_chain_s32.ll
The file was modifiedllvm/test/CodeGen/AArch64/unwind-preserved.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/long_ambiguous_chain_s64.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/jump_table_and_brjt.ll
The file was addedllvm/test/DebugInfo/AArch64/fallthrough-branch.ll
Commit 8e22539067d9376c4f808b25f543feba728d40c9 by nikita.ppv
[IR] Make some pointer element type accesses explicit (NFC)

Explicitly fetch the pointer element type in various deprecated
methods, so we can hopefully remove support from this from the
base GEP constructor.
The file was modifiedllvm/include/llvm/IR/IRBuilder.h
The file was modifiedllvm/include/llvm/IR/Instructions.h
Commit cae3b831f4304d4487dd7c767ff88face51ea0dc by i
[llvm-nm] Switch command line parsing from llvm::cl to OptTable

Part of https://lists.llvm.org/pipermail/llvm-dev/2021-July/151622.html
"Binary utilities: switch command line parsing from llvm::cl to OptTable"

Users should generally observe no difference as long as they only use intended
option forms. Behavior changes:

* `-t=d` is removed. Use `-t d` instead.
* `--demangle=0` cannot be used. Omit the option or use `--no-demangle` instead.
* `--help-list` is removed. This is a `cl::` specific option.

Note:

* `-t` diagnostic gets improved.
* This patch avoids cl::opt collision if we decide to support multiplexing for binary utilities
* One-dash long options are still supported.
* The `-s` collision (`-s segment section` for Mach-O) is unfortunate. `-s` means `--print-armap` in GNU nm.
* This patch removes the last `cl::multi_val` use case from the `llvm/lib/Support/CommandLine.cpp` library

`-M` (`--print-armap`), `-U` (`--defined-only`), and `-W` (`--no-weak`)
are now deprecated. They could conflict with future GNU nm options.
(--print-armap has an existing alias -s, so GNU will unlikely add a new one.
--no-weak (not in GNU nm) is rarely used anyway.)

`--just-symbol-name` is now deprecated in favor of
`--format=just-symbols` and `-j`.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D105330
The file was modifiedllvm/test/Object/nm-universal-binary.test
The file was modifiedutils/bazel/llvm-project-overlay/llvm/BUILD.bazel
The file was modifiedllvm/test/tools/llvm-nm/X86/radix.s
The file was addedllvm/tools/llvm-nm/Opts.td
The file was modifiedllvm/test/tools/llvm-nm/format-bsd.test
The file was modifiedllvm/test/tools/llvm-nm/help.test
The file was modifiedllvm/test/tools/llvm-nm/format-sysv-layout.test
The file was modifiedllvm/test/tools/llvm-nm/libtool-version.test
The file was modifiedllvm/tools/llvm-nm/llvm-nm.cpp
The file was modifiedllvm/docs/CommandGuide/llvm-nm.rst
The file was modifiedllvm/test/tools/llvm-nm/just-symbols.test
The file was modifiedllvm/docs/ReleaseNotes.rst
The file was modifiedllvm/tools/llvm-nm/CMakeLists.txt
The file was modifiedllvm/utils/gn/secondary/llvm/tools/llvm-nm/BUILD.gn
Commit e000b848e65c3fc7d3c153d15cd20bbd92d9427c by nikita.ppv
[IR] Simplify Attribute::getAsString() (NFC)

Avoid enumerating all attributes here and instead use
getNameFromAttrKind(), which is based on the tablegen data.

This only leaves us with custom handling for int attributes,
which don't have uniform printing.
The file was modifiedllvm/lib/IR/Attributes.cpp
Commit f42bc8424e775e96bcf35925e80df26179418faa by nikita.ppv
[AsmWriter] Simplify type attribute printing (NFC)

Avoid enumerating all supported type attributes, instead fetch
their name from the attribute kind.
The file was modifiedllvm/lib/IR/AsmWriter.cpp
Commit ab0096de05709dd36b69155e08d156d073c69501 by david.green
[ARM] Add some opaque pointer gather/scatter tests. NFC

They seem to work OK. Some other test cleanups at the same time.
The file was modifiedllvm/test/CodeGen/Thumb2/mve-gather-ind32-scaled.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-gather-ptrs.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-gather-scatter-optimisation.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-gather-scatter-ptr-address.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-gather-scatter-tailpred.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-gather-scatter-opt.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-scatter-increment.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-scatter-ind32-unscaled.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-gather-ind32-unscaled.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-scatter-ptrs.ll
Commit af3baf1761bb2fff4f5b27e51ccbe3a9340516b8 by patrickeholland
[MCA] [AMDGPU] Adding an implementation to AMDGPUCustomBehaviour for handling s_waitcnt instructions.

This commit also makes some slight changes to the scheduling model for AMDGPU to set the RetireOOO flag for all scheduling classes.

This flag is only used by llvm-mca and allows instructions to retire out of order.

See the differential link below for a deeper explanation of everything.

Differential Revision: https://reviews.llvm.org/D104730
The file was modifiedllvm/lib/Target/AMDGPU/SISchedule.td
The file was modifiedllvm/tools/llvm-mca/lib/AMDGPU/AMDGPUCustomBehaviour.cpp
The file was modifiedllvm/test/tools/llvm-mca/AMDGPU/gfx10-double.s
The file was modifiedllvm/tools/llvm-mca/lib/AMDGPU/AMDGPUCustomBehaviour.h
The file was addedllvm/test/tools/llvm-mca/AMDGPU/gfx9-retireooo.s
Commit 81ee4952f122b49772e09a1da4e2e51577d1690a by George Burgess IV
utils: add a revert checker

Chrome OS and Android have found it useful to have an automated revert
checker. It was requested to upstream it, since other folks in the LLVM
community may also find value in it.

The tests depend on having a full (non-shallow) checkout of LLVM. This
seems reasonable to me, since:

- the tests should only be run if the user is developing on this script
- it's kind of hard to develop on this script without local git history
  :)

If people really want, the tests' dependency on LLVM's history can be
removed. It's mostly just effort/complexity that doesn't seem necessary.

Differential Revision: https://reviews.llvm.org/D105578
The file was addedllvm/utils/revert_checker_test.py
The file was addedllvm/utils/revert_checker.py
Commit d338e79a4cc1d52a6b5a1a241c2318a7288c0240 by aeubanks
[OpaquePtr] Remove checking pointee type for byval/preallocated type

These currently always require a type parameter. The bitcode reader
already upgrades old bitcode without the type parameter to use the
pointee type.

In cases where the caller does not have byval but the callee does, we
need to follow CallBase::paramHasAttr() and also look at the callee for
the byval type so that CallBase::isByValArgument() and
CallBase::getParamByValType() are in sync. Do the same for preallocated.

While we're here add a corresponding version for inalloca since we'll
need it soon.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D104663
The file was modifiedllvm/include/llvm/IR/InstrTypes.h
The file was modifiedllvm/unittests/IR/AttributesTest.cpp
Commit 89f2d98b9870263106adfeb20c835d4751963cf7 by Jinsong Ji
[PowerPC] Add P7 RUN line for load and splat test
The file was modifiedllvm/test/CodeGen/PowerPC/load-and-splat.ll
Commit aad41e229966e3371256de6adf8f4812803efaf6 by aeubanks
[OpaquePtr] Use ArgListEntry::IndirectType for lowering ABI attributes

Consolidate PreallocatedType and ByValType into IndirectType, and use that for inalloca.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/FastISel.cpp
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
Commit b81aa458afd023323dcd4400164f6a43d981d7de by i
[llvm-nm][test] Fix just-symbols.test
The file was modifiedllvm/test/tools/llvm-nm/just-symbols.test
Commit 966386514bec9366ca85d1599f4c866eee9f1927 by leonardchan
[compiler-rt][hwasan] Setup hwasan thread handling on Fuchsia

This patch splits up hwasan thread creation between `__sanitizer_before_thread_create_hook`,
`__sanitizer_thread_create_hook`, and `__sanitizer_thread_start_hook`.
The linux implementation creates the hwasan thread object inside the
new thread. On Fuchsia, we know the stack bounds before thread creation,
so we can initialize part of the thread object in `__sanitizer_before_thread_create_hook`,
then initialize the stack ring buffer in `__sanitizer_thread_start_hook`
once we enter the thread.

Differential Revision: https://reviews.llvm.org/D104085
The file was modifiedcompiler-rt/lib/hwasan/CMakeLists.txt
The file was modifiedcompiler-rt/lib/hwasan/hwasan_thread.cpp
The file was addedcompiler-rt/lib/hwasan/hwasan_fuchsia.cpp
Commit 2c60d22610325bcd6fb4c4bcc8b522b9fdfb46ee by mizvekov
[clang] disable P2266 simpler implicit moves under -fms-compatibility

The Microsoft STL currently has some issues with P2266.
We disable it for now in that mode, but we might come back later with a
more targetted approach.

Signed-off-by: Matheus Izvekov <mizvekov@gmail.com>

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D105518
The file was modifiedclang/lib/Sema/SemaStmt.cpp
The file was modifiedclang/lib/Frontend/InitPreprocessor.cpp
The file was addedclang/test/SemaCXX/cxx2b-p2266-disable-with-msvc-compat.cpp
Commit 398bfa2eadbea371ab20f4dd8cadbef432b35627 by leonardchan
[compiler-rt][Fuchsia] Disable interceptors while enabling new/delete replacements

This disables use of hwasan interceptors which we do not use on Fuchsia. This
explicitly sets the macro for defining the hwasan versions of new/delete.

Differential Revision: https://reviews.llvm.org/D103544
The file was modifiedcompiler-rt/CMakeLists.txt
The file was modifiedcompiler-rt/lib/hwasan/CMakeLists.txt
Commit 0fdb25cd954c5aaf86259e713f03d119ab9f2700 by Stanislav.Mekhanoshin
[AMDGPU] Disable garbage collection passes

Differential Revision: https://reviews.llvm.org/D105593
The file was modifiedllvm/test/CodeGen/AMDGPU/llc-pipeline.ll
The file was modifiedllvm/lib/CodeGen/ShadowStackGCLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
The file was modifiedllvm/lib/CodeGen/GCRootLowering.cpp
The file was modifiedllvm/include/llvm/CodeGen/Passes.h
The file was modifiedllvm/lib/CodeGen/CodeGen.cpp
The file was modifiedllvm/lib/CodeGen/TargetPassConfig.cpp
Commit 877e835addd78126a2ff2b8030af17a5ea92df09 by thakis
[gn build] (semi-manually) port 966386514bec
The file was modifiedllvm/utils/gn/secondary/compiler-rt/lib/hwasan/BUILD.gn
Commit 74c308c56a2d0f000dfed3287311ce46a94ae3c8 by rupprecht
[Bazel] Fixes for b5d847b1b95750d0af40cfc8c71a8fec50bb8613 and 6412a13539ab2914eed8e1df83c399b9a16e3408
The file was modifiedutils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Commit e37dbc6e5703c2755d5fb81949eb32f07bc6ebd6 by thakis
[gn build] (manually) port ef16c8eaa5cd5679759 (MCACustomBehaviorAMDGPU)
The file was modifiedllvm/utils/gn/secondary/llvm/tools/llvm-mca/BUILD.gn
The file was addedllvm/utils/gn/secondary/llvm/tools/llvm-mca/lib/AMDGPU/BUILD.gn
Commit 31d10ea10ee1c24e6c7d7c172e52960717d41817 by Jinsong Ji
[AIX] Don't pass no-integrated-as by default

D105314 added the abibility choose to use AsmParser for parsing inline
asm. -no-intergrated-as will override this default if specified
explicitly.

If toolchain choose to use MCAsmParser for inline asm, don't pass
the option to disable integrated-as explictly unless set by user.

Reviewed By: #powerpc, shchenz

Differential Revision: https://reviews.llvm.org/D105512
The file was modifiedclang/include/clang/Driver/ToolChain.h
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedclang/lib/Driver/ToolChains/AIX.cpp
The file was modifiedclang/lib/Driver/ToolChains/AIX.h
The file was modifiedclang/test/Driver/aix-as.c
Commit a22ecb4508288f6900ad9216ef1490ab72ad68ed by qiucofan
[PowerPC] Fix i64 to vector lowering on big endian

Lowering for scalar to vector would skip if current subtarget is big
endian and the scalar is larger or equal than 64 bits. However there's
some issue in implementation that SToVRHS may refer to SToVLHS's scalar
size if SToVLHS is present, which leads to some crash.o

Reviewed By: nemanjai, shchenz

Differential Revision: https://reviews.llvm.org/D105094
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
The file was modifiedllvm/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll
Commit d38b9f1f31b1fa8ee885cfcd4ee7bd69771088c8 by patrickeholland
Revert "[MCA] [AMDGPU] Adding an implementation to AMDGPUCustomBehaviour for handling s_waitcnt instructions."

Build failures when building with shared libraries. Reverting until I can fix.

Differential Revision: https://reviews.llvm.org/D104730
The file was modifiedllvm/tools/llvm-mca/lib/AMDGPU/AMDGPUCustomBehaviour.h
The file was modifiedllvm/tools/llvm-mca/lib/AMDGPU/AMDGPUCustomBehaviour.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SISchedule.td
The file was modifiedllvm/test/tools/llvm-mca/AMDGPU/gfx10-double.s
The file was removedllvm/test/tools/llvm-mca/AMDGPU/gfx9-retireooo.s
Commit 88efb59b7829a97b3ea7d847bd84e8905a7dee42 by Lang Hames
[ORC] Fix file comments.
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/Shared/OrcError.h
Commit 5471766f9d16fbc5a82dd9503729747d901242a1 by Lang Hames
[ORC] Replace MachOJITDylibInitializers::SectionExtent with ExecutorAddressRange

MachOJITDylibInitializers::SectionExtent represented the address range of a
section as an (address, size) pair. The new ExecutorAddressRange type
generalizes this to an address range (for any object, not necessarily a section)
represented as a (start-address, end-address) pair.

The aim is to express more of ORC (and the ORC runtime) in terms of simple types
that can be serialized/deserialized via SPS. This will simplify SPS-based RPC
involving arguments/return-values of these types.
The file was modifiedllvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/MachOPlatform.h
The file was addedllvm/include/llvm/ExecutionEngine/Orc/Shared/CommonOrcRuntimeTypes.h