Changes

[AArch64] Dump a little more info about unimplemented reg-to-reg copies. NFC

[mlir][tosa] Added shape propagation for TOSA pool operations.

Pool operations perform the same shape propagation. Included the shape
propagation and tests for these avg_pool2d and max_pool2d.

Differential Revision: https://reviews.llvm.org/D105665

[Driver] Let -fno-integrated-as -gdwarf-5 use -fdwarf-directory-asm

While GNU as only allows the directory form of the .file directive for DWARF v5,
the integrated assembler prefers the directory form on all DWARF versions
(-fdwarf-directory-asm).

We currently set CC1 -fno-dwarf-directory-asm for -fno-integrated-as -gdwarf-5
which may cause the directory entry 0 and the filename entry 0 to be incorrect
(see D105662 and the example below). This patch makes -fno-integrated-as -gdwarf-5 use
-fdwarf-directory-asm as well.

```
cd /tmp/c

before
% clang -g -gdwarf-5 -fno-integrated-as e/a.c -S -o - | grep '\.file.*0'
        .file   0 "/tmp/c/e/a.c" md5 0x97e31cee64b4e58a4af8787512d735b6
% clang -g -gdwarf-5 -fno-integrated-as e/a.c -c
% llvm-dwarfdump a.o | grep include_directories
include_directories[  0] = "/tmp/c/e"

after
% clang -g -gdwarf-5 -fno-integrated-as e/a.c -S -o - | grep '\.file.*0'
        .file   0 "/tmp/c" "e/a.c" md5 0x97e31cee64b4e58a4af8787512d735b6
% clang -g -gdwarf-5 -fno-integrated-as e/a.c -c
% llvm-dwarfdump a.o | grep include_directories
include_directories[  0] = "/tmp/c"
```

Reviewed By: #debug-info, dblaikie, osandov

Differential Revision: https://reviews.llvm.org/D105835

sanitizer_common: Fix build for tests

It turns out that COMPILER_RT_TEST_COMPILER_CFLAGS is actually a string
that is being appended to and not a list.

Therefore, append the thread-safety flags to the string. Because CMake
separates list elements by ';' when turning into a string, also
substitute ';' with ' '.

Reviewed By: hctim

Differential Revision: https://reviews.llvm.org/D105829

[compiler-rt][hwasan] Refactor kAliasRegionStart usage

This moves logic for setting kAliasRegionStart into hwasan_allocator.cpp
so other platforms that do not support aliasing mode will not need to define
kAliasRegionStart.

Differential Revision: https://reviews.llvm.org/D105725

[mlir][Linalg] Add 3D pooling named ops to Linalg.

Reviewed By: gysit, hanchung

Differential Revision: https://reviews.llvm.org/D105329

[llc] Default MCUseDwarfDirectory to true

For Clang, `MCUseDwarfDirectory` is true by default for the majority cases
(-fintegrated-as or -gdwarf-5; most targets use -fintegrated-as by default).
Defaulting MCUseDwarfDirectory to true can reduce the differences between clang
and llc.

Reviewed By: #debug-info, dblaikie

Differential Revision: https://reviews.llvm.org/D105856

[mlir][sparse] add support for AND and OR operations

Integral AND and OR follow the simple conjunction and disjuction rules
for lattice building. This revision also completes some of the Merge
refactoring by moving the remainder parts that are merger specific from
sparsification into utils files.

Reviewed By: gussmith23

Differential Revision: https://reviews.llvm.org/D105851

DebugInfo: Use debug_rnglists.dwo for ranges in debug_info.dwo when parsing DWARFv5

This call would incorrectly overwrite (with the .debug_rnglists.dwo from
the executable, if there was one) the rnglists section instead of the
correct value (from the .debug_rnglists.dwo in the .dwo file) that's
applied in DWARFUnit::tryExtractDIEsIfNeeded

Fix test - mistaken hardcoded path from my local machine.

[OpaquePointers][ThreadSanitizer] Cleanup calls to PointerType::getElementType()

Reviewed By: #opaque-pointers, dblaikie

Differential Revision: https://reviews.llvm.org/D105710

[OpaquePtr][ISel] Use ArgListEntry::IndirectType more

[analyzer] Print time taken to analyze each function
Summary: This patch is a part of an attempt to obtain more
timer data from the analyzer. In this patch, we try to use
LLVM::TimeRecord to save time before starting the analysis
and to print the time that a specific function takes while
getting analyzed.

The timer data is printed along with the
-analyzer-display-progress outputs.

ANALYZE (Syntax): test.c functionName : 0.4 ms
ANALYZE (Path,  Inline_Regular): test.c functionName : 2.6 ms
Authored By: RithikSharma
Reviewer: NoQ, xazax.hun, teemperor, vsavchenko
Reviewed By: NoQ
Differential Revision: https://reviews.llvm.org/D105565

Revert "[hwasan] More realistic setjmp test."

Breaks https://lab.llvm.org/buildbot/#/builders/sanitizer-x86_64-linux-qemu

This reverts commit 5511bfdb671505c1e7968ab8ef6032414bba3852.

[GlobalISel] Handle more types in narrowScalar for eq/ne G_ICMP

Generalize the existing eq/ne case using `extractParts`. The original code only
handled narrowings for types of width 2n->n. This generalization allows for any
type that can be broken down by `extractParts`.

General overview is:

- Loop over each narrow-sized part and do exactly what the 2-register case did.
- Loop over the leftover-sized parts and do the same thing
- Widen the leftover-sized XOR results to the desired narrow size
- OR that all together and then do the comparison against 0 (just like the old
  code)

This shows up a lot when building clang for AArch64 using GlobalISel, so it's
worth fixing. For the sake of simplicity, this doesn't handle the non-eq/ne
case yet.

Also remove the code in this case that notifies the observer; we're just going
to delete MI anyway so talking to the observer shouldn't be necessary.

Differential Revision: https://reviews.llvm.org/D105161

Revert "[X86][SSE] X86ISD::FSETCC nodes (cmpss/cmpsd) return a 0/-1 allbits signbits result"

Fails here https://lab.llvm.org/buildbot/#/builders/37/builds/5267

This reverts commit e4aa6ad132164839a4a97dff0d433ea4766f77f1.

[NFC][scudo] Clang format a file

[clang] Refactor AST printing tests to share more infrastructure

Differential Revision: https://reviews.llvm.org/D105457

[PowerPC][NFC] add test case for preparing more loads/stores

[NFC] Edit the comment in M68kInstrInfo::ExpandMOVSZX_RM

[ARM] Introduce MVEEXT ISel lowering

Similar to D91921 (and D104515) this introduces two MVESEXT and MVEZEXT
nodes that larger-than-legal sext and zext are lowered to. These either
get optimized away or end up becoming a series of stack loads/store, in
order to perform the extending whilst keeping the order of the lanes
correct. They are generated from v8i16->v8i32, v16i8->v16i16 and
v16i8->v16i32 extends, potentially with a intermediate extend for the
larger v16i8->v16i32 extend. A number of combines have been added for
obvious cases that come up in tests, notably MVEEXT of shuffles. More
may be needed in the future, but this seems to cover most of the cases
that come up in the tests.

Differential Revision: https://reviews.llvm.org/D105090

[MIPS] Regenerate test after D105161. NFC

[SimplifyCFG] Fix SimplifyBranchOnICmpChain to be undef/poison safe.

This patch fixes the problem of SimplifyBranchOnICmpChain that occurs
when extra values are Undef or poison.

Suppose the %mode is 51 and the %Cond is poison, and let's look at the
case below.
```
	%A = icmp ne i32 %mode, 0
	%B = icmp ne i32 %mode, 51
	%C = select i1 %A, i1 %B, i1 false
	%D = select i1 %C, i1 %Cond, i1 false
	br i1 %D, label %T, label %F
=>
	br i1 %Cond, label %switch.early.test, label %F
switch.early.test:
	switch i32 %mode, label %T [
		i32 51, label %F
		i32 0, label %F
	]
```
incorrectness: https://alive2.llvm.org/ce/z/BWScX

Code before transformation will not raise UB because %C and %D is false,
and it will not use %Cond. But after transformation, %Cond is being used
immediately, and it will raise UB.

This problem can be solved by adding freeze instruction.

correctness: https://alive2.llvm.org/ce/z/x9x4oY

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D104569

[PowerPC] Fix typo in vector shuffle combining

a22ecb4 fixed a crash on big endian subtargets. This commit fixes a typo
in that commit which may cause miscompile.

[AMDGPU] Make some VOP1 instructions rematerializable

This is a pilot change to verify the logic. The rest will be
done in a same way, at least the rest of VOP1.

Differential Revision: https://reviews.llvm.org/D105742

[SelectionDAG] Check use before combining into USUBSAT

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D105789