Started 2 mo 13 days ago
Took 2 hr 15 min

Build #1914 (Jul 14, 2021 10:01:46 PM)

Changes
  1. [RegisterCoalescer] Resolve conflict based on liveness of subregister (details)
  2. [NFC][AMDGPU] autogenerate kill-infinite-loop.ll checks (details)
  3. [AMDGPU] Don't handle export done when unify exit nodes (details)
  4. [clangd] Add CMake option to (not) link in clang-tidy checks (details)
  5. [AArch64][SME] Add matrix register definitions and parsing support (details)
  6. [AMDGPU] Precommit flat-scratch-init.ll test (details)
  7. [AMDGPU] Init scratch only if necessary (details)
  8. [RISCV] Fix the neutral element in vector 'fadd' reductions (details)
  9. [mlir][SCF] populateSCFStructuralTypeConversionsAndLegality WhileOp support (details)
  10. [InstCombine] Fold (select C, (gep Ptr, Idx), Ptr) -> (gep Ptr, (select C, Idx, 0)) (PR50183) (details)
  11. [DebugInfo] Correctly update dbg.values with duplicated location ops (details)
  12. [NFC][PowerPC] Added test to check regsiter allocation for ACC registers (details)
  13. [gn build] (manually) merge 462d4de35b0c (details)
  14. Revert rGb803294cf78714303db2d3647291a2308347ef23 : "[InstCombine] Fold (select C, (gep Ptr, Idx), Ptr) -> (gep Ptr, (select C, Idx, 0)) (PR50183)" (details)
  15. [gn build] Port c08dabb0f476 (details)
  16. [X86] Implement smarter instruction lowering for FP_TO_UINT from f32/f64 to i32/i64 and vXf32/vXf64 to vXi32 for SSE2 and AVX2 by using the exact semantic of the CVTTPS2SI instruction. (details)
  17. [lldb][docs] Remove mention of subversion. NFC. (details)
  18. [NFC] [Coroutines] Remove unused CoroFree (details)
  19. [InstCombine] Fold (select C, (gep Ptr, Idx), Ptr) -> (gep Ptr, (select C, Idx, 0)) (PR50183) (REAPPLIED) (details)
  20. [RemoveRedundantDebugValues] Add a Pass that removes redundant DBG_VALUEs (details)
  21. [lld][MachO] Code cleanup (details)
  22. [Analyzer][solver] Add dump methods for (dis)equality classes. (details)
  23. [SLP] match logical and/or as reduction candidates (details)
  24. ARM: reuse existing libcall global variable if possible. (details)
  25. [docs] Update CMake cross compiling guide link (details)
  26. [mlir][linalg] Fix typo in ExtractSliceOfPadTensorSwapPattern (details)
  27. [AIX] Enable dollar sign as PC in inlineasm (details)
  28. [flang][OpenMP] Fix semantic check of test case in taskloop simd construct (details)
  29. [Lexer] Fix bug in `makeFileCharRange` called on split tokens. (details)
  30. [runtimes] NFCI: Drop intermediate CMake variable TARGET_TRIPLE (details)
  31. [SLP]Workaround for InsertSubVector cost. (details)
  32. [AMDGPU] Check llc-pipeline.ll with -match-full-lines -strict-whitespace (details)
  33. Combine two diagnostics into one and correct grammar (details)
  34. [CostModel][AArch64] Make loads/stores of <vscale x 1 x eltty> invalid. (details)
  35. GlobalISel: Handle lowering non-power-of-2 extloads (details)
  36. [LV] Print remark when loop cannot be vectorized due to invalid costs. (details)
  37. [InstCombine] add tests for icmp with constant offset and no-wrap flags; NFC (details)
  38. [InstCombine] reorder icmp with offset folds for better results (details)
  39. [ARM] Lower v16i8 -> i64 VMLA reductions. (details)
  40. [ELF] --fortran-common: prefer STB_WEAK to COMMON (details)
  41. [WebAssembly] Remove datalayout strings from llc tests (details)
  42. [runtimes] Inherit the TARGET_TRIPLE that may be set by LLVM (details)
  43. [WebAssembly] Codegen for v128.loadX_lane instructions (details)
  44. [SelectionDAG] Add an overload of getStepVector that assumes step 1. (details)
  45. Demangle: correct swift_async demangling for Microsoft scheme (details)
  46. [Verifier] Improve incompatible attribute type check (details)
  47. Remove uses of deprecated target AllPassesAndDialectsNoRegistration in Bazel (NFC) (details)
  48. [scudo] Don't enabled MTE for small alignment (details)
  49. [ARM] Move add(VMLALVA(A, X, Y), B) to VMLALVA(add(A, B), X, Y) (details)
  50. [NFC][PhaseOrdering] Add test for the lack of CSE after SimplifyCFG (PR51092) (details)
  51. [Attributes] Use single method to fetch type from AttributeSet (NFC) (details)
  52. [NFC] Drop redundant check prefixes in newly added test file (details)
  53. [runtimes] Bring back TARGET_TRIPLE (details)
  54. [Bazel] Uniformly export all MLIR td files (details)
  55. [SLP] Fix case of variable name. NFCI. (details)
  56. [docs] Fix :option:`--file-header` reference in llvm-readelf.rst after D105532 (details)
  57. [SLP][NFC]Fix variables names, NFC. (details)
  58. [AMDGPU] Add TII::isIgnorableUse() to allow VOP rematerialization (details)
  59. [tests] Stablize tests for possible change in deref semantics (details)
  60. [libcxx] [test] Remove a LIBCXX-WINDOWS-FIXME in trivial_abi/unique_ptr_ret (details)
  61. Global variables with strong definitions cannot be freed (details)
  62. [mlir] NFC - Add AffineMap::replace variant with dim/symbol inference (details)
  63. [Support] Get correct number of physical cores on Apple Silicon (details)
  64. [lldb] Always call DestroyImpl from Process::Finalize (details)
  65. [lldb] Make TargetList iterable (NFC) (details)
  66. [asan][clang] Add flag to outline instrumentation (details)
  67. [tests] Stablize tests for possible change in deref semantics (details)
  68. [mlir][affine] Add single result affine.min/max -> affine.apply canonicalization. (details)
  69. [AArch64] Fix selection of G_UNMERGE <2 x s16> (details)
  70. [SimpleLoopUnswitch] Don't non-trivially unswitch loops with catchswitch exits (details)
  71. Precommit test for D106017 (details)
  72. [llvm-strip][WebAssembly] Support strip flags (details)
  73. [Polly] Fix misleading debug message. NFC. (details)
  74. [ARM] Fix RELA relocations for 32bit ARM. (details)
  75. [docs][OpaquePtr] Remove finished task (details)
  76. [clang-format] Make BreakAfterReturnType work with K&R C functions (details)
  77. [libomptarget] Keep the Shadow Pointer Map up-to-date (details)
  78. [Support] Turn on SupportTest for Apple Silicon (details)
  79. [GlobalOpt] Fix a miscompile when evaluating struct initializers. (details)
  80. [WebAssembly] Codegen for v128.storeX_lane instructions (details)
  81. [clang] Refactor AST printing tests to share more infrastructure (details)
  82. [libc++] NFCI: Restore code duplication in wrap_iter, with test. (details)
  83. [AMDGPU] Use update_test_checks.py script for annotate kernel features tests. (details)
  84. libclc: Add -cl-no-stdinc to clang flags on clang >=13 (details)
  85. [OpenCL][NFC] opencl-c.h: reorder atomic operations (details)
  86. [OpenCL] opencl-c.h: CL3.0 generic address space (details)
  87. [PowerPC] Generate inlined quadword lock free atomic operations via AtomicExpand (details)
  88. [gn build] Port b9c3941cd61d (details)
  89. [mlir][linalg][NFC] Factor out tile generation in makeTiledShapes (details)
  90. [mlir][linalg] Add optional output operand to PadTensorOp (details)
  91. [mlir][NFC] Move asOpFoldResult helper functions to StaticValueUtils (details)
  92. [mlir][linalg] Tile PadTensorOp (details)
  93. [mlir][linalg] Fix Windows build (details)
  94. [mlir][linalg] Improve codegen of ExtractSliceOfPadTensorSwapPattern (details)
  95. [mlir][linalg] Improve codegen when tiling PadTensor evenly (details)
  96. [PowerPC][NFC] add testcase for update-form preparation with non-const increment (details)
  97. Defend early against operation created without a registered dialect (details)
  98. [Attributor] AACallEdges, Add a way to ask nonasm unknown callees (details)
  99. Revert "Defend early against operation created without a registered dialect" (details)
  100. [MLIR] [Python] Add `owner` to PyValue and fix its parent reference (details)
  101. Defend early against operation created without a registered dialect (details)

Started by timer

This run spent:

  • 46 min waiting;
  • 2 hr 15 min build duration;
  • 2 hr 15 min total from scheduled to completion.
Revision: b899cd8edcb824c4e4f999ef254209060d1ab646
Repository: https://github.com/llvm/llvm-zorg.git
  • refs/remotes/origin/main
Revision: 0f9e6451a836886f39137818c4f0cfd69ae31e62
Repository: http://labmaster3.local/git/llvm-project.git
  • refs/remotes/origin/main
Revision: b899cd8edcb824c4e4f999ef254209060d1ab646
Repository: http://labmaster3.local/git/llvm-zorg.git
  • refs/remotes/origin/main
Test Result (no failures)