Commit
8a1727ba51d262365b0d9fe10fef7e50da7022cd
by yedeng.yd[Coroutines] Run coroutine passes by default
This patch make coroutine passes run by default in LLVM pipeline. Now the clang and opt could handle IR inputs containing coroutine intrinsics without special options. It should be fine. On the one hand, the coroutine passes seems to be stable since there are already many projects using coroutine feature. On the other hand, the coroutine passes should do nothing for IR who doesn't contain coroutine intrinsic.
Test Plan: check-llvm
Reviewed by: lxfind, aeubanks
Differential Revision: https://reviews.llvm.org/D105877
|
 | llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll |
 | llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll |
 | clang/lib/CodeGen/BackendUtil.cpp |
 | clang/test/CodeGen/lto-newpm-pipeline.c |
 | llvm/include/llvm/Passes/PassBuilder.h |
 | llvm/test/Other/new-pm-defaults.ll |
 | llvm/tools/opt/opt.cpp |
 | llvm/include/llvm-c/Transforms/PassBuilder.h |
 | llvm/lib/Passes/PassBuilderBindings.cpp |
 | clang/test/CodeGenCoroutines/coro-symmetric-transfer-01.cpp |
 | clang/test/CodeGenCoroutines/coro-always-inline.cpp |
 | llvm/test/Other/new-pm-thinlto-defaults.ll |
 | llvm/test/Other/new-pm-O0-defaults.ll |
 | llvm/lib/Transforms/Utils/InlineFunction.cpp |
 | llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll |
 | llvm/tools/opt/NewPMDriver.cpp |
 | llvm/tools/opt/NewPMDriver.h |
 | llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll |
 | llvm/lib/Passes/PassBuilder.cpp |
Commit
53fed88159d00a340797cb4966dce471bc9fba21
by Tony.Tye[AMDGPU] Reserve AMDGPU ELF e_flags machine 0x44
Reviewed By: rampitec
Differential Revision: https://reviews.llvm.org/D106034
|
 | llvm/include/llvm/BinaryFormat/ELF.h |
 | llvm/docs/AMDGPUUsage.rst |
Commit
fa2daaeff82e3eb26fe7008715024f5bc11f7f1a
by djtodoro[2/2][RemoveRedundantDebugValues] Add a Pass that removes redundant DBG_VALUEs
This patch adds the forward scan for finding redundant DBG_VALUEs.
This analysis aims to remove redundant DBG_VALUEs by going forward in the basic block by considering the first DBG_VALUE as a valid until its first (location) operand is not clobbered/modified. For example:
(1) DBG_VALUE $edi, !"var1", ... (2) <block of code that does affect $edi> (3) DBG_VALUE $edi, !"var1", ... ... in this case, we can remove (3).
Differential Revision: https://reviews.llvm.org/D105280
|
 | llvm/test/DebugInfo/MIR/X86/remove-redundant-dbg-vals.mir |
 | llvm/test/CodeGen/PowerPC/non-debug-mi-search-frspxsrsp.ll |
 | llvm/lib/CodeGen/RemoveRedundantDebugValues.cpp |
Commit
b0d38ad0bc254b887123cd063a5f0db30a80f938
by 1.int32[clang][Analyzer] Add symbol uninterestingness to bug report.
`PathSensitiveBughReport` has a function to mark a symbol as interesting but it was not possible to clear this flag. This can be useful in some cases, so the functionality is added.
Reviewed By: NoQ
Differential Revision: https://reviews.llvm.org/D105637
|
 | clang/unittests/StaticAnalyzer/CMakeLists.txt |
 | clang/lib/StaticAnalyzer/Core/BugReporter.cpp |
 | clang/include/clang/StaticAnalyzer/Core/BugReporter/BugReporter.h |
 | clang/unittests/StaticAnalyzer/BugReportInterestingnessTest.cpp |
 | clang/unittests/StaticAnalyzer/Reusables.h |
Commit
9805afdfea7e5cc1c73efcd13c4bb1fc8c8d6765
by llvmgnsyncbot[gn build] Port b0d38ad0bc25
|
 | llvm/utils/gn/secondary/clang/unittests/StaticAnalyzer/BUILD.gn |
Commit
04bddb6cc7c405f1a82ee1d94f96596c2cb387d9
by ajcbik[mlir][crunner] fix bug in memref copy for rank 0
While replacing linalg.copy with the more desired memref.copy I found a bug in the support library for rank 0 memref copying. The code would loop for something like the following, since there is code for no-rank and rank > 0, but rank == 0 was unexpected.
memref.copy %0, %1: memref<f32> to memref<f32>
Note that a "regression test" for this will follow using the sparse compiler migration to memref.copy which exercises this case many times.
Reviewed By: herhut
Differential Revision: https://reviews.llvm.org/D106036
|
 | mlir/lib/ExecutionEngine/CRunnerUtils.cpp |
Commit
d9cdcfb069e97b106474f11ace9193ca24323006
by tbaeder[llvm][tools] Hide unrelated llvm-bcanalyzer options
They otherwise show up when we link against the dynamic libLLVM.so.
Differential Revision: https://reviews.llvm.org/D105893
|
 | llvm/tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp |
 | llvm/test/tools/llvm-bcanalyzer/help.test |
Commit
4b219051a331d49c391fe452548bc220bcfe8ea3
by sgueltonFix undeduced type assert
If the instantiation of a member variable makes it possible to compute a previously undeduced type, we should use that piece of information.
Fix bug#50590
Differential Revision: https://reviews.llvm.org/D103849
|
 | clang/lib/AST/Expr.cpp |
 | clang/test/CodeGenCXX/auto-variable-template.cpp |
Commit
442123cada4c06acf872f22ddfb7e47aec152215
by bgraurFixes memory sanitizer 'use-of-uninitialized-value' diagnostic.
Differential Revision: https://reviews.llvm.org/D106047
|
 | llvm/lib/Target/PowerPC/PPCSubtarget.cpp |
Commit
0ed1747a92d0f4294bc1ab22627b4c9bab42e27a
by fmayer[NFC] [hwasan] Split argument logic into functions.
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D105971
|
 | llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp |
Commit
dfa76933c29626d08a3538fcc66f120a5bc563b7
by cullen.rhodes[AArch64][SME] Add outer product instructions
This patch adds support for the following outer product instructions:
* BFMOPA, BFMOPS, FMOPA, FMOPS, SMOPA, SMOPS, SUMOPA, SUMOPS, UMOPA, UMOPS, USMOPA, USMOPS.
Depends on D105570.
The reference can be found here: https://developer.arm.com/documentation/ddi0602/2021-06
Reviewed By: david-arm
Differential Revision: https://reviews.llvm.org/D105571
|
 | llvm/test/MC/AArch64/SME/usmops-diagnostics.s |
 | llvm/test/MC/AArch64/SME/fmops.s |
 | llvm/test/MC/AArch64/SME/usmopa-32.s |
 | llvm/test/MC/AArch64/SME/smops-32.s |
 | llvm/test/MC/AArch64/SME/sumops-64.s |
 | llvm/test/MC/AArch64/SME/umops-diagnostics.s |
 | llvm/test/MC/AArch64/SME/smopa-32.s |
 | llvm/test/MC/AArch64/SME/sumops-diagnostics.s |
 | llvm/test/MC/AArch64/SME/smopa-diagnostics.s |
 | llvm/test/MC/AArch64/SME/fmopa-diagnostics.s |
 | llvm/test/MC/AArch64/SME/usmops-32.s |
 | llvm/test/MC/AArch64/SME/umopa-64.s |
 | llvm/test/MC/AArch64/SME/sumopa-64.s |
 | llvm/test/MC/AArch64/SME/umops-32.s |
 | llvm/test/MC/AArch64/SME/fmopa.s |
 | llvm/test/MC/AArch64/SME/fmopa-fp64.s |
 | llvm/test/MC/AArch64/SME/umops-64.s |
 | llvm/test/MC/AArch64/SME/bfmops.s |
 | llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td |
 | llvm/test/MC/AArch64/SME/bfmopa.s |
 | llvm/test/MC/AArch64/SME/fmops-diagnostics.s |
 | llvm/test/MC/AArch64/SME/sumopa-diagnostics.s |
 | llvm/test/MC/AArch64/SME/umopa-32.s |
 | llvm/test/MC/AArch64/SME/usmopa-64.s |
 | llvm/test/MC/AArch64/SME/bfmops-diagnostics.s |
 | llvm/test/MC/AArch64/SME/usmopa-diagnostics.s |
 | llvm/test/MC/AArch64/SME/smops-64.s |
 | llvm/test/MC/AArch64/SME/usmops-64.s |
 | llvm/lib/Target/AArch64/SMEInstrFormats.td |
 | llvm/test/MC/AArch64/SME/bfmopa-diagnostics.s |
 | llvm/test/MC/AArch64/SME/fmops-fp64.s |
 | llvm/test/MC/AArch64/SME/sumopa-32.s |
 | llvm/test/MC/AArch64/SME/umopa-diagnostics.s |
 | llvm/test/MC/AArch64/SME/smops-diagnostics.s |
 | llvm/test/MC/AArch64/SME/sumops-32.s |
 | llvm/test/MC/AArch64/SME/smopa-64.s |
Commit
69a3acffdf1b3f5fc040aaeafc1c77588a607d1a
by mkazantsev[Test] We can benefit from pipelining of ymm load/stores
This patch demonstrates a scenario when we need to load/store a single 64-byte value, which is done by 2 ymm loads and stores in AVX. The current codegen choses the following sequence:
load ymm0 load ymm1 store ymm1 store ymm0
If we instead stored ymm0 before ymm1, we could execute 2nd load and 1st store in parallel.
|
 | llvm/test/CodeGen/X86/ymm-ordering.ll |
Commit
acf0a6428681dccac803984bfbb1e3e54248f090
by iii[sanitizer] Fix __sanitizer_kernel_sigset_t endianness issue
setuid(0) hangs on SystemZ under TSan because TSan's BackgroundThread ignores SIGSETXID. This in turn happens because internal_sigdelset() messes up the mask bits on big-endian system due to how __sanitizer_kernel_sigset_t is defined.
Commit d9a1a53b8d80 ("[ESan] [MIPS] Fix workingset-signal-posix.cpp on MIPS") fixed this for MIPS by adjusting the __sanitizer_kernel_sigset_t definition. Generalize this by defining __SANITIZER_KERNEL_NSIG based on kernel's _NSIG and using uptr[] for __sanitizer_kernel_sigset_t.sig on all platforms.
Reviewed By: dvyukov
Differential Revision: https://reviews.llvm.org/D105629
|
 | compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h |
 | compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp |
Commit
54128b73f8336ffe5cfd89cc860e58c3bb38a425
by iii[sanitizer] Force TLS allocation on s390
When running with an old glibc, CollectStaticTlsBlocks() calls __tls_get_addr() in order to force TLS allocation. This function is not available on s390 and the code simply does nothing in this case, so all the resulting static TLS blocks end up being incorrect.
Fix by calling __tls_get_offset() on s390.
Reviewed By: dvyukov
Differential Revision: https://reviews.llvm.org/D105629
|
 | compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp |
Commit
cadbb9241627eefc9f589ae4376fd9ed3e272ecc
by iii[TSan] Align thread_registry_placeholder
s390x requires ThreadRegistry.mtx_.opaque_storage_ to be 4-byte aligned. Since other architectures may have similar requirements, use the maximum thread_registry_placeholder alignment from other sanitizers, which is 64 (LSan).
Reviewed By: dvyukov
Differential Revision: https://reviews.llvm.org/D105629
|
 | compiler-rt/lib/tsan/rtl/tsan_rtl.cpp |
Commit
3845f2cd940bd394fc735388ca0cd6652a98b7b9
by iii[TSan] Use zeroext for function parameters
SystemZ ABI requires zero-extending function parameters to 64-bit. The compiler is free to optimize the code around this assumption, e.g. failing to zero-extend __tsan_atomic32_load()'s morder may cause crashes in to_mo() switch table lookup.
Fix by adding zeroext attributes to TSan's FunctionCallees, similar to how it was done in commit 3bc439bdff8b ("[MSan] Add instrumentation for SystemZ"). This is a no-op on arches that don't need it.
Reviewed By: dvyukov
Differential Revision: https://reviews.llvm.org/D105629
|
 | llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp |
Commit
d5c34ee5b666e12f92cf5b6e35490e1746fcc5e9
by iii[TSan] Build ignore_lib{0,1,5} tests with -fno-builtin
These tests depend on TSan seeing the intercepted memcpy(), so they break when the compiler chooses the builtin version.
Reviewed By: dvyukov
Differential Revision: https://reviews.llvm.org/D105629
|
 | compiler-rt/test/tsan/ignore_lib5.cpp |
 | compiler-rt/test/tsan/ignore_lib0.cpp |
 | compiler-rt/test/tsan/ignore_lib1.cpp |
Commit
fab044045b63d59586caa09aa47892d0f7ce31d0
by iii[TSan] Define PTHREAD_ABI_BASE for SystemZ
SystemZ's glibc symbols use version 2.3.2.
Reviewed By: dvyukov
Differential Revision: https://reviews.llvm.org/D105629
|
 | compiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp |
Commit
96a29df0b166ed52806dfd01236c604c0eb8b7d1
by iii[TSan] Define C/C++ address ranges for SystemZ
The kernel supports a full 64-bit VMA, but we can use only 48 bits due to the limitation imposed by SyncVar::GetId(). So define the address ranges similar to the other architectures, except that the address space "tail" needs to be made inaccessible in CheckAndProtect(). Since it's for only one architecture, don't make an abstraction for this.
Reviewed By: dvyukov
Differential Revision: https://reviews.llvm.org/D105629
|
 | compiler-rt/lib/tsan/rtl/tsan_platform.h |
 | compiler-rt/lib/tsan/rtl/tsan_platform_posix.cpp |
Commit
402fc790eb484161866941cc840e20bdf5ae80e6
by iii[TSan] Add SystemZ longjmp support
Implement the interceptor and stack pointer demangling.
Reviewed By: dvyukov
Differential Revision: https://reviews.llvm.org/D105629
|
 | compiler-rt/lib/tsan/CMakeLists.txt |
 | llvm/utils/gn/secondary/compiler-rt/lib/tsan/BUILD.gn |
 | compiler-rt/lib/tsan/rtl/tsan_platform_linux.cpp |
 | compiler-rt/lib/tsan/rtl/tsan_rtl_s390x.S |
Commit
b17673816d7f65e07015489993b22049e36b04db
by iii[TSan] Disable __TSAN_HAS_INT128 on SystemZ
SystemZ does not have 128-bit atomics.
Reviewed By: dvyukov
Differential Revision: https://reviews.llvm.org/D105629
|
 | compiler-rt/lib/tsan/rtl/tsan_interface.h |
Commit
bd77f742d656afa20faf9ce79b552e1ded4af5e5
by iii[TSan] Intercept __tls_get_addr_internal and __tls_get_offset on SystemZ
Reuse the assembly glue code from sanitizer_common_interceptors.inc and the handling logic from the __tls_get_addr interceptor.
Reviewed By: dvyukov
Differential Revision: https://reviews.llvm.org/D105629
|
 | compiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp |
 | compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc |
Commit
937242cecc13f60c8e31ce8f936bfe218af42a90
by iii[TSan] Adjust tests for SystemZ
XFAIL map32bit, define the maximum possible allocation size in mmap_large.cpp.
Reviewed By: dvyukov
Differential Revision: https://reviews.llvm.org/D105629
|
 | compiler-rt/test/tsan/mmap_large.cpp |
 | compiler-rt/test/tsan/map32bit.cpp |
Commit
e34078f121a58b503d225cf715d1494117e7948b
by iii[TSan] Enable SystemZ support
Enable building the runtime and enable -fsanitize=thread in clang.
Reviewed By: dvyukov
Differential Revision: https://reviews.llvm.org/D105629
|
 | clang/lib/Driver/ToolChains/Linux.cpp |
 | compiler-rt/cmake/config-ix.cmake |
Commit
9bf2e7eeebbd7524cfa3c448b40196fcd0a1a4cb
by iii[TSan] Add SystemZ SANITIZER_GO support
Define the address ranges (similar to the C/C++ ones, but with the heap range merged into the app range) and enable the sanity check.
Reviewed By: dvyukov
Differential Revision: https://reviews.llvm.org/D105629
|
 | compiler-rt/test/tsan/CMakeLists.txt |
 | compiler-rt/lib/tsan/go/buildgo.sh |
 | compiler-rt/lib/tsan/rtl/tsan_platform.h |
 | compiler-rt/lib/tsan/CMakeLists.txt |
Commit
afd895709db96f86fe80c4c0980e449f67bdbe9e
by sebastian.neubauer[AMDGPU] Use isMetaInstruction for instruction size
Meta instructions have a size of 0. Use isMetaInstruction instead of listing them explicitly.
Differential Revision: https://reviews.llvm.org/D106043
|
 | llvm/lib/Target/AMDGPU/SIInstrInfo.cpp |
Commit
831ee6b0c38bbb9ed1206a67a5a1df4e24066ea0
by irina.dobrescu[AArch64][GlobalISel] Optimise lowering for some vector types for min/max
Differential Revision: https://reviews.llvm.org/D105696
|
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-min-max.mir |
 | llvm/test/CodeGen/AArch64/min-max.ll |
 | llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp |
Commit
ffe6a5832533e71e1edc4fe0eebda421f24fb61a
by akuegel[mlir][nvvm]: Add math::Exp2Op lowering to NVVM.
Differential Revision: https://reviews.llvm.org/D106050
|
 | mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp |
 | mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir |
Commit
d179c43206fde9280101804830f43a4e35d6aa84
by llvm-dev[MIPS] Refresh ashr test checks. NFCI.
|
 | llvm/test/CodeGen/Mips/llvm-ir/ashr.ll |
Commit
944f39f38d2b1d54ac9a5668e3ef33d946a81344
by llvm-dev[InstCombine] Strip inbounds from (select C, (gep Ptr, Idx), Ptr) -> (gep Ptr, (select C, Idx, 0)) fold
As discussed on rGd561b6fbdbe6, we can't guarantee that the new gep is inbounds
|
 | llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp |
 | llvm/test/Transforms/InstCombine/select-gep.ll |
Commit
e21663d32b30211c145c5ab85f079e33bbdc72bb
by llvm-dev[NVPTX] Add selp.f32 checks to select(cond,fpbinop(),fpbinop()) tests
Will help show codegen diffs in an upcoming patch
|
 | llvm/test/CodeGen/NVPTX/fast-math.ll |
Commit
5cbd5c62beeb8f1cb1408bc8f68ec1b522b4061c
by fraser[VP][NFC] Correct formatting in unit test
|
 | llvm/unittests/IR/VPIntrinsicTest.cpp |
Commit
0c3401c86e82cb5d8ba0c9dec6573473e505c5fc
by Louis Dionne[runtimes] Serialize all Lit params instead of passing them to add_lit_testsuite
add_lit_testsuite() takes Lit parameters passed to it and adds them to the parameters used globally when running all test suites. That means that a target like `check-all`, which ends up calling Lit on the whole monorepo, will see the test parameters for all the individual project's test suites.
So, for example, it would see `--param std=c++03` (from libc++abi), and `--param std=c++03` (from libc++), and `--param whatever` (from another project being tested at the same time). While always unclean, that works when the parameters all agree. However, if the parameters share the same name but have different values, only one of those two values will be used and it will be incredibly confusing to understand why one of the test suites is being run with the incorrect parameter value.
For that reason, this commit moves away from using add_lit_testsuite()'s PARAM functionality, and serializes the parameter values for the runtimes in the generated config.py file instead, which is local to the specific test suite.
Differential Revision: https://reviews.llvm.org/D105991
|
 | libcxxabi/test/CMakeLists.txt |
 | libunwind/test/CMakeLists.txt |
 | libcxx/test/CMakeLists.txt |
Commit
3001b48d76bcf10063286efc722a8479522f4c50
by Louis Dionne[libc++] Implement views::all_t and ranges::viewable_range
Differential Revision: https://reviews.llvm.org/D105816
|
 | libcxx/test/std/input.output/filesystems/class.directory_iterator/range_concept_conformance.compile.pass.cpp |
 | libcxx/test/std/ranges/range.adaptors/range.all/all.pass.cpp |
 | libcxx/test/std/containers/unord/unord.multiset/range_concept_conformance.compile.pass.cpp |
 | libcxx/test/std/ranges/range.req/range.refinements/viewable_range.compile.pass.cpp |
 | libcxx/test/std/containers/associative/multiset/range_concept_conformance.compile.pass.cpp |
 | libcxx/test/std/containers/unord/unord.map/range_concept_conformance.compile.pass.cpp |
 | libcxx/include/__ranges/drop_view.h |
 | libcxx/test/std/ranges/range.adaptors/range.all/all_t.compile.pass.cpp |
 | libcxx/test/std/ranges/range.adaptors/range.all.pass.cpp |
 | libcxx/test/std/containers/sequences/array/range_concept_conformance.compile.pass.cpp |
 | libcxx/test/std/strings/string.view/range_concept_conformance.compile.pass.cpp |
 | libcxx/test/std/containers/views/range_concept_conformance.compile.pass.cpp |
 | libcxx/test/std/re/re.results/range_concept_conformance.compile.pass.cpp |
 | libcxx/include/__ranges/transform_view.h |
 | libcxx/test/std/containers/sequences/vector/range_concept_conformance.compile.pass.cpp |
 | libcxx/test/std/containers/unord/unord.multimap/range_concept_conformance.compile.pass.cpp |
 | libcxx/include/__ranges/all.h |
 | libcxx/include/__ranges/concepts.h |
 | libcxx/include/ranges |
 | libcxx/test/std/containers/sequences/list/range_concept_conformance.compile.pass.cpp |
 | libcxx/test/std/containers/unord/unord.set/range_concept_conformance.compile.pass.cpp |
 | libcxx/test/std/strings/basic.string/range_concept_conformance.compile.pass.cpp |
 | libcxx/test/std/input.output/filesystems/class.path/range_concept_conformance.compile.pass.cpp |
 | libcxx/test/std/containers/associative/map/range_concept_conformance.compile.pass.cpp |
 | libcxx/docs/Status/RangesPaper.csv |
 | libcxx/test/std/ranges/range.adaptors/range.ref.view.pass.cpp |
 | libcxx/test/std/containers/sequences/forwardlist/range_concept_conformance.compile.pass.cpp |
 | libcxx/test/std/containers/associative/multimap/range_concept_conformance.compile.pass.cpp |
 | libcxx/test/std/containers/sequences/deque/range_concept_conformance.compile.pass.cpp |
 | libcxx/test/std/containers/sequences/vector.bool/range_concept_conformance.compile.pass.cpp |
 | libcxx/test/std/containers/associative/set/range_concept_conformance.compile.pass.cpp |
Commit
47633af9d4a8b93f50cb711cf23489736e0226f1
by stephen.tozerReapply "[DebugInfo] Enable variadic debug value salvaging"
Reapplied after previous build failures were fixed in 14b62f7e2.
This reverts commit 540b4a5fb31086b6d40735e96e6ec497022107e7.
|
 | llvm/lib/Transforms/Utils/Local.cpp |
 | llvm/test/DebugInfo/salvage-duplicate-values.ll |
 | llvm/test/DebugInfo/salvage-gep.ll |
 | llvm/test/DebugInfo/salvage-nonconst-binop.ll |
Commit
5024fe93068082ac230643095cbbac5c2aa74d36
by Louis Dionne[libc++] Mark failing rel_ops test as XFAIL in back-deployment
The test triggers availability errors.
|
 | libcxx/test/std/containers/iterator.rel_ops.compile.pass.cpp |
Commit
01bdb0f75efb2bb795a79cea9f3f918136d13a7f
by nicolas.vasilache[mlir][linalg] Improve implementation of hoist padding.
Instead of relying on adhoc bounds calculations, use a projection-based implementation. This simplifies the implementation and finds more static constant sizes than previously/
Differential Revision: https://reviews.llvm.org/D106054
|
 | mlir/lib/Dialect/Linalg/Analysis/CMakeLists.txt |
 | mlir/lib/Dialect/Linalg/Analysis/ConstraintsSet.cpp |
 | mlir/lib/Dialect/Linalg/Transforms/Hoisting.cpp |
 | mlir/include/mlir/Dialect/Linalg/Analysis/ConstraintsSet.h |
 | mlir/test/Dialect/Linalg/hoist-padding.mlir |
Commit
dc7bdc1e7121693df112f2fdb11cc6b88580ba4b
by sander.desmalen[LV] Fix determinism for failing scalable-call.ll test.
The sort function for emitting an OptRemark was not deterministic, which caused scalable-call.ll to fail on some buildbots. This patch fixes that.
This patch also fixes an issue where `Instruction::comesBefore()` is called when two Instructions are in different basic blocks, which would otherwise cause an assertion failure.
|
 | llvm/lib/Transforms/Vectorize/LoopVectorize.cpp |
 | llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll |
Commit
91e151476c75ebad640a62b469328e7184f45ef2
by llvm-dev[TTI] Consistently make getMinVectorRegisterBitWidth() methods const. NFCI.
The underlying getMinVectorRegisterBitWidth() methods are const, but it was missed in a couple of TargetTransformInfo wrappers.
Noticed while working on D103925
|
 | llvm/include/llvm/Analysis/TargetTransformInfo.h |
 | llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h |
Commit
74b88807ae761da3ae1d5eb947d242a3492e23d0
by akuegel[mlir][rocdl] Add math::Exp2Op lowering to ROCDL
Differential Revision: https://reviews.llvm.org/D106057
|
 | mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp |
 | mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir |
Commit
3e6c383dc63685a6248fd6f1ffabad0b42af99a0
by lebedev.ri[SimplifyCFG] Rerun PHI deduplication after common code sinkinkg (PR51092)
`SinkCommonCodeFromPredecessors()` doesn't itself ensure that duplicate PHI nodes aren't created. I suppose, we could teach it to do that on-the-fly (& account for the already-existing PHI nodes, & adjust costmodel), the diff will be bigger than this.
The alternative is to schedule a new EarlyCSE pass invocation somewhere later in the pipeline. Clearly, we don't have any EarlyCSE runs in module optimization passline, so this pattern isn't cleaned up... That would perhaps better, but it will again have some compile time impact.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D106010
|
 | llvm/lib/Transforms/Utils/SimplifyCFG.cpp |
 | llvm/test/Transforms/PhaseOrdering/X86/earlycse-after-simplifycfg-two-entry-phi-node-folding.ll |
 | llvm/test/Transforms/PGOProfile/cspgo_profile_summary.ll |
 | llvm/test/Transforms/SimplifyCFG/X86/sink-common-code.ll |
Commit
034b94bb7161c64234e4ec35bf49428c3a1f8f0a
by aaronFix documentation; NFC
The documentation about ignoringImpCasts is wrong, which can cause misunderstandings. This patch fixes it.
|
 | clang/include/clang/ASTMatchers/ASTMatchers.h |
 | clang/docs/LibASTMatchersReference.html |
Commit
5d7632ee72c51b518bde17e385b71c5d3f0d2560
by Tim NorthoverMachO: don't emit L... private symbols in do_not_dead_strip sections.
The linker can sometimes drop the do_not_dead_strip if it can't associate the atom with a symbol (the other place to specify no dead-stripping in MachO files).
|
 | llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp |
 | llvm/test/CodeGen/X86/osx-private-labels.ll |
Commit
dad506bd4e27b52e671a8b927320845732e1e073
by david.green[ARM] Expand types handled in VQDMULH recognition
We have a DAG combine for recognizing the sequence of nodes that make up an MVE VQDMULH, but only currently handles specifically legal types. This patch expands that to other power-2 vector types. For smaller than legal types this means any_extending the type and casting it to a legal type, using a VQDMULH where we only use some of the lanes. The result is sign extended back to the original type, to properly set the invalid lanes. Larger than legal types are split into chunks with extracts and concat back together.
Differential Revision: https://reviews.llvm.org/D105814
|
 | llvm/test/CodeGen/Thumb2/mve-vqdmulh.ll |
 | llvm/lib/Target/ARM/ARMISelLowering.cpp |
Commit
b36c4bb3ecc954f8c78d21a3200fc8faaec240d0
by nathan[docs] More CMAKE variable documentation
This breaks out some (more) common llvm-specific variables. Controlling the subprojects and target architectures, along with clues about restricting build parallelism when linking. 'more common' is somewhat subjective, of course.
Differential Revision: https://reviews.llvm.org/D105822
|
 | llvm/docs/CMake.rst |
Commit
f24335c69ea363082d922797363e98f1dcb3b14f
by Tim NorthoverMachO: fix Clang test broken by dropping private labels in LLVM.
LLVM changed to not emit L... labels for things marked "do_not_dead_strip" because the linker can sometimes drop the flag if there's no proper symbol. This Clang test checked for the old behaviour, but doesn't actually care about that bit.
|
 | clang/test/CodeGenObjC/protocol-in-extended-class.m |
Commit
05eb59e1d0ea7505539434a32ccc5c3dc2097597
by anton.zabaznov[OpenCL] Add support of __opencl_c_program_scope_global_variables feature macro
Reviewed By: Anastasia
Differential Revision: https://reviews.llvm.org/D103191
|
 | clang/test/CodeGenOpenCL/addr-space-struct-arg.cl |
 | clang/test/SemaOpenCL/storageclass.cl |
 | clang/include/clang/Basic/OpenCLOptions.h |
 | clang/lib/Sema/SemaDecl.cpp |
Commit
a607f64118240f70bf1b14ec121b65f49d63800d
by sander.desmalenRevert "[LV] Print remark when loop cannot be vectorized due to invalid costs."
This reverts commit efaf3099c8cec1954831ee28a2f75a72096f50eb. This reverts commit dc7bdc1e7121693df112f2fdb11cc6b88580ba4b.
Reverting patches due to buildbot failures.
|
 | llvm/lib/Transforms/Vectorize/LoopVectorize.cpp |
 | llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll |
Commit
d0d37fcc4e2965c4ccd3401f8bdf22935815136a
by gabor.marton[Analyzer][solver] Remove unused functions
../../git/llvm-project/clang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp:2395:17: warning: 'clang::ento::ProgramStateRef {anonymous}::RangeConstraintManager::setRange(clang::ento::ProgramStateRef, {anonymous}::EquivalenceClass, clang::ento::RangeSet)' defined but not used [-Wunused-function] ../../git/llvm-project/clang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp:2384:10: warning: 'clang::ento::RangeSet {anonymous}::RangeConstraintManager::getRange(clang::ento::ProgramStateRef, {anonymous}::EquivalenceClass)' defined but not used [-Wunused-function]
Differential Revision: https://reviews.llvm.org/D106063
|
 | clang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp |
Commit
3cc38703d5ab05be0b01c31f829d19b47f183c5f
by llvm-dev[NVPTX] Tweak fast-math tests to avoid select(binop(x,y),binop(x,z)) fold
As suggested on D106058, tweak the tests to keep the combineRepeatedFPDivisors test coverage.
|
 | llvm/test/CodeGen/NVPTX/fast-math.ll |
Commit
68ac2e53ff289ae541e5e9929605a649d6f3019b
by ajcbik[mlir][sparse] replace linalg.copy with memref.copy
Note, this revision relies on the following revision for a bugfix in the memref copy library in order for all sparse integration tests to pass.
https://reviews.llvm.org/D106036
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D106038
|
 | mlir/test/Dialect/SparseTensor/sparse_lower.mlir |
 | mlir/test/Dialect/SparseTensor/sparse_lower_col.mlir |
 | mlir/test/Dialect/SparseTensor/sparse_nd.mlir |
 | mlir/test/Dialect/SparseTensor/sparse_3d.mlir |
 | mlir/test/Dialect/SparseTensor/dense.mlir |
 | mlir/test/Dialect/SparseTensor/sparse_2d.mlir |
 | mlir/lib/Dialect/SparseTensor/Transforms/Sparsification.cpp |
 | mlir/test/Dialect/SparseTensor/sparse_lower_inplace.mlir |
 | mlir/test/Dialect/SparseTensor/sparse_1d.mlir |
Commit
0aece73aba65b92770e63bc6c138e8b1a177d45f
by llvm-dev[DAG] Fold select(cond,binop(x,y),binop(x,z)) -> binop(x,select(cond,y,z))
Similar to the folds performed in InstCombinerImpl::foldSelectOpOp, this attempts to push a select further up to help merge a pair of binops.
I'm primarily interested in select(cond,add(x,y),add(x,z)) folds to help expose pointer math (see https://bugs.llvm.org/show_bug.cgi?id=51069 etc.) but I've tried to use the more generic isBinOp().
Differential Revision: https://reviews.llvm.org/D106058
|
 | llvm/test/CodeGen/X86/select.ll |
 | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp |
Commit
a70ef3f568cb7ce963aeb04000d3c29699ee1c47
by tianshilei1992Revert "[AbstractAttributor] Fold function calls to `__kmpc_is_spmd_exec_mode` if possible"
This reverts commit 1100e4aafea233bc8bbc307c5758a7d287ad3bae.
|
 | llvm/test/Transforms/OpenMP/custom_state_machines.ll |
 | llvm/lib/Transforms/IPO/OpenMPOpt.cpp |
 | llvm/test/Transforms/OpenMP/is_spmd_exec_mode_fold.ll |
Commit
d40e8091bd1f48e8d3f64e4f99952f0139e9c27b
by wei.huang[PowerPC] Add PowerPC rotate related builtins and emit target independent code for XL compatibility
This patch is in a series of patches to provide builtins for compatibility with the XL compiler. This patch adds the builtins and emit target independent code for rotate related operations.
Reviewed By: nemanjai, #powerpc
Differential revision: https://reviews.llvm.org/D104744
|
 | clang/test/CodeGen/builtins-ppc-xlcompat-error.c |
 | clang/include/clang/Basic/DiagnosticSemaKinds.td |
 | clang/include/clang/Sema/Sema.h |
 | clang/lib/CodeGen/CGBuiltin.cpp |
 | clang/lib/Sema/SemaChecking.cpp |
 | clang/include/clang/Basic/BuiltinsPPC.def |
 | clang/lib/Basic/Targets/PPC.cpp |
 | clang/test/CodeGen/builtins-ppc-xlcompat-rotate.c |
Commit
e33446ea58b8357dd8b79eb39140a1de2baff1ae
by dvyukovtsan: make obtaining current PC faster
We obtain the current PC is all interceptors and collectively common interceptor code contributes to overall slowdown (in particular cheaper str/mem* functions).
The current way to obtain the current PC involves:
4493e1: e8 3a f3 fe ff callq 438720 <_ZN11__sanitizer10StackTrace12GetCurrentPcEv> 4493e9: 48 89 c6 mov %rax,%rsi
and the called function is:
uptr StackTrace::GetCurrentPc() { 438720: 48 8b 04 24 mov (%rsp),%rax 438724: c3 retq
The new way uses address of a local label and involves just:
44a888: 48 8d 35 fa ff ff ff lea -0x6(%rip),%rsi
I am not switching all uses of StackTrace::GetCurrentPc to GET_CURRENT_PC because it may lead some differences in produced reports and break tests. The difference comes from the fact that currently we have PC pointing to the CALL instruction, but the new way does not yield any code on its own so the PC points to a random instruction in the function and symbolizing that instruction can produce additional inlined frames (if the random instruction happen to relate to some inlined function).
Reviewed By: melver
Differential Revision: https://reviews.llvm.org/D106046
|
 | compiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp |
 | compiler-rt/lib/sanitizer_common/sanitizer_stacktrace.cpp |
 | compiler-rt/lib/sanitizer_common/sanitizer_stacktrace.h |
 | compiler-rt/lib/tsan/rtl/tsan_interceptors.h |
Commit
f59209a86eaf5ec2edea74b9b6e4932148efb3e0
by nikita.ppv[AsmParser] Unify parsing of attributes
Continuing on from D105780, this should be the last major bit of attribute cleanup. Currently, LLParser implements attribute parsing for functions, parameters and returns separately, enumerating all supported (and unsupported) attributes each time. This patch extracts the common parsing logic, and performs a check afterwards whether the attribute is valid in the given position. Parameters and returns are handled together, while function attributes need slightly different logic to support attribute groups.
Differential Revision: https://reviews.llvm.org/D105938
|
 | llvm/lib/AsmParser/LLParser.cpp |
 | llvm/test/Assembler/byref-parse-error-6.ll |
 | llvm/test/Assembler/byref-parse-error-9.ll |
 | llvm/test/Assembler/mustprogress-parse-error-1.ll |
 | llvm/test/Assembler/mustprogress-parse-error-0.ll |
 | llvm/test/Assembler/invalid-safestack-param.ll |
 | llvm/test/Transforms/LoopDeletion/assume.ll |
 | llvm/test/Assembler/byref-parse-error-8.ll |
 | llvm/test/Assembler/invalid-safestack-return.ll |
 | llvm/test/Assembler/invalid-immarg2.ll |
 | llvm/test/Assembler/byref-parse-error-5.ll |
 | llvm/test/Assembler/byref-parse-error-10.ll |
 | llvm/test/Assembler/byref-parse-error-7.ll |
 | llvm/test/Verifier/swifterror2.ll |
 | llvm/include/llvm/AsmParser/LLParser.h |
 | llvm/test/Assembler/invalid-immarg3.ll |
Commit
95346ba87740aabcb82cb3c8d0e722e7b86d93b7
by listmail[LV] Enable vectorization of multiple exit loops w/computable exit counts
This change enables vectorization of multiple exit loops when the exit count is statically computable. That requirement - shared with the rest of LV - in turn requires each exit to be analyzeable and to dominate the latch.
The majority of work to support this was done in a set of previous patches. In particular,, 72314466 avoids having multiple edges from the middle block to the exits, and 4b33b2387 which added support for non-latch single exit and multiple exits with a single exiting block. As a result, this change is basically just removing a bailout and adjusting some tests now that the prerequisite work is done and has stuck in tree for a bit.
Differential Revision: https://reviews.llvm.org/D105817
|
 | llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp |
 | llvm/test/Transforms/LoopVectorize/loop-legality-checks.ll |
 | llvm/test/Transforms/LoopVectorize/loop-form.ll |
 | llvm/test/Transforms/LoopVectorize/remarks-multi-exit-loops.ll |
Commit
ab03ef124afd97f8c272fd6ef2dd91b88c55e4fa
by gcmn[Bazel] Update for 01bdb0f75efb
Update the build files for https://github.com/llvm/llvm-project/commit/01bdb0f75efb
Tested: bazel query //... + @llvm-project//... | xargs bazel test --config=generic_clang --config=rbe --test_output=errors --test_ta g_filters=-nobuildkite --build_tag_filters=-nobuildkite
Differential Revision: https://reviews.llvm.org/D106075
|
 | utils/bazel/llvm-project-overlay/mlir/BUILD.bazel |
Commit
04b75c05b033d5c7fd503de90b257be713c95e00
by aeubanks[InstCombine] Look through invariant group intrinsics when removing malloc
Fixes some regressions with -fstrict-vtable-pointers in llvm-test-suite.
Reviewed By: lebedev.ri
Differential Revision: https://reviews.llvm.org/D106017
|
 | llvm/test/Transforms/InstCombine/malloc-free-delete.ll |
 | llvm/lib/Transforms/InstCombine/InstructionCombining.cpp |
Commit
1fd23a065bf729836dd52ef1ad3c84c449735a56
by nikita.ppv[LangRef] Add elementtype attribute
This adds an elementtype(<ty>) attribute, which can be used to attach an element type to a pointer typed argument. It is similar to byval/byref in purpose, but unlike those does not carry any specific semantics by itself. However, certain intrinsics may require it and interpret it in specific ways.
The in-tree use cases for this that I'm currently aware of are:
call ptr @llvm.preserve.array.access.index.p0.p0(ptr elementtype(%ty) %base, i32 %dim, i32 %index) call ptr @llvm.preserve.struct.access.index.p0.p0(ptr elementtype(%ty) %base, i32 %gep_index, i32 %di_index) call token @llvm.experimental.gc.statepoint.p0(i64 0, i32 0, ptr elementtype(void ()) @foo, i32 0, i32 0, i32 0, i32 0, ptr addrspace(1) %obj)
Notably, the gc.statepoint case needs a function as element type, in which case the workaround of adding a separate %ty undef argument would not work, as arguments cannot be unsized.
Differential Revision: https://reviews.llvm.org/D105407
|
 | llvm/docs/LangRef.rst |
Commit
c191035f421b5dc69873cba8885fee41e984cc5d
by nikita.ppv[IR] Add elementtype attribute
This implements the elementtype attribute specified in D105407. It just adds the attribute and the specified verifier rules, but doesn't yet make use of it anywhere.
Differential Revision: https://reviews.llvm.org/D106008
|
 | llvm/test/Verifier/elementtype.ll |
 | llvm/include/llvm/AsmParser/LLToken.h |
 | llvm/include/llvm/IR/Attributes.h |
 | llvm/test/Bitcode/attributes.ll |
 | llvm/test/Verifier/opaque-ptr.ll |
 | llvm/include/llvm/Bitcode/LLVMBitCodes.h |
 | llvm/lib/Bitcode/Reader/BitcodeReader.cpp |
 | llvm/lib/IR/Verifier.cpp |
 | llvm/lib/IR/Attributes.cpp |
 | llvm/lib/AsmParser/LLLexer.cpp |
 | llvm/lib/Bitcode/Writer/BitcodeWriter.cpp |
 | llvm/include/llvm/IR/Attributes.td |
 | llvm/lib/Transforms/Utils/CodeExtractor.cpp |
Commit
1f8e286cdc14488c80eeb4a92ff791510d19a0d3
by Louis Dionne[libc++] Add a CMake target to re-generate files and revamp CONTRIBUTING.rst
As we automate more and more things in the library, it becomes useful for contributors to have a single target for running all the automation as part of their workflow. This commit adds a new `libcxx-generate-files` target that should re-generate all the auto-generated files in the library.
As a fly-by, I also revamped the documentation on Contributing to account for this new target and present it as a bullet list of things to check before committing. I also added a few things that are often overlooked to that list, such as updating the synopsis and the status files.
Differential Revision: https://reviews.llvm.org/D106067
|
 | libcxx/utils/CMakeLists.txt |
 | libcxx/utils/ci/run-buildbot |
 | libcxx/CMakeLists.txt |
 | libcxx/docs/Contributing.rst |
Commit
e6e79b3f0b2a2fd2b22ed8aa9267a6c915782632
by ajcbik[mlir][sparse] remove linalg-to-loops from integration tests
With the migration from linalg.copy to memref.copy, this pass (which was there solely to handle the linalg.copy op) is no longer required for the end-to-end path for sparse compilation.
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D106073
|
 | mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_matvec.mlir |
 | mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sampled_matmul.mlir |
 | mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_flatten.mlir |
 | mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_mttkrp.mlir |
 | mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_spmm.mlir |
 | mlir/test/Integration/Dialect/SparseTensor/CPU/dense_output.mlir |
 | mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum.mlir |
 | mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_out_simple.mlir |
Commit
47f846f8c5ba54fde266ced3d9228d9f003c03ee
by andrzej.warzynskiEnable Flang by default in the test-release.sh script
I've also brought this up on llvm-dev: https://lists.llvm.org/pipermail/llvm-dev/2021-July/151744.html
Differential Revision: https://reviews.llvm.org/D105885
|
 | llvm/utils/release/test-release.sh |
Commit
9f6ff37a36ffb7601fd9e23f0b6ae2156ae3ff77
by andrzej.warzynski[flang][driver] Randomise the names of the unparsed files
This patch makes sure that the base name of the temporary unparsed files (generated by the `flang` bash script) are randomised and unique to a particular invocation of the script. Otherwise, we cannot reliably run the script in parallel.
Differential Revision: https://reviews.llvm.org/D106052
|
 | flang/tools/f18/flang.in |
Commit
2b6e433230ab9fa8a898261cd460a3f1a1bc91ec
by ajcbik[mlir][sparse] add shift ops support
Arbitrary shifts have some complications, but shift by invariants (viz. tensor index exp only at left hand side) can be easily handled with the conjunctive rule.
Reviewed By: gussmith23
Differential Revision: https://reviews.llvm.org/D106002
|
 | mlir/test/Dialect/SparseTensor/sparse_int_ops.mlir |
 | mlir/lib/Dialect/SparseTensor/Utils/Merger.cpp |
 | mlir/include/mlir/Dialect/SparseTensor/Utils/Merger.h |
Commit
7299c6f635681aeec250309b1675329fbcb8bb1a
by i[test] Avoid llvm-nm one-dash long options
|
 | compiler-rt/test/asan/TestCases/Darwin/dead-strip.c |
 | lld/test/mach-o/debug-syms.yaml |
Commit
96e9bc42447531a20569e0a680c029837a4868d8
by i[llvm-nm] Remove one-dash long options except -arch
The documentation and help messages have recommended the double-dash forms for quite a while. Remove one-dash long options which are not recognized by GNU style `getopt_long`.
`-arch` is kept as it is in the manpage of classic nm https://keith.github.io/xcode-man-pages/nm.1.html
Note: the dyldinfo related options don't have a test.
Reviewed By: jhenderson
Differential Revision: https://reviews.llvm.org/D105948
|
 | llvm/test/tools/llvm-nm/X86/posix-aliases.test |
 | llvm/tools/llvm-nm/Opts.td |
Commit
c46d99e4ba16c76e666eb46dce710036ecbcee0d
by Stanislav.Mekhanoshin[AMDGPU] Refine -O0 and -O1 passes.
Differential Revision: https://reviews.llvm.org/D105579
|
 | llvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll |
 | llvm/test/CodeGen/AMDGPU/scalar_to_vector_v2x16.ll |
 | llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp |
 | llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll |
 | llvm/test/CodeGen/AMDGPU/wwm-reserved.ll |
 | llvm/test/CodeGen/AMDGPU/llc-pipeline.ll |
 | llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll |
Commit
c931ff72bde42846db4530893a94c044879c5ae9
by thakis[lld-macho] Add LTO cache support
This adds support for the lld-only `--thinlto-cache-policy` option, as well as implementations for ld64's `-cache_path_lto`, `-prune_interval_lto`, `-prune_after_lto`, and `-max_relative_cache_size_lto`.
Test is adapted from lld/test/ELF/lto/cache.ll
Differential Revision: https://reviews.llvm.org/D105922
|
 | lld/MachO/Options.td |
 | lld/test/MachO/lto-cache.ll |
 | lld/MachO/LTO.cpp |
 | lld/MachO/Driver.cpp |
 | lld/MachO/Config.h |
 | lld/MachO/LTO.h |
Commit
4157b6033d09d17e8492f3bc7c4e050e63501757
by aardappel[WebAssembly] Fixed LLD generation of 64-bit __wasm_apply_data_relocs
Differential Revision: https://reviews.llvm.org/D105863
|
 | lld/wasm/SyntheticSections.cpp |
 | lld/wasm/InputChunks.cpp |
 | lld/wasm/Driver.cpp |
 | lld/test/wasm/shared64.s |
Commit
5da0f9ab612d8677c74705521700677966344d48
by Jessica Paquette[GlobalISel] Fix infinite loop in reassociationCanBreakAddressingModePattern
It didn't update the opcode while walking through G_INTTOPTR/G_PTRTOINT.
Differential Revision: https://reviews.llvm.org/D106080
|
 | llvm/test/CodeGen/AArch64/GlobalISel/combine-ptradd-reassociation.mir |
 | llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp |
Commit
99cb2507f3943ec437e95f9a0f3d25f5f3afd7c3
by aeubanksRevert "[SLP]Workaround for InsertSubVector cost."
This reverts commit 2eb50baf059648214cb1c624b5269978a62e86a1.
Causes hangs, see comments on D105827.
|
 | llvm/test/Transforms/SLPVectorizer/AArch64/accelerate-vector-functions-inseltpoison.ll |
 | llvm/test/Transforms/SLPVectorizer/X86/alternate-calls-inseltpoison.ll |
 | llvm/test/Transforms/SLPVectorizer/X86/pr47629.ll |
 | llvm/test/Transforms/SLPVectorizer/X86/alternate-calls.ll |
 | llvm/test/Transforms/SLPVectorizer/X86/alternate-int-inseltpoison.ll |
 | llvm/test/Transforms/SLPVectorizer/X86/cmp_commute.ll |
 | llvm/test/Transforms/SLPVectorizer/X86/resched.ll |
 | llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias.ll |
 | llvm/test/Transforms/SLPVectorizer/AArch64/accelerate-vector-functions.ll |
 | llvm/test/Transforms/SLPVectorizer/X86/pr47629-inseltpoison.ll |
 | llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp |
 | llvm/test/Transforms/SLPVectorizer/X86/alternate-int.ll |
 | llvm/test/Transforms/SLPVectorizer/X86/cmp_commute-inseltpoison.ll |
 | llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias-inseltpoison.ll |
Commit
a35480f85960feccc44ac9a7641070d2a6a78c2f
by vyng[llvm-exegesis] Fix missing-headers build errors.
Details:
Switch all #includes to use <> because that is consistent with what happens in the cmake checks. Otherwise, we could be in the situation where cmake checks see that headers exist at <perfmon/...> but in llvm-exegesis code, we use "perfmon/...", which may not exist.
Related PR/revisions: D84076, PR51017+D105615
Differential Revision: https://reviews.llvm.org/D105861
|
 | llvm/tools/llvm-exegesis/lib/X86/X86Counter.cpp |
 | llvm/tools/llvm-exegesis/lib/PerfHelper.cpp |
Commit
aa3df8ddcd52ec5e40e73cf8d25471145e3913cb
by i[test] Avoid llvm-readelf/llvm-readobj one-dash long options and deprecated aliases (e.g. --file-headers)
|
 | llvm/test/tools/llvm-objcopy/ELF/group-reorder.test |
 | llvm/test/tools/llvm-objcopy/ELF/strip-dwo-groups.test |
 | llvm/test/tools/llvm-objcopy/ELF/group-big-endian.test |
 | llvm/test/CodeGen/PowerPC/aix-return55.ll |
 | llvm/test/tools/llvm-readobj/ELF/packed-relocs.test |
 | llvm/test/MC/WebAssembly/debug-info.ll |
 | llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll |
 | llvm/test/CodeGen/AMDGPU/amdgpu-reloc-const.ll |
 | llvm/test/MC/AMDGPU/hsa-v3.s |
 | llvm/test/tools/yaml2obj/ELF/duplicate-section-names.yaml |
 | llvm/test/MC/MachO/reloc-pcrel-offset.s |
 | llvm/test/tools/obj2yaml/ELF/program-headers.yaml |
 | llvm/test/DebugInfo/PDB/annotation.test |
 | llvm/test/tools/llvm-objcopy/ELF/compress-debug-sections-groups.test |
 | llvm/test/tools/llvm-objcopy/ELF/group.test |
 | llvm/test/MC/AMDGPU/hsa-v4.s |
 | llvm/test/tools/llvm-objcopy/ELF/group-unchanged.test |
 | lld/test/COFF/resource-objs.test |
 | llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll |
 | llvm/test/CodeGen/PowerPC/aix-xcoff-data-sections.ll |
 | llvm/test/CodeGen/AMDGPU/hsa-metadata-kernel-code-props-v3.ll |
 | llvm/test/CodeGen/PowerPC/aix-xcoff-explicit-section.ll |
 | llvm/test/tools/llvm-objcopy/MachO/remove-swift-symbols.test |
 | compiler-rt/test/asan/TestCases/Windows/delay_dbghelp.cpp |
 | llvm/test/tools/llvm-readobj/ELF/groups.test |
 | llvm/test/tools/llvm-readobj/ELF/demangle.test |
 | llvm/test/lit.cfg.py |
 | llvm/test/MC/WebAssembly/debug-info64.ll |
 | llvm/test/MC/ARM/mappingsymbols.s |
 | llvm/test/CodeGen/AMDGPU/elf-header-flags-sramecc.ll |
 | llvm/test/MC/AMDGPU/hsa-gfx10-v3.s |
 | llvm/test/tools/yaml2obj/ELF/comdat-broken.yaml |
 | llvm/test/MC/ELF/comdat-name-number.s |
 | llvm/test/CodeGen/AArch64/win64-jumptable.ll |
 | llvm/test/MC/AMDGPU/reloc.s |
 | llvm/test/MC/MachO/loc.s |
 | llvm/test/CodeGen/AMDGPU/code-object-v3.ll |
 | llvm/test/MC/WebAssembly/func-address.ll |
Commit
4628ff4c31b72a62346defee32b8dec9b9adef93
by Louis Dionne[libc++] NFC: Reindent the run-buildbot script
|
 | libcxx/utils/ci/run-buildbot |
Commit
a99d420a937bd7792739767c8bed6d189a444c54
by listmail[SCEV] Fix unsound reasoning in howManyLessThans
This is split from D105216, it handles only a subset of the cases in that patch.
Specifically, the issue being fixed is that the code incorrectly assumed that (Start-Stide) < End implied that the backedge was taken at least once. This is not true when e.g. Start = 4, Stride = 2, and End = 3. Note that we often do produce the right backedge taken count despite the flawed reasoning.
The fix chosen here is to use an alternate form of uceil (ceiling of unsigned divide) lowering which is safe when max(RHS,Start) > Start - Stride. (Note that signedness of both max expression and comparison depend on the signedness of the comparison being analyzed, and that overflow in the Start - Stride expression is allowed.) Note that this is weaker than proving the backedge is taken because it allows start - stride < end < start. Some cases which can't be proven safe are sent down the generic path, and we do end up generating less optimal expressions in a few cases.
Credit for coming up with the approach goes entirely to Eli. I just split it off, tweaked the comments a bit, and did some additional testing.
Differential Revision: https://reviews.llvm.org/D105942
|
 | llvm/lib/Analysis/ScalarEvolution.cpp |
 | llvm/test/Analysis/ScalarEvolution/trip-count-unknown-stride.ll |
 | llvm/test/Transforms/LoopReroll/nonconst_lb.ll |
 | llvm/test/Analysis/ScalarEvolution/2008-11-18-Stride2.ll |
Commit
7b302fc9b04c7991cdb869b65316e0d72e41042e
by dvyukovtsan: strip top inlined internal frames
The new GET_CURRENT_PC() can lead to spurious top inlined internal frames. Here are 2 examples from bots, in both cases the malloc is supposed to be the top frame (#0):
WARNING: ThreadSanitizer: signal-unsafe call inside of a signal #0 __sanitizer::StackTrace::GetNextInstructionPc(unsigned long) #1 malloc
Location is heap block of size 99 at 0xbe3800003800 allocated by thread T1: #0 __sanitizer::StackTrace::GetNextInstructionPc(unsigned long) #1 malloc
Let's strip these internal top frames from reports. With other code changes I also observed some top frames from __tsan::ScopedInterceptor, proactively remove these as well.
Differential Revision: https://reviews.llvm.org/D106081
|
 | compiler-rt/lib/tsan/rtl/tsan_rtl_report.cpp |
Commit
d2cd3f88e78d01eec19c50ff2da1ed659a2cd210
by llvm-dev[InstCombine] Add 3-operand gep test with different ptr and same indices
|
 | llvm/test/Transforms/InstCombine/select-gep.ll |
Commit
0a614ca22522d6a77356f491a90171b5de916bc7
by llvm-devFix "unknown pragma 'GCC'" MSVC warning. NFCI.
|
 | llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp |
Commit
de3956605a701295c928925a3e5096008a8521ba
by kamau.bridgeman[PowerPC] Fix popcntb XL Compat Builtin for 32bit
This patch implements the `__popcntb` XL compatibility builtin for 32bit in the frontend and backend. This patch also updates tests for `__popcntb` and other XL Compat sync related builtins.
Reviewed By: #powerpc, nemanjai, amyk
Differential Revision: https://reviews.llvm.org/D105360
|
 | llvm/lib/Target/PowerPC/PPCInstrInfo.td |
 | clang/test/CodeGen/builtins-ppc-xlcompat-sync.c |
 | llvm/lib/Target/PowerPC/P9InstrResources.td |
 | llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync.ll |
 | clang/lib/CodeGen/CGBuiltin.cpp |
 | llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-msync.ll |
 | llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync-64.ll |
 | llvm/include/llvm/IR/IntrinsicsPowerPC.td |
 | llvm/lib/Target/PowerPC/PPCInstr64Bit.td |
 | llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync-32.ll |
Commit
ff0ef6a518578231d963c9cdeeae51411efb97d5
by samuel.tebbs[ARM][LowOverheadLoops] Make some stack spills valid for tail predication
This patch makes vector spills valid for tail predication when all loads from the same stack slot are within the loop
Differential Revision: https://reviews.llvm.org/D105443
|
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/vector_spill_in_loop.mir |
 | llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp |
Commit
ecf5813c824cee2e332a2a625ff88d55c8e51b29
by llvm-dev[InstCombine] Add select(cond,gep(gep(x,y),z),gep(x,y)) tests from PR51069
|
 | llvm/test/Transforms/InstCombine/select-gep.ll |
Commit
c03d25860a6f57be8e839e0879973b7d4d165333
by nikita.ppv[Verifier] Use isIntrinsic() (NFC)
Call Function::isIntrinsic() instead of manually checking the function name for an "llvm." prefix.
|
 | llvm/lib/IR/Verifier.cpp |
Commit
80f9fd4ce32b59d055543aef75d651f9ffcda182
by i[ELF][test] Rework non-preemptible ifunc tests
|
 | lld/test/ELF/gnu-ifunc.s |
 | lld/test/ELF/gnu-ifunc-dynsym.s |
 | lld/test/ELF/gnu-ifunc-nonpreemptible.s |
Commit
f8cb78e99aae9aa3f89f7bfe667db2c5b767f21f
by i[ELF] Don't define __rela_iplt_start for -pie/-shared
`clang -fuse-ld=lld -static-pie -fpie` produced executable currently crashes and this patch makes it work.
See https://sourceware.org/bugzilla/show_bug.cgi?id=27164 and https://sourceware.org/pipermail/libc-alpha/2021-July/128810.html
While it seems unreasonable to keep csu/libc-start.c ARCH_APPLY_IREL unclear in static-pie mode and have an unneeded diff -u =(ld.bfd --verbose) =(ld.bfd -pie --verbose) difference, glibc folks don't want to fix their code. I feel sad about that but this patch can remove an iffy condition for lld/ELF as well: `needsInterpSection()`.
|
 | lld/ELF/Writer.cpp |
 | lld/test/ELF/gnu-ifunc-nonpreemptible.s |
Commit
8fb47456a356c5bfe0046a9d1c74cb048a4624bf
by Louis Dionne[libc++/abi] Fix broken Lit feature no-noexcept-function-type
The feature was always defined, which means that the two test cases guarded by it were never run.
Differential Revision: https://reviews.llvm.org/D106062
|
 | libcxxabi/test/catch_function_03.pass.cpp |
 | libcxx/utils/libcxx/test/features.py |
 | libcxxabi/test/libcxxabi/test/config.py |
 | libcxxabi/test/catch_member_function_pointer_02.pass.cpp |
Commit
b980d2f54bb652208eeb9a6543b8d838b65ad099
by listmail[unittest] Exercise SCEV's udiv and udiv ceiling routines
The ceiling variant was recently added (due to the work towards D105216), and we're spending a lot of time trying to find optimizations for the expression. This patch brute forces the space of i8 unsigned divides and checks that we get a correct (well consistent with APInt) result for both udiv and udiv ceiling.
(This is basically what I've been doing locally in a hand rolled C++ program, and I realized there no good reason not to check it in as a unit test which directly exercises the logic on constants.)
Differential Revision: https://reviews.llvm.org/D106083
|
 | llvm/include/llvm/Analysis/ScalarEvolution.h |
 | llvm/unittests/Analysis/ScalarEvolutionTest.cpp |
Commit
c3c324dddf73bfc85034267901fce22002a4bb78
by dvyukovtsan: lock ScopedErrorReportLock around fork
Currently we don't lock ScopedErrorReportLock around fork and it mostly works becuase tsan has own report_mtx that is locked around fork and tsan reports. However, sanitizer_common code prints some own reports which are not protected by tsan's report_mtx. So it's better to lock ScopedErrorReportLock explicitly.
Reviewed By: melver
Differential Revision: https://reviews.llvm.org/D106048
|
 | compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_report.cpp |
 | compiler-rt/lib/sanitizer_common/sanitizer_mutex.h |
 | compiler-rt/lib/sanitizer_common/sanitizer_thread_registry.h |
 | compiler-rt/lib/tsan/rtl/tsan_rtl.cpp |
 | compiler-rt/lib/sanitizer_common/sanitizer_thread_safety.h |
 | compiler-rt/lib/sanitizer_common/sanitizer_common.h |
Commit
aaccc985a88db4fb7ae4be341db62bb1fe974102
by Anshil.Gandhi[M68k][GloballSel] LegalizerInfo implementation
Added rules for G_ADD, G_SUB, G_MUL, G_UDIV to be legal.
Differential Revision: https://reviews.llvm.org/D105536
|
 | llvm/test/CodeGen/M68k/GlobalISel/arithmetic.ll |
 | llvm/lib/Target/M68k/GlSel/M68kLegalizerInfo.cpp |
Commit
d774b4aa5eac785ffe40009091667521e183df40
by tra[NVPTX, CUDA] Add .and.popc variant of the b1 MMA instruction.
That should allow clang to compile mma.h from CUDA-11.3.
Differential Revision: https://reviews.llvm.org/D105384
|
 | clang/test/CodeGen/builtins-nvptx-mma.cu |
 | llvm/lib/Target/NVPTX/NVPTXInstrInfo.td |
 | clang/lib/CodeGen/CGBuiltin.cpp |
 | llvm/lib/Target/NVPTX/NVPTXIntrinsics.td |
 | llvm/test/CodeGen/NVPTX/wmma.py |
 | clang/include/clang/Basic/BuiltinsNVPTX.def |
 | clang/test/CodeGen/builtins-nvptx-mma.py |
 | llvm/include/llvm/IR/IntrinsicsNVVM.td |
Commit
afc760ef3527ef783a9f14f53583df2de8f0bd84
by ajcbik[mlir][sparse] add int64 storage type to sparse tensor runtime support library
This format was missing from the support library. Although there are some subtleties reading in an external format for int64 as double, there is no good reason to omit support for this data type form the support library.
Reviewed By: gussmith23
Differential Revision: https://reviews.llvm.org/D106016
|
 | mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorConversion.cpp |
 | mlir/lib/ExecutionEngine/SparseUtils.cpp |
Commit
66ab8568c485c4dd7461f1acf0e55cd4a7a3b4a0
by harald[Driver] Fix compiler-rt lookup for x32
x86_64-linux-gnu and x86_64-linux-gnux32 use different ABIs and objects built for one cannot be used for the other. In order to build and use compiler-rt for x32, we need to treat x32 as a new arch there. This updates the driver to search using the new arch name.
Reviewed By: glaubitz
Differential Revision: https://reviews.llvm.org/D100148
|
 | clang/lib/Driver/ToolChain.cpp |
 | clang/test/Driver/sanitizer-ld.c |
Commit
3a7ca4cad4dd42120ea39b919f45a166e85d54a8
by George Burgess IVutils: fix broken assertion in revert_checker
`intermediate_commits` is a list of full SHAs, and `across_ref` may/may not be a full SHA (or a SHA at all). We already have `across_sha`, which is the resolved form of `across_ref`, so use that instead.
Thanks to probinson for catching this in post-commit review of https://reviews.llvm.org/D105578!
|
 | llvm/utils/revert_checker.py |
Commit
d5cf437d3a3f496deed21211782f8fc640c688b0
by nikita.ppv[ObjCARC] Use objc_msgSend instead of llvm.objc.msgSend in tests
D55348 replaced @objc_msgSend with @llvm.objc.msgSend in tests together with many other objc intrinsics. However, this is not a recognized objc intrinsic (https://llvm.org/docs/LangRef.html#objective-c-arc-runtime-intrinsics) and does not receive special treatment by LLVM. It's likely that uses of this function were renamed by accident.
This came up in D106013, because the address of @llvm.objs.msgSend is taken, something which is normally not allowed for intrinsics.
Differential Revision: https://reviews.llvm.org/D106094
|
 | llvm/test/Transforms/ObjCARC/path-overflow.ll |
 | llvm/test/Transforms/ObjCARC/invoke-2.ll |
 | llvm/test/Transforms/ObjCARC/move-and-merge-autorelease.ll |
 | llvm/test/Transforms/ObjCARC/nested.ll |
 | llvm/test/Transforms/ObjCARC/allocas.ll |
 | llvm/test/Transforms/ObjCARC/basic.ll |
 | llvm/test/Transforms/ObjCARC/ensure-that-exception-unwind-path-is-visited.ll |
 | llvm/test/Transforms/ObjCARC/invoke.ll |
 | llvm/test/Transforms/ObjCARC/retain-not-declared.ll |
 | llvm/test/Transforms/ObjCARC/move-and-form-retain-autorelease.ll |
 | llvm/test/Transforms/ObjCARC/contract-testcases.ll |
Commit
c97cb11efdfacff6231ee058b413df252a8be0d9
by hedingarcia[libc] Relocate the closing directive of #ifdef
Changed where an #endif was placed because previously it prevented three macro definitions from being enable in Windows.
Reviewed By: sivachandra
Differential Revision: https://reviews.llvm.org/D106087
|
 | libc/utils/UnitTest/LibcTest.h |
Commit
6596778b46ba69517191e7397289228168064ff4
by martin[libcxx] [test] Fix mismatches between aligned operator new and std::free
The XFAIL comments about VCRuntime not providing aligned operator new are outdated; these days VCRuntime does provide them.
However, the tests used to fail on Windows, as the pointers allocated with an aligned operator new (which is implemented with _aligned_malloc on Windows) can't be freed using std::free() on Windows (but they need to be freed with the corresponding function _aligned_free instead).
Instead override the aligned operator new to return a dummy suitably aligned pointer instead, like other tests that override aligned operator new.
Also override `operator delete[]` instead of plain `operator delete` in the array testcase; the fallback from `operator delete[]` to user defined `operator delete` doesn't work in all DLL build configurations on Windows.
Also expand the TEST_NOEXCEPT macros, as these tests only are built in C++17 mode.
By providing the aligned operator new within the tests, this also makes these test cases pass when testing back deployment on macOS 10.9.
Differential Revision: https://reviews.llvm.org/D105962
|
 | libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/delete_align_val_t_replace.pass.cpp |
 | libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/delete_align_val_t_replace.pass.cpp |
Commit
a59165b01778a3b02c510a96951d115d39babd86
by Louis Dionne[runtimes] Don't try passing --target flags to GCC
When a target triple is specified in CMake via XXX_TARGET_TRIPLE, we tried passing the --target=<...> flag to the compiler. However, not all compilers support that flag (e.g. GCC, which is not a cross-compiler). As a result, setting e.g. LIBCXX_TARGET_TRIPLE=<host-triple> would end up trying to pass --target=<host-triple> to GCC, which breaks everything because the flag isn't even supported.
This commit only adds `--target=<...>` & friends to the flags if it is supported by the compiler.
One could argue that it's confusing to pass LIBCXX_TARGET_TRIPLE=<...> and have it be ignored. That's correct, and one possibility would be to assert that the requested triple is the same as the host triple when we know the compiler is unable to cross-compile. However, note that this is a pre-existing issue (setting the TARGET_TRIPLE variable never had an influence on the flags passed to the compiler), and also fixing that is starting to look like reimplementing a lot of CMake logic that is already handled with CMAKE_CXX_COMPILER_TARGET.
Differential Revision: https://reviews.llvm.org/D106082
|
 | libcxxabi/cmake/Modules/HandleLibcxxabiFlags.cmake |
 | libcxx/CMakeLists.txt |
 | libunwind/cmake/Modules/HandleLibunwindFlags.cmake |
 | libcxx/cmake/Modules/HandleLibcxxFlags.cmake |
 | libcxxabi/CMakeLists.txt |
 | libunwind/CMakeLists.txt |
Commit
af06f7bcf35f146fd70e4424bbec62dadc4dba70
by zhijian[AIX][XCOFF][Bug-Fixed] parse the parameter type of the traceback table
Summary: in the function PPCFunctionInfo::getParmsType(), there is if (Bits > 31 || (Bits > 30 && (Elt != FixedType || hasVectorParms())))
when the Bit is 31 and the Elt is not FixedType(for example the Elt is FloatingType) , the 31th bit will be not encoded, it leave the bit as zero, when the function Expected<SmallString<32>> XCOFF::parseParmsType() the original implement **// unsigned ParmsNum = FixedParmsNum + FloatingParmsNum;
while (Bits < 32 && ParsedNum < ParmsNum) { ... }//** it will look the 31 bits (zero) as FixedType. which should be FloatingType, and get a error.
Reviewers: Jason Liu,ZarkoCA
Differential Revision: https://reviews.llvm.org/D105023
|
 | llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable.ll |
 | llvm/lib/BinaryFormat/XCOFF.cpp |
Commit
46c8e7122b51960fa1ba100d3efca26411a8aacb
by Jessica Paquette[AArch64][GlobalISel] Clamp <n x p0> vecs when legalizing G_EXTRACT_VECTOR_ELT
This case was missing from G_EXTRACT_VECTOR_ELT. It's the same as for s64.
https://godbolt.org/z/Tnq4acY8z
Differential Revision: https://reviews.llvm.org/D105952
|
 | llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-extract-vector-elt.mir |
Commit
ada580863f8941f8b0426be0d78249f4cfa8f4d5
by sumesh.uk[mlir] Enable cleanup of single iteration reduction loops being sibling-fused maximally
Changes include the following: 1. Single iteration reduction loops being sibling fused at innermost insertion level are skipped from being considered as sequential loops. Otherwise, the slice bounds of these loops is reset.
2. Promote loops that are skipped in previous step into outer loops.
3. Two utility function - buildSliceTripCountMap, getSliceIterationCount - are moved from mlir/lib/Transforms/Utils/LoopFusionUtils.cpp to mlir/lib/Analysis/Utils.cpp
Reviewed By: bondhugula, vinayaka-polymage
Differential Revision: https://reviews.llvm.org/D104249
|
 | mlir/test/Transforms/loop-fusion.mlir |
 | mlir/include/mlir/Analysis/Utils.h |
 | mlir/lib/Dialect/Affine/IR/AffineOps.cpp |
 | mlir/include/mlir/Transforms/LoopFusionUtils.h |
 | mlir/lib/Analysis/Utils.cpp |
 | mlir/include/mlir/Dialect/Affine/IR/AffineOps.h |
 | mlir/lib/Transforms/LoopFusion.cpp |
 | mlir/lib/Transforms/Utils/LoopFusionUtils.cpp |
Commit
803cf7ac0c7be0eb48a99562e99aae578617755a
by wei.huang[PowerPC][NFC] Add the missing 'REQUIRES: powerpc-registered-target.' in the builtins' front end test cases for XL compatibility
|
 | clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c |
 | clang/test/CodeGen/builtins-ppc-xlcompat-conversionfunc.c |
 | clang/test/CodeGen/builtins-ppc-xlcompat-trap-64bit-only.c |
 | clang/test/CodeGen/builtins-ppc-xlcompat-sync.c |
 | clang/test/CodeGen/builtins-ppc-xlcompat-trap.c |
 | clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond-64bit-only.c |
 | clang/test/CodeGen/builtins-ppc-xlcompat-pwr9-64bit.c |
 | clang/test/CodeGen/builtins-ppc-xlcompat-multiply-64bit-only.c |
 | clang/test/CodeGen/builtins-ppc-xlcompat-multiply.c |
 | clang/test/CodeGen/builtins-ppc-xlcompat-pwr9.c |
 | clang/test/CodeGen/builtins-ppc-xlcompat-rotate.c |
Commit
ff59a1cfe64c0b619c1a8e9ae14406a47897b98d
by nikita.ppv[Verifier] Extend address taken check for unknown intrinsics
Intrinsics can only be called directly, taking their address is not legal. This is currently only enforced for intrinsics that have an ID, rather than all intrinsics. Adjust the check to cover all intrinsics.
This came up in D106013.
Differential Revision: https://reviews.llvm.org/D106095
|
 | llvm/lib/IR/Verifier.cpp |
 | llvm/test/Verifier/intrinsic-addr-taken.ll |
Commit
81ce3aa30cc275bd7f2b51acf391ab69609ca211
by spatel[SLP] avoid leaking poison in reduction of safe boolean logic ops
This bug was introduced with D105730 / 25ee55c0baff .
If we are not converting all of the operations of a reduction into a vector op, we need to preserve the existing select form of the remaining ops. Otherwise, we are potentially leaking poison where it did not in the original code.
Alive2 agrees that the version that freezes some inputs and then falls back to scalar is correct: https://alive2.llvm.org/ce/z/erF4K2
|
 | llvm/test/Transforms/PhaseOrdering/X86/vector-reductions-logical.ll |
 | llvm/test/Transforms/SLPVectorizer/X86/reduction-logical.ll |
 | llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp |
Commit
a8ad9170543906fc58336ab736a109fb42082fbf
by harald[X86] Fix handling of maskmovdqu in X32
The maskmovdqu instruction is an odd one: it has a 32-bit and a 64-bit variant, the former using EDI, the latter RDI, but the use of the register is implicit. In 64-bit mode, a 0x67 prefix can be used to get the version using EDI, but there is no way to express this in assembly in a single instruction, the only way is with an explicit addr32.
This change adds support for the instruction. When generating assembly text, that explicit addr32 will be added. When not generating assembly text, it will be kept as a single instruction and will be emitted with that 0x67 prefix. When parsing assembly text, it will be re-parsed as ADDR32 followed by MASKMOVDQU64, which still results in the correct bytes when converted to machine code.
The same applies to vmaskmovdqu as well.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D103427
|
 | llvm/lib/Target/X86/X86InstrSSE.td |
 | llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp |
 | llvm/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll |
 | llvm/lib/Target/X86/X86ScheduleBtVer2.td |
 | llvm/test/MC/X86/maskmovdqu.s |
 | llvm/test/CodeGen/X86/maskmovdqu.ll |
 | llvm/utils/TableGen/X86RecognizableInstr.cpp |
 | llvm/include/llvm/Support/X86DisassemblerDecoderCommon.h |
 | llvm/utils/TableGen/X86DisassemblerTables.cpp |
 | llvm/test/MC/X86/maskmovdqu64.s |
Commit
5d5b08761f944d5b9822d582378333cc4b36a0a7
by efriedma[DependenceAnalysis] Guard analysis using getPointerBase().
D104806 broke some uses of getMinusSCEV() in DependenceAnalysis: subtraction with different pointer bases returns a SCEVCouldNotCompute. Make sure we avoid cases involving such subtractions.
Differential Revision: https://reviews.llvm.org/D106099
|
 | llvm/lib/Analysis/DependenceAnalysis.cpp |
 | llvm/test/Analysis/DependenceAnalysis/lcssa.ll |
Commit
0321dbc87e43e651c50998701f349d1791fa9cb6
by gclayton[LLDB][GUI] Add Process Attach form
This patch adds a form window to attach a process, either by PID or by name. This patch also adds support for dynamic field visibility such that the form delegate can hide or show certain fields based on some conditions.
Reviewed By: clayborg
Differential Revision: https://reviews.llvm.org/D105655
|
 | lldb/source/Core/IOHandlerCursesGUI.cpp |
Commit
8f053eadbe2712686a917cb703645089cec72d08
by mcgrathr[libc] Fix typos in x86_64/FEnv.h
Reviewed By: sivachandra
Differential Revision: https://reviews.llvm.org/D106105
|
 | libc/utils/FPUtil/x86_64/FEnv.h |
Commit
4e3dc6b8dd8354308362a5013f722cdf22578cbf
by Amara EmersonGlobalISel: Introduce GenericMachineInstr classes and derivatives for idiomatic LLVM RTTI.
This adds some level of type safety, allows helper functions to be added for specific opcodes for free, and also allows us to succinctly check for class membership with the usual dyn_cast/isa/cast functions.
To start off with, add variants for the different load/store operations with some places using it.
Differential Revision: https://reviews.llvm.org/D105751
|
 | llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp |
 | llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h |
 | llvm/include/llvm/CodeGen/GlobalISel/Utils.h |
 | llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h |
 | llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h |
 | llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp |
Commit
ca662297d5fbbf65a19eaa6122d7c12815d8add9
by tianshilei1992[AbstractAttributor] Fold function calls to `__kmpc_is_spmd_exec_mode` if possible
In the device runtime there are many function calls to `__kmpc_is_spmd_exec_mode` to query the execution mode of current kernels. In many cases, user programs only contain target region executing in one mode. As a consequence, those runtime function calls will only return one value. If we can get rid of these function calls during compliation, it can potentially improve performance.
In this patch, we use `AAKernelInfo` to analyze kernel execution. Basically, for each kernel (device) function `F`, we collect all kernel entries `K` that can reach `F`. A new AA, `AAFoldRuntimeCall`, is created for each call site. In each iteration, it will check all reaching kernel entries, and update the folded value accordingly.
In the future we will support more function.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D105787
|
 | llvm/lib/Transforms/IPO/OpenMPOpt.cpp |
 | llvm/test/Transforms/OpenMP/custom_state_machines.ll |
 | llvm/test/Transforms/OpenMP/is_spmd_exec_mode_fold.ll |
Commit
4eb107ccbad791098494c26dfc1d423ecf558ef7
by wei.huang[PowerPC] Add PowerPC population count, reversed load and store related builtins and instrinsics for XL compatibility
This patch is in a series of patches to provide builtins for compatibility with the XL compiler. This patch adds the builtins and instrisics for population count, reversed load and store related operations.
Reviewed By: nemanjai, #powerpc
Differential revision: https://reviews.llvm.org/D106021
|
 | clang/include/clang/Basic/BuiltinsPPC.def |
 | clang/test/CodeGen/builtins-ppc-xlcompat-popcnt.c |
 | llvm/lib/Target/PowerPC/PPCInstrInfo.td |
 | clang/test/CodeGen/builtins-ppc-xlcompat-load-store-reversed-64bit-only.c |
 | llvm/lib/Target/PowerPC/PPCInstr64Bit.td |
 | clang/lib/Sema/SemaChecking.cpp |
 | clang/test/CodeGen/builtins-ppc-xlcompat-load-store-reversed.c |
 | clang/lib/CodeGen/CGBuiltin.cpp |
 | llvm/include/llvm/IR/IntrinsicsPowerPC.td |
 | clang/lib/Basic/Targets/PPC.cpp |
 | llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-load-store-reversed-64bit-only.ll |
 | llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-popcnt.ll |
 | llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-load-store-reversed.ll |
Commit
bba8a76b8736fcf005ebbd0a4fb789a22eadf9ba
by Vitaly Buka[NFC][hwasan] Remove default arguments in internal class
|
 | llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp |
Commit
2e7ec447cc7eab89a72413ad91a897049f551c56
by Raphael Isemann[lldb] Add AllocateMemory/DeallocateMemory to the SBProcess API
This change adds AllocateMemory and DeallocateMemory methods to the SBProcess API, so that clients can allocate and deallocate memory blocks within the process being debugged (for storing JIT-compiled code or other uses).
(I am developing a debugger + REPL using the API; it will need to store JIT-compiled code within the target.)
Reviewed By: clayborg, jingham
Differential Revision: https://reviews.llvm.org/D105389
|
 | lldb/bindings/interface/SBProcess.i |
 | lldb/test/API/python_api/process/TestProcessAPI.py |
 | lldb/test/API/python_api/process/main.cpp |
 | lldb/include/lldb/API/SBProcess.h |
 | lldb/source/API/SBProcess.cpp |
Commit
e91da668d00c1edbe224ecf34c106687a2a47db0
by Matthew.ArsenaultGlobalISel: Track argument pointeriness with arg flags
Since we're still building on top of the MVT based infrastructure, we need to track the pointer type/address space on the side so we can end up with the correct pointer LLTs when interpreting CCValAssigns.
|
 | llvm/test/CodeGen/X86/GlobalISel/x32-irtranslator.ll |
 | llvm/test/CodeGen/ARM/GlobalISel/irtranslator-varargs-lowering.ll |
 | llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp |
 | llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll |
 | llvm/test/CodeGen/ARM/GlobalISel/arm-irtranslator.ll |
 | llvm/test/CodeGen/X86/GlobalISel/frameIndex.ll |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll |
 | llvm/test/CodeGen/ARM/GlobalISel/arm-param-lowering.ll |
 | llvm/test/CodeGen/X86/GlobalISel/irtranslator-callingconv.ll |
 | llvm/lib/CodeGen/GlobalISel/CallLowering.cpp |
 | llvm/test/CodeGen/Mips/GlobalISel/irtranslator/pointers.ll |
 | llvm/test/CodeGen/X86/GlobalISel/GV.ll |
Commit
a81a7a9ad81969bce757fbf7a6ebe94a946902d2
by Matthew.ArsenaultAMDGPU/GlobalISel: Fix incorrect memory types in test
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 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-global.mir |
Commit
a2d7ace3e3e9804c5b616be402f37b21549db80e
by Matthew.ArsenaultGlobalISel: Surface offsets parameter from ComputeValueVTs
|
 | llvm/lib/CodeGen/GlobalISel/CallLowering.cpp |
 | llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h |
Commit
557855e047aea53023165756586697c0f1cbc3ce
by thakisRevert "tsan: make obtaining current PC faster"
This reverts commit e33446ea58b8357dd8b79eb39140a1de2baff1ae. Doesn't build on mac, and causes other problems. See reports on https://reviews.llvm.org/D106046 and https://reviews.llvm.org/D106081
Also revert follow-up "tsan: strip top inlined internal frames" This reverts commit 7b302fc9b04c7991cdb869b65316e0d72e41042e.
|
 | compiler-rt/lib/tsan/rtl/tsan_rtl_report.cpp |
 | compiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp |
 | compiler-rt/lib/sanitizer_common/sanitizer_stacktrace.h |
 | compiler-rt/lib/sanitizer_common/sanitizer_stacktrace.cpp |
 | compiler-rt/lib/tsan/rtl/tsan_interceptors.h |
Commit
7139497656147275156e7242a8bf08794af9130a
by kstoimenov[asan] Slightly modified the documentation.
The goal of this change is to test if I can commit changes.
Reviewed By: kcc
Differential Revision: https://reviews.llvm.org/D106101
|
 | clang/docs/AddressSanitizer.rst |
Commit
f2b1264141b02efb1ba76b6eb7a7d2fff6d4c21a
by leevince[lld-macho] Use intermediate arrays to store opcodes
We want to incorporate some of the optimization passes in bind opcodes from ld64. This revision makes no functional changes but to start storing opcodes in intermediate containers in preparation for implementing the optimization passes in a follow-up revision.
Differential Revision: https://reviews.llvm.org/D105866
|
 | lld/MachO/SyntheticSections.cpp |
Commit
108a320a58b13f7adc238d91ab1895ad4569df7a
by weiwei.li1[mlir][spirv] Add support for GLSL FMix
Add spv.GLSL.FMix opertaion.
co-authered-by: Alan Liu <alanliu.yf@gmail.com>
Reviewed By: mravishankar
Differential Revision: https://reviews.llvm.org/D104153
|
 | mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGLSLOps.td |
 | mlir/test/Target/SPIRV/glsl-ops.mlir |
 | mlir/test/Dialect/SPIRV/IR/glsl-ops.mlir |
Commit
3c4023b225ace3a5c0ed23bc491b47c9dad4353c
by danielrodriguez[test] Use double pound to denote comments.
Use double pound at the start of the line to differentiate comments from statements for Lit or FileCheck.
I will also use this small commit to check my commit access.
Differential Revision: https://reviews.llvm.org/D106103
|
 | llvm/test/tools/llvm-objcopy/grouped-options.test |
Commit
766a08df12c111b15ed51d0fcac06042d2f68cd6
by vsapsai[Frontend] Only compile modules if not already finalized
It was possible to re-add a module to a shared in-memory module cache when search paths are changed. This can eventually cause a crash if the original module is referenced after this occurs. 1. Module A depends on B 2. B exists in two paths C and D 3. First run only has C on the search path, finds A and B and loads them 4. Second run adds D to the front of the search path. A is loaded and contains a reference to the already compiled module from C. But searching finds the module from D instead, causing a mismatch 5. B and the modules that depend on it are considered out of date and thus rebuilt 6. The recompiled module A is added to the in-memory cache, freeing the previously inserted one
This can never occur from a regular clang process, but is very easy to do through the API - whether through the use of a shared case or just running multiple compilations from a single `CompilerInstance`. Update the compilation to return early if a module is already finalized so that the pre-condition in the in-memory module cache holds.
Resolves rdar://78180255
Differential Revision: https://reviews.llvm.org/D105328
|
 | clang/include/clang/Serialization/ASTReader.h |
 | clang/lib/Serialization/ASTReader.cpp |
 | clang/unittests/Serialization/CMakeLists.txt |
 | clang/include/clang/Basic/DiagnosticSerializationKinds.td |
 | clang/unittests/Serialization/ModuleCacheTest.cpp |
 | clang/include/clang/Basic/DiagnosticCommonKinds.td |
 | clang/lib/Frontend/CompilerInstance.cpp |
Commit
851a335b1e64d0d32e15a8d2ace48c9b0967cd5a
by Louis Dionne[libc++] Add a job running GCC with C++11
This configuration is interesting because GCC has a different level of strictness for some C++ rules. In particular, it implements the older standards more stringently than Clang, which can help find places where we are non-conforming (especially in the test suite).
Differential Revision: https://reviews.llvm.org/D105936
|
 | libcxxabi/test/unwind_05.pass.cpp |
 | libcxx/test/std/depr/depr.auto.ptr/auto.ptr/A.h |
 | libcxx/test/std/input.output/file.streams/c.files/cstdio.pass.cpp |
 | libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/atomic_is_lock_free.pass.cpp |
 | libcxxabi/test/unwind_02.pass.cpp |
 | libcxx/utils/ci/buildkite-pipeline.yml |
 | libcxx/test/std/strings/string.view/string.view.ops/copy.pass.cpp |
 | libcxx/utils/ci/run-buildbot |
 | libcxx/test/support/test_macros.h |
 | libcxxabi/test/unwind_04.pass.cpp |
 | libcxx/test/std/depr/depr.auto.ptr/auto.ptr/AB.h |
 | libcxxabi/test/unwind_03.pass.cpp |
 | libcxx/test/std/utilities/smartptr/unique.ptr/unique.ptr.class/unique.ptr.ctor/auto_pointer.pass.cpp |
Commit
97c8f60bbaf0986320fdfd03b11328b91c730a96
by tianshilei1992[NFC][OpenMP][Offloading] Replaced explicit parallel level computation with function `__kmpc_parallel_level`
There are two places in current deviceRTLs where it computes parallel level explicitly, which is basically the functionality of `__kmpc_parallel_level`. Starting from D105787, we plan to introduce a series of function call folding based on information that can be deducted during compilation time. Computation of parallel level is the next target. This patch makes steps for the optimization.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D105955
|
 | openmp/libomptarget/deviceRTLs/common/src/libcall.cu |
 | openmp/libomptarget/deviceRTLs/common/src/parallel.cu |
 | openmp/libomptarget/deviceRTLs/interface.h |
 | openmp/libomptarget/deviceRTLs/common/src/support.cu |
Commit
18d8779747951d07fcc88de2283aceff602bc3c5
by thakis[gn build] port 766a08df12c1
|
 | llvm/utils/gn/secondary/clang/unittests/Serialization/BUILD.gn |
Commit
b1ffa8fc61a72f9bd0abc0ab8e61fbad31161eca
by llvmgnsyncbot[gn build] Port 766a08df12c1
|
 | llvm/utils/gn/secondary/clang/unittests/Serialization/BUILD.gn |
Commit
b4c93ece8e4f6e98a15daca10c8a3db33cf8c195
by john.demme[MLIR] [Python ODS] Use @builtins.property for cases where 'property' is already defined
In cases where an operation has an argument or result named 'property', the ODS-generated python fails on import because the `@property` resolves to the `property` operation argument instead of the builtin `@property` decorator. We should always use the fully qualified decorator name.
Reviewed By: mikeurbach
Differential Revision: https://reviews.llvm.org/D106106
|
 | mlir/test/python/python_test_ops.td |
 | mlir/test/mlir-tblgen/op-python-bindings.td |
 | mlir/tools/mlir-tblgen/OpPythonBindingGen.cpp |
Commit
42f588f39c5ce6f521e3709b8871d1fdd076292f
by joker.ephUse ManagedStatic and lazy initialization of cl::opt in libSupport to make it free of global initializer
We can build it with -Werror=global-constructors now. This helps in situation where libSupport is embedded as a shared library, potential with dlopen/dlclose scenario, and when command-line parsing or other facilities may not be involved. Avoiding the implicit construction of these cl::opt can avoid double-registration issues and other kind of behavior.
Reviewed By: lattner, jpienaar
Differential Revision: https://reviews.llvm.org/D105959
|
 | llvm/lib/Support/TimeProfiler.cpp |
 | llvm/lib/Support/ARMBuildAttrs.cpp |
 | llvm/unittests/Support/ARMAttributeParser.cpp |
 | clang-tools-extra/clangd/indexer/IndexerMain.cpp |
 | llvm/lib/Support/CommandLine.cpp |
 | llvm/include/llvm/Support/ScopedPrinter.h |
 | clang-tools-extra/clangd/index/dex/dexp/Dexp.cpp |
 | llvm/lib/Support/ELFAttributeParser.cpp |
 | llvm/docs/CommandLine.rst |
 | llvm/tools/llvm-libtool-darwin/llvm-libtool-darwin.cpp |
 | llvm/unittests/Support/CommandLineTest.cpp |
 | llvm/lib/Support/Statistic.cpp |
 | llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp |
 | llvm/lib/Support/Timer.cpp |
 | llvm/lib/Support/Signals.cpp |
 | llvm/lib/Support/TypeSize.cpp |
 | llvm/unittests/Support/RISCVAttributeParserTest.cpp |
 | llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp |
 | llvm/lib/Support/RandomNumberGenerator.cpp |
 | llvm/include/llvm/Support/ARMBuildAttributes.h |
 | llvm/include/llvm/Support/ARMAttributeParser.h |
 | llvm/lib/Support/RISCVAttributes.cpp |
 | llvm/lib/Support/Debug.cpp |
 | llvm/lib/Support/DebugCounter.cpp |
 | llvm/lib/Support/DebugOptions.h |
 | llvm/lib/Support/GraphWriter.cpp |
 | llvm/lib/Support/WithColor.cpp |
 | llvm/include/llvm/Support/RISCVAttributeParser.h |
 | llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp |
 | llvm/include/llvm/Support/RISCVAttributes.h |
 | llvm/include/llvm/Support/CommandLine.h |
 | llvm/include/llvm/Support/WithColor.h |
 | clang/tools/clang-refactor/ClangRefactor.cpp |
 | llvm/lib/Support/Windows/Signals.inc |
 | llvm/tools/llvm-dwarfdump/llvm-dwarfdump.cpp |
Commit
16b5e9d6a269913e8da0fa037e8af32eaf304c8f
by joker.ephRevert "Use ManagedStatic and lazy initialization of cl::opt in libSupport to make it free of global initializer"
This reverts commit 42f588f39c5ce6f521e3709b8871d1fdd076292f. Broke some buildbots
|
 | llvm/include/llvm/Support/ARMAttributeParser.h |
 | llvm/docs/CommandLine.rst |
 | llvm/lib/Support/Windows/Signals.inc |
 | llvm/tools/llvm-libtool-darwin/llvm-libtool-darwin.cpp |
 | llvm/lib/Support/ARMBuildAttrs.cpp |
 | llvm/include/llvm/Support/CommandLine.h |
 | clang/tools/clang-refactor/ClangRefactor.cpp |
 | llvm/include/llvm/Support/ARMBuildAttributes.h |
 | llvm/lib/Support/GraphWriter.cpp |
 | clang-tools-extra/clangd/indexer/IndexerMain.cpp |
 | llvm/unittests/Support/CommandLineTest.cpp |
 | llvm/include/llvm/Support/RISCVAttributes.h |
 | llvm/lib/Support/RISCVAttributes.cpp |
 | llvm/lib/Support/DebugCounter.cpp |
 | llvm/lib/Support/TypeSize.cpp |
 | llvm/lib/Support/Timer.cpp |
 | llvm/include/llvm/Support/ScopedPrinter.h |
 | llvm/lib/Support/Debug.cpp |
 | llvm/lib/Support/RandomNumberGenerator.cpp |
 | llvm/tools/llvm-dwarfdump/llvm-dwarfdump.cpp |
 | llvm/lib/Support/ELFAttributeParser.cpp |
 | llvm/unittests/Support/RISCVAttributeParserTest.cpp |
 | llvm/lib/Support/Statistic.cpp |
 | llvm/lib/Support/DebugOptions.h |
 | llvm/lib/Support/WithColor.cpp |
 | llvm/lib/Support/Signals.cpp |
 | llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp |
 | llvm/lib/Support/CommandLine.cpp |
 | llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp |
 | llvm/unittests/Support/ARMAttributeParser.cpp |
 | llvm/include/llvm/Support/WithColor.h |
 | clang-tools-extra/clangd/index/dex/dexp/Dexp.cpp |
 | llvm/include/llvm/Support/RISCVAttributeParser.h |
 | llvm/lib/Support/TimeProfiler.cpp |
 | llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp |
Commit
c23da666b5be4da631c2ff8db4d129a90f319777
by tianshilei1992[Attributor] Add support for compound assignment for ChangeStatus
A common use of `ChangeStatus` is as follows: ``` ChangeStatus Changed = ChangeStatus::UNCHANGED; Changed |= foo(); ``` where `foo` returns `ChangeStatus` as well. Currently `ChangeStatus` doesn't support compound assignment, we have to write as ``` Changed = Changed | foo(); ``` which is not that convenient.
This patch add the support for compound assignment for `ChangeStatus`. Compound assignment is usually implemented as a member function, and binary arithmetic operator is therefore implemented using compound assignment. However, unlike regular C++ class, enum class doesn't support member functions. As a result, they can only be implemented in the way shown in the patch.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D106109
|
 | llvm/lib/Transforms/IPO/Attributor.cpp |
 | llvm/lib/Transforms/IPO/OpenMPOpt.cpp |
 | llvm/include/llvm/Transforms/IPO/Attributor.h |
Commit
d695d0d6f60528841ab8671cdccff85f889ca95d
by leevince[lld-macho] Optimize bind opcodes with multiple passes
In D105866, we used an intermediate container to store a list of opcodes. Here, we use that data structure to help us perform optimization passes that would allow a more efficient encoding of bind opcodes. Currently, the functionality mirrors the optimization pass {1,2} done in ld64 for bind opcodes under optimization gate to prevent slight regressions.
Reviewed By: int3, #lld-macho
Differential Revision: https://reviews.llvm.org/D105867
|
 | lld/MachO/Driver.cpp |
 | lld/MachO/SyntheticSections.cpp |
 | lld/MachO/Config.h |
 | lld/MachO/Options.td |
 | lld/test/MachO/bind-opcodes.s |
Commit
f5917e0312edacf1fe4cfebc532e3a78c854adee
by carl.ritson[TableGen] Allow isAllocatable inheritence from any superclass
When setting Allocatable on a generated register class check all superclasses and set Allocatable true if any superclass is allocatable.
Without this change generated register classes based on an allocatable class may end up unallocatable due to the topological inheritance order.
This change primarily effects AMDGPU backend; however, there are a few changes in MIPs GlobalISel register constraints as a result.
Reviewed By: kparzysz
Differential Revision: https://reviews.llvm.org/D105967
|
 | llvm/utils/TableGen/CodeGenRegisters.cpp |
Commit
48688257c52dfc2c666b64730f0467c2cc38210c
by deep.majumder2019[analyzer] Model comparision methods of std::unique_ptr
This patch handles all the comparision methods (defined via overloaded operators) on std::unique_ptr. These operators compare the underlying pointers, which is modelled by comparing the corresponding inner-pointer SVal. There is also a special case for comparing the same pointer.
Differential Revision: https://reviews.llvm.org/D104616
|
 | clang/test/Analysis/Inputs/system-header-simulator-cxx.h |
 | clang/lib/StaticAnalyzer/Checkers/SmartPtr.h |
 | clang/test/Analysis/smart-ptr.cpp |
 | clang/include/clang/StaticAnalyzer/Core/PathSensitive/CheckerHelpers.h |
 | clang/lib/StaticAnalyzer/Core/CheckerHelpers.cpp |
 | clang/lib/StaticAnalyzer/Checkers/SmartPtrModeling.cpp |
Commit
f98ed74f6910f8b09e77497aeb30c860c433610d
by mkazantsev[LSR] Handle case 1*reg => reg. PR50918
This patch addresses assertion failure in case when the only found formula for LSR is `1*reg => reg` which was supposed to be an impossible situation, however there is a test that shows it is possible.
In this case, we can use scale register with scale of 1 as the missing base register.
Reviewed By: huihuiz, reames Differential Revision: https://reviews.llvm.org/D105009
|
 | llvm/test/Transforms/LoopStrengthReduce/pr50918.ll |
 | llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp |
Commit
39a36999f9b4d6eb5bedbce1d6d54156b8cdf6bf
by sepavloffFix typo in test
|
 | llvm/test/Transforms/InstSimplify/fdiv-strictfp.ll |
Commit
25dade54d3ece60dc9fb8f9960e4a558e85f7ae9
by phosek[profile] Decommit memory after counter relocation
After we relocate counters, we no longer need to keep the original copy around so we can return the memory back to the operating system.
Differential Revision: https://reviews.llvm.org/D104839
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 | compiler-rt/lib/profile/InstrProfilingUtil.h |
 | compiler-rt/lib/profile/InstrProfilingUtil.c |
 | compiler-rt/lib/profile/WindowsMMap.h |
 | compiler-rt/lib/profile/InstrProfilingFile.c |
 | compiler-rt/lib/profile/InstrProfilingPlatformFuchsia.c |
 | compiler-rt/lib/profile/WindowsMMap.c |