Changes

Summary

  1. [ORC-RT] Disable ORC Runtime on ccache builders. (details)
Commit 490633945677656ba75d42ff1ca9d4a400b7b243 by Lang Hames
[ORC-RT] Disable ORC Runtime on ccache builders.

The ORC runtime contains assembly files that don't seem to build correctly
under ccache (e.g. https://lab.llvm.org/buildbot/#/builders/109/builds/18980).
This commit disables the ORC runtime on those builders, which seems to be the
same fix that was adopted for XRay and other compiler-rt libraries that use
assembly.

Differential Revision: https://reviews.llvm.org/D106425
The file was modifiedbuildbot/osuosl/master/config/builders.py (diff)

Summary

  1. [libc][NFC] Adjust enabled_exceptions_test wrt FE_INEXACT. (details)
  2. [ORC][ORC-RT] Revert MachO TLV patches while I investigate more bot failures. (details)
  3. [lbc++][nfc] Use _LIBCPP_HIDE_FROM_ABI. (details)
  4. [libc++][nfc] Adds a missing generated file. (details)
  5. sanitizer_common: modernize SpinMutex (details)
  6. [clang][analyzer] Improve report of file read at EOF condition (alpha.unix.Stream checker). (details)
  7. [llvm][tools] Hide more unrelated LLVM tool options (details)
  8. sanitizer_common: revert StaticSpinMutex ctor (details)
  9. [libc][Obvious] Fix few typos in FPUtil/TestHelpers.cpp (details)
  10. [AArch64][SME] Add ldr and str instructions (details)
  11. [AArch64][SME] Add mova instructions (details)
  12. AArch64: support 8 & 16-bit atomic operations in GlobalISel (details)
  13. ARM: don't return by popping PC if we have to adjust the stack afterwards. (details)
  14. [AArch64][SME] Support .arch and .arch_extension assembler directives (details)
  15. [nfc] [lldb] Rename GetRnglist() to GetRnglistTable() (details)
  16. [LV] Use lookThroughAnd with logical reductions (details)
  17. [OpenCL] Add cl_khr_extended_bit_ops (details)
  18. [LoopFlatten][LoopInfo] Use Loop to identify latch compare instruction (details)
  19. [clangd] Remove big PreambleData constructor. NFC (details)
  20. [clang] Introduce SourceLocation::[U]IntTy typedefs. (details)
  21. [Analyzer][solver][NFC] Add explanatory comments to trivial eq classes (details)
  22. [AMDGPU] NFC refactoring in isel for buffer access intrinsics (details)
  23. [LV] Make use of PatternMatchers in getReductionPatternCost. NFC (details)
  24. IFSStub.cpp - consistently use default case to silence 'not all control paths return' MSVC warnings. NFCI. (details)
  25. [NFC][VectorCombine] Load widening: add a few more negative tests (details)
  26. [compiler-rt][hwasan] Update register-dump-read.c test (details)
  27. [InstCombine] Add multiuse test for D106352 (details)
  28. [llvm] Add enum iteration to Sequence (details)
  29. [clangd] Cleanup FuzzyFindRequest serialization and dex benchmark (details)
  30. [analyzer] Fix for faulty namespace test in SmartPtrModelling (details)
  31. [libc] Exclude few unused bits from x86 state for Windows (details)
  32. [libc] Append math functions to Window's entrypoints (details)
  33. [AMDGPU] Precommit vgpr-liverange tests (details)
  34. [AMDGPU] Improve killed check for vgpr optimization (details)
  35. [libc] Include nextafter's functions to Windows's entrypoints (details)
  36. [InstCombine] Regenerate gep-custom-dl.ll test checks (details)
  37. [ADT] Add initializer_list constructor to SmallDenseMap (details)
  38. [PowerPC] Floating Point Builtins for XL Compat. (details)
  39. [InstCombine] Remove CreateOverflowTuple (NFC) (details)
  40. [LoopVectorize] Regenerate sve-vector-reverse.ll test checks (details)
  41. Revert "[LV] Use lookThroughAnd with logical reductions" (details)
  42. [PowerPC] Require power-pc target for new builtin test (details)
  43. [PowerPC] Move backend test to fix non PPC bots (details)
  44. [MLIR] Introduce a new rewrite driver to simplify supplied list of ops (details)
  45. [libc++] Add `__libcpp_copysign` conditionally constexpr overloads. (details)
  46. [MLIR] Add folder for zero trip count affine.for (details)
  47. [flang] Implement the runtime portion of the UNPACK intrinsic (details)
  48. [OpenMP][AMDGCN] Initial math headers support (details)
  49. [Bazel] Remove deprecated td_relative_includes (details)
  50. [ms] [llvm-ml] Add support for numeric built-in symbols (details)
  51. [ms] [llvm-ml] Support built-in text macros (details)
  52. [MachineVerifier] Make INSERT_SUBREG diagnostic respect operand 2 subregs (details)
  53. [NewPM][Inliner] Check if deleted function is in current SCC (details)
  54. [ms] [llvm-ml] Restrict implicit RIP-relative addressing to named-variable references (details)
  55. [PowerPC] Removing a REQUIRES line from llvm test (details)
  56. [WebAssembly] Codegen for v128.load{32,64}_zero (details)
  57. [libomptarget][amdgpu][nfc] Refactor #includes (details)
  58. Revert "[OpenMP][AMDGCN] Initial math headers support" (details)
  59. [trace] [intel pt] Create a "thread trace dump stats" command (details)
  60. [OpenMP] Expose libomptarget function to get HW thread id (details)
  61. [Attributor][NFC] Modify isAssumedHeapToStack for const argument (details)
  62. [mlir] Add alias for input to shaped type op interface (details)
  63. [SystemZ][z/OS][libcxx]: add the missing comment for patch D106153 and D106151 (details)
  64. [profile] Add binary id into profiles (details)
  65. [SelectionDAG] Fix the representation of ISD::STEP_VECTOR. (details)
  66. [profile] Change linkage type of a compiler-rt func (details)
  67. [Attributor] Preserve BBs and instructions added in AA manifests (details)
  68. [AArch64] Regenerate and add more tests for i128 atomics. (details)
  69. [clang][darwin] add support for remapping macOS availability to Mac Catalyst availability (details)
  70. [Sanitizers][darwin] Fix a -Wcast-qual (details)
  71. Revert "[profile] Add binary id into profiles" (details)
  72. [HIP] Remove workaround in __clang_hip_runtime_wrapper.h (details)
  73. [SROA] avoid crash on memset with constant expression length (details)
  74. [RISCV] Cleanup comment around vector tail policy handling. NFC (details)
  75. [AMDGPU] Tune perfhint analysis to account access width (details)
  76. [clang][sema] NFC, include DarwinSDKInfo header instead of using the forward reference (details)
  77. Fix a bug in OptimizedStructLayout when filling gaps before (details)
  78. Change requires line from arm to aarch64 since the test uses arm64_32 which is AArch64. (details)
  79. [AArch64][GlobalISel] Widen s2 and s4 G_IMPLICIT_DEF + G_FREEZE (details)
  80. [AMDGPU] Move perfhint analysis (details)
  81. [SimplifyCFG] Regenerate test checks (NFC) (details)
  82. [SimplifyCFG] Fix if conversion with opaque pointers (details)
  83. [LLDB] Move Trace-specific classes into separate library (details)
  84. [flang] Implement the runtime portion of the CSHIFT intrinsic (details)
  85. [sanitizer] Place module_ctor/module_dtor in llvm.used (details)
  86. [AMDGPU] Mark all relevant VOP1 instructions rematerializable (details)
  87. [intel pt] fix builds (details)
  88. [ARM] Pass SelectionDAG to methods that dont require DCI. NFC (details)
  89. [llvm-diff] Check for recursive initialiers (details)
  90. [AMDGPU] Mark relevant rematerializable VOP2 instructions (details)
  91. [clang][Sema] removes -Wfree-nonheap-object reference param false positive (details)
  92. Revert "Add workaround for false positive in -Wfree-nonheap-object" (details)
  93. [libcxx][ranges] implements dangling, borrowed_iterator_t, borrowed_subrange_t (details)
  94. [LLDB][GUI] Add Process Plugin Field (details)
  95. [LLDB][GUI] Add required property to text fields (details)
  96. [AMDGPU] Mark relevant rematerializable VOP3 instructions (details)
  97. [gn build] Port 74fd3cb8cd3e (details)
  98. [AArch64][GlobalISel] Change | -> || in an if (details)
  99. [mlir][LLVM] Revert bareptr calling convention handling as an argument materialization. (details)
  100. Prevent dead uses in register coalescer after rematerialization (details)
  101. Add verifier for insert/extract element/value on type match between container and inserted/extracted value, and fix vector.shuffle lowering (details)
  102. Remove `LIBC_INSTALL_PREFIX` (details)
  103. [WebAssembly] Remove clang builtins for extract_lane and replace_lane (details)
  104. [mlir] Add workaround for false positive in -Wfree-nonheap-object (details)
  105. [WebAssembly] Replace @llvm.wasm.popcnt with @llvm.ctpop.v16i8 (details)
  106. Re-re-apply "[ORC][ORC-RT] Add initial native-TLV support to MachOPlatform." (details)
  107. [NFC] Code cleanups in InlineCost.cpp. (details)
  108. [libc] Rename FEnv.h and refactor subsequent files (details)
  109. Fix assigned-but-unused (except in an assert) warning with a void cast (details)
  110. Re-re-revert "[ORC][ORC-RT] Add initial native-TLV support to MachOPlatform." (details)
  111. [OpenMP] Change `__kmpc_free_shared` to include the paired allocation size (details)
  112. [OpenMP] Add new execution mode for SPMD execution with Generic semantics (details)
  113. [Libomptarget] Introduce new main thread ID runtime function (details)
  114. [OpenMP] Add an option to disable function internalization (details)
  115. [OpenMP] Fold `__kmpc_is_generic_main_thread_id` if possible (details)
  116. [OpenMP] Strip NoInline from known OpenMP runtime functions (details)
  117. [AMDGPU] Allow frontends to disable null export for pixel shaders (details)
  118. [Clang][RISCV] Implement vlsseg. (details)
  119. [Clang][RISCV] Implement vloxseg and vluxseg. (details)
  120. [Clang][RISCV] Add vloxseg and vluxseg test cases. (details)
  121. [Clang][RISCV] Implement vsseg. (details)
  122. [Clang][RISCV] Implement vssseg. (details)
  123. [Clang][RISCV] Implement vsoxseg and vsuxseg. (details)
  124. [mlir] Extend scf pipeling to support loop carried dependencies (details)
  125. [AMDGPU] Add VReg_192/VReg_224 support for MIMG instructions (details)
  126. [RISCV] Optimize multiplication in the zba extension with SH*ADD (details)
  127. [MLIR] Fix affine.for empty loop body folder (details)
  128. [mlir] Fix various issues in TimerImpl. (details)
  129. [Attributor][NFC] Clang format (details)
  130. [OpenMP][FIX] Use name + type checks not only name checks for calls (details)
  131. [Attributor][NFC] Precommit tests exposing a conceptual simplification problem (details)
  132. [RegisterCoalescer] Make resolveConflicts aware of earlyclobber (details)
Commit ff384700f25d8637c044325c2c086382b4234646 by sivachandra
[libc][NFC] Adjust enabled_exceptions_test wrt FE_INEXACT.

Since exceptions like FE_DIVBYZERO can raise FE_INEXACT, we need to
ensure that we don't raise FE_DIVBYZERO (or others which can also raise
FE_INEXACT) when FE_INEXACT is enabled.
The file was modifiedlibc/test/src/fenv/enabled_exceptions_test.cpp
Commit 48aa82cacbff10e1c5395a03f86488bf449ba4da by Lang Hames
[ORC][ORC-RT] Revert MachO TLV patches while I investigate more bot failures.

This reverts commit d4abdefc998a1ee19d5edc79ec233774cbf64f6a ("[ORC-RT] Rename
macho_tlv.x86-64.s to macho_tlv.x86-64.S (uppercase suffix)", and
a7733e9556b5a6334c910f88bcd037e84e17e3fc ("Re-apply "[ORC][ORC-RT] Add initial
native-TLV support to MachOPlatform."), while I investigate failures on
ccache builders (e.g. https://lab.llvm.org/buildbot/#/builders/109/builds/18981)
The file was modifiedcompiler-rt/lib/orc/CMakeLists.txt
The file was modifiedcompiler-rt/lib/orc/macho_platform.h
The file was removedcompiler-rt/lib/orc/macho_tlv.x86-64.S
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/MachOPlatform.h
The file was modifiedcompiler-rt/lib/orc/macho_platform.cpp
The file was modifiedllvm/lib/ExecutionEngine/JITLink/MachO_x86_64.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
The file was removedcompiler-rt/test/orc/TestCases/Darwin/x86-64/trivial-tlv.S
Commit b49961987fd703dfcec4e78cac9c110c646e3329 by koraq
[lbc++][nfc] Use _LIBCPP_HIDE_FROM_ABI.

This replaces _LIBCPP_INLINE_VISIBILITY with _LIBCPP_HIDE_FROM_ABI. It's
not intended to do for other parts of libc++. This change makes it easy
to search and replace all occurrences of the patches in review.
The file was modifiedlibcxx/include/__format/format_error.h
The file was modifiedlibcxx/include/__format/format_parse_context.h
Commit 9226e6f7d24dba4f49f5ac08a3048b68219d62cc by koraq
[libc++][nfc] Adds a missing generated file.

The file was created by libcxx/utils/generate_private_header_tests.py.
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/iterator/common_iterator.module.verify.cpp
Commit 927efd0b5d27985d7ac3e16f437b101f17df63de by dvyukov
sanitizer_common: modernize SpinMutex

Some minor improvements:
1. Make StaticSpinMutex non-copyable.
2. Add LIKELY to Lock.
3. Move LockSlow into the .cpp file (now that we have it).
4. The only non-trivial change: use proc_yield(1) instread of proc_yield(10)
   with the proportional increase in the number of spin iterations.
   Latency of the PAUSE instruction has raised from ~1 cycle to ~100 cycles
   in the recent Intel CPUs. So proc_yield(10) is too aggressive backoff.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D106350
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_mutex.cpp
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_mutex.h
Commit 90cb5297adf086073f14d455050b5cde9a03503d by 1.int32
[clang][analyzer] Improve report of file read at EOF condition (alpha.unix.Stream checker).

The checker warns if a stream is read that is already in end-of-file
(EOF) state.
The commit adds indication of the last location where the EOF flag is set
on the stream.

Reviewed By: Szelethus

Differential Revision: https://reviews.llvm.org/D104925
The file was modifiedclang/test/Analysis/stream-note.c
The file was modifiedclang/lib/StaticAnalyzer/Checkers/StreamChecker.cpp
Commit d16f15424007f730c0b5f5d6b31bb023bec3c919 by tbaeder
[llvm][tools] Hide more unrelated LLVM tool options

Differential Revision: https://reviews.llvm.org/D106366
The file was addedllvm/test/tools/llvm-pdbutil/help.test
The file was modifiedllvm/tools/llvm-lto/llvm-lto.cpp
The file was modifiedllvm/tools/llvm-mc/llvm-mc.cpp
The file was modifiedllvm/tools/llvm-modextract/llvm-modextract.cpp
The file was modifiedllvm/tools/llvm-profgen/llvm-profgen.cpp
The file was addedllvm/test/tools/llvm-jitlink/help.test
The file was addedllvm/test/tools/llvm-link/help.test
The file was modifiedllvm/tools/llvm-jitlink/llvm-jitlink.cpp
The file was addedllvm/test/tools/llvm-mc/help.test
The file was modifiedllvm/tools/llvm-pdbutil/llvm-pdbutil.cpp
The file was addedllvm/test/tools/llvm-profgen/help.test
The file was modifiedllvm/tools/llvm-link/llvm-link.cpp
The file was addedllvm/test/tools/llvm-lto/help.test
The file was addedllvm/test/tools/llvm-modextract/help.test
Commit 74b8fca9e4c609b4e9890b2daf6e2ff052d9dbd9 by dvyukov
sanitizer_common: revert StaticSpinMutex ctor

Patch "sanitizer_common: modernize SpinMutex" added default
ctor to StaticSpinMutex. But it broke some gcc bots with:

scudo_tsd_exclusive.cpp:25:22: error: non-local variable
‘__scudo::TSD’ declared ‘__thread’ needs dynamic initialization

https://lab.llvm.org/buildbot/#/builders/105/builds/12649

Unfortunatly none of empty ctor {}, no ctor, default constexpr ctor
work for different reasons. So remove StaticSpinMutex ctor
entirely and move deleted copy ctor back to SpinMutex.

Differential Revision: https://reviews.llvm.org/D106424
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_mutex.h
Commit a31f6d2ccf6ed23c2723544f6a8cb6506c28475e by sivachandra
[libc][Obvious] Fix few typos in FPUtil/TestHelpers.cpp
The file was modifiedlibc/utils/FPUtil/TestHelpers.cpp
Commit 6c32cfe85c7827d356eccb8c9abdb395eda2c9cb by cullen.rhodes
[AArch64][SME] Add ldr and str instructions

The reference can be found here:
https://developer.arm.com/documentation/ddi0602/2021-06

Reviewed By: kmclaughlin

Differential Revision: https://reviews.llvm.org/D105573
The file was modifiedllvm/lib/Target/AArch64/SMEInstrFormats.td
The file was modifiedllvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
The file was addedllvm/test/MC/AArch64/SME/ldr-diagnostics.s
The file was modifiedllvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
The file was addedllvm/test/MC/AArch64/SME/ldr.s
The file was addedllvm/test/MC/AArch64/SME/str-diagnostics.s
The file was addedllvm/test/MC/AArch64/SME/str.s
Commit 2d80bbd939dc00e1506572f7b53e1368913461d6 by cullen.rhodes
[AArch64][SME] Add mova instructions

This patch adds the mova instruction to insert/extract an SVE vector
register to/from a ZA tile vector.

The preferred MOV aliases are also implemented.

Depends on D105572.

The reference can be found here:
https://developer.arm.com/documentation/ddi0602/2021-06

Reviewed By: david-arm, CarolineConcatto

Differential Revision: https://reviews.llvm.org/D105574
The file was modifiedllvm/lib/Target/AArch64/SMEInstrFormats.td
The file was addedllvm/test/MC/AArch64/SME/mova-diagnostics.s
The file was addedllvm/test/MC/AArch64/SME/mova.s
The file was modifiedllvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
Commit 291e0daa6ed658a92a0adbf2a8bba5ca02560b93 by Tim Northover
AArch64: support 8 & 16-bit atomic operations in GlobalISel

We have SelectionDAG patterns for 8 & 16-bit atomic operations, but they
assume the value types will have been legalized to 32-bits. So this adds
the ability to widen them to both AArch64 & generic GISel
infrastructure.
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-cmpxchg.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-atomicrmw.mir
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
Commit 19d2e42be2cd586456ae03374b5fd3e22d9d14f2 by Tim Northover
ARM: don't return by popping PC if we have to adjust the stack afterwards.

In mandatory tail calling conventions we might have to deallocate stack
space used by our arguments before return. This happens after popping
CSRs, so the pop cannot be turned into the return itself in this case.

The else branch here was already a nop, so removing it as a tidy-up.
The file was modifiedllvm/lib/Target/ARM/ARMFrameLowering.cpp
The file was modifiedllvm/test/CodeGen/ARM/tailcc-call.ll
Commit 008c755d76c9deed356c0e9d34e377686ed08795 by cullen.rhodes
[AArch64][SME] Support .arch and .arch_extension assembler directives

Reviewed By: david-arm

Differential Revision: https://reviews.llvm.org/D105566
The file was addedllvm/test/MC/AArch64/SME/directives.s
The file was addedllvm/test/MC/AArch64/SME/directives-negative.s
The file was modifiedllvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
Commit 278df28557f138481ac852d2d064d4c27626048a by jan.kratochvil
[nfc] [lldb] Rename GetRnglist() to GetRnglistTable()

My D99653 implemented a getter GetRnglist() for m_rnglist_table.

That was confusing as the getter returns DWARFDebugRnglistTable which
contains DWARFDebugRnglist as its elements.
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.h
Commit e22a59967251294ccdac6b43a06f48c1b7075240 by kerry.mclaughlin
[LV] Use lookThroughAnd with logical reductions

If a reduction Phi has a single user which `AND`s the Phi with a type mask,
`lookThroughAnd` will return the user of the Phi and the narrower type represented
by the mask. Currently this is only used for arithmetic reductions, whereas loops
containing logical reductions will create a reduction intrinsic using the widened
type, for example:

  for.body:
    %phi = phi i32 [ %and, %for.body ], [ 255, %entry ]
    %mask = and i32 %phi, 255
    %gep = getelementptr inbounds i8, i8* %ptr, i32 %iv
    %load = load i8, i8* %gep
    %ext = zext i8 %load to i32
    %and = and i32 %mask, %ext
    ...

^ this will generate an and reduction intrinsic such as the following:
    call i32 @llvm.vector.reduce.and.v8i32(<8 x i32>...)

The same example for an add instruction would create an intrinsic of type i8:
    call i8 @llvm.vector.reduce.add.v8i8(<8 x i8>...)

This patch changes AddReductionVar to call lookThroughAnd for other integer
reductions, allowing loops similar to the example above with reductions such
as and, or & xor to vectorize.

Reviewed By: david-arm, dmgreen

Differential Revision: https://reviews.llvm.org/D105632
The file was modifiedllvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll
The file was modifiedllvm/lib/Analysis/IVDescriptors.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/reduction-inloop.ll
The file was addedllvm/test/Transforms/LoopVectorize/trunc-reductions.ll
Commit 724f0e2abb0ce327d2e82af5a61be25e2d2014ec by sven.vanhaastregt
[OpenCL] Add cl_khr_extended_bit_ops

Add the builtins defined by Section 40 "Extended Bit Operations" in
the OpenCL Extension Specification.

Differential Revision: https://reviews.llvm.org/D106267
The file was modifiedclang/lib/Headers/opencl-c.h
The file was modifiedclang/lib/Sema/OpenCLBuiltins.td
The file was modifiedclang/lib/Headers/opencl-c-base.h
The file was modifiedclang/test/Headers/opencl-c-header.cl
Commit 44c9adb414ad54d4ad3b95d7c774de6293fb4680 by rosie.sumpter
[LoopFlatten][LoopInfo] Use Loop to identify latch compare instruction

Make getLatchCmpInst non-static and use it in LoopFlatten as a more
robust way of identifying the compare.

Differential Revision: https://reviews.llvm.org/D106256
The file was modifiedllvm/lib/Analysis/LoopInfo.cpp
The file was modifiedllvm/lib/Transforms/Scalar/LoopFlatten.cpp
The file was modifiedllvm/include/llvm/Analysis/LoopInfo.h
Commit 91670f5f20daa00b83520b76bcb54a5d373242f3 by sam.mccall
[clangd] Remove big PreambleData constructor. NFC
The file was modifiedclang-tools-extra/clangd/Preamble.h
The file was modifiedclang-tools-extra/clangd/Preamble.cpp
Commit 21401a72629cc591bab7ec6816f03e6c550f3fb3 by simon.tatham
[clang] Introduce SourceLocation::[U]IntTy typedefs.

This is part of a patch series working towards the ability to make
SourceLocation into a 64-bit type to handle larger translation units.

NFC: this patch introduces typedefs for the integer type used by
SourceLocation and makes all the boring changes to use the typedefs
everywhere, but for the moment, they are unconditionally defined to
uint32_t.

Patch originally by Mikhail Maltsev.

Reviewed By: tmatheson

Differential Revision: https://reviews.llvm.org/D105492
The file was modifiedclang/include/clang/Basic/SourceManager.h
The file was modifiedclang/lib/Lex/Lexer.cpp
The file was modifiedclang/include/clang/Serialization/ModuleFile.h
The file was modifiedclang/include/clang/Serialization/ASTWriter.h
The file was modifiedclang/lib/Serialization/ASTWriter.cpp
The file was modifiedclang/include/clang/Lex/Token.h
The file was modifiedclang/include/clang/Serialization/ASTReader.h
The file was modifiedclang/include/clang/AST/DeclarationName.h
The file was modifiedclang/lib/Basic/SourceLocation.cpp
The file was modifiedclang/lib/Basic/SourceManager.cpp
The file was modifiedclang/lib/Lex/PPCaching.cpp
The file was modifiedclang/lib/Lex/TokenLexer.cpp
The file was modifiedclang/include/clang/Serialization/ASTBitCodes.h
The file was modifiedclang/include/clang/Basic/SourceLocation.h
The file was modifiedclang/lib/Lex/ModuleMap.cpp
The file was modifiedclang/lib/Serialization/ASTReader.cpp
The file was modifiedclang/tools/libclang/CIndex.cpp
The file was modifiedclang/lib/AST/NestedNameSpecifier.cpp
The file was modifiedclang/lib/ARCMigrate/TransEmptyStatementsAndDealloc.cpp
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntime.cpp
Commit 732a8a9dfb3ed96a0d3c9b4507b1d1a40dfa198a by gabor.marton
[Analyzer][solver][NFC] Add explanatory comments to trivial eq classes

Differential Revision: https://reviews.llvm.org/D106370
The file was modifiedclang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp
Commit 3ed29f960c4251cc7e6043c9f75d345481c2c7c9 by jay.foad
[AMDGPU] NFC refactoring in isel for buffer access intrinsics

Rename getBufferOffsetForMMO to updateBufferMMO and pass in the MMO to
be updated, in preparation for the bug fix in D106284.

Call updateBufferMMO consistently for all buffer intrinsics, even the
ones that use setBufferOffsets to decompose a combined offset
expression.

Add a getIdxEn helper function.

Differential Revision: https://reviews.llvm.org/D106354
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.h
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
Commit 72dc5cab4f8bce67a78dd149f17b8709208da580 by david.green
[LV] Make use of PatternMatchers in getReductionPatternCost. NFC

Pulled out of D106166, this modifies getReductionPatternCost to use
PatternMatchers, hopefully simplifying the code a little.
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Commit 7c53a7d390c628f6925bc7c29124446e320113af by llvm-dev
IFSStub.cpp - consistently use default case to silence 'not all control paths return' MSVC warnings. NFCI.
The file was modifiedllvm/lib/InterfaceStub/IFSStub.cpp
Commit 48e9602c4065368fc0731cfc6f08a858fa4526b4 by lebedev.ri
[NFC][VectorCombine] Load widening: add a few more negative tests
The file was modifiedllvm/test/Transforms/VectorCombine/X86/load-widening.ll
Commit bb4f7b916661d2517fb8dfadfc8629e6bed56ce4 by david.spickett
[compiler-rt][hwasan] Update register-dump-read.c test

Since d564cfb53c71dbbbd46b6719f5fe53d70313de45 moved
__hwasan_tag_mismatch4 this test has been reporting
a frame 0 of __hwasan_tag_mismatch_v2.

This failure can be seen on our bots:
https://lab.llvm.org/buildbot/#/builders/185/builds/170

Before the change:
#0 0xaaaaba100e40 in main <...>/register-dump-read.c:21:10
After the change:
#0 0xaaaab8494bec in __hwasan_tag_mismatch_v2 <...>/hwasan/hwasan_tag_mismatch_aarch64.S:147
#1 0xaaaab84b4df8 in main <..>/register-dump-read.c:14:10

Update the test to check for a main frame as either frame
0 or frame 1.
The file was modifiedcompiler-rt/test/hwasan/TestCases/register-dump-read.c
Commit 59db3a5df918701f32fd6a8de858da3a23a2424d by llvm-dev
[InstCombine] Add multiuse test for D106352
The file was modifiedllvm/test/Transforms/InstCombine/select-gep.ll
Commit d6da02d952470ac976824da9aefdfb13ea1dde34 by gchatelet
[llvm] Add enum iteration to Sequence

This patch allows iterating typed enum via the ADT/Sequence utility.

It also changes the original design to better separate concerns:
- `StrongInt` only deals with safe `intmax_t` operations,
- `SafeIntIterator` presents the iterator and reverse iterator
interface but only deals with safe `StrongInt` internally.
- `iota_range` only deals with `SafeIntIterator` internally.

This design ensures that operations are always valid. In particular,
"Out of bounds" assertions fire when:
  - the `value_type` is not representable as an `intmax_t`
  - iterator operations make internal computation underflow/overflow
  - the internal representation cannot be converted back to `value_type`

Differential Revision: https://reviews.llvm.org/D106279
The file was modifiedllvm/include/llvm/Support/MachineValueType.h
The file was modifiedllvm/unittests/IR/ConstantRangeTest.cpp
The file was modifiedllvm/tools/llvm-exegesis/lib/X86/Target.cpp
The file was modifiedllvm/include/llvm/ADT/Sequence.h
The file was modifiedllvm/tools/llvm-reduce/deltas/ReduceAttributes.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
The file was modifiedllvm/unittests/CodeGen/ScalableVectorMVTsTest.cpp
The file was modifiedllvm/unittests/ADT/SequenceTest.cpp
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
Commit 907efdf95da567c314e2c9b9df67187756eed5ca by kbobyrev
[clangd] Cleanup FuzzyFindRequest serialization and dex benchmark

* Due to the LLVM's JSON library changes (?), FuzzyFindRequest serialization is
  no longer valid since arrays are serialized as llvm::json::Array already.
  Hence, current implementation creates a nested array.
* YAML format is no longer the default, mention this for the benchmark.
* FIXME is no longer relevant. I ran benchmarks that showed no improvement with
  priority_queue years ago.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D106432
The file was modifiedclang-tools-extra/clangd/index/dex/Iterator.cpp
The file was modifiedclang-tools-extra/clangd/benchmarks/IndexBenchmark.cpp
The file was modifiedclang-tools-extra/clangd/index/Index.cpp
Commit 80068ca6232b32e3ab79eb2ed72fd73558179ad5 by deep.majumder2019
[analyzer] Fix for faulty namespace test in SmartPtrModelling

This patch:
- Fixes how the std-namespace test is written in SmartPtrModelling
(now accounts for functions with no Decl available)
- Adds the smart pointer checker flag check where it was missing

Differential Revision: https://reviews.llvm.org/D106296
The file was modifiedclang/lib/StaticAnalyzer/Checkers/SmartPtrModeling.cpp
The file was modifiedclang/test/Analysis/smart-ptr.cpp
Commit 137740ecedf1ac61ad29e16badf1519d7c211c42 by hedingarcia
[libc] Exclude few unused bits from x86 state for Windows

Windows fenv_t does not include the MXCSR register and
the unused bits at the end of the x87 status. So we
exclude them in our struct definitions to make it
easy to read/write the state. getEnv and setEnv
were also excluded to avoid using MXCSR, but a
forthcoming patch will handle these functions.

Reviewed By: sivachandra

Differential Revision: https://reviews.llvm.org/D106386
The file was modifiedlibc/utils/FPUtil/x86_64/FEnv.h
Commit f49f2e2d1f8dcc397d7fc4363d6274e643a17303 by hedingarcia
[libc] Append math functions to Window's entrypoints

Reviewed By: sivachandra

Differential Revision: https://reviews.llvm.org/D106391
The file was modifiedlibc/config/windows/entrypoints.txt
Commit aba1f157ca4fb8ddd7295368a644a366853fb57a by sebastian.neubauer
[AMDGPU] Precommit vgpr-liverange tests
The file was modifiedllvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/vgpr-liverange.ll
Commit b642d01fa85e460158903dd080839f29ed00aa1d by sebastian.neubauer
[AMDGPU] Improve killed check for vgpr optimization

The killed flag is not always set. E.g. when a variable is used in a
loop, it is never marked as killed, although it is unused in following
basic blocks. Also, we try to deprecate kill flags and not use them.

Check if the register is live in the endif block. If not, consider it
killed in the then and else blocks.

The vgpr-liverange tests have two new tests with loops
(pre-committed, so the diff is visible).
I also needed to change the subtarget to gfx10.1, otherwise calls
are not working.

Differential Revision: https://reviews.llvm.org/D106291
The file was modifiedllvm/test/CodeGen/AMDGPU/vgpr-liverange.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/bypass-div.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
Commit efa2115266895419352535ea2a259f93002a1d23 by hedingarcia
[libc] Include nextafter's functions to Windows's entrypoints

Incorporated the varied functions for nextafter and refactored
NextAfterTest.h to correctly define bitWidthOfType for both
Linux and Windows; by letting FloatProperties take care
of the directives' logic based on the platform being used.
This allows to successfully run nextafter's tests.

Reviewed By: sivachandra

Differential Revision: https://reviews.llvm.org/D106395
The file was modifiedlibc/test/src/math/NextAfterTest.h
The file was modifiedlibc/config/windows/entrypoints.txt
Commit f55de3576dcbdd439618c84b2721e1f8c40abb0f by llvm-dev
[InstCombine] Regenerate gep-custom-dl.ll test checks
The file was modifiedllvm/test/Transforms/InstCombine/gep-custom-dl.ll
Commit 3c3165cfa0a4ff4f6c687b4ab4c141803d37009d by kubak
[ADT] Add initializer_list constructor to SmallDenseMap

Make it easier to initialize small maps inline. Note that DenseMap already has an initializer_list constructor.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D106363
The file was modifiedllvm/include/llvm/ADT/DenseMap.h
The file was modifiedllvm/unittests/ADT/DenseMapTest.cpp
Commit e002d251dd34fc1855e3a17feafd358d55d92ed8 by quinn.pham
[PowerPC] Floating Point Builtins for XL Compat.

This patch is in a series of patches to provide
builtins for compatibility with the XL compiler.
This patch adds builtins related to floating point
operations

Reviewed By: #powerpc, nemanjai, amyk, NeHuang

Differential Revision: https://reviews.llvm.org/D103986
The file was modifiedllvm/include/llvm/IR/IntrinsicsPowerPC.td
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.td
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrVSX.td
The file was addedclang/test/CodeGen/builtins-ppc-xlcompat-fp.c
The file was modifiedllvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
The file was modifiedclang/include/clang/Basic/BuiltinsPPC.def
The file was modifiedclang/lib/Basic/Targets/PPC.cpp
The file was addedllvm/test/CodeGen/builtins-ppc-xlcompat-fp.ll
Commit ba2dd12d4fb385e12bc6b4d04cab9083a4f183b7 by kazu
[InstCombine] Remove CreateOverflowTuple (NFC)

The last use was removed On Jun 3, 2020 in commit
2a6c871596ce8bdd23501a96fd22f0f16d3cfcad.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineInternal.h
Commit ca9b60f9dee41ff293b42b5a443f47ab13647387 by llvm-dev
[LoopVectorize] Regenerate sve-vector-reverse.ll test checks
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse.ll
Commit be753b207f59a35244524cca7dcfafdb6bc1a56a by kerry.mclaughlin
Revert "[LV] Use lookThroughAnd with logical reductions"

Reverting patch due to buildbot failures.

This reverts commit e22a59967251294ccdac6b43a06f48c1b7075240.
The file was modifiedllvm/test/Transforms/LoopVectorize/reduction-inloop.ll
The file was removedllvm/test/Transforms/LoopVectorize/trunc-reductions.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll
The file was modifiedllvm/lib/Analysis/IVDescriptors.cpp
Commit 2404834c206a8930b0c420d94f4941b31c355de5 by david.spickett
[PowerPC] Require power-pc target for new builtin test

The llvm test added in e002d251dd34fc1855e3a17feafd358d55d92ed8
was missing a REQUIRES. Failed to run on our AArch64 only bot:
https://lab.llvm.org/buildbot/#/builders/171/builds/1262
The file was modifiedllvm/test/CodeGen/builtins-ppc-xlcompat-fp.ll
Commit c3e17ceaaafa847910363253e81b64390ba4fafb by quinn.pham
[PowerPC] Move backend test to fix non PPC bots

Moving `llvm/test/CodeGen/builtins-ppc-xlcompat-fp.ll` to
`llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-fp.ll`
The file was addedllvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-fp.ll
The file was removedllvm/test/CodeGen/builtins-ppc-xlcompat-fp.ll
Commit 7932d21f5d795230ce9f8e74415fddcc29d91642 by uday
[MLIR] Introduce a new rewrite driver to simplify supplied list of ops

Introduce a new rewrite driver (MultiOpPatternRewriteDriver) to rewrite
a supplied list of ops and other ops. Provide a knob to restrict
rewrites strictly to those ops or also to affected ops (but still not to
completely related ops).

This rewrite driver is commonly needed to run any simplification and
cleanup at the end of a transforms pass or transforms utility in a way
that only simplifies relevant IR. This makes it easy to write test cases
while not performing unrelated whole IR simplification that may
invalidate other state at the caller.

The introduced utility provides more freedom to developers of transforms
and transform utilities to perform focussed and local simplification. In
several cases, it provides greater efficiency as well as more
simplification when compared to repeatedly calling
`applyOpPatternsAndFold`; in other cases, it avoids the need to
undesirably call `applyPatternsAndFoldGreedily` to do unrelated
simplification in a FuncOp.

Update a few transformations that were earlier using
applyOpPatternsAndFold (SimplifyAffineStructures,
affineDataCopyGenerate, a linalg transform).

TODO:
- OpPatternRewriteDriver can be removed as it's a special case of
  MultiOpPatternRewriteDriver, i.e., both can be merged.

Differential Revision: https://reviews.llvm.org/D106232
The file was modifiedmlir/lib/Dialect/Affine/Transforms/AffineDataCopyGeneration.cpp
The file was modifiedmlir/lib/Transforms/Utils/GreedyPatternRewriteDriver.cpp
The file was modifiedmlir/lib/Dialect/Affine/Transforms/SimplifyAffineStructures.cpp
The file was modifiedmlir/test/Dialect/Affine/simplify-affine-structures.mlir
The file was modifiedmlir/test/Dialect/Linalg/fold-affine-min-scf.mlir
The file was modifiedmlir/test/lib/Dialect/Linalg/TestLinalgTransforms.cpp
The file was modifiedmlir/test/lib/Dialect/Affine/TestAffineDataCopy.cpp
The file was modifiedmlir/include/mlir/Transforms/GreedyPatternRewriteDriver.h
Commit 1daf0e22562ce50af2203a1d0f0b969a6c54509c by marek.kurdej+llvm.org
[libc++] Add `__libcpp_copysign` conditionally constexpr overloads.

This is a spin-off from D79555 review, that with this patch will be able to use `__libcpp_copysign` instead of adhoc `__copysign_constexpr` helper.

Reviewed By: ldionne, #libc

Differential Revision: https://reviews.llvm.org/D106364
The file was modifiedlibcxx/include/math.h
Commit 104fad99c9e378c09061f2d4c05e9a506b4ad58b by uday
[MLIR] Add folder for zero trip count affine.for

AffineForOp's folding hook is expected to fold away trivially empty
affine.for.  This allows simplification to happen as part of the
canonicalizer and from wherever the folding hook is used. While more
complex analysis based zero trip count detection is available from other
passes in analysis and transforms, simple and inexpensive folding had
been missing.

Also, update/improve affine.for op documentation clarifying semantics of
the result values for zero trip count loops.

Differential Revision: https://reviews.llvm.org/D106123
The file was modifiedmlir/include/mlir/Dialect/Affine/IR/AffineOps.td
The file was modifiedmlir/lib/Dialect/Affine/IR/AffineOps.cpp
The file was modifiedmlir/test/Dialect/Affine/canonicalize.mlir
Commit ece9aa29ff65dac90727810e2f72fc586b86de45 by psteinfeld
[flang] Implement the runtime portion of the UNPACK intrinsic

I'd previously merged this into the fir-dev branch.  This change is to
do the same thing to the main branch of llvm-project.

Differential Revision: https://reviews.llvm.org/D106294
The file was modifiedflang/unittests/RuntimeGTest/Transformational.cpp
Commit 968899ad9cf17579f9867dafb35c4d97bad0863f by jonathanchesterfield
[OpenMP][AMDGCN] Initial math headers support

With this patch, OpenMP on AMDGCN will use the math functions
provided by ROCm ocml library. Linking device code to the ocml will be
done in the next patch.

Reviewed By: JonChesterfield, jdoerfert, scchan

Differential Revision: https://reviews.llvm.org/D104904
The file was modifiedclang/lib/Headers/__clang_hip_math.h
The file was addedclang/test/Headers/Inputs/include/utility
The file was modifiedclang/test/Headers/Inputs/include/cstdlib
The file was modifiedclang/lib/Headers/openmp_wrappers/cmath
The file was modifiedclang/lib/Headers/openmp_wrappers/__clang_openmp_device_functions.h
The file was modifiedclang/lib/Headers/openmp_wrappers/math.h
The file was addedclang/test/Headers/Inputs/include/algorithm
The file was addedclang/test/Headers/amdgcn_openmp_device_math.c
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedclang/lib/Headers/__clang_hip_cmath.h
The file was modifiedclang/test/Headers/openmp_device_math_isnan.cpp
Commit 13e5aa8973ad681ffb03ded497c34de22f6f049a by gcmn
[Bazel] Remove deprecated td_relative_includes

This has been deprecated for a while and there are no in-tree usages.
I'm not aware of any out-of-tree usages either.
The file was modifiedutils/bazel/llvm-project-overlay/mlir/tblgen.bzl
Commit 4cbb912d7576312babfe4a95c17155687e474a4b by epastor
[ms] [llvm-ml] Add support for numeric built-in symbols

Support @Version and @Line as built-in symbols. For now, resolves @Version to 1427 (the same as for the VS 2019 release of ML.EXE).

Reviewed By: thakis

Differential Revision: https://reviews.llvm.org/D104964
The file was modifiedllvm/test/tools/llvm-ml/variable_redef_errors.asm
The file was modifiedllvm/lib/MC/MCParser/MasmParser.cpp
The file was addedllvm/test/tools/llvm-ml/builtin_symbols.asm
Commit 5fba6058965c6b2cd2fe17335bb1fb78d99815bd by epastor
[ms] [llvm-ml] Support built-in text macros

Add support for all built-in text macros supported by ML64:
@Date, @Time, @FileName, @FileCur, and @CurSeg.

Reviewed By: thakis

Differential Revision: https://reviews.llvm.org/D104965
The file was modifiedllvm/tools/llvm-ml/llvm-ml.cpp
The file was modifiedllvm/test/tools/llvm-ml/builtin_symbols.asm
The file was modifiedllvm/include/llvm/MC/MCParser/MCAsmParser.h
The file was modifiedllvm/tools/llvm-ml/Opts.td
The file was modifiedllvm/lib/MC/MCParser/MasmParser.cpp
The file was addedllvm/test/tools/llvm-ml/builtin_symbols_t5.inc
Commit 4de74a7c4da3516d0d9119452cc073b061716b5d by Jon Roelofs
[MachineVerifier] Make INSERT_SUBREG diagnostic respect operand 2 subregs

This came out of post-commit review: https://reviews.llvm.org/D105953#inline-1012919

Thanks uabelho!
The file was modifiedllvm/lib/CodeGen/MachineVerifier.cpp
The file was modifiedllvm/test/MachineVerifier/test_insert_subreg.mir
Commit 8bc298d041fbe8ec2cabe8a05c6cb06beff5527f by aeubanks
[NewPM][Inliner] Check if deleted function is in current SCC

In weird cases, the inliner will inline internal recursive functions,
sometimes causing them to have no more uses, in which case the
inliner will mark the function to be deleted. The function is
actually deleted after the call to
updateCGAndAnalysisManagerForCGSCCPass(). In
updateCGAndAnalysisManagerForCGSCCPass(), UR.UpdatedC may be set to
the SCC containing the function to be deleted. Then the inliner calls
CG.removeDeadFunction() which can cause that SCC to be deleted, even
though it's still stored in UR.UpdatedC.

We could potentially check in the wrappers/pass managers if UR.UpdatedC
is in UR.InvalidatedSCCs before doing anything with it, but it's safer
to do this as close to possible to the call to CG.removeDeadFunction()
to avoid issues with allocating a new SCC in the same address as
the deleted one.

It's hard to find a small test case since we need to have recursive
internal functions be reachable from non-internal functions, yet they
need to become non-recursive and not referenced by other functions when
inlined.

Similar to https://reviews.llvm.org/D106306.

Fixes PR50788.

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D106405
The file was modifiedllvm/lib/Transforms/IPO/Inliner.cpp
The file was addedllvm/test/Transforms/Inline/deleted-scc.ll
Commit 69551486fd352e52bd1cfeffc258cf95044d3080 by epastor
[ms] [llvm-ml] Restrict implicit RIP-relative addressing to named-variable references

ML64.EXE applies implicit RIP-relative addressing only to memory references that include a named-variable reference.

Reviewed By: mstorsjo

Differential Revision: https://reviews.llvm.org/D105372
The file was modifiedllvm/test/tools/llvm-ml/rip-relative-addressing.asm
The file was modifiedllvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
Commit e23ff55931bd9998984a67af8c262c5e98eef13c by quinn.pham
[PowerPC] Removing a REQUIRES line from llvm test

The test has been moved to the correct directory so this
`REQUIRES` line is not needed.
The file was modifiedllvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-fp.ll
Commit 1a57ee1276edd90d13ca0d7e617c647bfe28377f by tlively
[WebAssembly] Codegen for v128.load{32,64}_zero

Replace the experimental clang builtins and LLVM intrinsics for these
instructions with normal instruction selection patterns. The wasm_simd128.h
intrinsics header was already using portable code for the corresponding
intrinsics, so now it produces the correct instructions.

Differential Revision: https://reviews.llvm.org/D106400
The file was modifiedclang/test/CodeGen/builtins-wasm.c
The file was modifiedllvm/include/llvm/IR/IntrinsicsWebAssembly.td
The file was modifiedllvm/test/CodeGen/WebAssembly/simd-load-zero-offset.ll
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
The file was modifiedclang/include/clang/Basic/BuiltinsWebAssembly.def
The file was modifiedllvm/test/CodeGen/WebAssembly/simd-load-store-alignment.ll
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
Commit a733bbbd17129aff930ae27ac5c83707308d88c1 by jonathanchesterfield
[libomptarget][amdgpu][nfc] Refactor #includes

Create a hsa_api.h header that includes the ROCr headers in use
Drop some unused headers and _cplusplus macros

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D106455
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/data.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/atmi_interop_hsa.h
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/atmi_runtime.h
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/atmi.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/machine.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/rt.h
The file was addedopenmp/libomptarget/plugins/amdgpu/impl/hsa_api.h
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/internal.h
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/machine.h
The file was modifiedopenmp/libomptarget/plugins/amdgpu/src/rtl.cpp
Commit d71062fbdab26fcc1c7e25ccdae410e1c61ed7f9 by jonathanchesterfield
Revert "[OpenMP][AMDGCN] Initial math headers support"

This reverts commit 968899ad9cf17579f9867dafb35c4d97bad0863f.
The file was modifiedclang/test/Headers/Inputs/include/cstdlib
The file was modifiedclang/lib/Headers/__clang_hip_cmath.h
The file was modifiedclang/lib/Headers/openmp_wrappers/math.h
The file was modifiedclang/lib/Headers/openmp_wrappers/__clang_openmp_device_functions.h
The file was removedclang/test/Headers/Inputs/include/algorithm
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedclang/lib/Headers/openmp_wrappers/cmath
The file was removedclang/test/Headers/amdgcn_openmp_device_math.c
The file was removedclang/test/Headers/Inputs/include/utility
The file was modifiedclang/lib/Headers/__clang_hip_math.h
The file was modifiedclang/test/Headers/openmp_device_math_isnan.cpp
Commit 345ace026b6e5cdbc38d207291e4b399d72e62ee by walter erquinigo
[trace] [intel pt] Create a "thread trace dump stats" command

When the user types that command 'thread trace dump info' and there's a running Trace session in LLDB, a raw trace in bytes should be printed; the command 'thread trace dump info all' should print the info for all the threads.

Original Author: hanbingwang

Reviewed By: clayborg, wallace

Differential Revision: https://reviews.llvm.org/D105717
The file was modifiedlldb/source/Commands/CommandObjectThread.cpp
The file was modifiedlldb/source/Plugins/Trace/intel-pt/DecodedThread.cpp
The file was modifiedlldb/source/Plugins/Trace/intel-pt/DecodedThread.h
The file was modifiedlldb/source/Plugins/Trace/intel-pt/TraceIntelPT.cpp
The file was modifiedlldb/source/Plugins/Trace/intel-pt/IntelPTDecoder.cpp
The file was addedlldb/test/API/commands/trace/TestTraceDumpInfo.py
The file was modifiedlldb/source/Commands/Options.td
The file was modifiedlldb/source/Plugins/Trace/intel-pt/TraceIntelPT.h
The file was modifiedlldb/include/lldb/Target/Trace.h
The file was modifiedlldb/test/API/commands/trace/TestTraceLoad.py
Commit 5a682d9b9109494cb46e16b493cf4afc5e25e598 by georgakoudis1
[OpenMP] Expose libomptarget function to get HW thread id

The patch exposes the libomptarget runtime function that gets the hardware thread id through the kmpc API. This is to be used in SPMDization for checking the thread id to execute regions by a single thread in a block.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D106323
The file was modifiedllvm/include/llvm/Frontend/OpenMP/OMPKinds.def
The file was modifiedopenmp/libomptarget/deviceRTLs/common/debug.h
The file was modifiedopenmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu
The file was modifiedopenmp/libomptarget/deviceRTLs/common/omptargeti.h
The file was modifiedopenmp/libomptarget/deviceRTLs/common/src/parallel.cu
The file was modifiedopenmp/libomptarget/deviceRTLs/common/src/reduction.cu
The file was modifiedopenmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.hip
The file was modifiedopenmp/libomptarget/deviceRTLs/common/src/libcall.cu
The file was modifiedopenmp/libomptarget/deviceRTLs/common/src/support.cu
The file was modifiedopenmp/libomptarget/deviceRTLs/common/src/omptarget.cu
The file was modifiedopenmp/libomptarget/deviceRTLs/common/src/data_sharing.cu
The file was modifiedopenmp/libomptarget/deviceRTLs/target_interface.h
Commit b0e06e1fc0041d7d49af0a2339a4651445b2effc by georgakoudis1
[Attributor][NFC] Modify isAssumedHeapToStack for const argument

There is no need for a non-const argument interface and the const argument modification covers existing and upcoming use cases.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D106418
The file was modifiedllvm/lib/Transforms/IPO/AttributorAttributes.cpp
The file was modifiedllvm/include/llvm/Transforms/IPO/Attributor.h
Commit c030ba2fc8f14e3646c776fe383494b8cec41ab5 by jpienaar
[mlir] Add alias for input to shaped type op interface

Range type that allows for wrapping different value & shape ranges with
correspondence to Shape's ValueShape type - initially aliased to
ValueRange (which corresponds to the trivial mapping from a ShapedType's
Value's shape to shape). Just plain alias, before expanding.

Differential Revision: https://reviews.llvm.org/D99133
The file was modifiedmlir/include/mlir/Interfaces/InferTypeOpInterface.td
The file was modifiedmlir/include/mlir/Interfaces/InferTypeOpInterface.h
Commit 6ba493d81b07c814ac9332bb93ba8a01565020a7 by muiez
[SystemZ][z/OS][libcxx]: add the missing comment for patch D106153 and D106151

This patch is to add the missing comments in https://reviews.llvm.org/D106153 and https://reviews.llvm.org/D106151 to address comments.

Differential Revision: https://reviews.llvm.org/D106404
The file was modifiedlibcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_length.pass.cpp
The file was modifiedlibcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_in.pass.cpp
The file was modifiedlibcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_out.pass.cpp
The file was modifiedlibcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_in.pass.cpp
The file was modifiedlibcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_length.pass.cpp
The file was modifiedlibcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_out.pass.cpp
Commit f984ac2715f71c38a7872fa2c2ad535b3d4fa285 by gulfem
[profile] Add binary id into profiles

This patch adds binary id into profiles to easily associate binaries
with the corresponding profiles. There is an RFC that discusses
the motivation, design and implementation in more detail:
https://lists.llvm.org/pipermail/llvm-dev/2021-June/151154.html

Differential Revision: https://reviews.llvm.org/D102039
The file was modifiedllvm/include/llvm/ProfileData/InstrProfReader.h
The file was modifiedcompiler-rt/include/profile/InstrProfData.inc
The file was addedcompiler-rt/test/profile/binary-id.c
The file was modifiedllvm/test/tools/llvm-profdata/raw-32-bits-be.test
The file was modifiedcompiler-rt/lib/profile/InstrProfilingPlatformLinux.c
The file was modifiedllvm/test/tools/llvm-profdata/raw-two-profiles.test
The file was modifiedllvm/include/llvm/ProfileData/InstrProfData.inc
The file was modifiedcompiler-rt/lib/profile/InstrProfilingInternal.c
The file was modifiedcompiler-rt/lib/profile/InstrProfilingInternal.h
The file was modifiedllvm/tools/llvm-profdata/llvm-profdata.cpp
The file was modifiedcompiler-rt/test/profile/Linux/corrupted-profile.c
The file was modifiedllvm/include/llvm/ProfileData/InstrProf.h
The file was modifiedllvm/test/tools/llvm-profdata/malformed-ptr-to-counter-array.test
The file was modifiedllvm/lib/ProfileData/InstrProfReader.cpp
The file was modifiedllvm/test/tools/llvm-profdata/raw-64-bits-be.test
The file was modifiedllvm/test/tools/llvm-profdata/Inputs/c-general.profraw
The file was modifiedllvm/test/tools/llvm-profdata/c-general.test
The file was modifiedllvm/test/tools/llvm-profdata/raw-32-bits-le.test
The file was modifiedllvm/test/tools/llvm-profdata/raw-64-bits-le.test
The file was modifiedllvm/test/tools/llvm-profdata/Inputs/compressed.profraw
The file was modifiedcompiler-rt/lib/profile/InstrProfilingWriter.c
Commit 0ca46a1757cdb3dd3b38bef077b45171a2dc3592 by efriedma
[SelectionDAG] Fix the representation of ISD::STEP_VECTOR.

The existing rule about the operand type is strange.  Instead, just say
the operand is a TargetConstant with the right width.  (Legalization
ignores TargetConstants, so it doesn't matter if that width is legal.)

Highlights:

1. I had to substantially rewrite the AArch64 isel patterns to expect a
TargetConstant.  Nothing too exotic, but maybe a little hairy. Maybe
worth considering a target-specific node with some dagcombines instead
of this complicated nest of isel patterns.
2. Our behavior on RV32 for vectors of i64 has changed slightly. In
particular, we correctly preserve the width of the arithmetic through
legalization.  This changes the DAG a bit. Maybe room for
improvement here.
3. I explicitly defined the behavior around overflow. This is necessary
to make the DAGCombine transforms legal, and I don't think it causes any
practical issues.

Differential Revision: https://reviews.llvm.org/D105673
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/stepvector.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/include/llvm/CodeGen/ISDOpcodes.h
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
The file was modifiedllvm/lib/Target/AArch64/SVEInstrFormats.td
The file was modifiedllvm/include/llvm/CodeGen/SelectionDAG.h
Commit 467c7191249b76abff33853b1692a77f327c2422 by gulfem
[profile] Change linkage type of a compiler-rt func

This patch changes the linkage type of a compiler-rt func
(__llvm_write_binary_ids) to fix the sanitizer-windows bot
build issue introduced in change f984ac271.

The issue is as the following:
C:\b\slave\sanitizer-windows\llvm-project\compiler-rt\lib\profile\InstrProfilingInternal.h(201):
error C2496: '__llvm_write_binary_ids': 'selectany' can only be applied
to data items with external linkage
The file was modifiedcompiler-rt/lib/profile/InstrProfilingPlatformLinux.c
The file was modifiedcompiler-rt/lib/profile/InstrProfilingInternal.c
The file was modifiedcompiler-rt/lib/profile/InstrProfilingInternal.h
Commit 3f71b425b20838d972151aa65a355b489caf4d8e by georgakoudis1
[Attributor] Preserve BBs and instructions added in AA manifests

Manifesting AbstractAttributes may add new BBs in the IR. This patch provides an interface to register those BBs in the Attributor so that those BBs and containing instructions are not deleted as dead.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D106383
The file was modifiedllvm/lib/Transforms/IPO/Attributor.cpp
The file was modifiedllvm/lib/Transforms/IPO/OpenMPOpt.cpp
The file was modifiedllvm/include/llvm/Transforms/IPO/Attributor.h
Commit 301b21a941ebd94cef2f1912a547960223983887 by efriedma
[AArch64] Regenerate and add more tests for i128 atomics.

Generating these tests unfortunately means a lot of junk, but it's hard
to write/update these tests by hand.

Added tests focus on atomic orderings for cmpxchg.

Actually writing out these tests showed some potentially dubious
results; we should probably consider using casp for 128-bit atomic
load/store/rmw.
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic-128.ll
The file was modifiedllvm/test/CodeGen/AArch64/arm64-atomic-128.ll
Commit eb26ba9da8aeab8ecc1209034912f9f12a945128 by Alex Lorenz
[clang][darwin] add support for remapping macOS availability to Mac Catalyst availability

This commit adds supports for clang to remap macOS availability attributes that have introduced,
deprecated or obsoleted versions to appropriate Mac Catalyst availability attributes. This
mapping is done using the version mapping provided in the macOS SDK, in the SDKSettings.json file.
The mappings in the SDKSettings json file will also be used in the clang driver for the driver
Mac Catalyst patch, and they could also be used in the future for other platforms as well.

Differential Revision: https://reviews.llvm.org/D105257
The file was modifiedclang/test/Driver/Inputs/MacOSX10.14.sdk/SDKSettings.json
The file was modifiedclang/lib/Sema/SemaDeclAttr.cpp
The file was modifiedclang/test/Driver/Inputs/WatchOS6.0.sdk/SDKSettings.json
The file was addedclang/test/Sema/Inputs/MacOSX11.0.sdk/SDKSettings.json
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/test/Driver/Inputs/iPhoneOS13.0.sdk/SDKSettings.json
The file was addedclang/test/Sema/attr-availability-iosmac-infer-from-macos-no-sdk-settings.c
The file was addedclang/test/Sema/attr-availability-iosmac-infer-from-macos.c
The file was modifiedclang/test/Sema/attr-availability-maccatalyst.c
The file was modifiedclang/lib/Basic/DarwinSDKInfo.cpp
The file was modifiedclang/lib/Sema/Sema.cpp
Commit 8d65bf13b80d87a40b6f5e29b270e5cd7fc3b8d5 by Jon Roelofs
[Sanitizers][darwin] Fix a -Wcast-qual
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_mac.cpp
Commit fd895bc81ba7579eecd2234093aaa2ed2393c466 by gulfem
Revert "[profile] Add binary id into profiles"

Revert "[profile] Change linkage type of a compiler-rt func"
This reverts commits f984ac2715f71c38a7872fa2c2ad535b3d4fa285 and
467c7191249b76abff33853b1692a77f327c2422 because it broke some builds.
The file was modifiedcompiler-rt/lib/profile/InstrProfilingInternal.c
The file was modifiedcompiler-rt/lib/profile/InstrProfilingWriter.c
The file was modifiedllvm/include/llvm/ProfileData/InstrProfReader.h
The file was modifiedllvm/test/tools/llvm-profdata/raw-32-bits-be.test
The file was modifiedllvm/test/tools/llvm-profdata/raw-64-bits-be.test
The file was modifiedllvm/test/tools/llvm-profdata/raw-64-bits-le.test
The file was modifiedcompiler-rt/lib/profile/InstrProfilingInternal.h
The file was modifiedllvm/test/tools/llvm-profdata/malformed-ptr-to-counter-array.test
The file was modifiedcompiler-rt/test/profile/Linux/corrupted-profile.c
The file was modifiedllvm/tools/llvm-profdata/llvm-profdata.cpp
The file was modifiedllvm/test/tools/llvm-profdata/Inputs/compressed.profraw
The file was modifiedllvm/test/tools/llvm-profdata/raw-two-profiles.test
The file was modifiedllvm/include/llvm/ProfileData/InstrProfData.inc
The file was modifiedcompiler-rt/include/profile/InstrProfData.inc
The file was modifiedllvm/test/tools/llvm-profdata/Inputs/c-general.profraw
The file was modifiedcompiler-rt/lib/profile/InstrProfilingPlatformLinux.c
The file was modifiedllvm/test/tools/llvm-profdata/raw-32-bits-le.test
The file was modifiedllvm/lib/ProfileData/InstrProfReader.cpp
The file was modifiedllvm/test/tools/llvm-profdata/c-general.test
The file was removedcompiler-rt/test/profile/binary-id.c
The file was modifiedllvm/include/llvm/ProfileData/InstrProf.h
Commit db5f100fe4ca252d7f392659e7da5dba10331ae7 by Yaxun.Liu
[HIP] Remove workaround in __clang_hip_runtime_wrapper.h

Remove the workaround for -fopenmp in __clang_hip_runtime_wrapper.h
since it causes device functions in HIP wrapper headers disabled when
compiling HIP program with -fopenmp.

Reviewed by: Aaron Enye Shi, Jon Chesterfield

Differential Revision: https://reviews.llvm.org/D106070
The file was modifiedclang/lib/Headers/__clang_hip_runtime_wrapper.h
Commit f14495dc75d72d8900b3f4056a36a1ba5063e957 by spatel
[SROA] avoid crash on memset with constant expression length

https://llvm.org/PR50888
The file was modifiedllvm/lib/Transforms/Scalar/SROA.cpp
The file was modifiedllvm/test/Transforms/SROA/slice-width.ll
Commit a467c085707c7b0b3110c21fa35ee8ddde73426e by craig.topper
[RISCV] Cleanup comment around vector tail policy handling. NFC

vmv.x.s and reductions don't ignore tail policy anymore.
The file was modifiedllvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
Commit a397c1c82f1c49106d1459c8f755e4a52743b882 by Stanislav.Mekhanoshin
[AMDGPU] Tune perfhint analysis to account access width

A function with less memory instructions but wider access
is the same as a function with more but narrower accesses
in terms of memory boundness. In fact the pass would give
different answers before and after vectorization without
this change.

Differential Revision: https://reviews.llvm.org/D105651
The file was modifiedllvm/test/CodeGen/AMDGPU/perfhint.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.h
Commit 9643d11e1d7f918c0e5184c9488935720d591c90 by Alex Lorenz
[clang][sema] NFC, include DarwinSDKInfo header instead of using the forward reference

This fixes a build issue with an older libc++ on some bots: clang-cmake-x86_64-avx2-linux and clang-ppc64be-linux
The file was modifiedclang/include/clang/Sema/Sema.h
Commit 326a5a2658d81db46a78b184fe42e522ef170f32 by rjmccall
Fix a bug in OptimizedStructLayout when filling gaps before
fixed fields with highly-aligned flexible fields.

The code was not considering the possibility that aligning
the current offset to the alignment of a queue might push
us past the end of the gap.  Subtracting the offsets to
figure out the maximum field size for the gap then overflowed,
making us think that we had nearly unbounded space to fill.

Fixes PR 51131.
The file was modifiedllvm/unittests/Support/OptimizedStructLayoutTest.cpp
The file was modifiedllvm/lib/Support/OptimizedStructLayout.cpp
Commit 4e52a04833fb352090498d6d1c013a2c61d75e53 by douglas.yung
Change requires line from arm to aarch64 since the test uses arm64_32 which is AArch64.
The file was modifiedlld/test/MachO/bind-opcodes.s
Commit d0af732bd00c0390fbcc6f900e8a59eb3954106c by Jessica Paquette
[AArch64][GlobalISel] Widen s2 and s4 G_IMPLICIT_DEF + G_FREEZE

These had

```
.clampScalar(0, s1, 64)
.widenScalarToNextPow2(0, 8)
```

If you have s2 or s4, then `widenScalarToNextPow2` does nothing.

This changes the `widenScalarToNextPow2` rule to use s8 as the minimum type
instead, allowing us to correctly widen s2 and s4.

This does not impact s1, since it's marked as legal already.

Differential Revision: https://reviews.llvm.org/D106413
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-freeze.mir
Commit d01b34ed31467073bd1a0f0040da4d74db20475e by Stanislav.Mekhanoshin
[AMDGPU] Move perfhint analysis

This is SCC pass, moving it to the end of SCC PM saves one
Function PM. This needs the analysis to take into account
memory access width since it is now places after the
load/store optimizer (D105651).

Differential Revision: https://reviews.llvm.org/D105652
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/llc-pipeline.ll
Commit a8f1ec5d6710c2b2c25eadccf58f010a2f2334c0 by nikita.ppv
[SimplifyCFG] Regenerate test checks (NFC)
The file was modifiedllvm/test/Transforms/SimplifyCFG/speculate-store.ll
Commit aa5adc0c1cd011c4861b609c0cf0db3221289810 by nikita.ppv
[SimplifyCFG] Fix if conversion with opaque pointers

We need to make sure that the value types are the same. Otherwise
we both may not have the necessary dereferenceability implication,
nor can we directly form the desired select pattern.

Without opaque pointers this is enforced implicitly through the
pointer comparison.
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
The file was modifiedllvm/test/Transforms/SimplifyCFG/speculate-store.ll
Commit 8e6b31c3952b366fc3fa0da8e3df7fc09fa65b05 by apl
[LLDB] Move Trace-specific classes into separate library

These two classes, TraceSessionFileParser and ThreadPostMortemTrace,
seem to be useful primarily for tracing. Currently it looks like
intel-pt is the sole user of these, but that other tracing plugins could
be written in the future that take advantage of these. Unfortunately
with them in Target, there is a dependency on PluginProcessUtility. I'd
like to sever that dependency, so I moved them into a `TraceCommon`
plugin.

Differential Revision: https://reviews.llvm.org/D105649
The file was modifiedlldb/include/lldb/lldb-forward.h
The file was removedlldb/include/lldb/Target/ThreadPostMortemTrace.h
The file was modifiedlldb/source/Target/CMakeLists.txt
The file was addedlldb/source/Plugins/Trace/common/ThreadPostMortemTrace.cpp
The file was addedlldb/source/Plugins/Trace/common/TraceSessionFileParser.cpp
The file was addedlldb/source/Plugins/Trace/common/TraceSessionFileParser.h
The file was modifiedlldb/source/Plugins/Trace/CMakeLists.txt
The file was modifiedlldb/source/Target/Trace.cpp
The file was addedlldb/source/Plugins/Trace/common/ThreadPostMortemTrace.h
The file was removedlldb/source/Target/ThreadPostMortemTrace.cpp
The file was removedlldb/source/Target/TraceSessionFileParser.cpp
The file was removedlldb/include/lldb/Target/TraceSessionFileParser.h
The file was addedlldb/source/Plugins/Trace/common/CMakeLists.txt
The file was modifiedlldb/source/Plugins/Trace/intel-pt/CMakeLists.txt
Commit 7898e7c82d98fabc8c87a5b7b4a4f7786df69314 by psteinfeld
[flang] Implement the runtime portion of the CSHIFT intrinsic

This change fixes a bug in  the runtime portion of the CSHIFT intrinsic
that happens when the value of the SHIFT argument is negative.

Differential Revision: https://reviews.llvm.org/D106292
The file was modifiedflang/runtime/transformational.cpp
The file was modifiedflang/unittests/RuntimeGTest/Transformational.cpp
Commit 7b789562244ee941b7bf2cefeb3fc08a59a01865 by i
[sanitizer] Place module_ctor/module_dtor in llvm.used

This removes an abuse of ELF linker behaviors while keeping Mach-O/COFF linker
behaviors unchanged.

ELF: when module_ctor is in a comdat, this patch removes reliance on a linker
abuse (an SHT_INIT_ARRAY in a section group retains the whole group) by using
SHF_GNU_RETAIN. No linker behavior difference when module_ctor is not in a comdat.

Mach-O: module_ctor gets `N_NO_DEAD_STRIP`. No linker behavior difference
because module_ctor is already referenced by a `S_MOD_INIT_FUNC_POINTERS`
section (GC root).

PE/COFF: no-op. SanitizerCoverage already appends module_ctor to `llvm.used`.
Other sanitizers: llvm.used for local linkage is not implemented in
`TargetLoweringObjectFileCOFF::emitLinkerDirectives` (once implemented or
switched to a non-local linkage, COFF can use module_ctor in comdat (i.e.
generalize ELF-specific rL301586)).

There is no object file size difference.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D106246
The file was modifiedllvm/test/Instrumentation/HWAddressSanitizer/basic.ll
The file was modifiedllvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
The file was modifiedllvm/lib/Transforms/Utils/ModuleUtils.cpp
The file was modifiedllvm/test/Instrumentation/AddressSanitizer/instrument_global.ll
The file was modifiedllvm/test/Instrumentation/MemorySanitizer/msan_basic.ll
The file was modifiedllvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
The file was modifiedllvm/test/Instrumentation/SanitizerCoverage/inline-bool-flag.ll
The file was modifiedllvm/test/Instrumentation/SanitizerCoverage/trace-pc-guard.ll
The file was modifiedllvm/test/Instrumentation/AddressSanitizer/basic.ll
The file was modifiedllvm/test/Instrumentation/HeapProfiler/basic.ll
The file was modifiedllvm/test/Instrumentation/ThreadSanitizer/tsan_basic.ll
Commit 4eb24817ec24970e9ccdb50c9ed7623181611c14 by Stanislav.Mekhanoshin
[AMDGPU] Mark all relevant VOP1 instructions rematerializable

Differential Revision: https://reviews.llvm.org/D105919
The file was modifiedllvm/test/CodeGen/AMDGPU/remat-vop.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/VOP1Instructions.td
Commit 29af527c86825e420a75d66c236f2a04f19eb2fe by walter erquinigo
[intel pt] fix builds

https://reviews.llvm.org/D105649 broke intel pt builds. Fortunately the
fix is super easy.
The file was modifiedlldb/source/Plugins/Trace/intel-pt/TraceIntelPTSessionFileParser.h
The file was modifiedlldb/source/Plugins/Trace/intel-pt/TraceIntelPTSessionFileParser.cpp
The file was modifiedlldb/source/Plugins/Trace/intel-pt/TraceIntelPT.cpp
The file was modifiedlldb/source/Plugins/Trace/intel-pt/IntelPTDecoder.cpp
Commit ba42f6a4b536221cf0f5f62357d1329184691a89 by david.green
[ARM] Pass SelectionDAG to methods that dont require DCI. NFC

In these methods DCI is never used, only the DAG from it. Pass the DAG
directly, cleaning up the code a little.
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
Commit 635288d215b1147e624cf37f9c5f66ae35c15b74 by isanbard
[llvm-diff] Check for recursive initialiers

We need to check for recursive initializers in the "ConstantStruct"
case.

Differential Revision: https://reviews.llvm.org/D105616
The file was modifiedllvm/test/tools/llvm-diff/initializers.ll
The file was modifiedllvm/tools/llvm-diff/DifferenceEngine.cpp
Commit 9625ca5b602616b2f5584e8a49ba93c52c141e40 by Stanislav.Mekhanoshin
[AMDGPU] Mark relevant rematerializable VOP2 instructions

Differential Revision: https://reviews.llvm.org/D106023
The file was modifiedllvm/test/CodeGen/AMDGPU/remat-vop.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/VOP2Instructions.td
Commit 9a72580a548da8008dca479ec50e4eb75e56db71 by cjdb
[clang][Sema] removes -Wfree-nonheap-object reference param false positive

Taking the address of a reference parameter might be valid, and without
CFA, false positives are going to be more trouble than they're worth.

Differential Revision: https://reviews.llvm.org/D102728
The file was modifiedclang/lib/Sema/SemaChecking.cpp
The file was modifiedclang/test/Sema/warn-free-nonheap-object.cpp
Commit 0082764605cc0e7e0363a41ffa77d214c3157aa6 by cjdb
Revert "Add workaround for false positive in -Wfree-nonheap-object"

This reverts commit 499571ea835daf786626a0db1e12f890b6cd8f8d.
The file was modifiedmlir/lib/IR/OperationSupport.cpp
Commit 74fd3cb8cd3ea41219d522412f4408d9993352ef by cjdb
[libcxx][ranges] implements dangling, borrowed_iterator_t, borrowed_subrange_t

* Implements part of P0896 'The One Ranges Proposal'
* Implements http://wg21.link/range.dangling

Reviewed By: zoecarver

Differential Revision: https://reviews.llvm.org/D105205
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/ranges/dangling.module.verify.cpp
The file was modifiedlibcxx/include/__ranges/subrange.h
The file was modifiedlibcxx/include/module.modulemap
The file was addedlibcxx/test/std/ranges/range.utility/range.dangling/dangling.pass.cpp
The file was addedlibcxx/include/__ranges/dangling.h
The file was addedlibcxx/test/std/ranges/range.utility/range.dangling/borrowed_iterator.compile.pass.cpp
The file was addedlibcxx/test/std/ranges/range.utility/range.dangling/borrowed_subrange.compile.pass.cpp
The file was modifiedlibcxx/include/CMakeLists.txt
The file was modifiedlibcxx/docs/Status/RangesPaper.csv
The file was modifiedlibcxx/include/ranges
Commit c93dc2597a587bc4caedc20f3829501f88cca288 by gclayton
[LLDB][GUI] Add Process Plugin Field

This patch adds a new Process Plugin Field. It is a choices field that
lists all the available process plugins and can retrieve the name of the
selected plugin or an empty string if the default is selected.

The Attach form now uses that field instead of manually creating a
choices field.

Reviewed By: clayborg

Differential Revision: https://reviews.llvm.org/D106467
The file was modifiedlldb/source/Core/IOHandlerCursesGUI.cpp
Commit 9ef7de7c819d39eaa4176d046083bf585c9274b0 by gclayton
[LLDB][GUI] Add required property to text fields

This patch adds a required property to text fields and their
derivatives. Additionally, the Process Name and PID fields in the attach
form were marked as required.

Differential Revision: https://reviews.llvm.org/D106458
The file was modifiedlldb/source/Core/IOHandlerCursesGUI.cpp
Commit fe197ef9f158009f72733511c91303b6d013873f by Stanislav.Mekhanoshin
[AMDGPU] Mark relevant rematerializable VOP3 instructions

Differential Revision: https://reviews.llvm.org/D106110
The file was modifiedllvm/lib/Target/AMDGPU/VOP3Instructions.td
The file was modifiedllvm/test/CodeGen/AMDGPU/subreg-split-live-in-error.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/remat-vop.mir
Commit e2000f276150bb680d5b53e19e6f08dcbaeb1352 by llvmgnsyncbot
[gn build] Port 74fd3cb8cd3e
The file was modifiedllvm/utils/gn/secondary/libcxx/include/BUILD.gn
Commit c75a2bbe080c8ff2a62286e816dfde914f1ae1f6 by Jessica Paquette
[AArch64][GlobalISel] Change | -> || in an if

I wrote the wrong type of OR by mistake.
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
Commit a664c14001fa2359604527084c91d0864aa131a4 by joker.eph
[mlir][LLVM] Revert bareptr calling convention handling as an argument materialization.

Type conversion and argument materialization are context-free: there is no available information on which op / branch is currently being converted.
As a consequence, bare ptr convention cannot be handled as an argument materialization: it would apply irrespectively of the parent op.
This doesn't typecheck in the case of non-funcOp and we would see cases where a memref descriptor would be inserted in place of the pointer in another memref descriptor.

For now the proper behavior is to revert to a specific BarePtrFunc implementation and drop the blanket argument materialization logic.

This reverts the relevant piece of the conversion to LLVM to what it was before https://reviews.llvm.org/D105880 and adds a relevant test and documentation to avoid the mistake by whomever attempts this again in the future.

Reviewed By: arpith-jacob

Differential Revision: https://reviews.llvm.org/D106495
The file was modifiedmlir/lib/Conversion/LLVMCommon/TypeConverter.cpp
The file was modifiedmlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp
The file was modifiedmlir/test/Conversion/StandardToLLVM/func-memref.mlir
Commit c54c76037b9d7e611fc3c2955b2b9a7934fbb957 by Stanislav.Mekhanoshin
Prevent dead uses in register coalescer after rematerialization

The coalescer does not check if register uses are available
at the point of rematerialization. If it attempts to rematerialize
an instruction with such uses it can end up with use without a def.

LiveRangeEdit does such check during rematerialization, so just
call LiveRangeEdit::allUsesAvailableAt() to avoid the problem.

Differential Revision: https://reviews.llvm.org/D106396
The file was modifiedllvm/lib/CodeGen/RegisterCoalescer.cpp
The file was modifiedllvm/include/llvm/CodeGen/LiveRangeEdit.h
The file was addedllvm/test/CodeGen/AMDGPU/coalescer-remat-dead-use.mir
Commit 5a8a159bf5279455b4688f80a6864ca8f37f4b4e by joker.eph
Add verifier for insert/extract element/value on type match between container and inserted/extracted value, and fix vector.shuffle lowering

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D106398
The file was modifiedmlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
The file was modifiedmlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
The file was modifiedmlir/test/Dialect/LLVMIR/invalid.mlir
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
Commit e7fe4433f822fc224b14c9988268f71aeb4d37f9 by John.Ericson
Remove `LIBC_INSTALL_PREFIX`

This matches the decision made in D99697.

It also shouldn't reintroduce the issue fixed in D99636.

The variable was originally introduced in
b22f448c21e718a3b6219df89169f38d436189c6 but is not essential to that
change.

Once we finish adding `GnuInstallDirs` support in D100810 and D99484,
setting `CMAKE_INSTALL_LIBDIR` would also work to change the
installation directory (though for more than libc).

`GnuInstallDirs` support also brings up an issue which is avoided if
variables like `LIBC_INSTALL_PREFIX` don't exist. Because the
`GnuInstallDirs` variables can be absolute paths, it is a bit unclear
how the per-project prefixes would work: does the project-agnostic
role-specific variable (e.g. `CMAKE_INSTALL_LIBDIR`), or project-specfic
role-agnostic (e.g. `LIBC_INSTALL_PREFIX`) take priority? Each is more
specific than the other on one axis, but not the other.

Reviewed By: phosek

Differential Revision: https://reviews.llvm.org/D105740
The file was modifiedlibc/CMakeLists.txt
The file was modifiedlibc/lib/CMakeLists.txt
Commit db7efcab7dd9c969179a86fb27149743a0f1f491 by tlively
[WebAssembly] Remove clang builtins for extract_lane and replace_lane

These builtins were added to capture the fact that the underlying Wasm
instructions return i32s and implicitly sign or zero extend the extracted lanes
in the case of the i8x16 and i16x8 variants. But we do sufficient optimizations
during code gen that these low-level details do not need to be exposed to users.

This commit replaces the use of the builtins in wasm_simd128.h with normal
target-independent vector code. As a result, we can switch the relevant
intrinsics to use functions rather than macros and can use more user-friendly
return types rather than trying to precisely expose the underlying Wasm types.
Note, however, that the generated LLVM IR is no different after this change.

Differential Revision: https://reviews.llvm.org/D106500
The file was modifiedclang/include/clang/Basic/BuiltinsWebAssembly.def
The file was modifiedclang/lib/Headers/wasm_simd128.h
The file was modifiedclang/test/CodeGen/builtins-wasm.c
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
Commit bcf6f641acdbeb208ea07a9e8ded37cd5b796d26 by i
[mlir] Add workaround for false positive in -Wfree-nonheap-object

Restore 499571ea835daf786626a0db1e12f890b6cd8f8d
reverted by 0082764605cc0e7e0363a41ffa77d214c3157aa6.

A compiler slightly older than
"[clang][Sema] removes -Wfree-nonheap-object reference param false positive"
may report the false positive.
We need to retain the workaround a bit longer so that such compilers
can be used to compile MLIR in a warning-free way.
The file was modifiedmlir/lib/IR/OperationSupport.cpp
Commit 8af333cf1a77f72ed3ccf14afa96a4f8f12e40c4 by tlively
[WebAssembly] Replace @llvm.wasm.popcnt with @llvm.ctpop.v16i8

Use the standard target-independent intrinsic to take advantage of standard
optimizations.

Differential Revision: https://reviews.llvm.org/D106506
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
The file was modifiedllvm/include/llvm/IR/IntrinsicsWebAssembly.td
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
The file was modifiedllvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
The file was modifiedclang/test/CodeGen/builtins-wasm.c
The file was modifiedllvm/test/CodeGen/WebAssembly/simd-unsupported.ll
The file was modifiedclang/test/Headers/wasm.c
Commit 6b2a96285b9bbe92d2c5e21830f21458f8be976d by Lang Hames
Re-re-apply "[ORC][ORC-RT] Add initial native-TLV support to MachOPlatform."

This reapplies commit a7733e9556b5a6334c910f88bcd037e84e17e3fc ("Re-apply
[ORC][ORC-RT] Add initial native-TLV support to MachOPlatform."), and
d4abdefc998a1ee19d5edc79ec233774cbf64f6a ("[ORC-RT] Rename macho_tlv.x86-64.s
to macho_tlv.x86-64.S (uppercase suffix)").

These patches were reverted in 48aa82cacbff10e1c5395a03f86488bf449ba4da while I
investigated bot failures (e.g.
https://lab.llvm.org/buildbot/#/builders/109/builds/18981). The fix was to
disable building of the ORC runtime on buliders using ccache (which is the same
fix used for other compiler-rt projects containing assembly code). This fix was
commited to llvm-zorg in 490633945677656ba75d42ff1ca9d4a400b7b243.
The file was addedcompiler-rt/lib/orc/macho_tlv.x86-64.S
The file was modifiedllvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
The file was addedcompiler-rt/test/orc/TestCases/Darwin/x86-64/trivial-tlv.S
The file was modifiedcompiler-rt/lib/orc/CMakeLists.txt
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/MachOPlatform.h
The file was modifiedllvm/lib/ExecutionEngine/JITLink/MachO_x86_64.cpp
The file was modifiedcompiler-rt/lib/orc/macho_platform.cpp
The file was modifiedcompiler-rt/lib/orc/macho_platform.h
Commit cfc4def85df51aa70c7168711de3591ec0169d60 by jacobhegna
[NFC] Code cleanups in InlineCost.cpp.

- annotate const functions with "const"
- replace C-style casts with static_cast

Differential Revision: https://reviews.llvm.org/D105362
The file was modifiedllvm/lib/Analysis/InlineCost.cpp
Commit 049cfc464d1718c5cd97fa8a8ddf0fc36e101f98 by hedingarcia
[libc] Rename FEnv.h and refactor subsequent files

Because Windows's pathnames are not case sensitive,
to avoid include conflicts between our header file FEnv.h and the
one from the C Standard library, <fenv.h>, the prior file was renamed.
The motive for the relabel came to fix this include error in
TestHelpers.cpp since a conflict arose with a file in the same
directory when #include <fenv.h> was being used.

Reviewed By: sivachandra, aeubanks

Differential Revision: https://reviews.llvm.org/D106470
The file was modifiedlibc/src/fenv/feholdexcept.cpp
The file was addedlibc/utils/FPUtil/FEnvUtils.h
The file was modifiedlibc/test/src/math/RoundToIntegerTest.h
The file was modifiedlibc/src/fenv/feraiseexcept.cpp
The file was modifiedlibc/test/src/fenv/exception_status_test.cpp
The file was removedlibc/utils/FPUtil/FEnv.h
The file was modifiedlibc/test/src/fenv/feclearexcept_test.cpp
The file was modifiedlibc/src/fenv/fegetenv.cpp
The file was modifiedlibc/src/fenv/fegetround.cpp
The file was modifiedlibc/test/src/fenv/enabled_exceptions_test.cpp
The file was modifiedlibc/test/src/math/RIntTest.h
The file was modifiedlibc/src/fenv/feclearexcept.cpp
The file was modifiedlibc/test/src/fenv/feholdexcept_test.cpp
The file was modifiedlibc/test/src/fenv/feupdateenv_test.cpp
The file was removedlibc/utils/FPUtil/x86_64/FEnv.h
The file was modifiedlibc/src/fenv/fetestexcept.cpp
The file was modifiedlibc/src/fenv/feupdateenv.cpp
The file was modifiedlibc/utils/FPUtil/NearestIntegerOperations.h
The file was removedlibc/utils/FPUtil/aarch64/FEnv.h
The file was modifiedlibc/src/fenv/fesetexceptflag.cpp
The file was modifiedlibc/src/fenv/fegetexceptflag.cpp
The file was modifiedlibc/test/src/fenv/getenv_and_setenv_test.cpp
The file was modifiedlibc/utils/FPUtil/CMakeLists.txt
The file was addedlibc/utils/FPUtil/x86_64/FEnvImpl.h
The file was addedlibc/utils/FPUtil/DummyFEnvImpl.h
The file was modifiedlibc/src/fenv/fesetround.cpp
The file was removedlibc/utils/FPUtil/DummyFEnv.h
The file was modifiedlibc/test/src/fenv/exception_flags_test.cpp
The file was addedlibc/utils/FPUtil/aarch64/FEnvImpl.h
The file was modifiedlibc/src/fenv/fesetenv.cpp
Commit a46c63c878a9e82ac2646926bb3d8237293ad15d by dblaikie
Fix assigned-but-unused (except in an assert) warning with a void cast
The file was modifiedclang-tools-extra/clang-tidy/cppcoreguidelines/OwningMemoryCheck.cpp
Commit 402b681fffaace45c5f181b3b24c2f648bfc766c by Lang Hames
Re-re-revert "[ORC][ORC-RT] Add initial native-TLV support to MachOPlatform."

This reverts commit 6b2a96285b9bbe92d2c5e21830f21458f8be976d.

The ccache builders are still failing. Looks like they need to be updated to
get the llvm-zorg config change in 490633945677656ba75d42ff1ca9d4a400b7b243.

I'll re-apply this as soon as the builders are updated.
The file was modifiedcompiler-rt/lib/orc/macho_platform.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
The file was modifiedcompiler-rt/lib/orc/macho_platform.h
The file was removedcompiler-rt/test/orc/TestCases/Darwin/x86-64/trivial-tlv.S
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/MachOPlatform.h
The file was modifiedllvm/lib/ExecutionEngine/JITLink/MachO_x86_64.cpp
The file was removedcompiler-rt/lib/orc/macho_tlv.x86-64.S
The file was modifiedcompiler-rt/lib/orc/CMakeLists.txt
Commit 754eb1c210d865234292df7a983636e2ff49e2c8 by huberjn
[OpenMP] Change `__kmpc_free_shared` to include the paired allocation size

This patch changes `__kmpc_free_shared` to take an additional argument
corresponding to the associated allocation's size. This makes it easier to
implement the allocator in the runtime.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D106496
The file was modifiedclang/test/OpenMP/nvptx_parallel_codegen.cpp
The file was modifiedllvm/test/Transforms/OpenMP/remove_globalization.ll
The file was modifiedllvm/lib/Analysis/TargetLibraryInfo.cpp
The file was modifiedclang/test/OpenMP/nvptx_teams_codegen.cpp
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
The file was modifiedllvm/unittests/Analysis/TargetLibraryInfoTest.cpp
The file was modifiedclang/test/OpenMP/nvptx_distribute_parallel_generic_mode_codegen.cpp
The file was modifiedclang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_codegen.cpp
The file was modifiedclang/test/OpenMP/nvptx_target_codegen.cpp
The file was modifiedllvm/include/llvm/Analysis/TargetLibraryInfo.def
The file was modifiedclang/test/OpenMP/declare_target_codegen_globalization.cpp
The file was modifiedopenmp/libomptarget/deviceRTLs/interface.h
The file was modifiedclang/test/OpenMP/nvptx_target_parallel_reduction_codegen_tbaa_PR46146.cpp
The file was modifiedllvm/lib/Analysis/MemoryBuiltins.cpp
The file was modifiedllvm/test/Transforms/OpenMP/replace_globalization.ll
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntimeGPU.h
The file was modifiedllvm/include/llvm/Frontend/OpenMP/OMPKinds.def
The file was modifiedclang/test/OpenMP/nvptx_parallel_for_codegen.cpp
The file was modifiedopenmp/libomptarget/deviceRTLs/common/src/data_sharing.cu
The file was modifiedclang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_simd_codegen.cpp
The file was modifiedclang/test/OpenMP/nvptx_teams_reduction_codegen.cpp
The file was modifiedclang/test/OpenMP/nvptx_data_sharing.cpp
The file was modifiedclang/test/OpenMP/nvptx_target_teams_distribute_codegen.cpp
Commit 7d576392644d44a765336f6ebefd45f5db61231e by huberjn
[OpenMP] Add new execution mode for SPMD execution with Generic semantics

Qualified kernels can be transformed from generic-mode to SPMD mode using an
optimization in OpenMPOpt. This patch introduces a new execution mode to
indicate kernels that have been transformed from generic-mode to SPMD-mode.
These kernels have SPMD-mode execution, but need generic-mode semantics for
scheduling the blocks and threads. Without this far too few blocks will be
scheduled for a generic region as SPMD mode expects the trip count to be
divided by the number of threads.

Reviewed By: ggeorgakoudis

Differential Revision: https://reviews.llvm.org/D106460
The file was modifiedopenmp/libomptarget/plugins/cuda/src/rtl.cpp
The file was modifiedllvm/test/Transforms/OpenMP/is_spmd_exec_mode_fold.ll
The file was modifiedllvm/lib/Transforms/IPO/OpenMPOpt.cpp
The file was modifiedllvm/test/Transforms/OpenMP/spmdization.ll
The file was modifiedopenmp/libomptarget/plugins/amdgpu/src/rtl.cpp
Commit 1684012a47f76e210612bdd44a9d57147a90c4a6 by huberjn
[Libomptarget] Introduce new main thread ID runtime function

This patch introduces `__kmpc_is_generic_main_thread_id` which splits the old
comparison into its own runtime function. The purpose of this is so we can fold
this part independently, so when both this and `is_spmd_mode` are folded the
final function will be folded as well.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D106437
The file was modifiedopenmp/libomptarget/deviceRTLs/interface.h
The file was modifiedopenmp/libomptarget/deviceRTLs/common/src/omptarget.cu
The file was modifiedllvm/include/llvm/Frontend/OpenMP/OMPKinds.def
Commit 4a6686042472a6a3f9d6ca7a0d1bb7f46cbbc415 by huberjn
[OpenMP] Add an option to disable function internalization

Function internalization can sometimes occur in situations where we want to
keep the call sites intact. This patch adds an option to disable function
internalization and prevents the device runtime from being internalized while
creating the bitcode library.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D106438
The file was modifiedopenmp/libomptarget/deviceRTLs/nvptx/CMakeLists.txt
The file was modifiedllvm/lib/Transforms/IPO/OpenMPOpt.cpp
The file was modifiedopenmp/libomptarget/deviceRTLs/amdgcn/CMakeLists.txt
Commit 196fe994b8cccd986f4a63530d494cdd04cd04db by huberjn
[OpenMP] Fold `__kmpc_is_generic_main_thread_id` if possible

This patch adds the ability to fold `__kmpc_is_generic_main_thread_id` if we
know for a fact that it is executed by the initial thread using
AAExecutionDomain. This combined with folding `__kmpc_is_spmd_exec_mode` will
allow us to fully fold `__kmpc_is_generic_main_thread`.

Depends on D106438 D106437

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D106439
The file was modifiedllvm/lib/Transforms/IPO/OpenMPOpt.cpp
The file was addedllvm/test/Transforms/OpenMP/fold_generic_main_thread.ll
Commit 16206d17cd9e6b473673204c458e5f20bcc59fb1 by huberjn
[OpenMP] Strip NoInline from known OpenMP runtime functions

This patch strips the NoInline attribute from known OpenMP runtime functions.
This is done so that we can denote certain runtime functions as NoInline to
ensure their call sites are intact so they can be checked by OpenMPOpt. We
don't wan't this noinline attribute to remain for any functions after OpenMPOpt
has been run however.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D106482
The file was modifiedllvm/test/Transforms/OpenMP/add_attributes.ll
The file was modifiedllvm/lib/Transforms/IPO/OpenMPOpt.cpp
Commit 9dcd75f86f2457b31a8eca4fa47f28d2b912dec4 by carl.ritson
[AMDGPU] Allow frontends to disable null export for pixel shaders

Disable null export (for kills) when a frontend defines a pixel
shader as not exporting using amdgpu-color-export and
amdgpu-depth-export function attrbutes.
This allows the generation of export free pixel shaders.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D105683
The file was modifiedllvm/test/CodeGen/AMDGPU/early-term.mir
The file was modifiedllvm/lib/Target/AMDGPU/SILateBranchLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
Commit a9de8f7a5391310ddb310411cbb999d99bfd026d by kai.wang
[Clang][RISCV] Implement vlsseg.

Differential Revision: https://reviews.llvm.org/D103796
The file was addedclang/test/CodeGen/RISCV/rvv-intrinsics/vlsseg.c
The file was addedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vlsseg.c
The file was modifiedclang/include/clang/Basic/riscv_vector.td
Commit 1c55033ea16f208b08606c10c7c185c9598a6c7e by kai.wang
[Clang][RISCV] Implement vloxseg and vluxseg.

Differential Revision: https://reviews.llvm.org/D103809
The file was modifiedclang/include/clang/Basic/riscv_vector.td
The file was addedclang/test/CodeGen/RISCV/rvv-intrinsics/vloxseg.c
Commit e08825b0fc6e816b928542fcd7be2216d52f2c30 by kai.wang
[Clang][RISCV] Add vloxseg and vluxseg test cases.
The file was addedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vloxseg.c
The file was addedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vluxseg.c
The file was addedclang/test/CodeGen/RISCV/rvv-intrinsics/vluxseg.c
Commit d1a401b35b2991fb8490fa4e312fc730077e0d34 by kai.wang
[Clang][RISCV] Implement vsseg.

Differential Revision: https://reviews.llvm.org/D103871
The file was modifiedclang/include/clang/Basic/riscv_vector.td
The file was addedclang/test/CodeGen/RISCV/rvv-intrinsics/vsseg.c
The file was addedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsseg.c
Commit 915e6dc09cd008d15c80b57c4922086184b29f3c by kai.wang
[Clang][RISCV] Implement vssseg.

Differential Revision: https://reviews.llvm.org/D103872
The file was modifiedclang/include/clang/Basic/riscv_vector.td
The file was addedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vssseg.c
The file was addedclang/test/CodeGen/RISCV/rvv-intrinsics/vssseg.c
Commit 698f288fa16ca22e10d11f11f57441940e468908 by kai.wang
[Clang][RISCV] Implement vsoxseg and vsuxseg.

Differential Revision: https://reviews.llvm.org/D103873
The file was modifiedclang/include/clang/Basic/riscv_vector.td
The file was addedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsoxseg.c
The file was addedclang/test/CodeGen/RISCV/rvv-intrinsics/vsoxseg.c
The file was addedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsuxseg.c
The file was addedclang/test/CodeGen/RISCV/rvv-intrinsics/vsuxseg.c
Commit 45cb4140eb13804f9e2f62fc1c91f9a64eb81351 by thomasraoux
[mlir] Extend scf pipeling to support loop carried dependencies

Differential Revision: https://reviews.llvm.org/D106325
The file was modifiedmlir/test/Dialect/SCF/loop-pipelining.mlir
The file was modifiedmlir/lib/Dialect/SCF/Transforms/LoopPipelining.cpp
Commit 6efb3220b47249df0fe0713e1f1e617d8f1000ba by carl.ritson
[AMDGPU] Add VReg_192/VReg_224 support for MIMG instructions

Allow MIMG instructions to be selected with 6/7 VGPRs for vaddr.
Previously these were rounded up to VReg_256 this saves VGPRs.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D103800
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.a16.dim.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/test/MC/AMDGPU/gfx10_asm_mimg.s
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/gfx10_mimg.txt
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.o.dim.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/cluster_stores.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/MIMGInstructions.td
The file was modifiedllvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.o.dim.ll
The file was modifiedllvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.a16.dim.ll
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/mimg_gfx10.txt
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.o.dim.ll
Commit 9e5c5afc7ee24ace168418138c99dcede357cd50 by powerman1st
[RISCV] Optimize multiplication in the zba extension with SH*ADD

This patch make the following optimization.

(mul x, 3 * power_of_2) -> (SLLI (SH1ADD x, x), bits)
(mul x, 5 * power_of_2) -> (SLLI (SH2ADD x, x), bits)
(mul x, 9 * power_of_2) -> (SLLI (SH3ADD x, x), bits)

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D105796
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoB.td
The file was modifiedllvm/test/CodeGen/RISCV/rv64zba.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv32zba.ll
Commit 795e726f5f15a6f07d146255721fe3d392c6a618 by uday
[MLIR] Fix affine.for empty loop body folder

Fix affine.for empty loop body folder in the presence of yield values.
The existing pattern ignored iter_args/yield values and thus crashed
when yield values had uses.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D106121
The file was modifiedmlir/lib/Dialect/Affine/IR/AffineOps.cpp
The file was modifiedmlir/test/Dialect/Affine/canonicalize.mlir
Commit 1dd37975b56eaff210a37e078927f7ea0ffac7ad by rdzhabarov
[mlir] Fix various issues in TimerImpl.

More specifically:
1) Use variable after move.
2) steady_clock needs to be used for measuring time intervals, but not the system_clock.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D106513
The file was modifiedmlir/lib/Support/Timing.cpp
Commit c7781a097878d097bdce2b71a5c9cd18129558ea by johannes
[Attributor][NFC] Clang format
The file was modifiedllvm/lib/Transforms/IPO/AttributorAttributes.cpp
The file was modifiedllvm/include/llvm/Transforms/IPO/Attributor.h
The file was modifiedllvm/lib/Transforms/IPO/Attributor.cpp
Commit c4b1fe05dd62c81077a14750de0b6ae3366747e2 by johannes
[OpenMP][FIX] Use name + type checks not only name checks for calls

A call that is analyzed in an optimization needs to be verified against
the name and type of the runtime function to avoid that we look at
arguments that do not exist (anymore). This can happen if the signature
was rewritten. Since we will not set RFI.Declaration if the type doesn't
match we can use it (if it's not null) to determine if the signature is
as expected.

Differential Revision: https://reviews.llvm.org/D106341
The file was modifiedllvm/lib/Transforms/IPO/OpenMPOpt.cpp
Commit d6d0f913c188dbb1dd9070a93c49171ac8b86ebc by johannes
[Attributor][NFC] Precommit tests exposing a conceptual simplification problem

Value simplification works under the implicit assumption that two SSA
values (`llvm::Value`) that are pointer equal are also equal at runtime.
This is mostly true except for values that are instantiated multiple
times. These test cases expose the problems we currently have when it
comes to recursion and multiple instances of values.
The file was addedllvm/test/Transforms/Attributor/value-simplify-instances.ll
Commit 8d86562e5f1f0bddb0a1e35c46577046530adadb by shihpo.hung
[RegisterCoalescer] Make resolveConflicts aware of earlyclobber

Prior to this patch, it skipped the instruction defining VNI when checking if the tainted lanes are used.
In the given example, VRGATHER is an illegal instruction because its DstReg overlaps with SrcReg.

Therefore we need to check the defining instruction as well when there is an earlyclobber constraint.

Reviewed By: qcolombet

Differential Revision: https://reviews.llvm.org/D105684
The file was modifiedllvm/lib/CodeGen/RegisterCoalescer.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/reg-coalescing.mir

Summary

  1. [ORC-RT] Disable ORC Runtime on ccache builders. (details)
Commit 490633945677656ba75d42ff1ca9d4a400b7b243 by Lang Hames
[ORC-RT] Disable ORC Runtime on ccache builders.

The ORC runtime contains assembly files that don't seem to build correctly
under ccache (e.g. https://lab.llvm.org/buildbot/#/builders/109/builds/18980).
This commit disables the ORC runtime on those builders, which seems to be the
same fix that was adopted for XRay and other compiler-rt libraries that use
assembly.

Differential Revision: https://reviews.llvm.org/D106425
The file was modifiedbuildbot/osuosl/master/config/builders.py