Changes

Summary

  1. [AMDGPU] Fix gcc warnings about unused variables [NFC] (details)
  2. [mlir] Fix build on Windows on Arm (details)
  3. [clang][tooling] NFC: Refactor command-line diagnostic tests (details)
  4. [X86][FP16] Combine the FADD(A, FMA(B, C, 0)) to FMA(B, C, A) (details)
  5. Wrap xar/xar.h include in extern "C" block (details)
  6. [NFC] Wrap MLIR addAffineForOpDomain warning with LLVM_DEBUG (details)
  7. [clangd] Ensure lambda init-capture gets semantic token (details)
  8. [ModuleInlinerWrapperPass] Do some naive printing of wrapped pipeline with -print-pipeline-passes (details)
  9. [DAGCombiner] Rename isAlias as mayAlias. NFC (details)
  10. [TII] Remove the MFI argument to convertToThreeAddress. NFC. (details)
  11. [Driver] Correctly handle static C++ standard library (details)
  12. Revert "[Driver] Correctly handle static C++ standard library" (details)
  13. [libc] Add optimized memset for AArch64 (details)
  14. [InstSimplify] Don't lose inbounds when simplifying a GEP (details)
  15. tsan: remove unnecessary enum values (NFC) (details)
  16. tsan: remove DontDumpShadow from Go build (details)
  17. tsan: add another deep stack test (details)
  18. tsan: use RawShadow instead of u64 more (details)
  19. tsan: move shadow declaration into a separate header file (NFC) (details)
  20. [fir][NFC] inline trival isa_<type> functions (details)
  21. [RISCV][VP] Add support for VP_REDUCE_* operations (details)
  22. [lldb] Fix DomainSocket::GetSocketName for unnamed sockets (details)
  23. [BasicBlockUtils] Fixup of an assumed typo in MergeBlockIntoPredecessor (details)
  24. [CodeGen] RegisterCoalescer::buildVRegToDbgValueMap - use const-ref value in for-range loop. NFCI. (details)
  25. [CodeGen] ProcessSDDbgValues - use const-ref value in for-range loop. NFCI. (details)
  26. [RISCV] Add missing op type OPERAND_UIMM2, OPERAND_UIMM3 and OPERAND_UIMM7 for verifyInstruction (details)
  27. [DSE] Track earliest escape, use for loads in isReadClobber. (details)
  28. tsan: remove expected race leftover (details)
  29. [libc++] Remove uses of _LIBCPP_HAS_NO_VARIABLE_TEMPLATES (details)
  30. [CodeGen] update test file to not run the entire LLVM optimizer; NFC (details)
  31. [gn build] (semi-manually) port 702cb7afe9de (details)
  32. [gn build] (manually) port ac191bcc99e2f (details)
  33. [gn build] Port f4abdb0c074b (details)
  34. [InstCombine] fold cast of right-shift if high bits are not demanded (2nd try) (details)
  35. [CostModel][X86] Increase i64 mul cost from 1 to 2 (details)
  36. clangd: Do not report inline overrides twice (details)
  37. [ORC][examples] Fix segfault in LLJITWithTargetProcessControl (details)
  38. [Sema] Fix a null pointer reference crash. (details)
  39. [AMDGPU] Avoid processing functions in amdgpu-propagate-attributes pass for shaders (details)
  40. Pass some DataLayout arguments by const-ref (details)
  41. Fix buildbot error. (details)
  42. Support: Fix missing whitespace in comment for inconvertibleErrorCode(), NFC (details)
  43. [x86] add AVX run to tests of fcmp logic; NFC (details)
  44. [lldb] [gdb-remote] Refactor getting remote regs to use local vector (details)
  45. [lldb] [gdb-remote] Use local regnos for value_regs/invalidate_regs (details)
  46. [clang] Use portable "#!/usr/bin/env bash" shebang for tools and utils. (details)
  47. [RegAlloc] Cast uint8_t to unsigned before printing it. (details)
  48. [SampleFDO] Remove redundant declarations (NFC) (details)
  49. [PowerPC] Add range checks for P10 Vector Builtins (details)
  50. [libc++] Use CMake interface targets to setup benchmark flags (details)
  51. [LiveIntervals] Fix repairOldRegInRange for simple def cases (details)
  52. Revert "[lldb] [gdb-remote] Use local regnos for value_regs/invalidate_regs" (details)
  53. Revert "[lldb] [gdb-remote] Refactor getting remote regs to use local vector" (details)
  54. Resolve {GlobalValue,GloalIndirectSymol}::getBaseObject confusion (details)
  55. [JumpThreading] Ignore free instructions (details)
  56. [fir][NFC] rename canBePointerOrHeapElementType to cannotBePointerOrHeapElementType (details)
  57. Revert "[LiveIntervals] Fix repairOldRegInRange for simple def cases" (details)
  58. [fir][NFC] Remove fir.cmpf replaced by mlir.cmpf (details)
  59. [ARM] Extra tests for unpredicated qr MVE intrinsics. (details)
  60. [libc++] Remove unused macro in __config (details)
  61. [flang] Implement READ(SIZE=) and INQUIRE(IOLENGTH=) in runtime (details)
  62. [compiler-rt][profile] Add padding after binary IDs (details)
  63. [lldb] Add a C language REPL to test LLDB's REPL infrastructure (details)
  64. [WebAssembly] Add prototype relaxed SIMD fma/fms instructions (details)
  65. [lldb] [gdb-remote] Refactor getting remote regs to use local vector (details)
  66. [lldb] [gdb-remote] Use local regnos for value_regs/invalidate_regs (details)
  67. Revert "Diagnose -Wunused-value based on CFG reachability" (details)
  68. [x86] move combiner state check into convertIntLogicToFPLogic(); NFC (details)
  69. [x86] add AVX512 run for fcmp+logic ops; NFC (details)
  70. [RISCV] Add more tests for (and (srl x, C2), C1) that can be improved by using a pair of shifts. NFC (details)
  71. [RISCV] Add more isel optimizations for (and (shr x, c2), c1). (details)
  72. [AArch64] Update some sve-fixed-length test checks. (details)
  73. [clang-format] Add Left/Right Const fixer capability (details)
  74. [gn build] Port a44ab1702539 (details)
  75. [InlineAdvisor] Use one single quote (details)
  76. [ORC] Minor renaming and typo fixes (NFC) (details)
  77. [llvm] Replace tab with spaces in one test (details)
  78. [llvm] Fix a copy-pasto (details)
  79. [ORC][examples] Export exectuable symbols explicitly in LLJITWithExecutorProcessControl (details)
  80. [mlir][sparse] Moved a conditional from the RT library to the generated MLIR. (details)
  81. [lldb] Show fix-it applied even if expression didn't evaluate succesfully (details)
  82. [flang] Represent (parentheses around derived types) (details)
  83. [Polly] Remove -polly-opt-fusion option. (details)
  84. Support: Add closing namespace comment in raw_ostream_test.cpp, NFC (details)
  85. Revert "[Polly] Implement user-directed loop distribution/fission." (details)
  86. [clang-format] NFC ensure Penality variable is passed back with Fixes (details)
  87. [clangd] Support `#pragma mark` in the outline (details)
  88. [CMake] Pass llvm-readelf to CMake external builds (details)
  89. [RISCV] Add more tests for (and (shl x, C2), C1) that can be improved by using a pair of shifts. NFC (details)
  90. [RISCV] Add another isel optimization for (and (shl x, c2), c1) (details)
  91. RegAllocGreedy: Remove an unhelpful auto, and don't use a reference (details)
  92. [OpenMP] Fix data-race in new device RTL (details)
  93. [lldb] Handle malformed qfThreadInfo reply (details)
  94. [profile][fuchsia] Don't include extra NUL in log messages (details)
  95. [AMDGPU] Propagate defining src reg for AGPR to AGPR Copys (details)
  96. [libc++][NFC] Refactor the std::reverse_view tests (details)
  97. [ORC] Fix file header. (details)
  98. Revert "[compiler-rt][profile] Add padding after binary IDs" (details)
  99. [CSSPGO] Do not pass -fpseudo-probe-for-profiling to the linker. (details)
  100. [RISCV] Limit transformAddImmMulImm to prevent an infinite loop. (details)
  101. [NFC] Refactor tests to improve readability. (details)
  102. Fix -fno-unwind-tables -fasynchronous-unwind-tables to emit unwind tables (details)
  103. [clang-format] Fix unittest failures with -Werror (details)
  104. [ORC] Shut down services in SimpleRemoteEPCServer. (details)
  105. [compiler-rt][profile] Make corrupted-profile.c more robust (details)
  106. [ThinLTO] Don't emit original GUID for locals to distributed indexes (details)
  107. [ThinLTO] Fix bot failures (details)
  108. [mlir][linalg] Merge all tiling passes into a single one. (details)
  109. [mlir][linalg] Support tile+peel with TiledLoopOp (details)
  110. Add missing storageType to AttrDef to ODS (details)
  111. [Polly] Implement user-directed loop distribution/fission. (details)
  112. [Driver] Default Generic_GCC x86 to -fasynchronous-unwind-tables (details)
  113. [AMDGPU] Legalize initialized LDS variables (details)
  114. DebugInfo: Implement the -gsimple-template-names functionality (details)
  115. [ORC] Introduce EPCGenericDylibManager / SimpleExecutorDylibManager. (details)
  116. [gn build] Port a2c1cf09dfaa (details)
  117. [TableGen] Allow targets to entirely ignore Psets for registers (details)
  118. [Sanitizers] intercept ttyent api on FreeBSD. (details)
  119. [docs] Document the --print-passes flag in opt. (details)
  120. [ORC] Rename ExecutorAddress to ExecutorAddr. (details)
  121. Remove non-portable directory separator from test (details)
  122. DebugInfo: STN: Handle unreconstitutable types in function types (details)
  123. Fix that same path separator issue again... (details)
  124. [PowerPC] SemaChecking for darn family of builtins (details)
  125. [ORC-RT] Rename ExecutorAddress to ExecutorAddr. (details)
Commit e7b169a8ae99b0cef1e5262f18b35e0abcc69ef8 by mikael.holmen
[AMDGPU] Fix gcc warnings about unused variables [NFC]
The file was modifiedllvm/lib/Target/AMDGPU/SIFoldOperands.cpp
Commit b7050c791d8951c0a099bf162f9ab3a696611b7d by diana.picus
[mlir] Fix build on Windows on Arm

clang-cl errors out while handling the templated version of tgfmt. This
patch works around the issue by explicitly choosing the non-templated
version of tgfmt, which takes an ArrayRef<std::string>.

More details in this thread:
https://lists.llvm.org/pipermail/cfe-dev/2021-September/068936.html

Thanks @Mehdi Amini for suggesting the fix :)

Differential Revision: https://reviews.llvm.org/D110223
The file was modifiedmlir/tools/mlir-tblgen/RewriterGen.cpp
Commit 352a2e67162541efe79a1e144b40a054751e7d5c by Jan Svoboda
[clang][tooling] NFC: Refactor command-line diagnostic tests

This patch uses a different command-line arguments to test `clang::tooling::ToolInvocation` that are not specific to Darwin.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D110160
The file was modifiedclang/unittests/Tooling/ToolingTest.cpp
Commit 76656ec8ec535bd17afc998112a83c7c55ad7719 by chen3.liu
[X86][FP16] Combine the FADD(A, FMA(B, C, 0)) to FMA(B, C, A)

This patch is to support transform something like
_mm512_add_ph(acc, _mm512_fmadd_pch(a, b, _mm512_setzero_ph()))
to _mm512_fmadd_pch(a, b, acc).

Differential Revision: https://reviews.llvm.org/D109953
The file was addedllvm/test/CodeGen/X86/avx512fp16-combine-vfmac-fadd.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 08ef24f6abdfaee038c47e3fe0b61b40e8fd9053 by sylvestre
Wrap xar/xar.h include in extern "C" block

Without such wrapping, linking lld fails with missing symbols because of
C++ symbol mangling with older versions of the MacOSX SDK, in which
xar.h doesn't have an extern "C" block itself.

Reviewed By: #lld-macho, thakis

Differential Revision: https://reviews.llvm.org/D110224
The file was modifiedlld/MachO/SyntheticSections.cpp
Commit 1f3f144446d1766b6bd63ac02a064450c4fa5e55 by shivam98.tkg
[NFC] Wrap MLIR addAffineForOpDomain warning with LLVM_DEBUG

Current warning message in method `addAffineForOpDomain` of mlir/lib/Analysis/AffineStructures.cpp is being printed to the stdout/stderr.
This patch redirects the warning with LLVM_DEBUG following standard llvm practice.

Reviewed By: bondhugula

Differential Revision: https://reviews.llvm.org/D108340
The file was modifiedmlir/lib/Analysis/AffineStructures.cpp
Commit 4223195de3eaaa9c221d1f178899f221be6264c5 by zeratul976
[clangd] Ensure lambda init-capture gets semantic token

Prior to this patch, CollectExtraHighlightings would incorrectly produce
a token for the init-capture's type which overlapped the name and
resulted in both being dropped.

Fixes https://github.com/clangd/clangd/issues/868

Differential Revision: https://reviews.llvm.org/D110130
The file was modifiedclang-tools-extra/clangd/unittests/SemanticHighlightingTests.cpp
The file was modifiedclang-tools-extra/clangd/SemanticHighlighting.cpp
Commit c5e0313e4489cb3130f441685fd4207eeee6aa48 by bjorn.a.pettersson
[ModuleInlinerWrapperPass] Do some naive printing of wrapped pipeline with -print-pipeline-passes

Bisecting and reducing opt pipelines that includes the
ModuleInlinerWrapperPass has turned out to be a bit problematic.
This is far from perfect (it still lacks information about inline
advisor params etc.), but it should give some kind of hint to what
the wrapped pipeline looks like when using -print-pipeline-passes.

Reviewed By: aeubanks, mtrofin

Differential Revision: https://reviews.llvm.org/D109878
The file was modifiedllvm/test/Other/new-pm-print-pipeline.ll
The file was modifiedllvm/lib/Transforms/IPO/Inliner.cpp
The file was modifiedllvm/include/llvm/Transforms/IPO/Inliner.h
Commit c3ae8ecb520e6565594272d12e447e295ce09c9b by bjorn.a.pettersson
[DAGCombiner] Rename isAlias as mayAlias. NFC

Differential Revision: https://reviews.llvm.org/D110062
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Commit 6cef28ed2df19c197790ca777423fc1c2572c138 by jay.foad
[TII] Remove the MFI argument to convertToThreeAddress. NFC.

This simplifies the API and addresses a FIXME in
TwoAddressInstructionPass::convertInstTo3Addr.

Differential Revision: https://reviews.llvm.org/D110229
The file was modifiedllvm/include/llvm/CodeGen/TargetInstrInfo.h
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfo.cpp
The file was modifiedllvm/lib/Target/X86/X86InstrInfo.cpp
The file was modifiedllvm/lib/Target/X86/X86FixupLEAs.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIFoldOperands.cpp
The file was modifiedllvm/lib/Target/SystemZ/SystemZInstrInfo.h
The file was modifiedllvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
The file was modifiedllvm/lib/CodeGen/TwoAddressInstructionPass.cpp
The file was modifiedllvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
The file was modifiedllvm/lib/Target/X86/X86InstrInfo.h
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfo.h
The file was modifiedllvm/lib/Target/ARM/ARMBaseInstrInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.h
Commit 5e28c892d06f95600f8b6290ad4de38bfe142637 by phosek
[Driver] Correctly handle static C++ standard library

When statically linking C++ standard library, we shouldn't add -Bdynamic
after including the library on the link line because that might override
user settings like -static and -static-pie. Rather, we should surround
the library with --push-state/--pop-state to make sure that -Bstatic
only applies to C++ standard library and nothing else. This has been
supported since GNU ld 2.25 (2014) so backwards compatibility should
no longer be a concern.

Differential Revision: https://reviews.llvm.org/D110128
The file was modifiedclang/lib/Driver/ToolChains/Fuchsia.cpp
The file was modifiedclang/test/Driver/linux-ld.c
The file was modifiedclang/test/Driver/fuchsia.cpp
The file was modifiedclang/lib/Driver/ToolChains/Gnu.cpp
Commit 904ca7d2ed97bf114fd11373c722acd1e54bfaa3 by phosek
Revert "[Driver] Correctly handle static C++ standard library"

This reverts commit 5e28c892d06f95600f8b6290ad4de38bfe142637 as
the linker on the clang-ppc64le-rhel bot doesn't seem to support
--push-state/--pop-state.
The file was modifiedclang/test/Driver/linux-ld.c
The file was modifiedclang/test/Driver/fuchsia.cpp
The file was modifiedclang/lib/Driver/ToolChains/Fuchsia.cpp
The file was modifiedclang/lib/Driver/ToolChains/Gnu.cpp
Commit 8b87c3d5736730cda1d8856098621029b759f3d1 by andre.simoesdiasvieira
[libc] Add optimized memset for AArch64

Differential Revision: https://reviews.llvm.org/D107848
The file was modifiedlibc/src/string/CMakeLists.txt
The file was modifiedlibc/src/string/memory_utils/elements_aarch64.h
The file was addedlibc/src/string/aarch64/memset.cpp
Commit 05663dc14644d12d688155d55ba267e7b7e69817 by Alexander.Richardson
[InstSimplify] Don't lose inbounds when simplifying a GEP

I noticed this while working on a (ptrtoint (gep null, x)) -> x fold.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D110168
The file was modifiedllvm/lib/Analysis/PHITransAddr.cpp
The file was modifiedllvm/test/Transforms/InstSimplify/simplify-nested-bitcast.ll
The file was modifiedllvm/lib/Transforms/Scalar/NewGVN.cpp
The file was modifiedllvm/include/llvm/Analysis/InstructionSimplify.h
The file was modifiedllvm/lib/Transforms/InstCombine/InstructionCombining.cpp
The file was modifiedllvm/lib/Analysis/InstructionSimplify.cpp
Commit af8b14c278c2cb5309562b6e3fa55333c2889d86 by dvyukov
tsan: remove unnecessary enum values (NFC)

Remove unnecessary enum values in the memory profiler.
There is no point in spelling them, it can only lead to bugs
and larger diffs when values are added/removed.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D110263
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_platform_linux.cpp
Commit 356ecd9bd1c5c10ff776dced80f353839fafb354 by dvyukov
tsan: remove DontDumpShadow from Go build

DontDumpShadow is used only in InitializeShadowMemory which is Go-only.

Depends on D110263.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D110264
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_platform_posix.cpp
Commit dcc6db22d8508a85ecd2b8bdcc5ae5646968c083 by dvyukov
tsan: add another deep stack test

Add a test for a trace corner case that lead to a bug
in experimental runtime replacement.
Since it passes with the current runtime it makes sense
to submit it on its own.

Depends on D110264.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D110265
The file was addedcompiler-rt/test/tsan/deep_stack2.cpp
Commit 20d3e518010a2a4fa1f4cdc9b7b885f13966a19c by dvyukov
tsan: use RawShadow instead of u64 more

Fix few remaining cases where we use u64 instead of the new RawShadow type.

Depends on D110265.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D110266
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_platform_linux.cpp
Commit 702cb7afe9de21b9a86d012cdd0b283496e619af by dvyukov
tsan: move shadow declaration into a separate header file (NFC)

tsan_rtl.h is very huge and contains too many things.
Move FastState and Shadow types into a new tsan_shadow.h file.
This also allows to use FastState/Shadow in other header files
without creating circular dependencies (which most likely will
happen today).

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D110272
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.h
The file was addedcompiler-rt/lib/tsan/rtl/tsan_shadow.h
The file was modifiedcompiler-rt/lib/tsan/CMakeLists.txt
Commit ce59ccd04023cab3a837da14079ca2dcbfebb70c by clementval
[fir][NFC] inline trival isa_<type> functions

This patch is part of the upstreaming effort from fir-dev branch and sync changes. Inline trival `isa_<type>` functions.

Co-authored-by: schweitzpgi

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D110233
The file was modifiedflang/lib/Optimizer/Dialect/FIRType.cpp
The file was modifiedflang/include/flang/Optimizer/Dialect/FIRType.h
Commit e7c879a69d6b61f35969936a9efd46bcfbf80ca0 by fraser
[RISCV][VP] Add support for VP_REDUCE_* operations

This patch adds codegen support for lowering the vector-predicated
reduction intrinsics to RVV instructions. The process is similar to that
of the other reduction intrinsics, save for the fact that every VP
reduction has a start value. We reuse the existing custom "VL" nodes,
adding extra patterns where required to handle non-true masks.

To support these nodes, the `RISCVISD::VECREDUCE_*_VL` nodes have been
given an explicit "merge" operand. This is to faciliate the VP
reductions, where we must be careful to ensure that even if no operation
is performed (when VL=0) we still produce the start value. The RVV
reductions don't update the destination register under these conditions,
so we tie the splatted start value to the output register.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D107657
The file was addedllvm/test/CodeGen/RISCV/rvv/vreductions-int-vp.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.h
The file was addedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-mask-vp.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int-vp.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
The file was addedllvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
The file was addedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp-vp.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was addedllvm/test/CodeGen/RISCV/rvv/vreductions-mask-vp.ll
Commit 5685eb950da7c6901c8b264a3c93e8ea63b34d3d by pavel
[lldb] Fix DomainSocket::GetSocketName for unnamed sockets

getpeername will return addrlen = 2 (sizeof sa_family_t) for unnamed
sockets (those not assigned a name with bind(2)). This is typically true
for client sockets as well as those created by socketpair(2).

This GetSocketName used to crash for sockets which were connected to
these kinds of sockets. Now it returns an empty string.
The file was modifiedlldb/source/Host/posix/DomainSocket.cpp
The file was modifiedlldb/unittests/Host/SocketTest.cpp
Commit 85a586501bcc5b556d34a566b9d256d56d6fc5ba by bjorn.a.pettersson
[BasicBlockUtils] Fixup of an assumed typo in MergeBlockIntoPredecessor

The NFC commit e5692a564a73ef63b7b changed the logic for
DomTreeUpdates to use the range [succ_begin, succ_begin) when
looking for SuccsOfPredBB rather than using [succ_begin, succ_end).

As the commit was NFC this is identified as a typo (it has been
discussed briefly in phabricator).

The typo was found when inspecting the code, so I've got no idea if
changing back to the old range has any significant impact (such as
solving any PR:s or causing some new problems). But at least this
restores the code to the originally indented behavior.
The file was modifiedllvm/lib/Transforms/Utils/BasicBlockUtils.cpp
Commit 5cabe4d9d3226bfd0856ac031b63ab641acc08f5 by llvm-dev
[CodeGen] RegisterCoalescer::buildVRegToDbgValueMap - use const-ref value in for-range loop. NFCI.

Avoid unnecessary copies, reported by MSVC static analyzer.
The file was modifiedllvm/lib/CodeGen/RegisterCoalescer.cpp
Commit 2a5936faf0f3da9f55109ac1ed3b7b45436e3ced by llvm-dev
[CodeGen] ProcessSDDbgValues - use const-ref value in for-range loop. NFCI.

Avoid unnecessary copies, reported by MSVC static analyzer.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
Commit fbacf5ad385c63c73060369ac11dd535e44a37ce by jim
[RISCV] Add missing op type OPERAND_UIMM2, OPERAND_UIMM3 and OPERAND_UIMM7 for verifyInstruction

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D110307
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfo.cpp
Commit 5ce89279c0986d0bcbe526dce52f91dd0c16427c by flo
[DSE] Track earliest escape, use for loads in isReadClobber.

At the moment, DSE only considers whether a pointer may be captured at
all in a function. This leads to cases where we fail to remove stores to
local objects because we do not check if they escape before potential
read-clobbers or after.

Doing context-sensitive escape queries in isReadClobber has been removed
a while ago in d1a1cce5b130 to save compile-time. See PR50220 for more
context.

This patch introduces a new capture tracker, which keeps track of the
'earliest' capture. An instruction A is considered earlier than instruction
B, if A dominates B. If 2 escapes do not dominate each other, the
terminator of the common dominator is chosen. If not all uses cannot be
analyzed, the earliest escape is set to the first instruction in the
function entry block.

If the query instruction dominates the earliest escape and is not in a
cycle, then pointer does not escape before the query instruction.

This patch uses this information when checking if a load of a loaded
underlying object may alias a write to a stack object. If the stack
object does not escape before the load, they do not alias.

I will share a follow-up patch to also use the information for call
instructions to fix PR50220.

In terms of compile-time, the impact is low in general,
    NewPM-O3: +0.05%
    NewPM-ReleaseThinLTO: +0.05%
    NewPM-ReleaseLTO-g: +0.03

with the largest change being tramp3d-v4 (+0.30%)
http://llvm-compile-time-tracker.com/compare.php?from=1a3b3301d7aa9ab25a8bdf045c77298b087e3930&to=bc6c6899cae757c3480f4ad4874a76fc1eafb0be&stat=instructions

Compared to always computing the capture information on demand, we get
the following benefits from the caching:
NewPM-O3: -0.03%
NewPM-ReleaseThinLTO: -0.08%
NewPM-ReleaseLTO-g: -0.04%

The biggest speedup is tramp3d-v4 (-0.21%).
http://llvm-compile-time-tracker.com/compare.php?from=0b0c99177d1511469c633282ef67f20c851f58b1&to=bc6c6899cae757c3480f4ad4874a76fc1eafb0be&stat=instructions

Overall there is a small, but noticeable benefit from caching. I am not
entirely sure if the speedups warrant the extra complexity of caching.
The way the caching works also means that we might miss a few cases, as
it is less precise. Also, there may be a better way to cache things.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D109844
The file was modifiedllvm/test/Transforms/DeadStoreElimination/captures-before-load.ll
The file was modifiedllvm/include/llvm/Analysis/CaptureTracking.h
The file was modifiedllvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
The file was modifiedllvm/lib/Analysis/CaptureTracking.cpp
Commit 7faf1285f2c416494aacf7ee13e70e330b2f0540 by dvyukov
tsan: remove expected race leftover

Remove nmissed_expected variable.
It's a leftover from removed "expected race" feature and is never incremented.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D110321
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.h
Commit 1711a6ec650980764d97b3be148745e2813a3707 by Louis Dionne
[libc++] Remove uses of _LIBCPP_HAS_NO_VARIABLE_TEMPLATES

All supported compilers provide support for variable templates now.

Differential Revision: https://reviews.llvm.org/D110284
The file was modifiedlibcxx/include/ratio
The file was modifiedlibcxx/test/libcxx/selftest/test_macros.pass.cpp
The file was modifiedlibcxx/test/support/test_macros.h
The file was modifiedlibcxx/include/__config
The file was modifiedlibcxx/include/chrono
The file was modifiedlibcxx/include/type_traits
Commit c75c5c5f8f3740716c9a1c4fb1d8f7e753af2cf6 by spatel
[CodeGen] update test file to not run the entire LLVM optimizer; NFC

Clang regression tests should not break when changes are made to
the LLVM optimizer. This file broke on the 1st attempt at D110170,
so I'm trying to prevent that on another try.

Similar to other files in this directory, we make a compromise and
run -mem2reg to reduce noise by about 1000 lines out of 5000+ CHECK lines.
The file was modifiedclang/test/CodeGen/aapcs-bitfield.c
Commit cef0280a95dd969f18a5cd3c2238a60a25ef4cce by thakis
[gn build] (semi-manually) port 702cb7afe9de
The file was modifiedllvm/utils/gn/secondary/compiler-rt/lib/tsan/BUILD.gn
Commit 64f623d4c37c686e74fae6f1a3e33dd4f39e1423 by thakis
[gn build] (manually) port ac191bcc99e2f
The file was modifiedllvm/utils/gn/secondary/compiler-rt/test/BUILD.gn
Commit ac889a5262f230eaccfbe60ad2c1d1ae60280623 by llvmgnsyncbot
[gn build] Port f4abdb0c074b
The file was modifiedllvm/utils/gn/secondary/libcxx/include/BUILD.gn
Commit bb9333c3504a4a02b982526ad8264d14c6ec1ad4 by spatel
[InstCombine] fold cast of right-shift if high bits are not demanded (2nd try)

The 1st try at this was reverted because it caused an infinite loop in instcombine.
That should be fixed after:
1cd6b44f267b

(masked) trunc (lshr X, C) --> (masked) lshr (trunc X), C

Narrowing the shift should be better for analysis and can lead
to follow-on transforms as shown.

Attempt at a general proof in Alive2:
https://alive2.llvm.org/ce/z/tRnnSF

Here are a couple of the specific tests:
https://alive2.llvm.org/ce/z/bCnTp-
https://alive2.llvm.org/ce/z/TfaHnb

Differential Revision: https://reviews.llvm.org/D110170
The file was modifiedllvm/test/Transforms/InstCombine/trunc-demand.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
Commit c931d35216a320465947a5a46b158cf71024458d by llvm-dev
[CostModel][X86] Increase i64 mul cost from 1 to 2

Only the most recent cpus support really 1cy 64-bit multiplies, and the X64 cost table represents a realistic worst case. The 1cy value was also discouraging vectorization when most vXi64 PMULDQ expansions aren't actually slower than scalarization.

Noticed while investigating PR51436.
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/arith-fix.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/arith.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/arith-mul.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/arith-overflow.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/arith-fix.ll
The file was modifiedllvm/test/Transforms/IndVarSimplify/X86/loop-invariant-conditions.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/rem.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/slm-arith-costs.ll
Commit eb209c13cce99b1ad8d8e619bf2006f4376ed1ef by sam.mccall
clangd: Do not report inline overrides twice

... in textDocument/references.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D110324
The file was modifiedclang-tools-extra/clangd/XRefs.cpp
The file was modifiedclang-tools-extra/clangd/unittests/XRefsTests.cpp
Commit 828422747d65ab6f0e3cdd75ed9a35f0afedf589 by Stefan Gränitz
[ORC][examples] Fix segfault in LLJITWithTargetProcessControl

Issue reported during review D110260
The file was modifiedllvm/examples/OrcV2Examples/LLJITWithTargetProcessControl/LLJITWithTargetProcessControl.cpp
Commit 3778c1cd6ef5a3286d5d49e842a2c65fffb8f3a6 by hokein.wu
[Sema] Fix a null pointer reference crash.

Differential Revision: https://reviews.llvm.org/D110315
The file was addedclang/test/SemaCXX/rounding-math-crash.cpp
The file was modifiedclang/lib/Sema/SemaDecl.cpp
Commit 2ac53fffaeda809df34e3fb2c442b0fd85d4b0ff by Piotr Sobczak
[AMDGPU] Avoid processing functions in amdgpu-propagate-attributes pass for shaders

The pass amdgpu-propagate-attributes ("Early/Late propagate attributes
from kernels to functions") is currently run also for shaders, where
it does nothing. Modify the check so the pass only processes functions
for kernels.

Differential Revision: https://reviews.llvm.org/D109961
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUPropagateAttributes.cpp
Commit 5f2c53bdf4c58a488c098ed42c26dfcd369dd15e by llvm-dev
Pass some DataLayout arguments by const-ref

Avoid unnecessary copies, reported by MSVC static analyzer.
The file was modifiedllvm/lib/Transforms/Coroutines/CoroFrame.cpp
The file was modifiedllvm/tools/llvm-exegesis/lib/Assembler.cpp
The file was modifiedllvm/lib/Transforms/Utils/AssumeBundleBuilder.cpp
Commit 8ecf3660f2de3b88d10db0fd52d0bc80bda33dcc by hokein.wu
Fix buildbot error.

-frounding-math is not available for all targets.
The file was modifiedclang/test/SemaCXX/rounding-math-crash.cpp
Commit 87689657e28cd78faf2e07e859fb5b96f7a1f8fc by Duncan P. N. Exon Smith
Support: Fix missing whitespace in comment for inconvertibleErrorCode(), NFC
The file was modifiedllvm/include/llvm/Support/Error.h
Commit b240a2980b6e3777d6659d993f3ba60a3ca84bcb by spatel
[x86] add AVX run to tests of fcmp logic; NFC

The ISA before AVX has predicate gaps for both fcmp
codegen alternatives, so that requires a more
complicated fix to get ideal asm in all cases.
The file was modifiedllvm/test/CodeGen/X86/fcmp-logic.ll
Commit b03e701c145365ba339657ead54a2e0cc5c02776 by mgorny
[lldb] [gdb-remote] Refactor getting remote regs to use local vector

Refactor remote register getters to collect them into a local
std::vector rather than adding them straight into DynamicRegisterInfo.
The purpose of this change is to lay groundwork for switching value_regs
and invalidate_regs to use local LLDB register numbers rather than
remote numbers.

Differential Revision: https://reviews.llvm.org/D110025
The file was modifiedlldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
The file was modifiedlldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
Commit 6fbed33d4a7de2229c40e6318f223092d3a23848 by mgorny
[lldb] [gdb-remote] Use local regnos for value_regs/invalidate_regs

Switch the gdb-remote client logic to use local (LLDB) register numbers
in value_regs/invalidate_regs rather than remote regnos. This involves
translating regnos received from lldb-server.

Differential Revision: https://reviews.llvm.org/D110027
The file was modifiedlldb/source/Plugins/Process/Utility/DynamicRegisterInfo.cpp
The file was modifiedlldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.cpp
Commit 7f5ca8cc2158debe66663f09eb19b4613e75e124 by shivam98.tkg
[clang] Use portable "#!/usr/bin/env bash" shebang for tools and utils.

Reviewed By: JDevlieghere

Differential Revision: https://reviews.llvm.org/D110041
The file was modifiedclang/tools/diag-build/diag-build.sh
The file was modifiedclang/utils/make-ast-dump-check.sh
Commit d5c67bba62d3abc96ac501f45cabc33a100b00e8 by craig.topper
[RegAlloc] Cast uint8_t to unsigned before printing it.

raw_ostream interprets uint8_t as wanting to print a character
with that ASCII value. In this case the uint8_t is an integer
that we want to print.
The file was modifiedllvm/lib/CodeGen/RegAllocGreedy.cpp
Commit a95061691e43fd9a4216e60917715bdc58660d17 by kazu
[SampleFDO] Remove redundant declarations (NFC)

Note that these are declared in SampleProfileLoaderBaseUtil.h, which
SampleProfileLoaderBaseImpl.h includes.
The file was modifiedllvm/include/llvm/Transforms/Utils/SampleProfileLoaderBaseImpl.h
Commit f9912fe4eac91f27965c22d015b3109c5158d050 by quinn.pham
[PowerPC] Add range checks for P10 Vector Builtins

This patch adds range checking for some Power10 altivec builtins and
changes the signature of a builtin to match documentation. For `vec_cntm`,
range checking is done via SemaChecking. For `vec_splati_ins`, the second
argument is masked to extract the 0th bit so that we always receive either a `0`
or a `1`.

Reviewed By: lei, amyk

Differential Revision: https://reviews.llvm.org/D109710
The file was addedclang/test/CodeGen/builtins-ppc-p10vector-error.c
The file was modifiedclang/lib/Headers/altivec.h
The file was modifiedclang/lib/Sema/SemaChecking.cpp
The file was modifiedclang/test/CodeGen/builtins-ppc-p10vector.c
Commit fd04fd9ac92d705f7d144b77109b8bcec950c04f by Louis Dionne
[libc++] Use CMake interface targets to setup benchmark flags

This is a re-application of da0592e4c8df which was reverted in
1454018dc1d9 because it was incompatible with older CMakes.
Instead, disable the benchmarks when CMake is too old to
support those idioms.

Differential Revision: https://reviews.llvm.org/D110285
The file was modifiedlibcxx/benchmarks/CMakeLists.txt
Commit 8229cb74125322ff337cfe316ab35c6ebf412bde by jay.foad
[LiveIntervals] Fix repairOldRegInRange for simple def cases

The fix applied in D23303 "LiveIntervalAnalysis: fix a crash in repairOldRegInRange"
was over-zealous. It would bail out when the end of the range to be
repaired was in the middle of the first segment of the live range of
Reg, which was always the case when the range contained a single def of
Reg.

This patch fixes it as suggested by Matthias Braun in post-commit review
on the original patch, and tests it by adding -early-live-intervals to
a selection of existing lit tests that now pass.

(Note that D23303 was originally applied to fix a crash in
SILoadStoreOptimizer, but that is now moot since D23814 updated
SILoadStoreOptimizer to run before scheduling so it no longer has to
update live intervals.)

Differential Revision: https://reviews.llvm.org/D110238
The file was modifiedllvm/lib/CodeGen/LiveIntervals.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/extract-load-i1.ll
The file was modifiedllvm/test/CodeGen/ARM/signext-inreg.ll
The file was modifiedllvm/test/CodeGen/X86/mul-shift-reassoc.ll
The file was addedllvm/test/CodeGen/AMDGPU/twoaddr-regsequence.mir
Commit 12504f50729a338fb37c1c1863e7125b607e11d7 by mgorny
Revert "[lldb] [gdb-remote] Use local regnos for value_regs/invalidate_regs"

This reverts commit 6fbed33d4a7de2229c40e6318f223092d3a23848.
The prerequisite commit is causing regressions.
The file was modifiedlldb/source/Plugins/Process/Utility/DynamicRegisterInfo.cpp
The file was modifiedlldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.cpp
Commit bcb6b97cde84b6acd67d5551302683234c09337c by mgorny
Revert "[lldb] [gdb-remote] Refactor getting remote regs to use local vector"

This reverts commit b03e701c145365ba339657ead54a2e0cc5c02776.  This is
causing regressions when XML support is disabled.
The file was modifiedlldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
The file was modifiedlldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
Commit 1a6e1ee42a6af255d45e3fd2fe87021dd31f79bb by i
Resolve {GlobalValue,GloalIndirectSymol}::getBaseObject confusion

While both GlobalAlias and GlobalIFunc are GlobalIndirectSymbol, their
`getIndirectSymbol()` usage is quite different (GlobalIFunc's resolver
is an entity different from GlobalIFunc itself).

As discussed on https://lists.llvm.org/pipermail/llvm-dev/2020-September/144904.html
("[IR] Modelling of GlobalIFunc"), the name `getBaseObject` is confusing when
used with GlobalIFunc.

To resolve the confusion:

* Move GloalIndirectSymol::getBaseObject to GlobalAlias:: (GlobalIFunc should use `getResolver` instead)
* Change GlobalValue::getBaseObject not to inspect GlobalIFunc. Note: the function has 7 references.
* Add GlobalIFunc::getResolverFunction to peel off potential ConstantExpr indirection
  (`strlen` in `test/LTO/Resolution/X86/ifunc.ll`)

Note: GlobalIFunc::getResolver (like GlobalAlias::getAliasee which does not peel
off ConstantExpr indirection) is kept to be used by ValueEnumerator.

Reviewed By: ibookstein

Differential Revision: https://reviews.llvm.org/D109792
The file was modifiedllvm/include/llvm/IR/GlobalAlias.h
The file was modifiedllvm/test/LTO/Resolution/X86/ifunc.ll
The file was modifiedllvm/include/llvm/IR/GlobalIFunc.h
The file was modifiedllvm/lib/IR/Globals.cpp
The file was modifiedllvm/lib/Object/IRSymtab.cpp
The file was modifiedllvm/lib/Transforms/Utils/SplitModule.cpp
The file was modifiedllvm/lib/Object/ModuleSymbolTable.cpp
Commit 1e3c6fc7cb9d2ee6a5328881f95d6643afeadbff by nikita.ppv
[JumpThreading] Ignore free instructions

This is basically D108837 but for jump threading. Free instructions
should be ignored for the threading decision. JumpThreading already
skips some free instructions (like pointer bitcasts), but does not
skip various free intrinsics -- in fact, it currently gives them a
fairly large cost of 2.

Differential Revision: https://reviews.llvm.org/D110290
The file was modifiedllvm/test/Transforms/PhaseOrdering/inlining-alignment-assumptions.ll
The file was modifiedllvm/include/llvm/Transforms/Scalar/JumpThreading.h
The file was modifiedllvm/lib/Transforms/Scalar/JumpThreading.cpp
The file was modifiedllvm/test/Transforms/JumpThreading/free_instructions.ll
Commit bbc74a11bc15f4ce962ac7f915309145dcfc2582 by clementval
[fir][NFC] rename canBePointerOrHeapElementType to cannotBePointerOrHeapElementType

This patch is part of the upstreaming effort from fir-dev branch.
Rename the function so the name conveys better what it does.

Reviewed By: jeanPerier

Differential Revision: https://reviews.llvm.org/D110323

Co-authored-by: schweitz
Co-authored-by: jeanPerier
The file was modifiedflang/lib/Optimizer/Dialect/FIRType.cpp
Commit deb2ca566ae70303042e3ab9296978895a817bf8 by jay.foad
Revert "[LiveIntervals] Fix repairOldRegInRange for simple def cases"

This reverts commit 8229cb74125322ff337cfe316ab35c6ebf412bde.

It was failing on buildbots with expensive checks enabled.
The file was modifiedllvm/test/CodeGen/ARM/signext-inreg.ll
The file was modifiedllvm/lib/CodeGen/LiveIntervals.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/extract-load-i1.ll
The file was modifiedllvm/test/CodeGen/X86/mul-shift-reassoc.ll
The file was removedllvm/test/CodeGen/AMDGPU/twoaddr-regsequence.mir
Commit 2155aa79d7019b620906d94ae6be72179bfd4880 by clementval
[fir][NFC] Remove fir.cmpf replaced by mlir.cmpf

fir.cmpf op is not necessary anymore as it is replaced by mlir.cmpf.
This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: jeanPerier

Differential Revision: https://reviews.llvm.org/D110327

Co-authored-by: schweitzpgi
Co-authored-by: jeanPerier
The file was modifiedflang/test/Fir/fir-ops.fir
The file was modifiedflang/lib/Optimizer/Dialect/FIROps.cpp
The file was modifiedflang/include/flang/Optimizer/Dialect/FIROps.td
The file was modifiedflang/include/flang/Optimizer/Dialect/FIROps.h
The file was modifiedflang/lib/Lower/IntrinsicCall.cpp
Commit e2050f94b65322f886eade488e4398cb38a480df by david.green
[ARM] Extra tests for unpredicated qr MVE intrinsics.
The file was modifiedllvm/test/CodeGen/Thumb2/mve-qrintr.ll
Commit e6126faba060d5341dae6c5cc99a22a80d8c4d23 by Louis Dionne
[libc++] Remove unused macro in __config

That macro was being defined but not used anywhere in libc++, so it
must be safe to remove it.

As a fly-by fix, also remove mentions of this macro in other places
in LLVM, to make sure they were not depending on the value defined in
libc++.

Differential Revision: https://reviews.llvm.org/D110289
The file was modifiedlibcxx/include/__config
The file was modifiedclang-tools-extra/clangd/unittests/JSONTransportTests.cpp
The file was modifiedllvm/lib/Support/LockFileManager.cpp
Commit 4393e3776b41471afbd37cb13fe5b777243fedd1 by pklausler
[flang] Implement READ(SIZE=) and INQUIRE(IOLENGTH=) in runtime

Count input characters corresponding to formatted edit descriptors
for READ(SIZE=); count output bytes for INQUIRE(IOLENGTH=).

The I/O APIs GetSize() and GetLength() were adjusted to return
std::size_t as function results.

Basic unit tests were added (and others fixed).

Differential Revision: https://reviews.llvm.org/D110291
The file was modifiedflang/runtime/io-stmt.h
The file was modifiedflang/include/flang/Runtime/io-api.h
The file was modifiedflang/runtime/edit-input.cpp
The file was modifiedflang/runtime/unit.cpp
The file was modifiedflang/runtime/descriptor-io.h
The file was modifiedflang/unittests/Runtime/ExternalIOTest.cpp
The file was modifiedflang/runtime/io-api.cpp
The file was modifiedflang/runtime/io-stmt.cpp
Commit 6bc9c8dfe32cc4662f2ed9041af527f69dfff13b by leonardchan
[compiler-rt][profile] Add padding after binary IDs

Some tests with binary IDs would fail with error: no profile can be merged.
This is because raw profiles could have unaligned headers when emitting binary
IDs. This means padding should be emitted after binary IDs are emitted to
ensure everything else is aligned. This patch accounts for that padding in
__llvm_write_binary_ids.

Differential Revision: https://reviews.llvm.org/D110188
The file was modifiedcompiler-rt/lib/profile/InstrProfilingPlatformLinux.c
Commit c22329972f02f9d51e2f9ea54d9075a4a808ffde by Raphael Isemann
[lldb] Add a C language REPL to test LLDB's REPL infrastructure

LLDB has a bunch of code that implements REPL support, but all that code is
unreachable as no language in master currently has an implemented REPL backend.
The only REPL that exists is in the downstream Swift fork. All patches for this
generic REPL code therefore also only have tests downstream which is clearly not
a good situation.

This patch implements a basic C language REPL on top of LLDB's REPL framework.
Beside implementing the REPL interface and hooking it up into the plugin
manager, the only other small part of this patch is making the `--language` flag
of the expression command compatible with the `--repl` flag. The `--repl` flag
uses the value of `--language` to see which REPL should be started, but right
now the `--language` flag is only available in OptionGroups 1 and 2, but not in
OptionGroup 3 where the `--repl` flag is declared.

The REPL currently can currently only start if a running target exists. I'll add
the 'create and run a dummy executable' logic from Swift (which is requires when
doing `lldb --repl`) when I have time to translate all this logic to something
that will work with Clang.

I should point out that the REPL currently uses the C expression parser's
approach to persistent variables where only result variables and the ones
starting with a '$' are transferred between expressions. I'll fix that in a
follow up patch. Also the REPL currently doesn't work in a non-interactive
terminal. This seems to be fixed in the Swift fork, so I assume one of our many
REPL downstream changes addresses the issue.

Reviewed By: JDevlieghere

Differential Revision: https://reviews.llvm.org/D87281
The file was addedlldb/test/API/repl/clang/main.c
The file was addedlldb/test/API/repl/clang/TestClangREPL.py
The file was addedlldb/source/Plugins/REPL/Clang/ClangREPL.h
The file was addedlldb/test/API/repl/clang/Makefile
The file was addedlldb/source/Plugins/REPL/Clang/ClangREPL.cpp
The file was modifiedlldb/source/Commands/Options.td
The file was modifiedlldb/source/Plugins/CMakeLists.txt
The file was addedlldb/source/Plugins/REPL/Clang/CMakeLists.txt
The file was addedlldb/source/Plugins/REPL/CMakeLists.txt
Commit 2f519825ba56cc2377ef9fbf1514944215ed9d0d by tlively
[WebAssembly] Add prototype relaxed SIMD fma/fms instructions

Add experimental clang builtins, LLVM intrinsics, and backend definitions for
the new {f32x4,f64x2}.{fma,fms} instructions in the relaxed SIMD proposal:
https://github.com/WebAssembly/relaxed-simd/blob/main/proposals/relaxed-simd/Overview.md.
Do not allow these instructions to be selected without explicit user opt-in.

Differential Revision: https://reviews.llvm.org/D110295
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsWebAssembly.td
The file was modifiedclang/test/CodeGen/builtins-wasm.c
The file was modifiedclang/include/clang/Basic/BuiltinsWebAssembly.def
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
The file was modifiedllvm/test/MC/WebAssembly/simd-encodings.s
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
The file was modifiedllvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
Commit fa456505b80b0cf83647a1b26713e4d3b38eccc2 by mgorny
[lldb] [gdb-remote] Refactor getting remote regs to use local vector

Refactor remote register getters to collect them into a local
std::vector rather than adding them straight into DynamicRegisterInfo.
The purpose of this change is to lay groundwork for switching value_regs
and invalidate_regs to use local LLDB register numbers rather than
remote numbers.

Differential Revision: https://reviews.llvm.org/D110025
The file was modifiedlldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
The file was modifiedlldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
Commit cc3c788ad23636d16f1db2ae859315628783b0e8 by mgorny
[lldb] [gdb-remote] Use local regnos for value_regs/invalidate_regs

Switch the gdb-remote client logic to use local (LLDB) register numbers
in value_regs/invalidate_regs rather than remote regnos. This involves
translating regnos received from lldb-server.

Differential Revision: https://reviews.llvm.org/D110027
The file was modifiedlldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.cpp
The file was modifiedlldb/source/Plugins/Process/Utility/DynamicRegisterInfo.cpp
Commit 59337263ab45d7657ee901eb5525a21967c46265 by Yuanfang Chen
Revert "Diagnose -Wunused-value based on CFG reachability"

This reverts commit cbbf2e8c8ae7730ff0121f4868de4a7d188feb65.
It seems causing diagnoses in SFINAE context.
The file was modifiedclang/test/Frontend/fixed_point_crash.c
The file was modifiedclang/test/Parser/cxx1z-init-statement.cpp
The file was modifiedclang/lib/Sema/SemaExpr.cpp
The file was modifiedclang/test/Analysis/dead-stores.c
The file was modifiedclang/test/Parser/objc-try-catch-1.m
The file was modifiedclang/test/SemaCXX/builtin-constant-p.cpp
The file was modifiedclang/test/CXX/drs/dr7xx.cpp
The file was modifiedclang/test/CXX/drs/dr20xx.cpp
The file was modifiedclang/test/SemaCXX/sizeless-1.cpp
The file was modifiedclang/test/Parser/objc-messaging-1.m
The file was modifiedclang/test/CXX/basic/basic.link/p8.cpp
The file was modifiedclang/test/SemaCXX/warn-comma-operator.cpp
The file was modifiedclang/test/Sema/warn-unused-value.c
The file was modifiedclang/test/CXX/temp/temp.constr/temp.constr.constr/partial-specializations.cpp
The file was modifiedclang/test/Parser/objcxx11-attributes.mm
The file was modifiedclang/test/SemaCXX/constant-expression-cxx2a.cpp
The file was modifiedclang/test/SemaTemplate/derived.cpp
The file was modifiedclang/test/SemaCXX/constant-expression.cpp
The file was modifiedclang/test/CodeCompletion/pragma-macro-token-caching.c
The file was modifiedclang/test/Sema/warn-type-safety.c
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was modifiedclang/test/Sema/vla-2.c
The file was modifiedclang/lib/Sema/SemaExprCXX.cpp
The file was modifiedclang/test/Sema/sizeless-1.c
The file was modifiedclang/test/SemaTemplate/lambda-capture-pack.cpp
The file was modifiedclang/test/SemaCXX/overloaded-operator.cpp
The file was modifiedclang/test/Sema/i-c-e.c
The file was modifiedclang/test/Sema/exprs.c
The file was modifiedclang/test/SemaCXX/attr-annotate.cpp
The file was modifiedclang/lib/Sema/SemaStmt.cpp
The file was modifiedclang/test/SemaCXX/expression-traits.cpp
The file was modifiedclang/test/Sema/const-eval.c
The file was modifiedclang/test/Parser/cxx0x-ambig.cpp
The file was modifiedclang/test/SemaCXX/matrix-type-operators.cpp
The file was modifiedclang/test/PCH/cxx-explicit-specifier.cpp
The file was modifiedclang/test/Parser/cxx-ambig-decl-expr.cpp
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/test/SemaCXX/vector.cpp
The file was modifiedclang/test/CXX/drs/dr14xx.cpp
The file was modifiedclang/test/Sema/switch-1.c
The file was modifiedclang/test/SemaCXX/warn-unused-value.cpp
Commit 74ba4b769ad9a5d7ba381ebc80fa8ced7d658451 by spatel
[x86] move combiner state check into convertIntLogicToFPLogic(); NFC

This function can be adapted to solve bugs like PR51245,
but it could require differentiating the combiner timing
between the existing and new transforms.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 5188e2c9ce1fb33600270243bbc32b4b108f1019 by spatel
[x86] add AVX512 run for fcmp+logic ops; NFC

Suggested in D110342
The file was modifiedllvm/test/CodeGen/X86/fcmp-logic.ll
Commit 19734ae6f05498a75d4bb3960be06f5d704f8528 by craig.topper
[RISCV] Add more tests for (and (srl x, C2), C1) that can be improved by using a pair of shifts. NFC

These tests have C1 as a shifted mask having C2 leading zeros and some
number of trailing zeros, C3. We can select this as
(slli (srli x, C2+C3), C3) or (slli (srliw x, C2+C3), C3).
The file was addedllvm/test/CodeGen/RISCV/shift-and.ll
Commit 4a69551d663e42453c3ad5ab799326fe2ddc9657 by craig.topper
[RISCV] Add more isel optimizations for (and (shr x, c2), c1).

Turn (and (shr x, c2), c1) -> (slli (srli x, c2+c3), c3) if c1 is a
shifted mask with c2 leading zeros and c3 trailing zeros.

When the leading zeros is C2+32 we can use SRLIW in place of SRLI.
The file was modifiedllvm/test/CodeGen/RISCV/shift-and.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
Commit 52272f294ffc28691ec3d77582c3678273d25411 by david.green
[AArch64] Update some sve-fixed-length test checks.

Some of these test show very poor code generation. Updating the tests
to make the tests more maintainable and prevent problems from being
hidden behind badly written test checks. Also in some of them the check
lines were using incorrect prefixes.

These are not-quite auto-generated. They are generated with the normal
update scripts and then uninteresting checks are removed, which at least
makes the test _more_ maintainable without materially changing what they
are testing.

I have otherwise attempted to not alter what is tested.
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-masked-stores.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-fp-extend-trunc.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-masked-scatter.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-int-mulh.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-fp-vselect.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-insert-vector-elt.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-fp-select.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-vector-shuffle.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-int-to-fp.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-float-compares.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-masked-loads.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-int-vselect.ll
Commit a44ab1702539c9ef3aea292e23cfbff17897bdbd by mydeveloperday
[clang-format] Add Left/Right Const fixer capability

Developers these days seem to argue over east vs west const like they used to argue over tabs vs whitespace or the various bracing style. These previous arguments were mainly eliminated with tools like `clang-format` that allowed those rules to become part of your style guide. Anyone who has been using clang-format in a large team over the last couple of years knows that we don't have those religious arguments any more, and code reviews are more productive.

https://www.youtube.com/watch?v=fv--IKZFVO8
https://mariusbancila.ro/blog/2018/11/23/join-the-east-const-revolution/
https://www.youtube.com/watch?v=z6s6bacI424

The purpose of this revision is to try to do the same for the East/West const discussion. Move the debate into the style guide and leave it there!

In addition to the new `ConstStyle: Right` or `ConstStyle: Left` there is an additional command-line argument `--const-style=left/right` which would allow an individual developer to switch the source back and forth to their own style for editing, and back to the committed style before commit. (you could imagine an IDE might offer such a switch)

The revision works by implementing a separate pass of the Annotated lines much like the SortIncludes and then create replacements for constant type declarations.

Differential Revision: https://reviews.llvm.org/D69764
The file was modifiedclang/unittests/Format/CMakeLists.txt
The file was addedclang/unittests/Format/QualifierFixerTest.cpp
The file was modifiedclang/include/clang/Format/Format.h
The file was modifiedclang/unittests/Format/FormatTest.cpp
The file was modifiedclang/docs/ClangFormatStyleOptions.rst
The file was modifiedclang/docs/tools/dump_format_style.py
The file was modifiedclang/lib/Format/Format.cpp
The file was modifiedclang/docs/ReleaseNotes.rst
The file was modifiedclang/lib/Format/CMakeLists.txt
The file was addedclang/lib/Format/QualifierAlignmentFixer.h
The file was addedclang/lib/Format/QualifierAlignmentFixer.cpp
The file was modifiedclang/tools/clang-format/ClangFormat.cpp
Commit 1aed7fcf09ee11443c3e05f2ec3bd62a946dfdd9 by llvmgnsyncbot
[gn build] Port a44ab1702539
The file was modifiedllvm/utils/gn/secondary/clang/unittests/Format/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/clang/lib/Format/BUILD.gn
Commit 0bb767e7db4401fc578f1be55db1d4038921d94b by i
[InlineAdvisor] Use one single quote
The file was modifiedllvm/lib/Analysis/InlineAdvisor.cpp
Commit 767b328e506ef069ecbb89b7cc9e2da7f8f84c6c by Stefan Gränitz
[ORC] Minor renaming and typo fixes (NFC)

Two typos, one unsused include and some leftovers from the TargetProcessControl -> ExecutorProcessControl renaming

Reviewed By: xgupta

Differential Revision: https://reviews.llvm.org/D110260
The file was removedllvm/examples/OrcV2Examples/LLJITWithTargetProcessControl/CMakeLists.txt
The file was modifiedclang/docs/ClangFormattedStatus.rst
The file was modifiedllvm/lib/ExecutionEngine/Orc/Shared/SimpleRemoteEPCUtils.cpp
The file was modifiedllvm/examples/OrcV2Examples/CMakeLists.txt
The file was removedllvm/examples/OrcV2Examples/LLJITWithTargetProcessControl/LLJITWithTargetProcessControl.cpp
The file was addedllvm/examples/OrcV2Examples/LLJITWithExecutorProcessControl/LLJITWithExecutorProcessControl.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/SimpleRemoteEPC.h
The file was addedllvm/examples/OrcV2Examples/LLJITWithExecutorProcessControl/CMakeLists.txt
Commit 4450cf985f0cfc94f8621261208f583d721bd693 by thakis
[llvm] Replace tab with spaces in one test

Also use just one space after comma. Now grepping for ', offset '
in llvm/test actually finds the test for `offset`.

No behavior change.
The file was modifiedllvm/test/MC/X86/pr32530.s
Commit 3fa43da7a3b46169b731dfca2bf3d41e85d3769d by thakis
[llvm] Fix a copy-pasto

We should use IMAGE_REL_I386_SECREL in the i386 section of this file.

IMAGE_REL_I386_SECREL and IMAGE_REL_AMD64_SECREL have the same
numeric value 0xB, so this doesn't change behavior.
The file was modifiedllvm/lib/Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp
Commit 1286bbc85f421dbdcab430674783bde17b15ba0d by Stefan Gränitz
[ORC][examples] Export exectuable symbols explicitly in LLJITWithExecutorProcessControl

Functions in static code that should be callable from JITed code must be exported. For dynamic libraries extern functions are exported by default. For exectuables, linkers usually strip them away unless we explicitly ask for keeping them.

Reviewed By: xgupta

Differential Revision: https://reviews.llvm.org/D110345
The file was modifiedllvm/examples/OrcV2Examples/LLJITWithExecutorProcessControl/CMakeLists.txt
Commit 221856f5cd13a877543ea6c5418330c1ee7fd715 by 2998727+wrengr
[mlir][sparse] Moved a conditional from the RT library to the generated MLIR.

When generating code to add an element to SparseTensorCOO (e.g., when doing dense=>sparse conversion), we used to check for nonzero values on the runtime side, whereas now we generate MLIR code to do that check.

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D110121
The file was modifiedmlir/lib/Dialect/SparseTensor/Transforms/SparseTensorPasses.cpp
The file was modifiedmlir/lib/Dialect/SparseTensor/Transforms/SparseTensorConversion.cpp
The file was modifiedmlir/lib/ExecutionEngine/SparseUtils.cpp
Commit fbaf36721783c3bcbd45f81294e6980eaef165e4 by augusto2112
[lldb] Show fix-it applied even if expression didn't evaluate succesfully

If we applied a fix-it before evaluating an expression and that
expression didn't evaluate correctly, we should still tell users about
the fix-it we applied since that may be the reason why it didn't work
correctly.

Differential Revision: https://reviews.llvm.org/D109908
The file was modifiedlldb/test/API/commands/expression/fixits/main.cpp
The file was modifiedlldb/test/API/commands/expression/fixits/TestFixIts.py
The file was modifiedlldb/source/Commands/CommandObjectExpression.cpp
Commit f6ecea1a35758bbb504bc8d6f5dccf353ea1355b by pklausler
[flang] Represent (parentheses around derived types)

The strongly typed expression representation classes supported
a representation of parentheses only around intrinsic types
with specific kinds.  Parentheses around derived type variables
must also be preserved so that expressions may be distinguished
from variables; this distinction matters for actual arguments &
construct associations.

Differential Revision: https://reviews.llvm.org/D110355
The file was modifiedflang/include/flang/Evaluate/expression.h
The file was modifiedflang/lib/Evaluate/expression.cpp
The file was addedflang/test/Evaluate/expr01.f90
The file was modifiedflang/lib/Evaluate/tools.cpp
Commit 07e7cb9433daa80e7a8b418cb334c663abe68202 by llvm-project
[Polly] Remove -polly-opt-fusion option.

The name of the option is misleading and has been renamed by isl to
"serialize-sccs". Instead of also renaming the option, remove it.
The option is still accessible using

    -polly-isl-arg=--no-schedule-serialize-sccs
The file was modifiedpolly/lib/Transform/ScheduleOptimizer.cpp
The file was modifiedpolly/test/ScheduleOptimizer/tile_after_fusion.ll
The file was modifiedpolly/lib/Analysis/ScopInfo.cpp
The file was modifiedpolly/test/ScheduleOptimizer/computeout.ll
The file was modifiedpolly/lib/CodeGen/PPCGCodeGeneration.cpp
Commit c7b1279a38286194b2f781c821e6eeaa6dd010cf by Duncan P. N. Exon Smith
Support: Add closing namespace comment in raw_ostream_test.cpp, NFC

The closing namespace comment prevents clang-format from dropping a
blank line after the final test. Also add in a blank line (which
simplifies merging/rebasing/etc. WIP patches).
The file was modifiedllvm/unittests/Support/raw_ostream_test.cpp
Commit c7bcd72a38bcf99e03e4651ed5204d1a1f2bf695 by phosek
Revert "[Polly] Implement user-directed loop distribution/fission."

This reverts commit 52c30adc7dfe6334b71adf256d81f70e7b976143 which
breaks the build when NDEBUG is defined.
The file was modifiedpolly/lib/Analysis/DependenceInfo.cpp
The file was modifiedpolly/lib/Transform/ScheduleTreeTransform.cpp
The file was modifiedpolly/include/polly/ManualOptimizer.h
The file was removedpolly/test/ScheduleOptimizer/ManualOptimization/distribute_heuristic.ll
The file was removedpolly/test/ScheduleOptimizer/ManualOptimization/distribute_illegal_pragmaloc.ll
The file was modifiedpolly/include/polly/ScheduleTreeTransform.h
The file was modifiedpolly/lib/Transform/ManualOptimizer.cpp
The file was removedpolly/test/ScheduleOptimizer/ManualOptimization/distribute_illegal_looploc.ll
The file was modifiedpolly/include/polly/DependenceInfo.h
The file was modifiedpolly/lib/Transform/ScheduleOptimizer.cpp
Commit 5fcde57b73fbc068c51f55a80894a6ef208d4afd by mydeveloperday
[clang-format] NFC ensure Penality variable is passed back with Fixes

Fix set but not used warning
The file was modifiedclang/lib/Format/QualifierAlignmentFixer.cpp
Commit d75fb1ee794e94a011e88739df84c359c987a65b by davg
[clangd] Support `#pragma mark` in the outline

Xcode uses `#pragma mark -` to draw a divider in the outline view
and `#pragma mark Note` to add `Note` in the outline view. For more
information, see https://nshipster.com/pragma/.

Since the LSP spec doesn't contain dividers for the symbol outline,
instead we treat `#pragma mark -` as a group with children - the
decls that come after it, implicitly terminating when the symbol's
parent ends.

The following code:

```
@implementation MyClass

- (id)init {}

- (int)foo;
@end
```

Would give an outline like

```
MyClass
        > Overrides
                    > init
        > Public Accessors
                    > foo
```

Differential Revision: https://reviews.llvm.org/D105904
The file was modifiedclang-tools-extra/clangd/CollectMacros.h
The file was modifiedclang-tools-extra/clangd/ParsedAST.cpp
The file was modifiedclang-tools-extra/clangd/unittests/FindSymbolsTests.cpp
The file was modifiedclang-tools-extra/clangd/SourceCode.h
The file was modifiedclang-tools-extra/clangd/SourceCode.cpp
The file was modifiedclang-tools-extra/clangd/FindSymbols.cpp
The file was modifiedclang-tools-extra/clangd/ParsedAST.h
The file was modifiedclang-tools-extra/clangd/Preamble.cpp
The file was modifiedclang-tools-extra/clangd/Preamble.h
The file was modifiedclang-tools-extra/clangd/unittests/ParsedASTTests.cpp
The file was modifiedclang-tools-extra/clangd/CollectMacros.cpp
The file was modifiedclang/include/clang/Lex/PPCallbacks.h
Commit 093245ed9ee495146b3478447473ad21ae237cb1 by phosek
[CMake] Pass llvm-readelf to CMake external builds

This matches other LLVM binary tools.

Differential Revision: https://reviews.llvm.org/D110313
The file was modifiedllvm/cmake/modules/LLVMExternalProjectUtils.cmake
Commit 8811227a0c0ac398857988b4fce0fb4dc699468b by craig.topper
[RISCV] Add more tests for (and (shl x, C2), C1) that can be improved by using a pair of shifts. NFC

These tests have C1 as a shifted mask having no leading zeros and
C3 trailing zeros. If C3 is more than C2, we can select this as
(slli (srli x, C3-C2), C3).
The file was modifiedllvm/test/CodeGen/RISCV/shift-and.ll
Commit 70f50114f37e86bd4869a75b1a8313440bd55780 by craig.topper
[RISCV] Add another isel optimization for (and (shl x, c2), c1)

Turn (and (shl x, c2), c1) -> (slli (srli x, c3-c2), c3) if c1 is a
shifted mask with no leading zeros and c3 trailing zeros where c3
is greater than c2.
The file was modifiedllvm/test/CodeGen/RISCV/shift-and.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
Commit 2875d3d484bb82dcd7f44bccafda8a52aacc328d by arsenm2
RegAllocGreedy: Remove an unhelpful auto, and don't use a reference
The file was modifiedllvm/lib/CodeGen/RegAllocGreedy.cpp
Commit d83ca624a1d52b600ddbd8bfcbb3d5d7c6003af7 by jhuber6
[OpenMP] Fix data-race in new device RTL

This patch fixes a data-race observed when using the new device runtime
library. The Internal control variable for the parallel level is read in
the `__kmpc_parallel_51` function while it could potentially be written
by other threads. This causes data corruption and will cause
nondetermistic behaviour in the runtime. This patch fixes this by adding
an explicit synchronization before the region starts.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D110366
The file was modifiedopenmp/libomptarget/DeviceRTL/src/Parallelism.cpp
Commit 953ddded1aa2b459a939e0f1649691c9086ba416 by tedwood
[lldb] Handle malformed qfThreadInfo reply

If the remote gdbserver's qfThreadInfo reply has a trailing comma,
GDBRemoteCommunicationClient::GetCurrentProcessAndThreadIDs will return
an empty vector of thread ids. This will cause lldb to recurse through
three functions trying to get the list of threads, until it blows its
stack and crashes.

A trailing comma is a malformed response, but it shouldn't cause lldb to
crash. This patch will return the tids received before the malformed
response.

Reviewed By: clayborg, labath

Differential Revision: https://reviews.llvm.org/D109937
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
The file was addedlldb/test/API/functionalities/gdb_remote_client/TestThreadInfoTrailingComma.py
Commit 80b92db02c5aec4e92b2df1492e8268a3239de26 by mcgrathr
[profile][fuchsia] Don't include extra NUL in log messages

Reviewed By: phosek

Differential Revision: https://reviews.llvm.org/D110361
The file was modifiedcompiler-rt/lib/profile/InstrProfilingPlatformFuchsia.c
Commit 1443ba6163d66743ff9f9d28b0505fca159b824c by Vang.Thao
[AMDGPU] Propagate defining src reg for AGPR to AGPR Copys

On targets that do not support AGPR to AGPR copying directly, try to find the
defining accvgpr_write and propagate its source vgpr register to the copies
before register allocation so the source vgpr register does not get clobbered.

The postrapseudos pass also attempt to propagate the defining accvgpr_write but
if the register to propagate is clobbered, it will give up and create new
temporary vgpr registers instead.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D108830
The file was modifiedllvm/lib/Target/AMDGPU/GCNPreRAOptimizations.cpp
The file was addedllvm/test/CodeGen/AMDGPU/agpr-to-agpr-copy.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll
Commit a6406ce18cb6d42265ce854f133545e049dc0d05 by Louis Dionne
[libc++][NFC] Refactor the std::reverse_view tests

Mostly, remove the global assumption that all ranges have size 8.
I should have called this out during the initial review.
The file was modifiedlibcxx/test/std/ranges/range.adaptors/range.reverse/base.pass.cpp
The file was modifiedlibcxx/test/std/ranges/range.adaptors/range.reverse/size.pass.cpp
The file was modifiedlibcxx/test/std/ranges/range.adaptors/range.reverse/types.h
The file was removedlibcxx/test/std/ranges/range.adaptors/range.reverse/ctad.compile.pass.cpp
The file was modifiedlibcxx/test/std/ranges/range.adaptors/range.reverse/ctor.view.pass.cpp
The file was modifiedlibcxx/test/std/ranges/range.adaptors/range.reverse/begin.pass.cpp
The file was modifiedlibcxx/test/std/ranges/range.adaptors/range.reverse/ctor.default.pass.cpp
The file was modifiedlibcxx/test/std/ranges/range.adaptors/range.reverse/end.pass.cpp
The file was addedlibcxx/test/std/ranges/range.adaptors/range.reverse/ctad.pass.cpp
Commit 2ce73f13c98ad3bfb904ac991f5810ddff9e77e7 by Lang Hames
[ORC] Fix file header.
The file was modifiedllvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleExecutorMemoryManager.cpp
Commit eb115aa6c841c4a7fcd1e1ce4423955135c2ae51 by leonardchan
Revert "[compiler-rt][profile] Add padding after binary IDs"

This reverts commit 6bc9c8dfe32cc4662f2ed9041af527f69dfff13b.

Reverted because this broke some PPC buildbots.
The file was modifiedcompiler-rt/lib/profile/InstrProfilingPlatformLinux.c
Commit e9d1a679a1c9cb309aea8c5d944e55865d38b867 by hoy
[CSSPGO] Do not pass -fpseudo-probe-for-profiling to the linker.

The correponding linker switch has been removed by https://reviews.llvm.org/D110209, so do not pass it in clang.

Reviewed By: wenlei

Differential Revision: https://reviews.llvm.org/D110371
The file was removedclang/test/Driver/pseudo-probe-lto.c
The file was modifiedclang/lib/Driver/ToolChains/CommonArgs.cpp
Commit 40b230f6856d41f1b8dae7ac2d8e5e5e8de1ca77 by craig.topper
[RISCV] Limit transformAddImmMulImm to prevent an infinite loop.

This fixes an issue reported in D108607.
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/test/CodeGen/RISCV/addimm-mulimm.ll
Commit 4f28a2eb037defa6a8d85a69e1ff56fe85c0a27b by daniil.fukalov
[NFC] Refactor tests to improve readability.
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/insertelement.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/logicalop.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/control-flow.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/fsub.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/fma.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/fadd.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/shifts.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/bit-ops.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/add-sub.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/fused_costs.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/fdiv.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/addrspacecast.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/fneg.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/mul.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/reduce-or.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/extractelement.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/fabs.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/fmul.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/reduce-and.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/shufflevector.ll
Commit 7647a8413be55568a8a80fae379a872b7359f5b5 by i
Fix -fno-unwind-tables -fasynchronous-unwind-tables to emit unwind tables

This matches GCC.

Change the CC1 option to encode the unwind table level (1: needed by exceptions,
2: asynchronous) so that we can support two modes in the future.
The file was modifiedclang/include/clang/Driver/Options.td
The file was modifiedclang/test/Driver/freebsd.c
The file was modifiedclang/test/CodeGenCXX/thunks-ehspec.cpp
The file was modifiedclang/test/CodeGenCXX/exceptions-seh-filter-uwtable.cpp
The file was modifiedclang/test/CodeGenCXX/linetable-eh.cpp
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedclang/test/Driver/fuchsia.c
The file was modifiedclang/test/Driver/ppc-features.cpp
The file was modifiedclang/include/clang/Basic/CodeGenOptions.def
The file was modifiedclang/test/Driver/sanitize_unwind_tables.c
The file was modifiedclang/test/Driver/windows-exceptions.cpp
The file was modifiedclang/test/CodeGen/asan-globals.cpp
The file was modifiedclang/test/Driver/win-macho-unwind.c
The file was modifiedclang/test/Driver/clang-translation.c
The file was modifiedclang/test/CodeGenCXX/thunks.cpp
The file was modifiedclang/test/Driver/aarch64-features.c
The file was modifiedclang/test/Preprocessor/unwind-tables.c
Commit 76d845cb169f048cb6f2176c3e7a6534dc5af097 by nemanja.i.ibm
[clang-format] Fix unittest failures with -Werror

Commit a44ab1702539 added a unit test that fails to build with
-Werror which causes build bot breaks on bots that include that
option in their build. This patch just adds the necessary casts to
silence the warnings.
The file was modifiedclang/unittests/Format/QualifierFixerTest.cpp
Commit c965fde7c234abbb311ab9f58e8684970a69c916 by Lang Hames
[ORC] Shut down services in SimpleRemoteEPCServer.

This should have been included with ExecutorBootstrapService in 78b083dbb72,
but was accidentally left out. It give services a chance to release any
resources that they have acquired.
The file was modifiedllvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleRemoteEPCServer.cpp
Commit c579c658cd42034449d4fa19f28b43f2082c0991 by leonardchan
[compiler-rt][profile] Make corrupted-profile.c more robust

This test specifically checks that profiles are not mergeable if there's a
change in the CounterPtr in the profile header. The test manually changes
CounterPtr by explicitly calling memset on some offset into the profile file.
This test would fail if binary IDs were emitted because the offset calculation
does not take into account the binary ID sizes.

This patch updates the test to use types provided in profile/InstrProfData.inc
to make it more resistant to profile layout changes.

Differential Revision: https://reviews.llvm.org/D110277
The file was modifiedcompiler-rt/test/profile/Linux/corrupted-profile.c
Commit 2c1defeee40cf643ea6f0fa5e01164c9a4c48c30 by tejohnson
[ThinLTO] Don't emit original GUID for locals to distributed indexes

In ThinLTO for locals we normally compute the GUID from the name after
prepending the source path to get a unique global id. SamplePGO indirect
call profiles contain the target GUID without this uniquification,
however (unless compiling with -funique-internal-linkage-names).
Therefore, the index contains the original GUID of the local symbols
(without module path prepended to uniquify), in order to correctly
handle the call edges added for these indirect call profile targets
with SamplePGO.

We were emitting these to the combined index when writing it out as
bitcode, which is unnecessary and causes overhead when writing out the
indexes for distributed backends. The only use of the original GUID name
is in the thin link. Suppress it in that case. This reduced the thin
link time for a large distributed build by about 7%, and the aggregate
size of the serialized indexes by over 2%.

Continue to print it when writing out the full index, since that is just
used for debugging and testing.

Update a distributed thinlto index test to contain a local and ensure
that we don't get a COMBINED_ORIGINAL_NAME record.

Differential Revision: https://reviews.llvm.org/D110296
The file was modifiedllvm/test/ThinLTO/X86/distributed_indexes.ll
The file was modifiedllvm/lib/Bitcode/Writer/BitcodeWriter.cpp
Commit 7da4ee2df088d39c7ca6531d80172af7d973bb67 by tejohnson
[ThinLTO] Fix bot failures

Fix bot failures after 2c1defeee40cf643ea6f0fa5e01164c9a4c48c30. The new
GUID I added isn't matching because it is a local with the source path
prepended. There isn't much use in matching the GUID's exactly anyway,
so remove those from the patterns.
The file was modifiedllvm/test/ThinLTO/X86/distributed_indexes.ll
Commit 8dc16ba8d2b429261dd95e88496b2a866dc18ae5 by springerm
[mlir][linalg] Merge all tiling passes into a single one.

Passes such as `linalg-tile-to-tiled-loop` are merged into `linalg-tile`.

Differential Revision: https://reviews.llvm.org/D110214
The file was modifiedmlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
The file was modifiedmlir/test/Dialect/Linalg/tile-conv.mlir
The file was modifiedmlir/test/Dialect/Linalg/tile-parallel-reduce.mlir
The file was modifiedmlir/test/Integration/Dialect/Linalg/CPU/test-conv-1d-call.mlir
The file was modifiedmlir/test/Dialect/Linalg/tile-conv-padding.mlir
The file was modifiedmlir/test/Integration/Dialect/Linalg/CPU/test-conv-2d-nhwc-hwcf-call.mlir
The file was modifiedmlir/test/Integration/Dialect/Linalg/CPU/test-conv-3d-ndhwc-dhwcf-call.mlir
The file was modifiedmlir/include/mlir/Dialect/Linalg/Passes.td
The file was modifiedmlir/test/Integration/Dialect/Linalg/CPU/test-conv-1d-nwc-wcf-call.mlir
The file was modifiedmlir/test/Integration/Dialect/Linalg/CPU/test-conv-3d-call.mlir
The file was modifiedmlir/include/mlir/Dialect/Linalg/Passes.h
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Tiling.cpp
The file was modifiedmlir/test/Integration/Dialect/Linalg/CPU/test-tensor-matmul.mlir
The file was modifiedmlir/test/Dialect/Linalg/tile-parallel.mlir
The file was modifiedmlir/test/Dialect/Linalg/tile-simple-conv.mlir
The file was modifiedmlir/test/Dialect/Linalg/tile.mlir
The file was modifiedmlir/test/Dialect/Linalg/tile-tensors.mlir
The file was modifiedmlir/include/mlir/Dialect/Linalg/Utils/Utils.h
The file was modifiedmlir/test/Dialect/Linalg/tile-indexed.mlir
The file was modifiedmlir/test/Integration/Dialect/Linalg/CPU/test-conv-2d-call.mlir
The file was modifiedmlir/test/Dialect/Linalg/tile-pad-tensor-op.mlir
Commit 2190f8a8b1e01b7bc7429eb490f3001a23f27df1 by springerm
[mlir][linalg] Support tile+peel with TiledLoopOp

Only scf.for was supported until now.

Differential Revision: https://reviews.llvm.org/D110220
The file was modifiedmlir/test/Dialect/Linalg/tile-and-peel-tensors.mlir
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
The file was modifiedmlir/test/lib/Dialect/Linalg/TestLinalgTransforms.cpp
Commit 83f3c615dde3fce5c0560c19316b08c1e6aa8c27 by joker.eph
Add missing storageType to AttrDef to ODS

This is only noticeable when using an attribute across dialects I think.
Previously the namespace would be ommited, but it wouldn't matter as
long as the generated code stays within a single namespace.

Differential Revision: https://reviews.llvm.org/D110367
The file was modifiedmlir/test/mlir-tblgen/op-attribute.td
The file was modifiedmlir/include/mlir/IR/OpBase.td
Commit e470f9268a448fedea25289ec343f82ff52ccc36 by llvm-project
[Polly] Implement user-directed loop distribution/fission.

This is a simple version without the possibility to define distribute
points or followup-transformations. However, it is the first
transformation that has to check whether the transformation is correct.

It interprets the same metadata as the LoopDistribute pass.

Re-apply after revert in c7bcd72a38bcf99e03e4651ed5204d1a1f2bf695 with
fix: Take isBand out of #ifndef NDEBUG since it now is used
unconditionally.
The file was modifiedpolly/include/polly/DependenceInfo.h
The file was modifiedpolly/include/polly/ManualOptimizer.h
The file was modifiedpolly/lib/Transform/ManualOptimizer.cpp
The file was modifiedpolly/include/polly/ScheduleTreeTransform.h
The file was modifiedpolly/lib/Analysis/DependenceInfo.cpp
The file was modifiedpolly/lib/Transform/ScheduleOptimizer.cpp
The file was addedpolly/test/ScheduleOptimizer/ManualOptimization/distribute_illegal_pragmaloc.ll
The file was addedpolly/test/ScheduleOptimizer/ManualOptimization/distribute_heuristic.ll
The file was modifiedpolly/lib/Transform/ScheduleTreeTransform.cpp
The file was addedpolly/test/ScheduleOptimizer/ManualOptimization/distribute_illegal_looploc.ll
Commit afab3c488f0c86af87e262cc7454e04de18e3e6a by i
[Driver] Default Generic_GCC x86 to -fasynchronous-unwind-tables

to match GCC and Clang's own x86-64.
The file was modifiedclang/lib/Driver/ToolChains/Gnu.cpp
The file was modifiedclang/test/Driver/clang-translation.c
Commit 7a62a5b56d670c4e152159740cd7fc4030a9470f by Christudasan.Devadasan
[AMDGPU] Legalize initialized LDS variables

We don't allow an initializer for LDS variables
and there is an early abort during instruction
selection. This patch legalizes them by ignoring
the init values. During assembly emission, proper
error reporting already exists for such instances.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D109901
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/lds-zero-initializer.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/lds-zero-initializer.ll
Commit 25ac0d3c73d68c017546eb622ba7632c6b581bfb by dblaikie
DebugInfo: Implement the -gsimple-template-names functionality

This excludes certain names that can't be rebuilt from the available
DWARF:

* Atomic types - no DWARF differentiating int from atomic int.
* Vector types - enough DWARF (an attribute on the array type) to do
  this, but I haven't written the extra code to add the attributes
  required for this
* Lambdas - ambiguous with any other unnamed class
* Unnamed classes/enums - would need column info for the type in
  addition to file/line number
* noexcept function types - not encoded in DWARF
The file was modifiedclang/lib/CodeGen/CGDebugInfo.cpp
The file was addedclang/test/CodeGenCXX/debug-info-simple-template-names.cpp
Commit a2c1cf09dfaaa6d2161fee00f8317005bf955d64 by Lang Hames
[ORC] Introduce EPCGenericDylibManager / SimpleExecutorDylibManager.

EPCGenericDylibManager provides an interface for loading dylibs and looking up
symbols in the executor, implemented using EPC-calls to functions in the
executor.

SimpleExecutorDylibManager is an executor-side service that provides the
functions used by EPCGenericDylibManager.

SimpleRemoteEPC is updated to use an EPCGenericDylibManager instance to
implement the ExecutorProcessControl loadDylib and lookup methods. In a future
commit these methods will be removed, and clients updated to use
EPCGenericDylibManagers directly.
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/Shared/OrcRTBridge.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/CMakeLists.txt
The file was modifiedllvm/lib/ExecutionEngine/Orc/SimpleRemoteEPC.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/TargetProcess/CMakeLists.txt
The file was addedllvm/include/llvm/ExecutionEngine/Orc/EPCGenericDylibManager.h
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/TargetProcess/SimpleRemoteEPCServer.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleRemoteEPCServer.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/SimpleRemoteEPC.h
The file was addedllvm/include/llvm/ExecutionEngine/Orc/TargetProcess/SimpleExecutorDylibManager.h
The file was addedllvm/lib/ExecutionEngine/Orc/EPCGenericDylibManager.cpp
The file was addedllvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleExecutorDylibManager.cpp
Commit 58d9ed2c935d6665da388cd72273360349792281 by llvmgnsyncbot
[gn build] Port a2c1cf09dfaa
The file was modifiedllvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/TargetProcess/BUILD.gn
Commit 40ddde5d1fa7e5eadb76f6c3cc37dae2f80a8ca2 by Christudasan.Devadasan
[TableGen] Allow targets to entirely ignore Psets for registers

Tablegen currently expects targets to have at least one
pressure set for every broader register category. AMDGPU's
VGPR or AGPR, for instance, seemed to work correctly without
any pset, though we have forced one for each type to avoid
the assertion in computeRegUnitSets. However, psets can not
be entirely empty. At least one set is mandatory for every
target. This patch bypasses the assertion for the classes
when GeneratePressureSet is zero while ensuring the
RegUnitSets are not empty.

Reviewed By: arsenm, rampitec

Differential Revision: https://reviews.llvm.org/D110305
The file was modifiedllvm/utils/TableGen/CodeGenRegisters.cpp
The file was addedllvm/test/TableGen/empty-psets.td
The file was addedllvm/test/TableGen/bare-minimum-psets.td
Commit 3675e147a1ccbce44ce64a1bc8dd38547aba1443 by David CARLIER
[Sanitizers] intercept ttyent api on FreeBSD.

and ttyentpath separately on NetBSD.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D109843
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_platform_limits_freebsd.cpp
The file was addedcompiler-rt/test/sanitizer_common/TestCases/Linux/ttyent.cpp
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_platform_limits_freebsd.h
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
The file was removedcompiler-rt/test/sanitizer_common/TestCases/NetBSD/ttyent.cpp
Commit 4ed05312a1557b2f2552298a3aac12c2e224d77e by shivam98.tkg
[docs] Document the --print-passes flag in opt.

Reviewed By: aeubanks, asbirlea

Differential Revision: https://reviews.llvm.org/D109663
The file was modifiedllvm/docs/CommandGuide/opt.rst
Commit ef391df2b63320c9aec61045d8b96917081f0cb2 by Lang Hames
[ORC] Rename ExecutorAddress to ExecutorAddr.

Removing the 'ess' suffix improves the ergonomics without sacrificing clarity.
Since this class is likely to be used more frequently in the future it's worth
some short term pain to fix this now.
The file was modifiedllvm/lib/ExecutionEngine/Orc/LookupAndRecordAddrs.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/TargetProcess/RegisterEHFrames.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/OrcRPCExecutorProcessControl.h
The file was modifiedllvm/unittests/ExecutionEngine/Orc/SimpleExecutorMemoryManagerTest.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/EPCGenericMemoryAccess.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleExecutorDylibManager.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/EPCEHFrameRegistrar.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/ELFNixPlatform.h
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/TargetProcess/SimpleExecutorDylibManager.h
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/EPCGenericJITLinkMemoryManager.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/EPCDebugObjectRegistrar.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/Shared/SimplePackedSerialization.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleExecutorMemoryManager.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/Shared/SimpleRemoteEPCUtils.h
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/Shared/TargetProcessControlTypes.h
The file was modifiedllvm/unittests/ExecutionEngine/Orc/LookupAndRecordAddrsTest.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/Shared/OrcRTBridge.h
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/ExecutorProcessControl.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/EPCGenericDylibManager.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleRemoteEPCServer.cpp
The file was modifiedllvm/unittests/ExecutionEngine/Orc/EPCGenericJITLinkMemoryManagerTest.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/TargetProcess/SimpleRemoteEPCServer.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/TargetProcess/OrcRTBootstrap.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/EPCGenericJITLinkMemoryManager.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/TargetProcess/OrcRTBootstrap.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/ELFNixPlatform.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/EPCGenericDylibManager.h
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/LookupAndRecordAddrs.h
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/TargetProcess/SimpleExecutorMemoryManager.h
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/SimpleRemoteEPC.h
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/Shared/WrapperFunctionUtils.h
The file was modifiedllvm/unittests/ExecutionEngine/Orc/EPCGenericMemoryAccessTest.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderGDB.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/ExecutorProcessControl.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/SimpleRemoteEPC.cpp
The file was modifiedllvm/unittests/ExecutionEngine/Orc/WrapperFunctionUtilsTest.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/MachOPlatform.h
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/TargetProcess/ExecutorBootstrapService.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/Shared/SimpleRemoteEPCUtils.cpp
Commit e70082e9add7e82e580148fbd4c0a5a832763cb6 by dblaikie
Remove non-portable directory separator from test
The file was modifiedclang/test/CodeGenCXX/debug-info-simple-template-names.cpp
Commit 8d9ddd4f509c54d05a38427d7999c061d88ca35c by dblaikie
DebugInfo: STN: Handle unreconstitutable types in function types
The file was modifiedclang/lib/CodeGen/CGDebugInfo.cpp
The file was modifiedclang/test/CodeGenCXX/debug-info-simple-template-names.cpp
Commit 165926aa4ce9f05572cf8828210a1af5ce286bdb by dblaikie
Fix that same path separator issue again...
The file was modifiedclang/test/CodeGenCXX/debug-info-simple-template-names.cpp
Commit 840afbde48e90213028174fdba715e10aa39dd85 by albionapc
[PowerPC] SemaChecking for darn family of builtins

The __darn family of builtins are only available on Pwr9,
and only __darn_32 is available on both 64 and 32 bit, while the rest
are only available on 64 bit. The patch adds sema checking
for these builtins and separate the __darn_32's 32 bit
test cases.

Differential revision: https://reviews.llvm.org/D110282
The file was modifiedclang/test/CodeGen/builtins-ppc.c
The file was modifiedclang/test/CodeGen/builtins-ppc-xlcompat-darn.c
The file was modifiedclang/test/CodeGen/builtins-ppc-xlcompat-error.c
The file was modifiedclang/lib/Sema/SemaChecking.cpp
Commit 0820fbab99a1f1986a8c6e0a8e5cb4542ec52515 by Lang Hames
[ORC-RT] Rename ExecutorAddress to ExecutorAddr.

This is an ORC-runtime counterpart to LLVM commit ef391df2b63, and the
motivation is the same: to move to a shorter name to improve the ergonomics of
this type before it's more widely adopted.
The file was modifiedcompiler-rt/lib/orc/elfnix_platform.cpp
The file was modifiedcompiler-rt/lib/orc/simple_packed_serialization.h
The file was modifiedcompiler-rt/lib/orc/macho_platform.cpp
The file was modifiedcompiler-rt/lib/orc/macho_platform.h
The file was modifiedcompiler-rt/lib/orc/executor_address.h
The file was modifiedcompiler-rt/lib/orc/elfnix_platform.h