Changes

Summary

  1. [AArch64][GlobalISel] Fix crash in the extend(extract_vector_elt) optimization. (details)
  2. [clang-offload-bundler][docs][NFC] invalid indentation cause build issue (details)
  3. [lldb] Fix target-symbols-add-unwind.test for clang 7647a841 (details)
  4. [clang-format] ensure clang-format command-line argument sets up the default left/right qualifier ordering (details)
  5. [clang-format][docs] Fix documentation of clang-format BasedOnStyle type (details)
  6. [GlobalISel][IRTranslator] Fix crash during bit-test switch optimization with odd types. (details)
  7. [Driver] Correctly handle static C++ standard library (details)
  8. [mlir][linalg] Fix result type in FoldSourceTensorCast (details)
  9. [AArch64] Rewrite ldst-unsignedimm.ll codegen test. (details)
  10. [SystemZ] Implement ISD::BITCAST for fp128 -> i128. (details)
  11. [libcxx][pretty printers] Check GDB Python scripting support (details)
  12. [clang-format] Fixed an unused variable warning (details)
  13. [llvm-objcopy][docs] Add missing options to the help output and the command guide (details)
  14. [Analysis] Fix issues when querying vscale attributes on functions (details)
  15. [libcxx][pretty printers] Import gdb module in gdb feature check (details)
  16. [clang-doc] Pass Record argument by const-ref. NFCI. (details)
  17. [X86][SLM] Fix ADDQ/SUBQ/CMPEQQ throughput to account for running on either port. (details)
  18. [RISCV] (1/2) Add the tail policy argument to builtins/intrinsics. (details)
  19. [RISCV] (2/2) Add the tail policy argument to builtins/intrinsics. (details)
  20. Revert "[libcxx][pretty printers] Import gdb module in gdb feature check" (details)
  21. [analyzer] Retrieve a value from list initialization of constant array declaration in a global scope. (details)
  22. Reapply "[Dexter] Improve performance by evaluating expressions only when needed" (details)
  23. [CodeMoverUtils] Enhance isSafeToMoveBefore() when moving BBs (details)
  24. [mlir] add pad_tensor(tensor.cast) -> pad_tensor canonicalizer (details)
  25. [MLIR] PresburgerSet: support divisions in operations (details)
  26. [NFC] Mark LI.getLoopsInPreorder and LI.getLoopsInReverseSiblingPreorder const. (details)
  27. [LiveIntervals] Fix repairOldRegInRange for simple def cases (details)
  28. [LiveIntervals] Repair live intervals that gain subranges (details)
  29. [lldb] [Host] Refactor Socket::DecodeHostAndPort() to use LLVM API (details)
  30. Revert "[lldb] [Host] Refactor Socket::DecodeHostAndPort() to use LLVM API" (details)
  31. [flang][fir] Add support to mangle/deconstruct namelist group name (details)
  32. [Analysis] Fix another issue when querying vscale attributes on functions (details)
  33. [lldb] [Host] Refactor Socket::DecodeHostAndPort() to use LLVM API (details)
  34. [SystemZ] NFC: Remove unused intrinsic template arg 'name' (details)
  35. [compiler-rt] Use portable "#!/usr/bin/env bash" shebang for tests. (details)
  36. Revert "[DSE] Track earliest escape, use for loads in isReadClobber." (details)
  37. tsan: add a test for flushing memory (details)
  38. Revert "[JumpThreading] Ignore free instructions" (details)
  39. tsan: add a stress test (details)
  40. Revert "[InstCombine] fold cast of right-shift if high bits are not demanded (2nd try)" (details)
  41. [TargetLibraryInfo][AMDGPU] Minor cleanup, NFC (details)
  42. [llvm-objcopy][NFC] Add a helper method RelocationSectionBase::getNamePrefix() (details)
  43. [Transforms/Utils] Remove redundant declaration computeSyntheticCounts (NFC) (details)
  44. [libc++][NFC] Add missing link to a ranges review (details)
  45. [InstCombine] add tests for lshr-trunc-lshr; NFC (details)
  46. [x86] convert logic-of-FP-compares to FP logic-of-vector-compares (details)
  47. [libc++] Require a C++20 capable compiler. (details)
  48. [X86][SSE] combineMulToPMADDWD - replace sext(v8i16) -> zext(v8i16) (details)
  49. tsan: don't use pipe2 in tests (details)
  50. [MC][NFC] Add end-of-namespace comments (details)
  51. Recommit "[DSE] Track earliest escape, use for loads in isReadClobber." (details)
  52. [PowerPC] Add range check for vec_genpcvm builtins (details)
  53. [mlir] Linalg: ensure tile-and-pad always creates padding as requested (details)
  54. [AMDGPU] Always reserve flat scratch SGPR for architected flat scratch (details)
  55. Revert "[flang][fir] Add support to mangle/deconstruct namelist group name" (details)
  56. Re-apply "[JumpThreading] Ignore free instructions" (details)
  57. [PowerPC] Mark splat immediate instructions as rematerializable (details)
  58. Write test for CWG1772/CWG1762/CWG1779, mark them 'done', and update (details)
  59. Fix wrong FixIt about union in cppcoreguidelines-pro-type-member-init (details)
  60. [PowerPC][NFC] Add test case in preparation for codegen change (details)
  61. [SCCP] Regenerate bigint test checks (details)
  62. [ConstantFold] ConstantFoldGetElementPtr - use APInt::isNegative() instead of getSExtValue() to support big ints (details)
  63. [libc++] Refactor the tests for common_view to reduce duplication (details)
  64. Add test for DR1307, which we have already implemented. (details)
  65. Fix test from 8dd42f, capitalization in test (details)
  66. Revert "Allow rematerialization of virtual reg uses" (details)
  67. [NFC][libc++] Update clang-format style. (details)
  68. [mlir:OpConversionPattern] Add overloads for taking an Adaptor instead of ArrayRef (details)
  69. [mlir:OpConversion] Remove the remaing usages of the deprecated matchAndRewrite methods (details)
  70. [SystemZ][z/OS] Add GOFF Support to the DataLayout (details)
  71. [libc++][NFC] Mark LWG3158 as implemented (details)
  72. [LiveIntervals] Fix asan debug build failures (details)
  73. DebugInfo: Move the '=' version of -gsimple-template-names to the frontend (details)
  74. [libc++][NFC] Update status of old issue LWG2560 -- we implement it properly (details)
  75. [ARM] Addition jump table plus while loop block placement pass test. (details)
  76. [compiler-rt] Add shared_cxxabi requirement to some tests (details)
  77. [TargetLibraryInfo] Correctly handle sqrt*_finite (details)
  78. [DSE] Add additional capture tests (NFC) (details)
  79. [NFC] Replace hard-coded usages of SystemZ::R15D with SpecialRegisters API (details)
  80. [libc] Add an implementation of qsort. (details)
  81. [mlir][tosa] Add some transpose folders (details)
  82. [ThinLTO] Update combined index for SamplePGO indirect calls to locals (details)
  83. [mlir:MemRef] Move DmaStartOp/DmaWaitOp to ODS (details)
  84. Fix bot failure by adding needed dependence (details)
  85. [InstCombine] match variable names and code comments; NFC (details)
  86. [InstCombine] fold lshr(trunc(lshr X, C1)) C2 (details)
  87. [Polly] Fix wrong redirect in test case. (details)
  88. [flang][fir] Add support to mangle/deconstruct namelist group name (details)
  89. [mlir:OpAsm] Factor out the common bits of (Op/Dialect)Asm(Parser/Printer) (details)
  90. [IR] Handle large element size when calculating GEP indices (details)
  91. [SystemZ][z/OS] Introduce the GOFFMCAsmInfo Interface for z/OS (details)
  92. [ORC] Add 'contains' and 'overlaps' operations to ExecutorAddrRange. (details)
  93. [gn build] Port a9ae2436fc0d (details)
  94. [gn build] Port c0d889995e70 (details)
  95. [AMDGPU] Limit promote alloca max size in functions (details)
  96. [llvm-profgen] Ignore invalid perf line in LBR record (details)
  97. [mlir] Create a generic reduction detection utility (details)
  98. [AutoFDO][llvm-profgen] Profile generation for LBR(non-CS) sample (details)
  99. [mlir][tosa] Do not fold transpose with quantized types (details)
  100. [AutoFDO][llvm-profgen] Report zero count for unexecuted part of function code (details)
  101. [llvm-profgen] Unify output format of different unsymbolized profiles (details)
  102. [dsymutil] Track incompleteness across unions (details)
  103. WIP: Verify -gsimple-template-names=mangled values (details)
  104. [ORC] Allow construction of an ExecutorAddrRange from an addr and a size. (details)
  105. [lldb] Copy the system debugserver in LLDB.framework (details)
  106. [dsymutil] Update union-fwd-decl.test for Windows (details)
  107. [RISCV] Add another isel optimization for (and (shl X, c2), c1). (details)
  108. Fixed a bug in https://reviews.llvm.org/rG8eb617d719bdc6a4ed7773925d2421b9bbdd4b7a. (details)
  109. Add "REQUIRES: zlib" in forward-compatible.test since it handles compressed file. (details)
  110. [llvm] Improve export.sh with help and snapshot (details)
  111. Revert "[Driver] Correctly handle static C++ standard library" (details)
  112. [llvm] Remove LLVM_CHECK_ENABLED_PROJECTS again (details)
  113. [llvm-profdata] Extend support of --topn to sample profiles (details)
  114. [mlir:ElementsAttr] Avoid crash on empty contiguous ranges (details)
  115. DebugInfo: Use the signedness of the underlying enum when encoding enum non-type-template-parameters (details)
  116. Add pragma to make it easier to find "image list" impl (details)
  117. [CMake] Pass through CMAKE_READELF to subbuilds (details)
  118. [AArch64][AMDGPU] Re-generate some tests with CHECK-NEXT to prepare for a patch. (details)
  119. [clang] set templates as invalid when any of the parameters are invalid (details)
  120. [RISCV] Fix incorrect operand type of inst alias for InstR4 (details)
  121. [TTI] getUserCost - Ensure a vector insert/extract index is in unsigned 32-bit range (details)
  122. tsan: uninline RacyStacks::operator== (details)
  123. [ARM] Fix Arm block placement creating branches after jump tables. (details)
  124. [MLIR] Add functionality to remove redundant local variables (details)
  125. [DAG] combineShiftToMULH - move getValueType() inside assert. NFCI. (details)
  126. [IR] DIBuilder::createEnumerator - pass APSInt by const reference (details)
  127. [CMake] Consistently use the LibXml2::LibXml2 target instead of LIBXML2_LIBRARIES (details)
  128. [InstCombine] Ensure shifts are in range for (X << C1) / C2 -> X fold. (details)
  129. [fir] Add desc to fir.array_load op and update operand name (details)
  130. [lldb] Convert misc. StringConvert uses (details)
  131. [X86] combineShiftToPMULH - relax from ISA from SSE41 to SSE2 (details)
  132. [X86] X86FastISel::fastMaterializeConstant - break if-else chain to fix llvm-else-after-return warning. NFCI (details)
  133. [X86][SSE] combineMulToPMADDWD - enable sext(v8i16) -> zext(v8i16) fold on pre-SSE41 targets (details)
  134. [Mips] Remove redundant declarations (NFC) (details)
  135. [X86][SSE] combineMulToPMADDWD - enable sext(v8i16) -> zext(v8i16) fold on sub-128 bit vectors (details)
  136. [X86][SSE] combineMulToPMADDWD - mask off upper bits of sign-extended vXi32 constants (details)
  137. [CostModel][X86] Adjust vXi32 multiply costs if it can be performed using PMADDWD (details)
  138. [clang-format] Left/Right alignment fixer can cause false positive replacements when they don't actually change anything (details)
  139. [DAG] ReduceLoadOpStoreWidth - replace getABITypeAlign with allowsMemoryAccess (PR45116) (details)
  140. [ORC] Introduce EPCGenericRTDyldMemoryManager. (details)
  141. [lli] Add ChildTarget dependence on OrcTargetProcess library. (details)
  142. Revert "[ORC] Introduce EPCGenericRTDyldMemoryManager." (details)
  143. [ELF][test] Improve test coverage (details)
  144. [ORC-RT] ExecutorAddrDiff ergonomic improvements; contains and overlaps methods (details)
  145. [BasicAA] Don't consider Argument as escape source (NFCI) (details)
  146. [DSE] Make capture check more precise (details)
  147. [AA] Move earliest escape tracking from DSE to AA (details)
  148. [ELF] Default gotBaseSymInGotPlt to false (NFC for most architectures) (details)
  149. [ELF] Replace noneRel = R_*_NONE with static constexpr. NFC (details)
  150. [ELF] Remove unneeded binding parameter from addOptionalRegular. NFC (details)
  151. [ORC] Fix uninitialized variable. (details)
  152. [ORC] Wait for handleDisconnect to complete in SimpleRemoteEPC::disconnect. (details)
  153. MLIR can't support -Bsymbolic link option, fail at CMake time with a helpful message instead of broken runtime (details)
  154. [ADT]  Add trailing comma on TYPED_TEST_SUITE (details)
Commit 661ab70314008b609dda792e2c9dc57afa1f8864 by Amara Emerson
[AArch64][GlobalISel] Fix crash in the extend(extract_vector_elt) optimization.

It was assuming that GPR extends could only have destination sizes of 32 or 64
bits, but for AArch64 we allow < 32 bits even without matching size physregs.
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/select-extract-vector-elt-with-extend.mir
Commit 7890afddecff01119f4d5e8825b43dd2c8361648 by mydeveloperday
[clang-offload-bundler][docs][NFC] invalid indentation cause build issue
The file was modifiedclang/docs/ClangOffloadBundler.rst
Commit cd6893a5a346d1b9c34ba621adad5f881e250695 by pavel
[lldb] Fix target-symbols-add-unwind.test for clang 7647a841

We need a different flag combination to produce .debug_frame.
The file was modifiedlldb/test/Shell/SymbolFile/target-symbols-add-unwind.test
Commit 87ab958641fa30ed1e5880aaf43b909c552af0dc by mydeveloperday
[clang-format] ensure clang-format command-line argument sets up the default left/right qualifier ordering

When specifying the alignment direction on the command line ensure
we set up the default ordering.

Fix spelling mistakes in the command-line argument

Reviewed By: HazardyKnusperkeks

Differential Revision: https://reviews.llvm.org/D110359
The file was modifiedclang/tools/clang-format/ClangFormat.cpp
Commit 9e8fff26f374766b76aad9531ee5e6860f67e46c by mydeveloperday
[clang-format][docs] Fix documentation of clang-format BasedOnStyle type

Fix little inconsistency and use `std::string` (which is used everywhere
else) instead of `string`

Reviewed By: MyDeveloperDay, HazardyKnusperkeks

Differential Revision: https://reviews.llvm.org/D108765
The file was addedclang/docs/tools/plurals.txt
The file was modifiedclang/docs/tools/dump_format_style.py
The file was modifiedclang/docs/ClangFormatStyleOptions.rst
Commit 9f773b17c2bc6916f12048a52ae271d1bf0edacf by Amara Emerson
[GlobalISel][IRTranslator] Fix crash during bit-test switch optimization with odd types.

Odd switch case types cause a crash in the conversion to MVT. Instead use a pointer sized
scalar type which is what SDAG does in these cases.
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/irtranslator-switch-bittest.ll
The file was modifiedllvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
Commit 03142c5f67788bcc1573f76732d0fccd75c6b965 by phosek
[Driver] Correctly handle static C++ standard library

When statically linking C++ standard library, we shouldn't add -Bdynamic
after including the library on the link line because that might override
user settings like -static and -static-pie. Rather, we should surround
the library with --push-state/--pop-state to make sure that -Bstatic
only applies to C++ standard library and nothing else. This has been
supported since GNU ld 2.25 (2014) so backwards compatibility should
no longer be a concern.

Differential Revision: https://reviews.llvm.org/D110128
The file was modifiedclang/test/Driver/linux-ld.c
The file was modifiedclang/lib/Driver/ToolChains/Gnu.cpp
The file was modifiedclang/lib/Driver/ToolChains/Fuchsia.cpp
The file was modifiedclang/test/Driver/fuchsia.cpp
Commit f3f25ffc04c0cbcc9a9bfc1b32b61750e8934ea8 by springerm
[mlir][linalg] Fix result type in FoldSourceTensorCast

* Do not discard static result type information that cannot be inferred from lower/upper padding.
* Add optional argument to `PadTensorOp::inferResultType` for specifying known result dimensions.

Differential Revision: https://reviews.llvm.org/D110380
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td
The file was modifiedmlir/test/Dialect/Linalg/canonicalize.mlir
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
Commit 2b23db78a33c2a6852ca098ebfe9b5636ef7d980 by david.green
[AArch64] Rewrite ldst-unsignedimm.ll codegen test.

Instead of relying on many volatile loads/stores in a single function,
rewrite the test to use separate functions as any other test would.
The file was modifiedllvm/test/CodeGen/AArch64/ldst-unsignedimm.ll
Commit ea92283449f9b132531ef152625e3e799395e449 by paulsson
[SystemZ] Implement ISD::BITCAST for fp128 -> i128.

The type legalizer has by default no method of doing this bitcast other than
storing and reloading the value from stack.

This patch implements a custom lowering of this operation using extractions
of subregs (z13 and earlier using FP128 register pairs), or of vector
elements (with 'vector enhancements 1' using VR128 FP registers).

Review: Ulrich Weigand

Differential Revision: https://reviews.llvm.org/D110346
The file was addedllvm/test/CodeGen/SystemZ/fp-conv-19.ll
The file was modifiedllvm/lib/Target/SystemZ/SystemZISelLowering.cpp
Commit 0a36c72dee61a0a97805a3cd297572ad0c38d979 by david.spickett
[libcxx][pretty printers] Check GDB Python scripting support

I found this after upgrading from Ubuntu bionic (gdb 8.1.1) to
Focal (gdb 9.2). (where this test fails, but that's for a
different patch)

9.2 allows you to set breakpoint commands from
Python, which was added in 8.3.
(bintutils a913fffbdee21fdd50e8de0596358be425775678
"Allow breakpoint commands to be set from Python")

The reason this test never failed before was because it did so
silently. "source <python file>" doesn't fail even if that script
raises an Exception.

To fix this extend the gdb lit feature to check that:
* gdb exists
* has Python support
* allows you to set breakpoint commands

Reviewed By: #libc, ldionne

Differential Revision: https://reviews.llvm.org/D110334
The file was modifiedlibcxx/test/libcxx/gdb/gdb_pretty_printer_test.sh.cpp
The file was modifiedlibcxx/utils/libcxx/test/features.py
Commit efb284c07e97776e01933f470afb5215a561db3e by gribozavr
[clang-format] Fixed an unused variable warning
The file was modifiedclang/lib/Format/QualifierAlignmentFixer.cpp
Commit 3bad9616aa52aa467e4f1fb5c00abac6acba8471 by gbreynoo
[llvm-objcopy][docs] Add missing options to the help output and the command guide

This change is to keep the help text and command guide of objcopy in
tandem.

- In the help output the options --rename-section and
  --set-section-flags were missing the flag exclude, which is found in
  the command guide.
- In the command guide the alias -G for --keep-global-symbol was
    missing, which is found in the help output.

Differential Revision: https://reviews.llvm.org/D110340
The file was modifiedllvm/tools/llvm-objcopy/ObjcopyOpts.td
The file was modifiedllvm/docs/CommandGuide/llvm-objcopy.rst
Commit c2634fc6abe73acf0d9c4421071948e43d96d7eb by david.sherwood
[Analysis] Fix issues when querying vscale attributes on functions

There are several places in the code that are currently broken as
they assume an Instruction always has a parent Function when
attempting to get the vscale_range attribute. This patch adds checks
that an Instruction has a parent.

I've added a test for a parentless @llvm.vscale intrinsic call here:

  unittests/Analysis/ValueTrackingTest.cpp

Differential Revision: https://reviews.llvm.org/D110158
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
The file was modifiedllvm/lib/Analysis/ValueTracking.cpp
The file was modifiedllvm/unittests/Analysis/ValueTrackingTest.cpp
Commit 0c2a4548455c6c943ac5e2b5c51ed5c2c91e34e7 by david.spickett
[libcxx][pretty printers] Import gdb module in gdb feature check

Earlier versions of GDB do not do this automatically.
(from my checks 8.3 does not and 9.2 does)
The file was modifiedlibcxx/utils/libcxx/test/features.py
Commit 45617e1dd8a1b9791f3bd15aee2614383e25b298 by llvm-dev
[clang-doc] Pass Record argument by const-ref. NFCI.

Record is a SmallVector<uint64_t, 1024> - we really need to avoid passing this by value.

Avoid unnecessary big copies, reported by coverity.
The file was modifiedclang-tools-extra/clang-doc/BitcodeReader.cpp
Commit dade83c02a11401897bcdb8c255db69b5c366e95 by llvm-dev
[X86][SLM] Fix ADDQ/SUBQ/CMPEQQ throughput to account for running on either port.

Testing on a SLM box suggests these can run on either port, but the throughput is 4cy on either (inc MMX versions). Confirmed with Intel AoM / Agner / InstLatX64.
The file was modifiedllvm/test/tools/llvm-mca/X86/SLM/resources-sse2.s
The file was modifiedllvm/lib/Target/X86/X86ScheduleSLM.td
The file was modifiedllvm/test/tools/llvm-mca/X86/SLM/resources-sse41.s
Commit 7d39a8a92122e56b014e41606bf15623971d15ff by kai.wang
[RISCV] (1/2) Add the tail policy argument to builtins/intrinsics.

Add the tail policy argument to LLVM IR intrinsics. There are two policies for tail elements. Tail agnostic means users do not care about the values in the tail elements and tail undisturbed means the values in the tail elements need to be kept after the operation. In order to let users control the tail policy, we add an additional argument at the end of the argument list.

For unmasked operations, we have no maskedoff and the tail policy is always tail agnostic. If users want to keep tail elements under unmasked operations, they could use all one mask in the masked operations to do it. So, we only add the additional argument for masked operations for most cases. There are exceptions listed below.

In this patch, we do not handle the following cases to reduce the complexity of the patch. There could be two separate patches for them.

* Use dest argument to control tail policy
vmerge.vvm/vmerge.vxm/vmerge.vim (add _t builtins with additional dest argument)
vfmerge.vfm (add _t builtins with additional dest argument)
vmv.v.v (add _t builtins with additional dest argument)
vmv.v.x (add _t builtins with additional dest argument)
vmv.v.i (add _t builtins with additional dest argument)
vfmv.v.f (add _t builtins with additional dest argument)
vadc.vvm/vadc.vxm/vadc.vim (add _t builtins with additional dest argument)
vsbc.vvm/vsbc.vxm (add _t builtins with additional dest argument)

* Always has tail argument for masked/unmasked intrinsics
Vector Single-Width Integer Multiply-Add Instructions (add _t and _mt builtins)
Vector Widening Integer Multiply-Add Instructions (add _t and _mt builtins)
Vector Single-Width Floating-Point Fused Multiply-Add Instructions (add _t and _mt builtins)
Vector Widening Floating-Point Fused Multiply-Add Instructions (add _t and _mt builtins)
Vector Reduction Operations (add _t and _mt builtins)
Vector Slideup Instructions (add _t and _mt builtins)
Vector Slidedown Instructions (add _t and _mt builtins)

Discussion: https://github.com/riscv/rvv-intrinsic-doc/pull/101

Differential Revision: https://reviews.llvm.org/D105092
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vloxseg-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfrec7-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vrem-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vaaddu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmax-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vluxseg-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsadd-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vlsseg-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwsub-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsext-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vleff-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vle-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vand-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vlseg-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vssra-rv32.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vadd-policy.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsaddu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnsrl-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vrsub-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsubu.w-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnclipu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwaddu-rv32.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsub-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfslide1up-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfrsub-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfslide1down-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vssub-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vxor-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vlse-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmin-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfrsqrt7-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmin-rv32.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vzext-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsll-rv32.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vasub-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vssrl-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vlsegff-rv64-dead.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vlsseg-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vadd-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmulh-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsaddu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwadd-rv64.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vaadd-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vloxei-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfrec7-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsub-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsub-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vrem-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vloxseg-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv64.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vle-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwadd.w-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmul-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vrgatherei16-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vdiv-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vrgather-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmulhsu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsub.w-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfrsub-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-shuffles.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vluxseg-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmul-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmulhu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsra-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vssubu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmulu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsgnj-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnclip-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmaxu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwaddu.w-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vzext-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsadd-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsubu-rv64.ll
The file was modifiedllvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnclip-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsrl-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vlsegff-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmin-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmul-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfadd-rv64.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsgnj-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmulhsu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vloxei-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vssrl-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfrdiv-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/interleave-crash.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmul-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsmul-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vector-strided-load-store.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwmul-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmax-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfrdiv-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwadd-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfslide1up-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vlse-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwsub-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vor-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vssra-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vasub-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfadd-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsra-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsqrt-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmax-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vlsegff-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vdivu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vminu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnsrl-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vminu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vdivu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vadd-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vand-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmulsu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vlseg-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmul-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfrsqrt7-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vrgather-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vaaddu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/tail-agnostic-impdef-copy.mir
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vssubu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmulsu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vor-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vremu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vssub-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vrsub-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsqrt-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwmul-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vslide1down-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vslide1up-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/common-shuffle-patterns.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfdiv-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfslide1down-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vlsegff-rv32-dead.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmulu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmulh-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnsra-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnsra-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwaddu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmin-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsub-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmulhu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmaxu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmax-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsubu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vdiv-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vremu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/mgather-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsub-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vslide1up-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsext-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwadd.w-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vleff-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vxor-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/zvlsseg-zero-vl.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vasubu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vluxei-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsub.w-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwadd-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnclipu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vaadd-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwaddu.w-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsll-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vluxei-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwadd-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vasubu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vslide1down-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsubu.w-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfdiv-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsub-rv32.ll
The file was modifiedllvm/include/llvm/IR/IntrinsicsRISCV.td
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsrl-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vrgatherei16-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmul-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsmul-rv64.ll
Commit 7afa61e71877a5b7892ffe4992f804cd84807240 by kai.wang
[RISCV] (2/2) Add the tail policy argument to builtins/intrinsics.

Add the tail policy argument to Clang builtins. There
are two policies for tail elements. Tail agnostic means users do not
care about the values in the tail elements and tail undisturbed means
the values in the tail elements need to be kept after the operation. In
order to let users control the tail policy, we add an additional
argument at the end of the argument list.

For unmasked operations, we have no maskedoff and the tail policy is
always tail agnostic. If users want to keep tail elements under unmasked
operations, they could use all one mask in the masked operations to do
it. So, we only add the additional argument for masked operations for
most cases. There are exceptions listed below.

In this patch, we do not handle the following cases to reduce the
complexity of the patch. There could be two separate patches for them.

Use dest argument to control tail policy
vmerge.vvm/vmerge.vxm/vmerge.vim (add _t builtins with additional dest
argument)
vfmerge.vfm (add _t builtins with additional dest argument)
vmv.v.v (add _t builtins with additional dest argument)
vmv.v.x (add _t builtins with additional dest argument)
vmv.v.i (add _t builtins with additional dest argument)
vfmv.v.f (add _t builtins with additional dest argument)
vadc.vvm/vadc.vxm/vadc.vim (add _t builtins with additional dest
argument)
vsbc.vvm/vsbc.vxm (add _t builtins with additional dest argument)

Always has tail argument for masked/unmasked intrinsics
Vector Single-Width Integer Multiply-Add Instructions (add _t and _mt
builtins)
Vector Widening Integer Multiply-Add Instructions (add _t and _mt
builtins)
Vector Single-Width Floating-Point Fused Multiply-Add Instructions (add
_t and _mt builtins)
Vector Widening Floating-Point Fused Multiply-Add Instructions (add _t
and _mt builtins)
Vector Reduction Operations (add _t and _mt builtins)
Vector Slideup Instructions (add _t and _mt builtins)
Vector Slidedown Instructions (add _t and _mt builtins)

Discussion: https://github.com/riscv/rvv-intrinsic-doc/pull/101

Differential Revision: https://reviews.llvm.org/D109322
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vmfgt.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vwsub.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vluxseg.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vasub.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vssub.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vfrdiv.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vsrl.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vand.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vlsseg.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vnclip.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vfrec7.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfwsub.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vmfne.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vmv.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsmul.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vadd.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vneg.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vssra.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vsse.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vwadd.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vluxei.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vwmul.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vsll.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfslide1down.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vloxseg.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vwcvt.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vsseg.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsuxei.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsoxei.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vsub.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vasub.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmin.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsext.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vssub.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vmflt.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vsetvlmax.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vloxei.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vfsub.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vmul.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfrsub.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vwsub.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfwadd.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vfneg.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vnot.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vwmul.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vmax.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vslide1up.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vle.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsrl.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfcvt.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vwcvt.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vlse.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vfmin.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vssrl.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vaadd.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vfsgnj.c
The file was modifiedclang/utils/TableGen/RISCVVEmitter.cpp
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfwcvt.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vrsub.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsadd.c
The file was addedclang/test/CodeGen/RISCV/rvv-intrinsics/vadd-policy.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vsuxseg.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vzext.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vnsrl.c
The file was modifiedclang/include/clang/Basic/riscv_vector.td
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vloxei.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vxor.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vfsqrt.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vfwsub.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vfrsub.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vfslide1down.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vslide1down.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vfmax.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfrsqrt7.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vlsseg.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vmfeq.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfabs.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vfwadd.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmax.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsse.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfrec7.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vsadd.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vlsegff.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vncvt.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vsetvl.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vor.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vrgather.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vslide1up.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vluxei.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vsext.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vcompress.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vsoxei.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vnsra.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vand.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vlsegff.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vse.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vreinterpret.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vnclip.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vleff.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfneg.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vfwcvt.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfmul.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vlse.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vlmul.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vncvt.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vsuxei.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfslide1up.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vssrl.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfrdiv.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsra.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vfabs.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vmfle.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vfdiv.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vse.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vfncvt.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vzext.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfdiv.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vaadd.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsub.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vlseg.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vfcvt.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfwmul.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vfmv.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfncvt.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vssseg.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfsgnj.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfmax.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsll.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vmin.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vle.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vrsub.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vfrsqrt7.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfsqrt.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vluxseg.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vneg.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vrgather.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfsub.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vnot.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vfadd.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vor.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vdiv.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vfslide1up.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vmfge.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vwadd.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfmin.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vslide1down.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vsoxseg.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vsra.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vrem.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfadd.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vfmul.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vnsra.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vadd.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vsmul.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vssra.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vlseg.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vnsrl.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmul.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vrem.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vfwmul.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vdiv.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vxor.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vloxseg.c
Commit 5efafc3e65c52effeefa84385bc9d8b7eb0d3291 by david.spickett
Revert "[libcxx][pretty printers] Import gdb module in gdb feature check"

This reverts commit 0c2a4548455c6c943ac5e2b5c51ed5c2c91e34e7.

This was my mistake. When gdb can find its data directory it'll
import it automatically. If it can't (like when you're using a
version from a build folder) you need to give it the data
directory path.

We're safe to assume gdb is installed for testing purposes
so it'll import it for us.
The file was modifiedlibcxx/utils/libcxx/test/features.py
Commit 98a95d4844caf8edfabd9352393a5546049b54e8 by dpetrov
[analyzer] Retrieve a value from list initialization of constant array declaration in a global scope.

Summary: Fix the point that we didn't take into account array's dimension. Retrieve a value of global constant array by iterating through its initializer list.

Differential Revision: https://reviews.llvm.org/D104285

Fixes: https://bugs.llvm.org/show_bug.cgi?id=50604
The file was modifiedclang/test/Analysis/initialization.cpp
The file was modifiedclang/test/Analysis/initialization.c
The file was modifiedclang/lib/StaticAnalyzer/Core/RegionStore.cpp
Commit 7e46a721fc7ea46f72a4fcf81062a76d6539f61d by stephen.tozer
Reapply "[Dexter] Improve performance by evaluating expressions only when needed"

Fixes issue found on greendragon buildbot, in which an incorrectly
indented statement following an if block led to entire frames being
dropped instead of simply filtering unneeded watches.

This reverts commit 1f44fa3ac17ceacc753019092bc50436c77ddcfa.
The file was modifiedcross-project-tests/debuginfo-tests/dexter/dex/debugger/DebuggerBase.py
The file was modifiedcross-project-tests/debuginfo-tests/dexter/dex/command/commands/DexExpectWatchBase.py
The file was modifiedcross-project-tests/debuginfo-tests/dexter/dex/command/CommandBase.py
The file was modifiedcross-project-tests/debuginfo-tests/dexter/dex/command/commands/DexExpectProgramState.py
The file was modifiedcross-project-tests/debuginfo-tests/dexter/dex/debugger/dbgeng/dbgeng.py
The file was modifiedcross-project-tests/debuginfo-tests/dexter/dex/debugger/visualstudio/VisualStudio.py
The file was modifiedcross-project-tests/debuginfo-tests/dexter/dex/debugger/lldb/LLDB.py
Commit 751be2a064f119af74c7b9b1e52bc904d8aa114d by congzhecao
[CodeMoverUtils] Enhance isSafeToMoveBefore() when moving BBs

When moving an entire basic block BB before InsertPoint, currently
we check for all instructions whether the operands dominates
InsertPoint, however, this can be improved such that even an
operand does not dominate InsertPoint, as long as it appears as
a previous instruction in the same BB, it is safe to move.

Reviewed By: Whitney

Differential Revision: https://reviews.llvm.org/D110378
The file was modifiedllvm/lib/Transforms/Utils/CodeMoverUtils.cpp
The file was modifiedllvm/unittests/Transforms/Utils/CodeMoverUtilsTest.cpp
The file was modifiedllvm/include/llvm/Transforms/Utils/CodeMoverUtils.h
Commit 3f89e339bb185726a2a3eb127ac59c813b52c6fe by zinenko
[mlir] add pad_tensor(tensor.cast) -> pad_tensor canonicalizer

This canonicalization pattern complements the tensor.cast(pad_tensor) one in
propagating constant type information when possible. It contributes to the
feasibility of pad hoisting.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D110343
The file was modifiedmlir/test/Dialect/Linalg/canonicalize.mlir
The file was modifiedmlir/test/Dialect/Linalg/subtensor-of-padtensor.mlir
The file was modifiedmlir/test/Dialect/Linalg/tile-pad-tensor-op.mlir
The file was modifiedmlir/lib/Dialect/Tensor/IR/TensorOps.cpp
The file was modifiedmlir/test/Dialect/Linalg/tile-and-fuse-tensors.mlir
The file was modifiedmlir/include/mlir/Dialect/Tensor/IR/Tensor.h
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
Commit 4a57f5d1e1c5eff98fd03932f9a0f8efa13c3a77 by arjunpitchanathan
[MLIR] PresburgerSet: support divisions in operations

Add support for intersecting, subtracting, complementing and checking equality of sets having divisions.

Reviewed By: bondhugula

Differential Revision: https://reviews.llvm.org/D110138
The file was modifiedmlir/unittests/Analysis/PresburgerSetTest.cpp
The file was modifiedmlir/include/mlir/Analysis/PresburgerSet.h
The file was modifiedmlir/lib/Analysis/PresburgerSet.cpp
Commit 9c30beaeb228b63447793235570fc207831dd885 by joachim
[NFC] Mark LI.getLoopsInPreorder and LI.getLoopsInReverseSiblingPreorder const.

They create a new vector with the list, so they can be const.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D110394
The file was modifiedllvm/include/llvm/Analysis/LoopInfoImpl.h
The file was modifiedllvm/include/llvm/Analysis/LoopInfo.h
Commit 7863cc6c1c9e714de666f7df84fe9ef6ea7bb06c by jay.foad
[LiveIntervals] Fix repairOldRegInRange for simple def cases

The fix applied in D23303 "LiveIntervalAnalysis: fix a crash in repairOldRegInRange"
was over-zealous. It would bail out when the end of the range to be
repaired was in the middle of the first segment of the live range of
Reg, which was always the case when the range contained a single def of
Reg.

This patch fixes it as suggested by Matthias Braun in post-commit review
on the original patch, and tests it by adding -early-live-intervals to
a selection of existing lit tests that now pass.

(Note that D23303 was originally applied to fix a crash in
SILoadStoreOptimizer, but that is now moot since D23814 updated
SILoadStoreOptimizer to run before scheduling so it no longer has to
update live intervals.)

Differential Revision: https://reviews.llvm.org/D110238

Unrevert with some changes to the tests:
- Add -verify-machineinstrs to check for remaining problems in live
  interval support in TwoAddressInstructionPass.
- Drop test/CodeGen/AMDGPU/extract-load-i1.ll since it suffers from
  some of those remaining problems.
The file was modifiedllvm/lib/CodeGen/LiveIntervals.cpp
The file was addedllvm/test/CodeGen/AMDGPU/twoaddr-regsequence.mir
The file was modifiedllvm/test/CodeGen/ARM/signext-inreg.ll
The file was modifiedllvm/test/CodeGen/X86/mul-shift-reassoc.ll
Commit e4e95f14f15aceb2641c2b917eca58aaf988c4a7 by jay.foad
[LiveIntervals] Repair live intervals that gain subranges

In repairIntervalsInRange, if the new instructions refer to subregs but
the old instructions did not, make sure any existing live interval for
the superreg is updated to have subranges. Also skip repairing any range
that we have recalculated from scratch, partly for efficiency but also
to avoids some cases that repairOldRegInRange can't handle.

The existing test/CodeGen/AMDGPU/twoaddr-regsequence.mir provides some
test coverage for this change: when TwoAddressInstructionPass converts
REG_SEQUENCE into subreg copies, the live intervals will now get
subranges and MachineVerifier will verify that the subranges are
correct. Unfortunately MachineVerifier does not complain if the
subranges are not present, so the test also passed before this patch.

This patch also fixes ~800 of the ~1500 failures in the whole CodeGen
lit test suite when -early-live-intervals is forced on.

Differential Revision: https://reviews.llvm.org/D110328
The file was modifiedllvm/test/CodeGen/Thumb2/mve-ctlz.ll
The file was modifiedllvm/lib/CodeGen/LiveIntervals.cpp
The file was modifiedllvm/test/CodeGen/Hexagon/isel-extload-i1.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/amdgpu-mul24-knownbits.ll
Commit a6daf99228bc16fb7f2596d67a0d00fef327ace5 by mgorny
[lldb] [Host] Refactor Socket::DecodeHostAndPort() to use LLVM API

Refactor Socket::DecodeHostAndPort() to use LLVM API over redundant
LLDB API.  In particular, this means llvm::Regex, llvm::Error return
type and llvm::to_integer().

While at it, change the port type from int32_t to uint16_t.  The method
never returns any value outside this range, and using the correct type
allows us to rely on getAsInteger()'s implicit overflow check.

Differential Revision: https://reviews.llvm.org/D110391
The file was modifiedlldb/tools/lldb-server/Acceptor.cpp
The file was modifiedlldb/unittests/Host/SocketTest.cpp
The file was modifiedlldb/include/lldb/Host/Socket.h
The file was modifiedlldb/source/Host/common/TCPSocket.cpp
The file was modifiedlldb/source/Host/common/Socket.cpp
The file was modifiedlldb/source/Host/common/UDPSocket.cpp
Commit c1af84ceaf4fafbfa47f871436986c5c69f65a73 by mgorny
Revert "[lldb] [Host] Refactor Socket::DecodeHostAndPort() to use LLVM API"

This reverts commit a6daf99228bc16fb7f2596d67a0d00fef327ace5.  It causes
buildbot regressions, I'll investigate.
The file was modifiedlldb/source/Host/common/TCPSocket.cpp
The file was modifiedlldb/tools/lldb-server/Acceptor.cpp
The file was modifiedlldb/include/lldb/Host/Socket.h
The file was modifiedlldb/source/Host/common/UDPSocket.cpp
The file was modifiedlldb/unittests/Host/SocketTest.cpp
The file was modifiedlldb/source/Host/common/Socket.cpp
Commit 3593ae4312f6156c9ca50d46cdb55a8dfad782d0 by clementval
[flang][fir] Add support to mangle/deconstruct namelist group name

Add support to create unique name for namelist group and be able to
deconstruct them.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: jeanPerier

Differential Revision: https://reviews.llvm.org/D110331

Co-authored-by: Jean Perier <jperier@nvidia.com>
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
The file was modifiedflang/include/flang/Optimizer/Support/InternalNames.h
The file was modifiedflang/lib/Lower/Mangler.cpp
The file was modifiedflang/unittests/Optimizer/InternalNamesTest.cpp
The file was modifiedflang/lib/Optimizer/Support/InternalNames.cpp
Commit 8e4f7b749c2c03809f022c95698686c8584097fc by david.sherwood
[Analysis] Fix another issue when querying vscale attributes on functions

There are several places in the code that are currently broken where
we assume an Instruction is always a member of a BasicBlock that
lives in a Function. This is a problem specifically when
attempting to get the vscale_range attribute. This patch adds checks
that an Instruction's parent also has a parent!

I've added a test for a function-less @llvm.vscale intrinsic call here:

  unittests/Analysis/ValueTrackingTest.cpp
The file was modifiedllvm/unittests/Analysis/ValueTrackingTest.cpp
The file was modifiedllvm/lib/Analysis/ValueTracking.cpp
Commit 5f1c8d8a432deacfeada5e5a3794d0c938171c37 by mgorny
[lldb] [Host] Refactor Socket::DecodeHostAndPort() to use LLVM API

Refactor Socket::DecodeHostAndPort() to use LLVM API over redundant
LLDB API.  In particular, this means llvm::Regex, llvm::Error return
type and llvm::to_integer().

While at it, change the port type from int32_t to uint16_t.  The method
never returns any value outside this range, and using the correct type
allows us to rely on getAsInteger()'s implicit overflow check.

Differential Revision: https://reviews.llvm.org/D110391
The file was modifiedlldb/include/lldb/Host/Socket.h
The file was modifiedlldb/tools/lldb-server/Acceptor.cpp
The file was modifiedlldb/source/Host/common/UDPSocket.cpp
The file was modifiedlldb/source/Host/common/Socket.cpp
The file was modifiedlldb/source/Host/common/TCPSocket.cpp
The file was modifiedlldb/unittests/Host/SocketTest.cpp
Commit ce21ab23b7555b44b6a6126a0b6bdce12af8736f by cullen.rhodes
[SystemZ] NFC: Remove unused intrinsic template arg 'name'

Identified in D109359.

Reviewed By: uweigand

Differential Revision: https://reviews.llvm.org/D109598
The file was modifiedllvm/include/llvm/IR/IntrinsicsSystemZ.td
Commit 626e2a6c6236d2fd7582928a0363d381c55eb43d by shivam98.tkg
[compiler-rt] Use portable "#!/usr/bin/env bash" shebang for tests.

In build_symbolizer.sh we can safely remove the -eu argument from the shebang (which is an unportable construct), as the scripts sets **-e** and **-u** already.

Differential Revision: https://reviews.llvm.org/D110039
The file was modifiedcompiler-rt/lib/tsan/check_analyze.sh
The file was modifiedcompiler-rt/lib/tsan/analyze_libtsan.sh
The file was modifiedcompiler-rt/lib/asan/scripts/asan_device_setup
The file was modifiedcompiler-rt/lib/sanitizer_common/symbolizer/scripts/ar_to_bc.sh
The file was modifiedcompiler-rt/lib/gwp_asan/scripts/symbolize.sh
The file was modifiedcompiler-rt/lib/sanitizer_common/symbolizer/scripts/build_symbolizer.sh
The file was modifiedcompiler-rt/lib/tsan/check_cmake.sh
Commit df56fc6ebbee6c458b0473185277b7860f7e3408 by thakis
Revert "[DSE] Track earliest escape, use for loads in isReadClobber."

This reverts commit 5ce89279c0986d0bcbe526dce52f91dd0c16427c.
Makes clang crash, see comments on https://reviews.llvm.org/D109844
The file was modifiedllvm/include/llvm/Analysis/CaptureTracking.h
The file was modifiedllvm/test/Transforms/DeadStoreElimination/captures-before-load.ll
The file was modifiedllvm/lib/Analysis/CaptureTracking.cpp
The file was modifiedllvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
Commit ad890aa2327feb6b6aee676fe85b2352fba2403e by dvyukov
tsan: add a test for flushing memory

Add a test for __tsan_flush_memory() and for background
flushing of the runtime memory.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D110409
The file was addedcompiler-rt/test/tsan/flush_memory.cpp
The file was modifiedcompiler-rt/include/sanitizer/tsan_interface.h
Commit 4604695d7c20e72b551a1a5224f3de877cb41bd3 by hans
Revert "[JumpThreading] Ignore free instructions"

It caused compiler crashes, see comment on the code review for repro.

> This is basically D108837 but for jump threading. Free instructions
> should be ignored for the threading decision. JumpThreading already
> skips some free instructions (like pointer bitcasts), but does not
> skip various free intrinsics -- in fact, it currently gives them a
> fairly large cost of 2.
>
> Differential Revision: https://reviews.llvm.org/D110290

This reverts commit 1e3c6fc7cb9d2ee6a5328881f95d6643afeadbff.
The file was modifiedllvm/test/Transforms/PhaseOrdering/inlining-alignment-assumptions.ll
The file was modifiedllvm/test/Transforms/JumpThreading/free_instructions.ll
The file was modifiedllvm/include/llvm/Transforms/Scalar/JumpThreading.h
The file was modifiedllvm/lib/Transforms/Scalar/JumpThreading.cpp
Commit 124fcd7e9d2b8831dab0c50d4fce9900b033c6c2 by dvyukov
tsan: add a stress test

The stress test does various assorted things
(memory accesses, function calls, atomic operations,
thread creation/join, intercepted libc calls)
in multiple threads just to stress various parts
of the runtime.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D110416
The file was modifiedcompiler-rt/test/tsan/test.h
The file was addedcompiler-rt/test/tsan/stress.cpp
Commit 3c5500907b1089f4b274b09a195ee0685d51f9e2 by spatel
Revert "[InstCombine] fold cast of right-shift if high bits are not demanded (2nd try)"

This reverts commit bb9333c3504a4a02b982526ad8264d14c6ec1ad4.

This exposes another existing bug that causes an infinite loop as shown in
D110170
...so reverting while I look at another fix.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
The file was modifiedllvm/test/Transforms/InstCombine/trunc-demand.ll
Commit 1376ae909431b78bee35899f301d1ab2f53cc1ba by paul.robinson
[TargetLibraryInfo][AMDGPU] Minor cleanup, NFC
The file was modifiedllvm/lib/Analysis/TargetLibraryInfo.cpp
Commit 6dda6c49ce4b67840c4f38d51111278b4b64c1bf by ikudrin
[llvm-objcopy][NFC] Add a helper method RelocationSectionBase::getNamePrefix()

Refactor handleArgs() to use that method.

Differential Revision: https://reviews.llvm.org/D110350
The file was modifiedllvm/tools/llvm-objcopy/ELF/Object.cpp
The file was modifiedllvm/tools/llvm-objcopy/ELF/ELFObjcopy.cpp
The file was modifiedllvm/tools/llvm-objcopy/ELF/Object.h
Commit c597594461bb3ba34a9699b744be09135635cbc7 by kazu
[Transforms/Utils] Remove redundant declaration computeSyntheticCounts (NFC)
The file was modifiedllvm/include/llvm/LTO/SummaryBasedOptimizations.h
The file was modifiedllvm/include/llvm/Transforms/Utils/FunctionImportUtils.h
Commit 1295694364d0698f991b458f2ea23f33a064db0a by Louis Dionne
[libc++][NFC] Add missing link to a ranges review
The file was modifiedlibcxx/docs/Status/RangesPaper.csv
Commit 638a4147fc6400b928080c6d5656fbcee707a793 by spatel
[InstCombine] add tests for lshr-trunc-lshr; NFC
The file was modifiedllvm/test/Transforms/InstCombine/lshr.ll
Commit 09e71c367af36a07cce04a812dcd9c62bebfbcdf by spatel
[x86] convert logic-of-FP-compares to FP logic-of-vector-compares

This is motivated by the examples and discussion in:
https://llvm.org/PR51245
...and related bugs.

By using vector compares and vector logic, we can convert 2 'set'
instructions into 1 'movd' or 'movmsk' and generally improve
throughput/reduce instructions.

Unfortunately, we don't have a complete vector compare ISA before
AVX, so I left SSE-only out of this patch. Ie, we'd need extra logic
ops to simulate the missing predicates for SSE 'cmpp*', so it's not
as clearly a win.

Differential Revision: https://reviews.llvm.org/D110342
The file was modifiedllvm/test/CodeGen/X86/fcmp-logic.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/lzcnt-zext-cmp.ll
Commit f881776175e97f7667ad2d32cfea0ba6f4254181 by Louis Dionne
[libc++] Require a C++20 capable compiler.

This enforces libcxx and its benchmarks are compiled by a C++20 capable
compiler. Based on review comments in D103413.

Differential Revision: https://reviews.llvm.org/D110338
The file was modifiedlibcxx/benchmarks/CMakeLists.txt
The file was modifiedlibcxx/CMakeLists.txt
Commit d8fc9f87270146e271eddd551ea98580bef15e82 by llvm-dev
[X86][SSE] combineMulToPMADDWD - replace sext(v8i16) -> zext(v8i16)

As suggested on D108522, if we're sign extending a v4i16 source before multiplying as a v4i32, then we can replace that with a zero extension and rely on the implicit sign-extension of PMADDWD.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/madd.ll
Commit 34412cea5c247e30e49958213df10dd8f128d7e5 by dvyukov
tsan: don't use pipe2 in tests

MacOS buildbots failed:
stress.cpp:57:7: error: use of undeclared identifier 'pipe2'
https://green.lab.llvm.org/green//job/clang-stage1-RA/24209/consoleFull#-3468768778254eaf0-7326-4999-85b0-388101f2d404

Fix the test to not use pipe2.

Differential Revision: https://reviews.llvm.org/D110423
The file was modifiedcompiler-rt/test/tsan/stress.cpp
Commit e2546525902de18bb66a0c46ad3517d9f389fa47 by fraser
[MC][NFC] Add end-of-namespace comments
The file was modifiedllvm/include/llvm/MC/MCInstrDesc.h
Commit 6f28fb708149e9db8d077e65fcc9f87d566e824a by flo
Recommit "[DSE] Track earliest escape, use for loads in isReadClobber."

This reverts the revert commit df56fc6ebbee6c458b0473185277b7860f7e3408.

This version of the patch adjusts the location where the EarliestEscapes
cache is cleared when an instruction gets removed. The earliest escaping
instruction does not have to be a memory instruction.

It could be a ptrtoint instruction like in the added test
@earliest_escape_ptrtoint, which subsequently gets removed. We need to
invalidate the EarliestEscape entry referring to the ptrtoint when
deleting it.

This fixes the crash mentioned in
https://bugs.chromium.org/p/chromium/issues/detail?id=1252762#c6
The file was modifiedllvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
The file was modifiedllvm/test/Transforms/DeadStoreElimination/captures-before-load.ll
The file was modifiedllvm/lib/Analysis/CaptureTracking.cpp
The file was modifiedllvm/include/llvm/Analysis/CaptureTracking.h
Commit 3b0240e6c89d9201430ee83b09fe7c94256e8838 by quinn.pham
[PowerPC] Add range check for vec_genpcvm builtins

This patch adds range checking for some Power10 altivec builtins. Range
checking is done in SemaChecking.

Reviewed By: #powerpc, lei, Conanap

Differential Revision: https://reviews.llvm.org/D109780
The file was modifiedclang/lib/Sema/SemaChecking.cpp
The file was modifiedclang/test/CodeGen/builtins-ppc-p10vector-error.c
Commit 5988a3b7a09126aff982944ecb36f533c450388e by zinenko
[mlir] Linalg: ensure tile-and-pad always creates padding as requested

Initially, the padding transformation and the related operation were only used
to guarantee static shapes of subtensors in tiled operations. The
transformation would not insert the padding operation if the shapes were
already static, and the overall code generation would actively remove such
"noop" pads. However, this transformation can be also used to pack data into
smaller tensors and marshall them into faster memory, regardless of the size
mismatches. In context of expert-driven transformation, we should assume that,
if padding is requested, a potentially padded tensor must be always created.
Update the transformation accordingly. To do this, introduce an optional
`packing` attribute to the `pad_tensor` op that serves as an indication that
the padding is an intentional choice (as opposed to side effect of type
normalization) and should be left alone by cleanups.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D110425
The file was modifiedmlir/test/Dialect/Linalg/canonicalize.mlir
The file was modifiedmlir/test/Dialect/Linalg/tile-and-pad-tensors.mlir
The file was modifiedmlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
Commit 082e22f3d72bd63f9b388d5566064cf3736da511 by Stanislav.Mekhanoshin
[AMDGPU] Always reserve flat scratch SGPR for architected flat scratch

With architected flat scratch it becomes readonly. We must always
reserve SGPR pair for it even if we do not use scratch at all since
an attempt to write to SGPRs mapped to FLAT_SCRATCH results in
memory violation.

This is not needed since GFX10 with architected flat scratch though
since special SGPRs are not carving space from normal SGPRs.

Differential Revision: https://reviews.llvm.org/D110376
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/flat-scratch-reg.ll
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
Commit 321be24aa6808c5829f3433407e13603901849f4 by clementval
Revert "[flang][fir] Add support to mangle/deconstruct namelist group name"

This reverts commit 3593ae4312f6156c9ca50d46cdb55a8dfad782d0.
The file was modifiedflang/lib/Lower/Mangler.cpp
The file was modifiedflang/lib/Optimizer/Support/InternalNames.cpp
The file was modifiedflang/unittests/Optimizer/InternalNamesTest.cpp
The file was modifiedflang/include/flang/Optimizer/Support/InternalNames.h
Commit 1e9afab875696ebf1a8abb5637f04735411ee0b7 by hans
Re-apply "[JumpThreading] Ignore free instructions"

It seems the crashes we saw wasn't caused by this (see comments on the review).

> This is basically D108837 but for jump threading. Free instructions
> should be ignored for the threading decision. JumpThreading already
> skips some free instructions (like pointer bitcasts), but does not
> skip various free intrinsics -- in fact, it currently gives them a
> fairly large cost of 2.
>
> Differential Revision: https://reviews.llvm.org/D110290

This reverts commit 4604695d7c20e72b551a1a5224f3de877cb41bd3.
The file was modifiedllvm/test/Transforms/JumpThreading/free_instructions.ll
The file was modifiedllvm/include/llvm/Transforms/Scalar/JumpThreading.h
The file was modifiedllvm/lib/Transforms/Scalar/JumpThreading.cpp
The file was modifiedllvm/test/Transforms/PhaseOrdering/inlining-alignment-assumptions.ll
Commit 6e1aaf18af6c6b68d314a23068bd912524212fb6 by wei.huang
[PowerPC] Mark splat immediate instructions as rematerializable

This patch marks splat immediate instructions XXSPLTIW and XXSPLTIDP as
rematerializable to prevent MachineLICM from moving them out of loops.

Reviewed By: lei, amy

Differential revision: https://reviews.llvm.org/D108823
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrPrefix.td
The file was modifiedllvm/test/CodeGen/PowerPC/constant-pool.ll
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.cpp
The file was modifiedllvm/test/CodeGen/PowerPC/p10-splatImm.ll
The file was modifiedllvm/test/CodeGen/PowerPC/p10-spill-crun.ll
Commit 8dd42ffc09e30b1bf936f5da1aa104916e50d2fa by erich.keane
Write test for CWG1772/CWG1762/CWG1779, mark them 'done', and update
cxx_dr_status.html

I noticed that these two DRs are currently working correctly, so I
added a pair of lit tests that check the AST (which is most useful for
CWG1779, since 'dependent' is really only observable in an ast dump) to
make sure __func__ works correctly in dependent cases, and in lambda
operator().

Also noticed that CWG1762, mostly an 'example' change, works correctly,
so added a test so that it gets marked 'done' as well.

Additionally, I regenerated cxx_dr_status.html, updating it for Clang
13's release, based on the cwg_status.html from August 12, 2021.

Differential Revision: https://reviews.llvm.org/D109956
The file was addedclang/test/CXX/drs/dr177x.cpp
The file was modifiedclang/www/make_cxx_dr_status
The file was modifiedclang/www/cxx_dr_status.html
The file was modifiedclang/test/CXX/drs/dr17xx.cpp
Commit e4902480f1e2f12f73c2b504e3d717536653dd7b by aaron
Fix wrong FixIt about union in cppcoreguidelines-pro-type-member-init

At most one variant member of a union may have a default member
initializer. The case of anonymous records with multiple levels of
nesting like the following also needs to meet this rule. The original
logic is to horizontally obtain all the member variables in a record
that need to be initialized and then filter to the variables that need
to be fixed. Obviously, it is impossible to correctly initialize the
desired variables according to the nesting relationship.

See Example 3 in class.union

union U {
  U() {}
  int x;  // int x{};
  union {
    int k;  // int k{};  <==  wrong fix
  };
  union {
    int z;  // int z{};  <== wrong fix
    int y;
  };
};
The file was modifiedclang-tools-extra/clang-tidy/cppcoreguidelines/ProTypeMemberInitCheck.cpp
The file was modifiedclang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines-pro-type-member-init.cpp
Commit 3678df5ae6618eec656ae0ea0dab3be09d73bc9a by albionapc
[PowerPC][NFC] Add test case in preparation for codegen change

This test case tests doubles inserted into vector ints,
and help make apparent the optimizations a future patch
will make.
The file was addedllvm/test/CodeGen/PowerPC/test-vector-insert.ll
Commit 36eb6c0134afa9d6881e52c002743f4594c859ee by llvm-dev
[SCCP] Regenerate bigint test checks
The file was modifiedllvm/test/Transforms/SCCP/apint-bigint2.ll
Commit bdee805b3277e04677490f42e62aa28478331254 by llvm-dev
[ConstantFold] ConstantFoldGetElementPtr - use APInt::isNegative() instead of getSExtValue() to support big ints

Fixes fuzz test: https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=39197
The file was modifiedllvm/lib/IR/ConstantFold.cpp
The file was modifiedllvm/test/Transforms/SCCP/apint-bigint2.ll
Commit 03fb6f04f9fa9a2f8b49a0d34b9363046095dd8d by Louis Dionne
[libc++] Refactor the tests for common_view to reduce duplication
The file was modifiedlibcxx/test/std/ranges/range.adaptors/range.common.view/begin.pass.cpp
The file was modifiedlibcxx/test/std/ranges/range.adaptors/range.common.view/ctor.view.pass.cpp
The file was modifiedlibcxx/test/std/ranges/range.adaptors/range.common.view/ctor.default.pass.cpp
The file was modifiedlibcxx/test/std/ranges/range.adaptors/range.common.view/size.pass.cpp
The file was modifiedlibcxx/test/std/ranges/range.adaptors/range.common.view/end.pass.cpp
The file was modifiedlibcxx/test/std/ranges/range.adaptors/range.common.view/base.pass.cpp
The file was addedlibcxx/test/std/ranges/range.adaptors/range.common.view/types.h
Commit 77d200a546136c2855063613ff4bca1f682fb23a by erich.keane
Add test for DR1307, which we have already implemented.

Also regenerated cxx_dr_status.html
The file was modifiedclang/test/CXX/drs/dr13xx.cpp
The file was modifiedclang/www/cxx_dr_status.html
Commit e8e2edd8ca88f8b0a7dba141349b2aa83284f3af by erich.keane
Fix test from 8dd42f, capitalization in test
The file was modifiedclang/test/CXX/drs/dr17xx.cpp
Commit 08d7eec06e8cf5c15a96ce11f311f1480291a441 by Stanislav.Mekhanoshin
Revert "Allow rematerialization of virtual reg uses"

Reverted due to two distcint performance regression reports.

This reverts commit 92c1fd19abb15bc68b1127a26137a69e033cdb39.
The file was modifiedllvm/lib/CodeGen/TargetInstrInfo.cpp
The file was modifiedllvm/test/CodeGen/Mips/llvm-ir/lshr.ll
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/varying-outer-2d-reduction.ll
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/tail-pred-disabled-in-loloops.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-float32regloops.ll
The file was modifiedllvm/test/CodeGen/RISCV/atomic-signext.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/while-loops.ll
The file was modifiedllvm/test/CodeGen/X86/inalloca-invoke.ll
The file was modifiedllvm/test/CodeGen/RISCV/mul.ll
The file was modifiedllvm/test/CodeGen/X86/addcarry.ll
The file was modifiedllvm/test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll
The file was modifiedllvm/test/CodeGen/ARM/illegal-bitfield-loadstore.ll
The file was modifiedllvm/test/CodeGen/RISCV/srem-vector-lkk.ll
The file was modifiedllvm/test/CodeGen/Mips/llvm-ir/shl.ll
The file was modifiedllvm/test/CodeGen/RISCV/shifts.ll
The file was modifiedllvm/test/CodeGen/Mips/tls.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv32zbb-zbp.ll
The file was modifiedllvm/test/CodeGen/Thumb2/ldr-str-imm12.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv32zbb.ll
The file was modifiedllvm/test/CodeGen/Thumb/dyn-stackalloc.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-postinc-dct.ll
The file was modifiedllvm/include/llvm/CodeGen/TargetInstrInfo.h
The file was modifiedllvm/test/CodeGen/AMDGPU/remat-sop.mir
The file was modifiedllvm/test/CodeGen/X86/licm-regpressure.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-float16regloops.ll
The file was modifiedllvm/test/CodeGen/X86/delete-dead-instrs-with-live-uses.mir
The file was modifiedllvm/test/CodeGen/Mips/llvm-ir/sub.ll
The file was modifiedllvm/test/CodeGen/X86/sdiv_fix.ll
The file was modifiedllvm/test/CodeGen/RISCV/urem-vector-lkk.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv32zbt.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz.ll
The file was modifiedllvm/test/CodeGen/X86/ragreedy-hoist-spill.ll
The file was modifiedllvm/test/CodeGen/ARM/funnel-shift.ll
The file was modifiedllvm/test/CodeGen/ARM/arm-shrink-wrapping-linux.ll
The file was modifiedllvm/test/CodeGen/RISCV/atomic-rmw.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv32zbp.ll
The file was modifiedllvm/test/CodeGen/Mips/llvm-ir/ashr.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv32i-rv64i-half.ll
The file was modifiedllvm/test/CodeGen/ARM/funnel-shift-rot.ll
The file was modifiedllvm/test/CodeGen/ARM/neon-copy.ll
The file was modifiedllvm/test/CodeGen/X86/dag-update-nodetomatch.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz.ll
The file was modifiedllvm/test/CodeGen/X86/callbr-asm-blockplacement.ll
Commit 15dfe783406241f9c17c3552b0723441fa68174f by koraq
[NFC][libc++] Update clang-format style.

Changes the style as requested by @ldionne in D103368.

Reviewed By: ldionne, #libc, Quuxplusone

Differential Revision: https://reviews.llvm.org/D109835
The file was modifiedlibcxx/.clang-format
Commit b54c724be0b490f231af534696b3b7ef072a7ca1 by riddleriver
[mlir:OpConversionPattern] Add overloads for taking an Adaptor instead of ArrayRef

This has been a TODO for a long time, and it brings about many advantages (namely nice accessors, and less fragile code). The existing overloads that accept ArrayRef are now treated as deprecated and will be removed in a followup (after a small grace period). Most of the upstream MLIR usages have been fixed by this commit, the rest will be handled in a followup.

Differential Revision: https://reviews.llvm.org/D110293
The file was modifiedmlir/include/mlir/Conversion/LLVMCommon/Pattern.h
The file was modifiedmlir/lib/Conversion/LinalgToSPIRV/LinalgToSPIRV.cpp
The file was modifiedmlir/lib/Conversion/MathToSPIRV/MathToSPIRV.cpp
The file was modifiedmlir/lib/Conversion/StandardToSPIRV/StandardToSPIRV.cpp
The file was modifiedmlir/lib/Conversion/ShapeToStandard/ShapeToStandard.cpp
The file was modifiedmlir/lib/Dialect/SCF/Transforms/StructuralTypeConversions.cpp
The file was modifiedmlir/lib/Dialect/Async/Transforms/AsyncToAsyncRuntime.cpp
The file was modifiedmlir/lib/Dialect/X86Vector/Transforms/LegalizeForLLVMExport.cpp
The file was modifiedmlir/lib/Conversion/AsyncToLLVM/AsyncToLLVM.cpp
The file was modifiedmlir/lib/Conversion/GPUToSPIRV/GPUToSPIRV.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Bufferize.cpp
The file was modifiedmlir/lib/Dialect/SPIRV/Transforms/LowerABIAttributesPass.cpp
The file was modifiedmlir/include/mlir/Transforms/DialectConversion.h
The file was modifiedmlir/lib/Dialect/Shape/Transforms/StructuralTypeConversions.cpp
The file was modifiedmlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
The file was modifiedmlir/lib/Dialect/SPIRV/Transforms/SPIRVConversion.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Detensorize.cpp
The file was modifiedmlir/lib/Dialect/StandardOps/Transforms/Bufferize.cpp
The file was modifiedmlir/lib/Dialect/StandardOps/Transforms/TensorConstantBufferize.cpp
The file was modifiedmlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp
The file was modifiedmlir/docs/Bufferization.md
The file was modifiedmlir/lib/Conversion/SCFToSPIRV/SCFToSPIRV.cpp
The file was modifiedmlir/lib/Conversion/ComplexToStandard/ComplexToStandard.cpp
The file was modifiedmlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp
The file was modifiedmlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
The file was modifiedmlir/lib/Dialect/AMX/Transforms/LegalizeForLLVMExport.cpp
The file was modifiedmlir/lib/Dialect/StandardOps/Transforms/DecomposeCallGraphTypes.cpp
The file was modifiedmlir/lib/Dialect/ArmSVE/Transforms/LegalizeForLLVMExport.cpp
The file was modifiedmlir/lib/Dialect/StandardOps/Transforms/FuncConversions.cpp
The file was modifiedmlir/lib/Dialect/Tensor/Transforms/Bufferize.cpp
The file was modifiedmlir/lib/Dialect/SparseTensor/Transforms/SparseTensorConversion.cpp
The file was modifiedmlir/lib/Transforms/Bufferize.cpp
The file was modifiedmlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
Commit ef976337f581dd8a80820a8b14b4bbd70670b7fc by riddleriver
[mlir:OpConversion] Remove the remaing usages of the deprecated matchAndRewrite methods

This commits updates the remaining usages of the ArrayRef<Value> based
matchAndRewrite/rewrite methods in favor of the new OpAdaptor
overload.

Differential Revision: https://reviews.llvm.org/D110360
The file was modifiedmlir/include/mlir/Conversion/LLVMCommon/VectorPattern.h
The file was modifiedmlir/include/mlir/Conversion/LLVMCommon/Pattern.h
The file was modifiedmlir/lib/Conversion/GPUCommon/GPUToLLVMConversion.cpp
The file was modifiedmlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
The file was modifiedmlir/lib/Conversion/MathToLLVM/MathToLLVM.cpp
The file was modifiedmlir/lib/Conversion/GPUCommon/GPUOpsLowering.cpp
The file was modifiedmlir/lib/Conversion/OpenACCToLLVM/OpenACCToLLVM.cpp
The file was modifiedmlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
The file was modifiedmlir/test/lib/Dialect/Test/TestPatterns.cpp
The file was modifiedmlir/lib/Conversion/MemRefToLLVM/MemRefToLLVM.cpp
The file was modifiedmlir/lib/Conversion/VectorToROCDL/VectorToROCDL.cpp
The file was modifiedmlir/lib/Conversion/GPUCommon/GPUOpsLowering.h
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Bufferize.cpp
The file was modifiedmlir/test/lib/Conversion/StandardToLLVM/TestConvertCallOp.cpp
The file was modifiedmlir/lib/Conversion/GPUCommon/IndexIntrinsicsOpLowering.h
The file was modifiedmlir/lib/Conversion/GPUToNVVM/WmmaOpsToNvvm.cpp
The file was modifiedmlir/lib/Conversion/LinalgToLLVM/LinalgToLLVM.cpp
The file was modifiedmlir/lib/Conversion/ComplexToLLVM/ComplexToLLVM.cpp
The file was modifiedmlir/lib/Conversion/GPUCommon/OpToFuncCallLowering.h
The file was modifiedmlir/lib/Conversion/SPIRVToLLVM/ConvertLaunchFuncToLLVMCalls.cpp
The file was modifiedmlir/lib/Conversion/OpenMPToLLVM/OpenMPToLLVM.cpp
Commit e09a1dc47515d27ba5ca572a225208bb0d79fb3f by anirudh_prasad
[SystemZ][z/OS] Add GOFF Support to the DataLayout

- This patch adds in the GOFF mangling support to the LLVM data layout string. A corresponding additional line has been added into the data layout section in the language reference documentation.
- Furthermore, this patch also sets the right data layout string for the z/OS target in the SystemZ backend.

Reviewed By: uweigand, Kai, abhina.sreeskantharajan, MaskRay

Differential Revision: https://reviews.llvm.org/D109362
The file was modifiedllvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
The file was modifiedllvm/lib/IR/DataLayout.cpp
The file was modifiedllvm/unittests/IR/ManglerTest.cpp
The file was modifiedllvm/include/llvm/IR/DataLayout.h
The file was modifiedclang/test/CodeGen/target-data.c
The file was modifiedllvm/docs/LangRef.rst
The file was modifiedclang/lib/Basic/Targets/SystemZ.h
Commit ff0b62dd8898e58df297f76285a7e613d745db3e by Louis Dionne
[libc++][NFC] Mark LWG3158 as implemented

It has been implemented in 59e26308e60a.
The file was modifiedlibcxx/docs/Status/Cxx20Issues.csv
Commit ac51ad24a75c02152f8ece943d65de9a1c4e947a by jay.foad
[LiveIntervals] Fix asan debug build failures

Call RemoveMachineInstrFromMaps before erasing instrs.
repairIntervalsInRange will do this for you after erasing the
instruction, but it's not safe to rely on it because assertions in
SlotIndexes::removeMachineInstrFromMaps refer to fields in the erased
instruction.

This fixes asan buildbot failures caused by D110328.
The file was modifiedllvm/lib/CodeGen/TwoAddressInstructionPass.cpp
Commit 8ec7d9b8f875368a5f92596332cd05059df6bbd2 by dblaikie
DebugInfo: Move the '=' version of -gsimple-template-names to the frontend

Based on feedback from Paul Robinson on 38c09ea that the 'mangled' mode
is only useful as an LLVM-developer-internal tool in combination with
llvm-dwarfdump --verify, so demote that to a frontend-only (not driver)
option. The driver support is simply -g{no-,}simple-template-names to
switch on simple template names, without the option to use the mangled
template name scheme there.
The file was modifiedclang/include/clang/Driver/Options.td
The file was modifiedclang/test/Driver/debug-options.c
The file was modifiedclang/lib/Frontend/CompilerInvocation.cpp
Commit a64e46880c23494ab0d87d72a3ea6618fc04bd91 by Louis Dionne
[libc++][NFC] Update status of old issue LWG2560 -- we implement it properly
The file was modifiedlibcxx/docs/Status/Cxx17Issues.csv
Commit a5211bf365dd56b644516e70a9ee31db06b5c70e by david.green
[ARM] Addition jump table plus while loop block placement pass test.

Also regenerated the file, whilst here.
The file was modifiedllvm/test/CodeGen/Thumb2/mve-wls-block-placement.mir
Commit f8da95cd7e68ea66010843ef44adbe8d2807170c by leonardchan
[compiler-rt] Add shared_cxxabi requirement to some tests

This adds REQUIRES: shared_cxxabi to a bunch of tests that would fail if this
weak reference in sanitizer common was undefined. This is necessary in cases
where libc++abi.a is statically linked in. Because there is no strong reference
to __cxa_demangle in compiler-rt, then if libc++abi is linked in via a static
archive, then the linker will not extract the archive member that would define
that weak symbol. This causes a handful of tests to fail because this leads to
the symbolizer printing mangled symbols where tests expect them demangled.

Technically, this feature is WAI since sanitizer runtimes shouldn't fail if
this symbol isn't resolved, and linking statically means you wouldn't need to
link in all of libc++abi. As a workaround, we can simply make it a requirement
that these tests use shared libc++abis.

Differential Revision: https://reviews.llvm.org/D109639
The file was modifiedcompiler-rt/test/asan/TestCases/Linux/odr-vtable.cpp
The file was modifiedcompiler-rt/test/ubsan/TestCases/TypeCheck/vptr-virtual-base.cpp
Commit 6185ad03f1085911812e8244a4994a04c62e19b6 by paul.robinson
[TargetLibraryInfo] Correctly handle sqrt*_finite

Other <math>_finite calls are marked as unavailable except on GNU/Linux;
it looks like the sqrt set was just overlooked.

Differential Revision: https://reviews.llvm.org/D110418
The file was modifiedllvm/lib/Analysis/TargetLibraryInfo.cpp
The file was modifiedllvm/test/CodeGen/X86/sqrt-fastmath.ll
Commit 7774166499d6db7fd5b246a1a694e7fe930ebcba by nikita.ppv
[DSE] Add additional capture tests (NFC)

These test other escape sources and the case of multiple
underlying objects.
The file was modifiedllvm/test/Transforms/DeadStoreElimination/captures-before-load.ll
Commit ebe06910ce2623f525e458a91d7e5a1858163226 by anirudh_prasad
[NFC] Replace hard-coded usages of SystemZ::R15D with SpecialRegisters API

This patch changes hard-coded usages of SystemZ::R15D with calls to the getStackPointerRegister function. Uses in the LowerCall function are avoided to avoid merge conflicts with an expected upcoming patch.

Reviewed By: uweigand

Differential Revision: https://reviews.llvm.org/D109702
The file was modifiedllvm/lib/Target/SystemZ/SystemZISelLowering.cpp
Commit 5eb6b8272931473f3b279db5d2c0006993fda21a by sivachandra
[libc] Add an implementation of qsort.

A fuzzer for qsort has also been added.

Reviewed By: michaelrj

Differential Revision: https://reviews.llvm.org/D110382
The file was modifiedlibc/config/linux/api.td
The file was modifiedlibc/test/src/stdlib/CMakeLists.txt
The file was modifiedlibc/spec/stdc.td
The file was addedlibc/fuzzing/stdlib/CMakeLists.txt
The file was addedlibc/src/stdlib/qsort.cpp
The file was modifiedlibc/config/linux/aarch64/entrypoints.txt
The file was modifiedlibc/fuzzing/CMakeLists.txt
The file was addedlibc/src/stdlib/qsort.h
The file was addedlibc/test/src/stdlib/qsort_test.cpp
The file was modifiedlibc/config/linux/x86_64/entrypoints.txt
The file was modifiedlibc/spec/spec.td
The file was addedlibc/fuzzing/stdlib/qsort_fuzz.cpp
The file was modifiedlibc/src/stdlib/CMakeLists.txt
Commit e325ebb9c70bbdd48866926a42d4c4373b832035 by antiagainst
[mlir][tosa] Add some transpose folders

* If the input is a constant splat value, we just
  need to reshape it.
* If the input is a general constant with one user,
  we can also constant fold it, without bloating
  the IR.

Reviewed By: rsuderman

Differential Revision: https://reviews.llvm.org/D110439
The file was modifiedmlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
The file was modifiedmlir/lib/Dialect/Tosa/IR/TosaOps.cpp
The file was modifiedmlir/test/Dialect/Tosa/canonicalize.mlir
Commit 96cb97c4533a0a02c2d62ffb1121cd275aa43dd5 by tejohnson
[ThinLTO] Update combined index for SamplePGO indirect calls to locals

In ThinLTO for locals we normally compute the GUID from the name after
prepending the source path to get a unique global id. SamplePGO indirect
call profiles contain the target GUID without this uniquification,
however (unless compiling with -funique-internal-linkage-names).

In order to correctly handle the call edges added to the combined index
for these indirect calls, during importing and bitcode writing we
consult a map of original to full GUID to identify the actual callee.
However, for a large application this was consuming a lot of compile
time as we need to do this repeatedly (especially during importing where
we may traverse call edges multiple times).

To fix this implement a suggestion in one of the FIXME comments, and
actually modify the call edges during a single traversal after the index
is built to perform the fixups once. I combined this fixup with the dead
code analysis performed on the index in order to avoid adding an
additional walk of the index. The dead code analysis is the first
analysis performed on the index.

This reduced the time required for a large thin link with SamplePGO by
about 20%.

No new test added, but I confirmed that there are existing tests that
will fail when no fixup is performed.

Differential Revision: https://reviews.llvm.org/D110374
The file was modifiedllvm/include/llvm/IR/ModuleSummaryIndex.h
The file was modifiedllvm/tools/llvm-lto/llvm-lto.cpp
The file was modifiedllvm/include/llvm/Transforms/IPO/FunctionImport.h
The file was modifiedllvm/lib/IR/ModuleSummaryIndex.cpp
The file was modifiedllvm/lib/Transforms/IPO/FunctionImport.cpp
The file was modifiedllvm/lib/Bitcode/Writer/BitcodeWriter.cpp
Commit aca9bea1992ce270d094105ae8968c703b8ffb65 by riddleriver
[mlir:MemRef] Move DmaStartOp/DmaWaitOp to ODS

These are among the last operations still defined explicitly in C++. I've
tried to keep this commit as NFC as possible, but these ops
definitely need a non-NFC cleanup at some point.

Differential Revision: https://reviews.llvm.org/D110440
The file was modifiedmlir/test/IR/invalid-ops.mlir
The file was modifiedmlir/test/Dialect/MemRef/invalid.mlir
The file was modifiedmlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
The file was modifiedmlir/include/mlir/Dialect/MemRef/IR/MemRef.h
The file was modifiedmlir/lib/Dialect/MemRef/IR/MemRefDialect.cpp
The file was modifiedmlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
Commit b5bfbb4da252e1d6b0cefadf1809e88e33bb96c1 by tejohnson
Fix bot failure by adding needed dependence

Fix bot failure from 96cb97c4533a0a02c2d62ffb1121cd275aa43dd5, e.g.:
https://lab.llvm.org/buildbot/#/builders/61/builds/15203

llvm-lto now needs to link in IPO.
The file was modifiedllvm/tools/llvm-lto/CMakeLists.txt
Commit 29c09c76539f6171fa84811e9b4b6d2a244e2d53 by spatel
[InstCombine] match variable names and code comments; NFC
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
Commit a47c8e40c734429903d4000285ca45a1c3299321 by spatel
[InstCombine] fold lshr(trunc(lshr X, C1)) C2

Only the multi-use cases are changing here because there's
another fold that catches the simpler patterns.

But that other fold is the source of infinite loops when we
try to add D110170, so removing that is planned as a follow-up.

Attempt to show the general proof in Alive2:
https://alive2.llvm.org/ce/z/Ns1uS2

Note that the overshift fold-to-zero tests are not
currently handled by instsimplify. If they were, we
could assert that the shift amount sum is less than
the source bitwidth.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
The file was modifiedllvm/test/Transforms/InstCombine/lshr.ll
Commit a5d47b3fa02da6a17828083654b79d5d15d310f3 by llvm-project
[Polly] Fix wrong redirect in test case.
The file was modifiedpolly/test/ScheduleOptimizer/ManualOptimization/distribute_illegal_pragmaloc.ll
Commit 62cc6b0da2912d770c125fc9ea0949f3a7b75fb9 by clementval
[flang][fir] Add support to mangle/deconstruct namelist group name

Add support to create unique name for namelist group and be able to
deconstruct them.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: jeanPerier

Differential Revision: https://reviews.llvm.org/D110331

Co-authored-by: Jean Perier <jperier@nvidia.com>
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
The file was modifiedflang/lib/Lower/Mangler.cpp
The file was modifiedflang/include/flang/Optimizer/Support/InternalNames.h
The file was modifiedflang/lib/Optimizer/Support/InternalNames.cpp
The file was modifiedflang/unittests/Optimizer/InternalNamesTest.cpp
Commit 531206310a27477f088f672f5e6fd688d77d9292 by riddleriver
[mlir:OpAsm] Factor out the common bits of (Op/Dialect)Asm(Parser/Printer)

This has a few benefits:
* It allows for defining parsers/printer code blocks that
  can be shared between operations and attribute/types.
* It removes the weird duplication of generic parser/printer hooks,
  which means that newly added hooks only require touching one class.

Differential Revision: https://reviews.llvm.org/D110375
The file was modifiedmlir/lib/Parser/Parser.cpp
The file was modifiedmlir/include/mlir/IR/OpImplementation.h
The file was addedmlir/lib/Parser/AsmParserImpl.h
The file was modifiedmlir/lib/IR/AsmPrinter.cpp
The file was modifiedmlir/include/mlir/IR/DialectImplementation.h
The file was modifiedmlir/lib/IR/Dialect.cpp
The file was modifiedmlir/lib/IR/Operation.cpp
The file was modifiedmlir/lib/Parser/DialectSymbolParser.cpp
Commit 5969e5743ae9cd17d08436a4b1139b8c4a24cc4d by nikita.ppv
[IR] Handle large element size when calculating GEP indices

This is a fix for the issue reported at
https://reviews.llvm.org/D110043#3019942:
The ElementSize is a uint64_t and as such may be larger than the
index space, or be negative in the index space. This is UB, but
shouldn't cause assertion failures.

We address this by detecting whether the size is too large and
use a zero index in that case (which is always conservatively
correct).

Differential Revision: https://reviews.llvm.org/D110437
The file was modifiedllvm/lib/IR/DataLayout.cpp
The file was addedllvm/test/Transforms/GlobalOpt/large-element-size.ll
Commit a9ae2436fc0dcb68ef8a478948e46d0a9998b0c9 by anirudh_prasad
[SystemZ][z/OS] Introduce the GOFFMCAsmInfo Interface for z/OS

- This patch adds in the GOFFMCAsmInfo interfaces for the z/OS target.
- This patch decouples the previously existing SystemZMCAsmInfo interface for the ELF target and the z/OS target.
- This patch also removes a small test in the SystemZAsmLexerTest.cpp. The reason for this is because, the test is set up for the s390x-ibm-linux (SystemZ ELF triple), and the test checks a function which is overridden only for the z/OS target. The reason we can't change the test to use a z/OS triple outright is because there is still missing support which prevents the successful running of a test (assert in AsmParser.cpp due to missing GOFFAsmParser support)

Reviewed By: uweigand, abhina.sreeskantharajan

Differential Revision: https://reviews.llvm.org/D110077
The file was modifiedllvm/lib/MC/CMakeLists.txt
The file was addedllvm/lib/MC/MCAsmInfoGOFF.cpp
The file was modifiedllvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.h
The file was modifiedllvm/unittests/MC/SystemZ/SystemZAsmLexerTest.cpp
The file was modifiedllvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
The file was modifiedllvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
The file was addedllvm/include/llvm/MC/MCAsmInfoGOFF.h
Commit c0d889995e708f8bcb0fd688f63d031ee06b5874 by Lang Hames
[ORC] Add 'contains' and 'overlaps' operations to ExecutorAddrRange.

Also includes unit tests for not-yet tested operations like comparison and
to/from pointer conversion.
The file was addedllvm/unittests/ExecutionEngine/Orc/ExecutorAddressTest.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h
The file was modifiedllvm/unittests/ExecutionEngine/Orc/CMakeLists.txt
Commit 5f9802401145a56d16c5712bf25b0a3894e68cb2 by llvmgnsyncbot
[gn build] Port a9ae2436fc0d
The file was modifiedllvm/utils/gn/secondary/llvm/lib/MC/BUILD.gn
Commit 70a48697d5f547ca72053b5dcf0d10756f6f2477 by llvmgnsyncbot
[gn build] Port c0d889995e70
The file was modifiedllvm/utils/gn/secondary/llvm/unittests/ExecutionEngine/Orc/BUILD.gn
Commit cf74ef134c9a8089d8997144d54628952c6d4552 by Stanislav.Mekhanoshin
[AMDGPU] Limit promote alloca max size in functions

Non-entry functions have 32 caller saved VGPRs available. If we
promote alloca to consume more registers we will have to spill
CSRs. There is no reason to eliminate scratch access to get
another scratch access instead.

Differential Revision: https://reviews.llvm.org/D110372
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/vector-alloca-limits.ll
Commit a7cdcf25c17e169eedba276791299c3b2b78fbf1 by wlei
[llvm-profgen] Ignore invalid perf line in LBR record

Similar to https://reviews.llvm.org/D109637, there is a whole invalid line of message in perfscript.

```
warning: Invalid address in LBR record at line 14118674: Processed 14138923 events and lost 1 chunks!
warning: Invalid address in LBR record at line 14118676: Check IO/CPU overload!
```

This only happened for LBR only perfscript, hybridperfscript have a check of " 0x" to make sure it's the LBR perf line.

Reviewed By: hoy, wenlei

Differential Revision: https://reviews.llvm.org/D110424
The file was modifiedllvm/tools/llvm-profgen/PerfReader.cpp
The file was modifiedllvm/test/tools/llvm-profgen/Inputs/noprobe.perfscript
Commit 2a876a711dc7c644936017daf20e78f48bfd2270 by diegocaballero
[mlir] Create a generic reduction detection utility

This patch introduces a generic reduction detection utility that works
across different dialecs. It is mostly a generalization of the reduction
detection algorithm in Affine. The reduction detection logic in Affine,
Linalg and SCFToOpenMP have been replaced with this new generic utility.

The utility takes some basic components of the potential reduction and
returns: 1) the reduced value, and 2) a list with the combiner operations.
The logic to match reductions involving multiple combiner operations disabled
until we can properly test it.

Reviewed By: ftynse, bondhugula, nicolasvasilache, pifon2a

Differential Revision: https://reviews.llvm.org/D110303
The file was modifiedmlir/tools/mlir-opt/mlir-opt.cpp
The file was modifiedutils/bazel/llvm-project-overlay/mlir/BUILD.bazel
The file was modifiedmlir/include/mlir/Analysis/LoopAnalysis.h
The file was modifiedmlir/test/lib/Analysis/CMakeLists.txt
The file was addedmlir/test/lib/Analysis/TestMatchReduction.cpp
The file was modifiedmlir/lib/Analysis/LoopAnalysis.cpp
The file was modifiedmlir/lib/Analysis/AffineAnalysis.cpp
The file was addedmlir/test/Analysis/test-match-reduction.mlir
The file was modifiedmlir/include/mlir/IR/Diagnostics.h
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.td
The file was modifiedmlir/lib/Conversion/SCFToOpenMP/CMakeLists.txt
The file was modifiedmlir/lib/Conversion/SCFToOpenMP/SCFToOpenMP.cpp
The file was modifiedmlir/lib/IR/Diagnostics.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
Commit d5f2013004ef8d2d9995fd45a154744bf7c264e9 by wlei
[AutoFDO][llvm-profgen] Profile generation for LBR(non-CS) sample

This patch introduces non-CS AutoFDO profile generation into LLVM. The profile is supposed to be well consumed by compiler using `-fprofile-sample-use=[profile]`.

After range and branch counters are extracted from the LBR sample, here we go through each addresses for symbolization, create FunctionSamples and populate its sub fields like TotalSamples, BodySamples and HeadSamples etc. For inlined code, as we need to map back to original code, so we always add body samples to the leaf frame's function sample.

Reviewed By: wenlei, hoy

Differential Revision: https://reviews.llvm.org/D109551
The file was addedllvm/test/tools/llvm-profgen/inline-noprobe2.test
The file was addedllvm/test/tools/llvm-profgen/noinline-noprobe.test
The file was addedllvm/test/tools/llvm-profgen/Inputs/inline-noprobe2.perfscript
The file was addedllvm/test/tools/llvm-profgen/inline-noprobe.test
The file was modifiedllvm/tools/llvm-profgen/ProfileGenerator.cpp
The file was addedllvm/test/tools/llvm-profgen/Inputs/inline-noprobe.perfbin
The file was addedllvm/test/tools/llvm-profgen/Inputs/inline-noprobe2.perfbin
The file was addedllvm/test/tools/llvm-profgen/Inputs/inline-noprobe.perfscript
The file was removedllvm/test/tools/llvm-profgen/noprobe.test
The file was modifiedllvm/tools/llvm-profgen/llvm-profgen.cpp
The file was modifiedllvm/tools/llvm-profgen/ProfileGenerator.h
The file was modifiedllvm/tools/llvm-profgen/ProfiledBinary.h
Commit b45476c94ce8ea94e2ad4d93ceda00eb4078e682 by antiagainst
[mlir][tosa] Do not fold transpose with quantized types

For such cases, the type of the constant DenseElementsAttr is
different from the transpose op return type.

Reviewed By: rsuderman

Differential Revision: https://reviews.llvm.org/D110446
The file was modifiedmlir/test/Dialect/Tosa/canonicalize.mlir
The file was modifiedmlir/lib/Dialect/Tosa/IR/TosaOps.cpp
Commit 28277e9b48601dee7027ba6ed50554db821ba09b by wlei
[AutoFDO][llvm-profgen] Report zero count for unexecuted part of function code

In order to be consistent with compiler that interprets zero count as unexecuted(cold), this change reports zero-value count for unexecuted part of function code. For the implementation, it leverages the range counter, initializes all the executed function range with the zero-value. After all ranges are merged and converted into disjoint ranges, the remaining zero count will indicates the unexecuted(cold) part of the function.

This change also extends the current `findDisjointRanges` method which now can support adding zero-value range.

Reviewed By: hoy, wenlei

Differential Revision: https://reviews.llvm.org/D109713
The file was modifiedllvm/tools/llvm-profgen/ProfiledBinary.cpp
The file was modifiedllvm/test/tools/llvm-profgen/inline-noprobe.test
The file was modifiedllvm/tools/llvm-profgen/ProfileGenerator.h
The file was modifiedllvm/tools/llvm-profgen/ProfiledBinary.h
The file was modifiedllvm/test/tools/llvm-profgen/inline-noprobe2.test
The file was modifiedllvm/tools/llvm-profgen/ProfileGenerator.cpp
Commit 1422fa5fab369b0ec223b58788c68f91a4093076 by wlei
[llvm-profgen] Unify output format of different unsymbolized profiles

Differential Revision: https://reviews.llvm.org/D110080
The file was modifiedllvm/test/tools/llvm-profgen/inline-cs-pseudoprobe.test
The file was modifiedllvm/tools/llvm-profgen/PerfReader.h
The file was modifiedllvm/tools/llvm-profgen/PerfReader.cpp
The file was modifiedllvm/test/tools/llvm-profgen/recursion-compression-pseudoprobe.test
The file was modifiedllvm/test/tools/llvm-profgen/noinline-cs-pseudoprobe.test
The file was modifiedllvm/test/tools/llvm-profgen/noinline-cs-noprobe.test
The file was modifiedllvm/test/tools/llvm-profgen/cs-interrupt.test
The file was modifiedllvm/test/tools/llvm-profgen/inline-cs-noprobe.test
Commit 62d6ff5e9e70dd11a4e9e6efc48ce174cd6849bd by Jonas Devlieghere
[dsymutil] Track incompleteness across unions

When determining the incompleteness of a DIE based on its children, make
sure we propagate it across union types. See test case for an example.
Without this patch we never emit the definition of Container_ivars.

Differential revision: https://reviews.llvm.org/D110443
The file was addedllvm/test/tools/dsymutil/X86/union-fwd-decl.test
The file was addedllvm/test/tools/dsymutil/Inputs/private/tmp/union/a.out
The file was addedllvm/test/tools/dsymutil/Inputs/private/tmp/union/container.o
The file was addedllvm/test/tools/dsymutil/Inputs/private/tmp/union/use.o
The file was modifiedllvm/lib/DWARFLinker/DWARFLinker.cpp
Commit 9911af4b91c670477cf920f168b339bd2f3f307f by dblaikie
WIP: Verify -gsimple-template-names=mangled values

Clang will encode names that should be able to be simplified as
"_STNname|<template, args>" (eg: "_STNt1|<int>") - this verification
mode will detect these names, decode them, create the original name
("t1<int>") and the simple name ("t1") - letting the simple name run
through the usual rebuilding logic - then compare the two sources of the
full name - the rebuilt and the _STN encoding.

This helps ensure that -gsimple-template-names is lossless.
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDie.cpp
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/prettyprint_types.s
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp
The file was modifiedllvm/include/llvm/DebugInfo/DWARF/DWARFVerifier.h
The file was modifiedllvm/include/llvm/DebugInfo/DWARF/DWARFDie.h
Commit 37f1b7a3f35fd9edbb110a3845e79d46224ea79b by Lang Hames
[ORC] Allow construction of an ExecutorAddrRange from an addr and a size.
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h
The file was modifiedllvm/unittests/ExecutionEngine/Orc/ExecutorAddressTest.cpp
Commit c6288759296f808a2f7304bbd1bd5b18974e4ccc by Jonas Devlieghere
[lldb] Copy the system debugserver in LLDB.framework

When using the system debugserver for testing, copy the binary in the
LLDB.framework Resource directory instead of the build's bin directory.

rdar://82998263
The file was modifiedlldb/test/API/CMakeLists.txt
Commit d0649320bf39efddf10a430c1821911060d684b2 by Jonas Devlieghere
[dsymutil] Update union-fwd-decl.test for Windows

Remove path separators from CHECK-lines in union-fwd-decl.test
The file was modifiedllvm/test/tools/dsymutil/X86/union-fwd-decl.test
Commit 715cf6ffb9a0491aa8749bf024d741de520fa1f2 by craig.topper
[RISCV] Add another isel optimization for (and (shl X, c2), c1).

Where c1 is a shifted mask with 32-c2 leading zeros and c3 trailing
zeros and c3>c2. We can select it as (slli (srliw X, c3-c2), c3).
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv64zbb.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv64zbp.ll
The file was modifiedllvm/test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
Commit e8b376547b4b77671c36607ade025d3272699e7a by wmi
Fixed a bug in https://reviews.llvm.org/rG8eb617d719bdc6a4ed7773925d2421b9bbdd4b7a.

For compressed profile when reading an unknown section, the data reader pointer
adjustment was incorrect. This patch fixed that.
The file was modifiedllvm/include/llvm/ProfileData/SampleProfReader.h
The file was addedllvm/test/tools/llvm-profdata/Inputs/unknown.section.compressed.extbin.profdata
The file was modifiedllvm/test/tools/llvm-profdata/forward-compatible.test
Commit 80865f7579d619dee4ffd5abb72f641ef74dedbb by wmi
Add "REQUIRES: zlib" in forward-compatible.test since it handles compressed file.
The file was modifiedllvm/test/tools/llvm-profdata/forward-compatible.test
Commit 6deaebe5fe00bfb69d9d007bae95fac70779398a by kkleine
[llvm] Improve export.sh with help and snapshot

This change adds the ability to create source tarballs for unreleased or untagged code by providing the `--git-ref <GIT_REF>` flag to the `llvm/utils/release/export.sh` script. This is useful for creating daily snapshot tarballs that can easily be consumed by packagers who want to build a daily snapshot.

The default behavior of `export.sh` hasn't changed.

You may also provide a `--template` argument to say how the artifacts
are supposed to be named (as suggested by @hans).

The `-help` output of `export.sh` was changed quite significantly to look like this:

```
Export the Git sources and build tarballs from them.

Usage: export.sh [-release|--release <major>.<minor>.<patch>]
                      [-rc|--rc <num>]
                      [-final|--final]
                      [-git-ref|--git-ref <git-ref>]
                      [-template|--template <template>]

Flags:

  -release  | --release <major>.<minor>.<patch>    The version number of the release
  -rc       | --rc <num>                           The release candidate number
  -final    | --final                              When provided, this option will disable the rc flag
  -git-ref  | --git-ref <git-ref>                  (optional) Use <git-ref> to determine the release and don't export the test-suite files
  -template | --template <template>                (optional) Possible placeholders: $PROJECT $YYYYMMDD $GIT_REF $RELEASE $RC.
                                                   Defaults to '${PROJECT}-${RELEASE}${RC}.src.tar.xz'.

The following list shows the filenames (with <placeholders>) for the artifacts
that are being generated (given that you don't touch --template).

  * llvm-<RELEASE><RC>.src.tar.xz
  * clang-<RELEASE><RC>.src.tar.xz
  * compiler-rt-<RELEASE><RC>.src.tar.xz
  * libcxx-<RELEASE><RC>.src.tar.xz
  * libcxxabi-<RELEASE><RC>.src.tar.xz
  * libclc-<RELEASE><RC>.src.tar.xz
  * clang-tools-extra-<RELEASE><RC>.src.tar.xz
  * polly-<RELEASE><RC>.src.tar.xz
  * lldb-<RELEASE><RC>.src.tar.xz
  * lld-<RELEASE><RC>.src.tar.xz
  * openmp-<RELEASE><RC>.src.tar.xz
  * libunwind-<RELEASE><RC>.src.tar.xz
  * flang-<RELEASE><RC>.src.tar.xz

Additional files being generated:

  * llvm-project-<RELEASE><RC>.src.tar.xz    (the complete LLVM source project)
  * test-suite-<RELEASE><RC>.src.tar.xz      (only when not using --git-ref)

To ease the creation of snapshot builds, we also provide these files

  * llvm-release-<YYYYMMDD>.txt        (contains the <RELEASE> as a text)
  * llvm-rc-<YYYYMMDD>.txt             (contains the rc version passed to the invocation of export.sh)
  * llvm-git-revision-<YYYYMMDD>.txt   (contains the current git revision sha1)

Example values for the placeholders:

  * <RELEASE>  -> 13.0.0
  * <YYYYMMDD> -> 20210414
  * <RC>       -> rc4        (will be empty when using --git-ref)

In order to generate snapshots of the upstream main branch you could do this for example:

  export.sh --git-ref upstream/main --template '${PROJECT}-${YYYYMMDD}.src.tar.xz'

```

Reviewed By: tstellar

Differential Revision: https://reviews.llvm.org/D101446
The file was modifiedllvm/utils/release/export.sh
Commit 6ece82e9006d16b7fba7660ce09b2c62ab8460fa by thakis
Revert "[Driver] Correctly handle static C++ standard library"

This reverts commit 03142c5f67788bcc1573f76732d0fccd75c6b965.
Breaks check-asan if system ld doesn't support --push-state, even
if lld was built and is used according to lit's output.
See comments on https://reviews.llvm.org/D110128
The file was modifiedclang/test/Driver/linux-ld.c
The file was modifiedclang/lib/Driver/ToolChains/Fuchsia.cpp
The file was modifiedclang/lib/Driver/ToolChains/Gnu.cpp
The file was modifiedclang/test/Driver/fuchsia.cpp
Commit 4a45f95e7612bc5dd1d68db84df266cfcc62ff95 by thakis
[llvm] Remove LLVM_CHECK_ENABLED_PROJECTS again

This reverts commit 55f0b337087136554122f942fea951a357bc4a49 and
follow-up reverts commit e9ea03c62ccc1ed4e3ed4f20e37640cfdd76cbcf.

LLVM_EXTERNAL_PROJECTS is sufficient, see https://reviews.llvm.org/D110016
The file was modifiedllvm/CMakeLists.txt
The file was modifiedllvm/cmake/modules/CrossCompile.cmake
Commit ce6ed64a6953ad0a88b08665c54bae0c1f0f2c84 by modimo
[llvm-profdata] Extend support of --topn to sample profiles

Reviewed By: wenlei

Differential Revision: https://reviews.llvm.org/D110449
The file was modifiedllvm/test/tools/llvm-profdata/sample-hot-func-list.test
The file was modifiedllvm/tools/llvm-profdata/llvm-profdata.cpp
Commit ef764eeeb99a62f29d0a20c424328e7be2f5bfb8 by riddleriver
[mlir:ElementsAttr] Avoid crash on empty contiguous ranges

We currently, incorrectly, assume that a range always has at least
one element when building a contiguous range. This commit adds
a proper empty check to avoid crashing.

Differential Revision: https://reviews.llvm.org/D110457
The file was modifiedmlir/test/IR/elements-attr-interface.mlir
The file was modifiedmlir/include/mlir/IR/BuiltinAttributeInterfaces.td
Commit 5cb210862be45da1025fa8a9db4f52388340eade by dblaikie
DebugInfo: Use the signedness of the underlying enum when encoding enum non-type-template-parameters

This improves the accuracy of the debug info and improves round tripping
through -gsimple-template-names.
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DebugHandlerBase.cpp
The file was modifiedllvm/test/DebugInfo/X86/template.ll
Commit a2e1d68fa97de9fe1d8eaf6e03e65c225dfbc52c by Jason Molenda
Add pragma to make it easier to find "image list" impl

I couldn't find it; make this easier for next time.
The file was modifiedlldb/source/Commands/CommandObjectTarget.cpp
Commit d893692024b8f05c63329f9a4e5f2432380be27c by phosek
[CMake] Pass through CMAKE_READELF to subbuilds

This matches handling of other CMake variables.

Differential Revision: https://reviews.llvm.org/D110463
The file was modifiedclang/CMakeLists.txt
The file was modifiedllvm/cmake/modules/LLVMExternalProjectUtils.cmake
The file was modifiedcompiler-rt/cmake/Modules/AddCompilerRT.cmake
Commit f4cfda03d6c852ffb4b831f73599c2ce25473721 by Amara Emerson
[AArch64][AMDGPU] Re-generate some tests with CHECK-NEXT to prepare for a patch.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract-vector-elt.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-extract-vector-elt.mir
Commit 37adc4f957c2383a625e2e593ba1d18a25d92b91 by mizvekov
[clang] set templates as invalid when any of the parameters are invalid

See PR51872 for the original repro.

This fixes a crash when converting a templated constructor into a deduction
guide, in case any of the template parameters were invalid.

Signed-off-by: Matheus Izvekov <mizvekov@gmail.com>

Reviewed By: rsmith

Differential Revision: https://reviews.llvm.org/D110460
The file was modifiedclang/test/SemaTemplate/deduction-crash.cpp
The file was modifiedclang/lib/AST/DeclTemplate.cpp
Commit ed687c021161b87858260f8583bfc8b178903593 by jim
[RISCV] Fix incorrect operand type of inst alias for InstR4

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D110381
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfo.td
Commit 993f3c61b31d3917e0809bf1925c97fc0a61ce90 by llvm-dev
[TTI] getUserCost - Ensure a vector insert/extract index is in unsigned 32-bit range

Otherwise fallback to the generic 'unknown index' path

Fixes https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=29050
The file was modifiedllvm/test/Transforms/LICM/crash.ll
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h
Commit b02938439dab1f282d28a4a94419de505f0f9c6e by dvyukov
tsan: uninline RacyStacks::operator==

It's only used during race reporting.
There is no point in polluting the main header file with it.

Reviewed By: xgupta

Differential Revision: https://reviews.llvm.org/D110470
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_report.cpp
Commit 883758ed480012a875146bc206cb8bcdd384405b by david.green
[ARM] Fix Arm block placement creating branches after jump tables.

Given:
- A jump table
- Which jumps to the next block
- The next block ends in a WLS
- Where the WLS conditionally jumps to block earlier in the program.

The Arm block placement pass would attempt to move the block containing
the WLS earlier, as the WLS instruction can only branch forward. In
doing so it would add a branch from the jumptable block to the WLS
block, thinking it previously fell-through.

This in itself would be fine, if a little inefficient, but the constant
island pass expects all instructions after a jump-table branch to have
been removed by analyzeBranch. So it gets confused and can assign the
same labels to multiple jump table blocks.

I've changed the condition to the same as used in analyzeBranch.
The file was modifiedllvm/lib/Target/ARM/ARMBlockPlacement.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/mve-wls-block-placement.mir
Commit 0f78ece1690255e52d87bd367c63c2a1ccf17430 by arjunpitchanathan
[MLIR] Add functionality to remove redundant local variables

This patch adds functionality to FlatAffineConstraints to remove local
variables using equalities. This helps in keeping output representation of
FlatAffineConstraints smaller.

This patch is part of a series of patches aimed at generalizing affine
dependence analysis.

Reviewed By: bondhugula

Differential Revision: https://reviews.llvm.org/D110056
The file was modifiedmlir/include/mlir/Analysis/AffineStructures.h
The file was modifiedmlir/lib/Analysis/AffineStructures.cpp
The file was modifiedmlir/unittests/Analysis/AffineStructuresTest.cpp
Commit 6bd5b1b1ce0b7b206ce98f42287521ecf8a9bea6 by llvm-dev
[DAG] combineShiftToMULH - move getValueType() inside assert. NFCI.

Avoids an unnecessary (void).
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Commit ee267b1c7c0147925af8ca4c9d694d7c658b5fbd by llvm-dev
[IR] DIBuilder::createEnumerator - pass APSInt by const reference

Avoid unnecessary copy by value.
The file was modifiedllvm/lib/IR/DIBuilder.cpp
The file was modifiedllvm/include/llvm/IR/DIBuilder.h
Commit 0b61f43b6096a9e98652991cba34e8ad44d35101 by markus.boeck02
[CMake] Consistently use the LibXml2::LibXml2 target instead of LIBXML2_LIBRARIES

Linking against the LibXml2::LibXml2 target has the advantage of not only importing the library, but also adding the include path as well as any definitions the library requires. In case of a static build of libxml2, eg. a define is set on Windows to remove any DLL imports and export.

LLVM already makes use of the target, but c-index-test and lldb were still linking against the library only.

The workaround for Mac OS-X that I removed seems to have also been made redundant since https://reviews.llvm.org/D84563 I believe

Differential Revision: https://reviews.llvm.org/D109975
The file was modifiedclang/tools/c-index-test/CMakeLists.txt
The file was modifiedlldb/source/Host/CMakeLists.txt
Commit 5a14edd8edb4d560e8a6420fffb490498baee0cf by llvm-dev
[InstCombine] Ensure shifts are in range for (X << C1) / C2 -> X fold.

We can get here before out of range shift amounts have been handled - limit to BW-2 for sdiv and BW-1 for udiv

Fixes https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=38078
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
The file was modifiedllvm/test/Transforms/InstCombine/shift.ll
Commit 2c28e3f008b6b93a58635999ff20572de01e8392 by clementval
[fir] Add desc to fir.array_load op and update operand name

This patch is part of the upstreaming effort from fir-dev branch.

Add a description for the fir.array_load opeartion and rename lenParams to typeparams.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D110393

Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
The file was modifiedflang/include/flang/Optimizer/Dialect/FIROps.td
Commit 3a6ba3675177cb5e47dee325f300aced4cd864ed by mgorny
[lldb] Convert misc. StringConvert uses

Replace misc. StringConvert uses with llvm::to_integer()
and llvm::to_float(), except for cases where further refactoring is
planned.  The purpose of this change is to eliminate the StringConvert
API that is duplicate to LLVM, and less correct in behavior at the same
time.

Differential Revision: https://reviews.llvm.org/D110447
The file was modifiedlldb/source/Plugins/Process/Utility/DynamicRegisterInfo.cpp
The file was modifiedlldb/source/Plugins/LanguageRuntime/RenderScript/RenderScriptRuntime/RenderScriptRuntime.cpp
The file was modifiedlldb/source/Interpreter/Property.cpp
The file was modifiedlldb/source/Interpreter/OptionValueUInt64.cpp
The file was modifiedlldb/source/Plugins/Platform/Android/PlatformAndroid.cpp
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp
The file was modifiedlldb/unittests/debugserver/RNBSocketTest.cpp
The file was modifiedlldb/tools/lldb-server/lldb-gdbserver.cpp
The file was modifiedlldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
The file was modifiedlldb/source/Target/UnixSignals.cpp
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunication.cpp
The file was modifiedlldb/source/Interpreter/OptionValuePathMappings.cpp
The file was modifiedlldb/source/Interpreter/OptionValueArray.cpp
The file was modifiedlldb/source/Interpreter/OptionValueSInt64.cpp
The file was modifiedlldb/source/Interpreter/OptionValueFileSpecList.cpp
The file was modifiedlldb/source/Symbol/SymbolContext.cpp
Commit a25f25c3b7ebce869c33cb7ae48ebf9681b99210 by llvm-dev
[X86] combineShiftToPMULH - relax from ISA from SSE41 to SSE2

With improved shuffle combines (in particular canonicalizeShuffleWithBinOps), we can now usefully perform this on any SSE2+ target.

We should be able to remove this entirely and just use DAGCombiner's combineShiftToMULH if we can someday get it to support illegal (pre-widened) types.
The file was modifiedllvm/test/CodeGen/X86/pmulh.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 4c72b10f0a28be7beb6f7a8cd7d031c9810dc23b by llvm-dev
[X86] X86FastISel::fastMaterializeConstant - break if-else chain to fix llvm-else-after-return warning. NFCI

All previous if-else cases return
The file was modifiedllvm/lib/Target/X86/X86FastISel.cpp
Commit f5a26ccae24caa21f7adafe0aab704fd0bc5a618 by llvm-dev
[X86][SSE] combineMulToPMADDWD - enable sext(v8i16) -> zext(v8i16) fold on pre-SSE41 targets

We already do this on SSE41 targets where we have sext/zext instructions, now that combineShiftToPMULH handles SSE2 targets, we can enable this here as well.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/madd.ll
Commit 44c401bdc355baf0fc1264f13d9c31d0c72b7e8e by kazu
[Mips] Remove redundant declarations (NFC)

Note that identical declarations immediately precede what's being
removed in this patch.

Identified with readability-redundant-declaration.
The file was modifiedllvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
Commit 2a4fa0c27c938b9767dd42d57cc7c4e5a670b302 by llvm-dev
[X86][SSE] combineMulToPMADDWD - enable sext(v8i16) -> zext(v8i16) fold on sub-128 bit vectors
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/shrink_vmul.ll
Commit eb7c78c2c5223b60e1f4f03876beceb46c26dd48 by llvm-dev
[X86][SSE] combineMulToPMADDWD - mask off upper bits of sign-extended vXi32 constants

If we are multiplying by a sign-extended vXi32 constant, then we can mask off the upper 16 bits to allow folding to PMADDWD and make use of its implicit sign-extension from i16
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/shrink_vmul.ll
Commit 8c83bd3bd4c482b22abf7468687269ba010d36e4 by llvm-dev
[CostModel][X86] Adjust vXi32 multiply costs if it can be performed using PMADDWD

Update the costs to match the codegen from combineMulToPMADDWD - not only can we use PMADDWD is its zero-extended, but also if its a constant or sign-extended from a vXi16 (which can be replaced with a zero-extension).
The file was modifiedllvm/test/Analysis/CostModel/X86/slm-arith-costs.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/X86/mul_slm_16bit.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/mul32.ll
Commit c2ec5dd209532b1d618958ade6a7d550a0c31ea5 by mydeveloperday
[clang-format] Left/Right alignment fixer can cause false positive replacements when they don't actually change anything

Earlier during the development of {D69764} I felt it was no longer necessary to
ensure we were not trying to change code which didn't need to change
and we felt this could be removed, however I'd like to bring this back for now
as I am seeing some false positives in terms of the "replacements"

What I see is the generation of a replacement which is a "No Op" on the original
code, I think this comes about because of the merging of replacements:

```
static const a;
->
const static a;
->
static const a;
```

The replacements don't really merge, in such a way as to identify when we have gone
back to the original

Also remove the Penalty as I'm not using it (and it became marked as set and no used,
I'd rather get rid of it if it means nothing)

I think we need to do this step for now, as many people use the --output-replacements-xml
to identify that the file "needs a clang-format"

The same can be seen with the -n or --dry-run option as this uses the replacements
to drive the error/warning output.

Reviewed By: HazardyKnusperkeks

Differential Revision: https://reviews.llvm.org/D110392
The file was modifiedclang/unittests/Format/QualifierFixerTest.cpp
The file was modifiedclang/lib/Format/QualifierAlignmentFixer.cpp
Commit 18c8ed54160bec12344288c6993b0f548fbe809e by llvm-dev
[DAG] ReduceLoadOpStoreWidth - replace getABITypeAlign with allowsMemoryAccess (PR45116)

One of the cases identified in PR45116 - we don't need to limit store narrowing to ABI alignment, we can use allowsMemoryAccess - which tests using getABITypeAlign, but also checks if a target permits (fast) misaligned memory access by checking allowsMisalignedMemoryAccesses as a fallback.
The file was modifiedllvm/test/CodeGen/X86/narrow_op-1.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/test/CodeGen/X86/i1narrowfail.ll
Commit bef55a2b47a938ef35cbd7b61a1e5fa74e68c9ed by Lang Hames
[ORC] Introduce EPCGenericRTDyldMemoryManager.

EPCGenericRTDyldMemoryMnaager is an EPC-based implementation of the
RuntimeDyld::MemoryManager interface. It enables remote-JITing via EPC (backed
by a SimpleExecutorMemoryManager instance on the executor side) for RuntimeDyld
clients.

The lli and lli-child-target tools are updated to use SimpleRemoteEPC and
SimpleRemoteEPCServer (rather than OrcRemoteTargetClient/Server), and
EPCGenericRTDyldMemoryManager for MCJIT tests.

By enabling remote-JITing for MCJIT and RuntimeDyld-based ORC clients,
EPCGenericRTDyldMemoryManager allows us to deprecate older remote-JITing
support, including OrcTargetClient/Server, OrcRPCExecutorProcessControl, and the
Orc RPC system itself. These will be removed in future patches.
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/TargetProcess/RegisterEHFrames.h
The file was addedllvm/include/llvm/ExecutionEngine/Orc/EPCGenericRTDyldMemoryManager.h
The file was addedllvm/lib/ExecutionEngine/Orc/EPCGenericRTDyldMemoryManager.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/TargetProcess/RegisterEHFrames.cpp
The file was modifiedllvm/tools/lli/lli.cpp
The file was modifiedllvm/tools/lli/ChildTarget/ChildTarget.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleExecutorMemoryManager.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/Shared/OrcRTBridge.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/TargetProcess/OrcRTBootstrap.cpp
The file was removedllvm/tools/lli/RemoteJITUtils.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/CMakeLists.txt
The file was addedllvm/tools/lli/ForwardingMemoryManager.h
Commit 7a219d801bf2c3006482cf3cbd3170b3b4ea2e1b by Lang Hames
[lli] Add ChildTarget dependence on OrcTargetProcess library.

ChildTarget depends on OrcTargetProcess after bef55a2b47a.
The file was modifiedllvm/tools/lli/ChildTarget/CMakeLists.txt
Commit 99951a56842d8e4cd0706cd17a04f77b5d0f6dd0 by Lang Hames
Revert "[ORC] Introduce EPCGenericRTDyldMemoryManager."

This reverts commit bef55a2b47a938ef35cbd7b61a1e5fa74e68c9ed while I investigate
failures on some bots. Also reverts "[lli] Add ChildTarget dependence on
OrcTargetProcess library." (7a219d801bf2c3006482cf3cbd3170b3b4ea2e1b) which was
a fallow-up to bef55a2b47a.
The file was modifiedllvm/tools/lli/ChildTarget/CMakeLists.txt
The file was modifiedllvm/tools/lli/lli.cpp
The file was addedllvm/tools/lli/RemoteJITUtils.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/CMakeLists.txt
The file was modifiedllvm/lib/ExecutionEngine/Orc/TargetProcess/RegisterEHFrames.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/Shared/OrcRTBridge.h
The file was removedllvm/include/llvm/ExecutionEngine/Orc/EPCGenericRTDyldMemoryManager.h
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/TargetProcess/RegisterEHFrames.h
The file was removedllvm/lib/ExecutionEngine/Orc/EPCGenericRTDyldMemoryManager.cpp
The file was removedllvm/tools/lli/ForwardingMemoryManager.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/TargetProcess/OrcRTBootstrap.cpp
The file was modifiedllvm/tools/lli/ChildTarget/ChildTarget.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleExecutorMemoryManager.cpp
Commit a892c0e49e8de6daf141af23b396cf21b4471299 by i
[ELF][test] Improve test coverage
The file was modifiedlld/test/ELF/linkerscript/memory-err.s
The file was addedlld/test/ELF/start-group.s
The file was modifiedlld/test/ELF/common-page.s
The file was modifiedlld/test/ELF/warn-backrefs.s
Commit 897eb579c615260d68fee7ecc11a5d1773fa3781 by Lang Hames
[ORC-RT] ExecutorAddrDiff ergonomic improvements; contains and overlaps methods

Renames StartAddress and EndAddress members to Start and End.

Adds contains and overlap methods.

Adds a constructor from an address and size.

These changes are counterparts to LLVM commits ef391df2b6332, c0d889995e708, and
37f1b7a3f35fd.
The file was addedcompiler-rt/lib/orc/unittests/executor_address_test.cpp
The file was modifiedcompiler-rt/lib/orc/elfnix_platform.cpp
The file was modifiedcompiler-rt/lib/orc/executor_address.h
The file was modifiedcompiler-rt/lib/orc/macho_platform.cpp
The file was modifiedcompiler-rt/lib/orc/unittests/CMakeLists.txt
Commit 1c3859f31d0ef8e99c4aabbcfd11e5eea03e3c15 by nikita.ppv
[BasicAA] Don't consider Argument as escape source (NFCI)

The case of an Argument and an identified function local is already
handled earlier, because we don't care about captures in that case.
As such, we don't need to additionally consider the combination of
an Argument with a non-escaping identified function local.

This ensures that isEscapeSource() only returns true for
instructions, which is necessary for D110368.
The file was modifiedllvm/lib/Analysis/BasicAliasAnalysis.cpp
Commit 327bbbb10bfd95db38ae3406c87d481a07f67633 by nikita.ppv
[DSE] Make capture check more precise

It is sufficient that the object has not been captured before the
load that produces the pointer we're loading. A capture after that
can not affect the already loaded pointer.

This is small part of D110368 applied separately.
The file was modifiedllvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
The file was modifiedllvm/test/Transforms/DeadStoreElimination/captures-before-load.ll
Commit ba664d906644e62ac30e9a92edf48391c923992c by nikita.ppv
[AA] Move earliest escape tracking from DSE to AA

This is a followup to D109844 (and alternative to D109907), which
integrates the new "earliest escape" tracking into AliasAnalysis.
This is done by replacing the pre-existing context-free capture
cache in AAQueryInfo with a replaceable (virtual) object with two
implementations: The SimpleCaptureInfo implements the previous
behavior (check whether object is captured at all), while
EarliestEscapeInfo implements the new behavior from DSE.

This combines the "earliest escape" analysis with the full power of
BasicAA: It subsumes the call handling from D109907, considers a
wider range of escape sources, and works with AA recursion. The
compile-time cost is slightly higher than with D109907.

Differential Revision: https://reviews.llvm.org/D110368
The file was modifiedllvm/lib/Analysis/BasicAliasAnalysis.cpp
The file was modifiedllvm/lib/Analysis/AliasAnalysis.cpp
The file was modifiedllvm/test/Transforms/DeadStoreElimination/captures-before-load.ll
The file was modifiedllvm/unittests/Analysis/BasicAliasAnalysisTest.cpp
The file was modifiedllvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
The file was modifiedllvm/include/llvm/Analysis/AliasAnalysis.h
The file was modifiedllvm/test/Transforms/DeadStoreElimination/captures-before-call.ll
Commit 40cd4db442994e2bac6704e34580246c1d0bd91d by i
[ELF] Default gotBaseSymInGotPlt to false (NFC for most architectures)

Most architectures use .got instead of .got.plt, so switching the default can
minimize customization.

This fixes an issue for SPARC V9 which uses .got .
AVR, AMDGPU, and MSP430 don't seem to use _GLOBAL_OFFSET_TABLE_.
The file was modifiedlld/ELF/Target.h
The file was modifiedlld/ELF/Arch/PPC64.cpp
The file was modifiedlld/ELF/Arch/AArch64.cpp
The file was modifiedlld/ELF/Arch/Hexagon.cpp
The file was modifiedlld/ELF/Arch/Mips.cpp
The file was modifiedlld/ELF/Arch/X86_64.cpp
The file was modifiedlld/ELF/Arch/PPC.cpp
The file was modifiedlld/ELF/Arch/RISCV.cpp
The file was modifiedlld/ELF/Arch/ARM.cpp
The file was modifiedlld/ELF/Arch/X86.cpp
Commit d23fd8ae8906866244482ee623288a657b6c5e9a by i
[ELF] Replace noneRel = R_*_NONE with static constexpr. NFC

All architectures define R_*_NONE to 0.
The file was modifiedlld/ELF/Arch/PPC.cpp
The file was modifiedlld/ELF/Arch/Hexagon.cpp
The file was modifiedlld/ELF/Arch/PPC64.cpp
The file was modifiedlld/ELF/Arch/X86_64.cpp
The file was modifiedlld/ELF/Arch/SPARCV9.cpp
The file was modifiedlld/ELF/Arch/X86.cpp
The file was modifiedlld/ELF/Arch/AVR.cpp
The file was modifiedlld/ELF/Arch/AArch64.cpp
The file was modifiedlld/ELF/Arch/ARM.cpp
The file was modifiedlld/ELF/Target.h
The file was modifiedlld/ELF/Arch/RISCV.cpp
The file was modifiedlld/ELF/Arch/AMDGPU.cpp
The file was modifiedlld/ELF/Arch/Mips.cpp
Commit db6a00daa081a1664c4b714e28042d3803b7e1f4 by i
[ELF] Remove unneeded binding parameter from addOptionalRegular. NFC

__rela_iplt_start uses spurious STB_WEAK, but it doesn't matter because STV_HIDDEN overrides the binding.
The file was modifiedlld/ELF/Writer.cpp
Commit 0371049277912afc201da721fa659ecef7ab7fba by Lang Hames
[ORC] Fix uninitialized variable.

Spotted by Dave Blaikie. Thanks Dave!
The file was modifiedllvm/lib/ExecutionEngine/Orc/Shared/SimpleRemoteEPCUtils.cpp
Commit 320832cc9b7e7fea5fc8afbed75c34c4a43287ba by Lang Hames
[ORC] Wait for handleDisconnect to complete in SimpleRemoteEPC::disconnect.

Disconnect should block until handleDisconnect completes, otherwise we might
destroy the SimpleRemoteEPC instance while it's still in use.

Thanks to Dave Blaikie for helping me track this down.
The file was modifiedllvm/lib/ExecutionEngine/Orc/SimpleRemoteEPC.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/SimpleRemoteEPC.h
Commit c3aed0d395950c23d66c3ec0af4b1a2ec2534795 by joker.eph
MLIR can't support -Bsymbolic link option, fail at CMake time with a helpful message instead of broken runtime

Differential Revision: https://reviews.llvm.org/D110483
The file was modifiedmlir/CMakeLists.txt
Commit e21b0ba8c9378bca01d2311be4e1b6ccd3397bc4 by arames
[ADT]  Add trailing comma on TYPED_TEST_SUITE

This avoids a -pedantic warning:
warning: ISO C++11 requires at least one argument for the "..." in a variadic macro

See also https://github.com/google/googletest/issues/2271

Reviewed By: arames, bkramer

Differential Revision: https://reviews.llvm.org/D110283
The file was modifiedllvm/unittests/ADT/SequenceTest.cpp