Started 3 mo 26 days ago
Took 1 hr 34 min

Build #1992 (Oct 1, 2021 10:01:40 PM)

Changes
  1. Use `check-mlir-build-only` for the build step instead of `mlir-opt` (details / githubweb)
Changes
  1. [flang][NFC] Fix header comments in some runtime headers (details)
  2. [flang] Add a wrapper for Fortran main program (details)
  3. [flang][NFC] Add debug dump method to evaluate::Expr and semantics::Symbol (details)
  4. [flang] Improve runtime interface with C99 complex (details)
  5. [flang] Revert 3 commits pushed by mistake along b7c07ce15ffe6da9dcd69d457a3eca987452edc7 (details)
  6. [fir][NFC] Update doc for pinned attr in fir.alloca (details)
  7. [fir][NFC] Move fir.select_type builder to cpp file (details)
  8. [SelectionDAG] Handle promotion + widening in getCopyToPartsVector (details)
  9. [LoopVectorize] Permit vectorisation of more select(cmp(), X, Y) reduction patterns (details)
  10. [clang][ASTImporter] Import InheritedConstructor and ConstructorUsingShadowDecl. (details)
  11. [flang][driver] Error if uuidgen is not installed (details)
  12. [clang][ASTImporter] Import ConstructorUsingShadowDecl correctly. (details)
  13. Revert "[LoopVectorize] Permit vectorisation of more select(cmp(), X, Y) reduction patterns" (details)
  14. Revert "[libcxx] Run u16string tests for gdb pretty printers" (details)
  15. Revert "[libcxx][test] Use python specified by build rather than system default python" (details)
  16. [llvm-reduce] Skip updating calls where OldF isn't the called fn. (details)
  17. [SLPVectorizer] Fix crash in isShuffle with scalable vectors (details)
  18. [AArch64][SVE] Replace fmul, fadd and fsub LLVM IR instrinsics with LLVM IR binary ops (details)
  19. [BasicAA] Add test showing 32 bit overflow issue for GEPs. (details)
  20. [clangd] Handle members of anon structs in SelectionTree (details)
  21. [lldb] [Host] Refactor TerminalState (details)
  22. [RISCV][NFC] Add closing parentheses to frame layout comments (details)
  23. [mlir] Enable loop peeling for "reduction" dimensions of tiled_loop. (details)
  24. [libFuzzer] Fix two typos (details)
  25. [MLIR][GPU] Add GPU launch op support for dynamic shared memory (details)
  26. [lldb] Add a gdb_remote_client test for connecting to pty (details)
  27. [fir] Add fir.char_convert op (details)
  28. [fir][NFC] Remove explicit num of inlined element for SmallVectors (details)
  29. Fix ambiguous overload build failure (details)
  30. [lldb] [test] Delay pty/tty imports to fix Windows builds (details)
  31. [PowerPC] Optimal sequence for doubleword vec_all_{eq|ne} on Power7 (details)
  32. [clang] Try to unbreak crash-report.cpp on PS4 bot after 8dfbe9b0a (details)
  33. [RISCV][NFC] Reformat a line of frame lowering code (details)
  34. [lldb] Simplify TestCompletion.py (details)
  35. [mlir][linalg] Retire PoolingMaxOp/PoolingMinOp/PoolingSumOp. (details)
  36. [libomptarget][amdgpu] Refactor memory pool collection (details)
  37. [fir] Remove obsolete fir.negf and fir.modf ops (details)
  38. [SystemZ][z/OS] Introduce initial support for GOFF asm parser (details)
  39. [gn build] Port fb99424a6f65 (details)
  40. [X86][Costmodel] Load/store i32/f32 Stride=2 VF=2 interleaving costs (details)
  41. [X86][Costmodel] Load/store i32/f32 Stride=2 VF=4 interleaving costs (details)
  42. [X86][Costmodel] Load/store i32/f32 Stride=2 VF=8 interleaving costs (details)
  43. [X86][Costmodel] Load/store i32/f32 Stride=2 VF=16 interleaving costs (details)
  44. [X86][Costmodel] Load/store i32/f32 Stride=2 VF=32 interleaving costs (details)
  45. [X86][Costmodel] Load/store i64/f64 Stride=2 VF=2 interleaving costs (details)
  46. [X86][Costmodel] Load/store i64/f64 Stride=2 VF=4 interleaving costs (details)
  47. [X86][Costmodel] Load/store i64/f64 Stride=2 VF=8 interleaving costs (details)
  48. [X86][Costmodel] Load/store i64/f64 Stride=2 VF=16 interleaving costs (details)
  49. [NFC][AMDGPU] Reduce includes dependencies, part 2 (details)
  50. [libunwind] Fix cfi_register for float registers. (details)
  51. [InstCombine] add tests for icmp of gep; NFC (details)
  52. [gn build] Port 47d6274d4c31 (details)
  53. [analyzer] Fix deprecated plistlib functions (details)
  54. [NFC][X86][LV] Improve costmodel test coverage for interleaved i8 load/store stride=3 (details)
  55. [NFC][X86][Codegen] Add test coverage for interleaved i8 load/store stride=3 (details)
  56. [llvm-jitlink] Fix a FIXME. (details)
  57. [libc++] [test] Remove "// -*- C++ -*-" comments from generated .cpp files. (details)
  58. [libc++] Remove "// -*- C++ -*-" comments from all .cpp files. NFCI. (details)
  59. [OpenMP][testing] increase threshold for omp_get_wtime test (details)
  60. [OpenMP][host runtime] Introduce kmp_cpuinfo_flags_t to replace integer flags (details)
  61. [TrivialDeadness] Update function comment (details)
  62. [libc++] [test] Remove filenames from copyright headers. NFCI. (details)
  63. [lldb] [Host] Fix flipped logic in TerminalState::Save() (details)
  64. [NFC][Codegen][X86] Drop unused check prefixes in newly added tests (details)
  65. [AIX]implement the --syms and using "symbol index and qualname" for --sym --symbol--description for llvm-objdump for xcoff (details)
  66. [Transforms] Migrate from getNumArgOperands to arg_size (NFC) (details)
  67. [ORC] Remove OrcRPCExecutorProcessControl ad OrcRPCTPCServer. (details)
  68. [libc++] Revert the part of my b82683b that affected <version>. (details)
  69. [DetectDeadLanes] Enable machine verification after this pass (details)
  70. [ProcessImplicitDefs] Enable machine verification after this pass (details)
  71. [UnreachableMachineBlockElim] Enable machine verification after this pass (details)
  72. [LiveVariables] Skip verification of kills inside bundles (details)
  73. [MachineLoopInfo] Enable machine verification after this pass (details)
  74. [NFC][AttributeList] Replace index_begin/end with an iterator (details)
  75. [mlir][linalg] Include InitTensorOp in tiling canonicalization (details)
  76. [ORC] Remove ORC RPC. (details)
  77. [gn build] Port 33dd98e9e499 (details)
  78. [InstCombine] fold (trunc (X>>C1)) << C to shift+mask directly (details)
  79. [lldb] [Host] Sync TerminalState::Data to struct type (details)
  80. [ORC] Fix LLVM modulemap after removal of ORC RPC in 33dd98e9e49. (details)
  81. revert tsan part for investigation (details)
  82. [fir][NFC] Move fir.global printer to cpp file (details)
  83. [BasicAA] Add additional 32-bit truncation test (NFC) (details)
  84. [AIX] Don't pass namedsects in LTO mode (details)
  85. [NFC][X86][LV] Improve costmodel test coverage for interleaved i8 load/store stride=4 (details)
  86. [NFC][X86][Codegen] Add test coverage for interleaved i8 load/store stride=4 (details)
  87. [TwoAddressInstruction] Pre-commit a test case for D110944 (details)
  88. [TwoAddressInstruction] Tweak constraining of tied operands (details)
  89. [DAG] scalarizeExtractedVectorLoad - replace getABITypeAlign with allowsMemoryAccess (PR45116) (details)
  90. [Demangle][Rust] Parse non-ASCII identifiers (details)
  91. [gn build] Port c8c2b4629f75 (details)
  92. [mlir][capi] Add TypeID to MLIR C-API (details)
  93. [BasicAA] Add additional truncation tests (NFC) (details)
  94. [BasicAA] Make test more robust (NFC) (details)
  95. [mlir][sparse] Factoring out getZero() and avoiding unnecessary Type params (details)
  96. [mlir][sparse] Factoring out allocaIndices() (details)
  97. [mlir][sparse] Sharing calls to adaptor.getOperands()[0] (details)
  98. [Test] Add a test exposing a miscompile in SimpleLoopUnswitch. (details)
  99. [SimpleLoopUnswitch] Don't unswitch constant conditions (details)
  100. [DomTree] Assert that blocks in queries aren't from another function (details)
  101. [Profile] Add a warning when lock file failed in __llvm_profile_set_file_object with continuous mode (details)
  102. Revert "tsan: print a meaningful frame for stack races" (details)
  103. Revert "tsan: fix tls_race3 test on darwin" (details)
  104. Revert "tsan: fix and test detection of TLS races" (details)
  105. Revert "[DomTree] Assert that blocks in queries aren't from another function" (details)
  106. [NFC][PowerPC] Add test case for byval store. (details)
  107. [AArch64][GlobalISel] Change G_ANYEXT fed by scalar G_ICMP to G_ZEXT (details)
  108. [test] split flags-from-poison.ll to allow ease of autogen update (details)
  109. [SCEV] Remove invariant requirement from isSCEVExprNeverPoison (details)
  110. [SCEV] Stop blindly propagating flags from inbound geps to SCEV nodes (details)
  111. [test] add coverage for a SCEVUnknown scoped value in isSCEVExprNeverPoison (details)
  112. Revert "Extract LC_CODE_SIGNATURE related implementation out of LLD" (details)
  113. [gn build] Port 657f02d45804 (details)
  114. [libc++][Docs] Update benchmark doc wrt monorepo (details)
  115. [flang][OpenMP] Added OpenMP 5.0 specification based semantic checks for sections construct and test case for simd construct (details)
  116. Add a `check-mlir-build-only` build target that only builds the dependencies of the `check-mlir` test target (NFC) (details)
  117. Fix memory leaks in mlir/test/CAPI/ir.c (details)
Changes
  1. Use `check-mlir-build-only` for the build step instead of `mlir-opt` (details)

Started by timer

This run spent:

  • 3 ms waiting;
  • 1 hr 34 min build duration;
  • 1 hr 34 min total from scheduled to completion.
Revision: f656ed64d112adb837cb51496a58d30bee21f3d9
Repository: https://github.com/llvm/llvm-zorg.git
  • refs/remotes/origin/main
Revision: 237d18a61a97e963c7757bc878f38aee31508de5
Repository: http://labmaster3.local/git/llvm-project.git
  • refs/remotes/origin/main
Revision: f656ed64d112adb837cb51496a58d30bee21f3d9
Repository: http://labmaster3.local/git/llvm-zorg.git
  • refs/remotes/origin/main
Test Result (no failures)