Changes

Summary

  1. Use `check-mlir-build-only` for the build step instead of `mlir-opt` (details)
Commit f656ed64d112adb837cb51496a58d30bee21f3d9 by joker.eph
Use `check-mlir-build-only` for the build step instead of `mlir-opt`

`mlir-opt` was used as a proxy to build "most" of the code before
running the testing step. Replace it with the newly introduced
`check-mlir-build-only` target which includes all of the build target
needed to run the tests.
The file was modifiedbuildbot/osuosl/master/config/builders.py (diff)

Summary

  1. [flang][NFC] Fix header comments in some runtime headers (details)
  2. [flang] Add a wrapper for Fortran main program (details)
  3. [flang][NFC] Add debug dump method to evaluate::Expr and semantics::Symbol (details)
  4. [flang] Improve runtime interface with C99 complex (details)
  5. [flang] Revert 3 commits pushed by mistake along b7c07ce15ffe6da9dcd69d457a3eca987452edc7 (details)
  6. [fir][NFC] Update doc for pinned attr in fir.alloca (details)
  7. [fir][NFC] Move fir.select_type builder to cpp file (details)
  8. [SelectionDAG] Handle promotion + widening in getCopyToPartsVector (details)
  9. [LoopVectorize] Permit vectorisation of more select(cmp(), X, Y) reduction patterns (details)
  10. [clang][ASTImporter] Import InheritedConstructor and ConstructorUsingShadowDecl. (details)
  11. [flang][driver] Error if uuidgen is not installed (details)
  12. [clang][ASTImporter] Import ConstructorUsingShadowDecl correctly. (details)
  13. Revert "[LoopVectorize] Permit vectorisation of more select(cmp(), X, Y) reduction patterns" (details)
  14. Revert "[libcxx] Run u16string tests for gdb pretty printers" (details)
  15. Revert "[libcxx][test] Use python specified by build rather than system default python" (details)
  16. [llvm-reduce] Skip updating calls where OldF isn't the called fn. (details)
  17. [SLPVectorizer] Fix crash in isShuffle with scalable vectors (details)
  18. [AArch64][SVE] Replace fmul, fadd and fsub LLVM IR instrinsics with LLVM IR binary ops (details)
  19. [BasicAA] Add test showing 32 bit overflow issue for GEPs. (details)
  20. [clangd] Handle members of anon structs in SelectionTree (details)
  21. [lldb] [Host] Refactor TerminalState (details)
  22. [RISCV][NFC] Add closing parentheses to frame layout comments (details)
  23. [mlir] Enable loop peeling for "reduction" dimensions of tiled_loop. (details)
  24. [libFuzzer] Fix two typos (details)
  25. [MLIR][GPU] Add GPU launch op support for dynamic shared memory (details)
  26. [lldb] Add a gdb_remote_client test for connecting to pty (details)
  27. [fir] Add fir.char_convert op (details)
  28. [fir][NFC] Remove explicit num of inlined element for SmallVectors (details)
  29. Fix ambiguous overload build failure (details)
  30. [lldb] [test] Delay pty/tty imports to fix Windows builds (details)
  31. [PowerPC] Optimal sequence for doubleword vec_all_{eq|ne} on Power7 (details)
  32. [clang] Try to unbreak crash-report.cpp on PS4 bot after 8dfbe9b0a (details)
  33. [RISCV][NFC] Reformat a line of frame lowering code (details)
  34. [lldb] Simplify TestCompletion.py (details)
  35. [mlir][linalg] Retire PoolingMaxOp/PoolingMinOp/PoolingSumOp. (details)
  36. [libomptarget][amdgpu] Refactor memory pool collection (details)
  37. [fir] Remove obsolete fir.negf and fir.modf ops (details)
  38. [SystemZ][z/OS] Introduce initial support for GOFF asm parser (details)
  39. [gn build] Port fb99424a6f65 (details)
  40. [X86][Costmodel] Load/store i32/f32 Stride=2 VF=2 interleaving costs (details)
  41. [X86][Costmodel] Load/store i32/f32 Stride=2 VF=4 interleaving costs (details)
  42. [X86][Costmodel] Load/store i32/f32 Stride=2 VF=8 interleaving costs (details)
  43. [X86][Costmodel] Load/store i32/f32 Stride=2 VF=16 interleaving costs (details)
  44. [X86][Costmodel] Load/store i32/f32 Stride=2 VF=32 interleaving costs (details)
  45. [X86][Costmodel] Load/store i64/f64 Stride=2 VF=2 interleaving costs (details)
  46. [X86][Costmodel] Load/store i64/f64 Stride=2 VF=4 interleaving costs (details)
  47. [X86][Costmodel] Load/store i64/f64 Stride=2 VF=8 interleaving costs (details)
  48. [X86][Costmodel] Load/store i64/f64 Stride=2 VF=16 interleaving costs (details)
  49. [NFC][AMDGPU] Reduce includes dependencies, part 2 (details)
  50. [libunwind] Fix cfi_register for float registers. (details)
  51. [InstCombine] add tests for icmp of gep; NFC (details)
  52. [gn build] Port 47d6274d4c31 (details)
  53. [analyzer] Fix deprecated plistlib functions (details)
  54. [NFC][X86][LV] Improve costmodel test coverage for interleaved i8 load/store stride=3 (details)
  55. [NFC][X86][Codegen] Add test coverage for interleaved i8 load/store stride=3 (details)
  56. [llvm-jitlink] Fix a FIXME. (details)
  57. [libc++] [test] Remove "// -*- C++ -*-" comments from generated .cpp files. (details)
  58. [libc++] Remove "// -*- C++ -*-" comments from all .cpp files. NFCI. (details)
  59. [OpenMP][testing] increase threshold for omp_get_wtime test (details)
  60. [OpenMP][host runtime] Introduce kmp_cpuinfo_flags_t to replace integer flags (details)
  61. [TrivialDeadness] Update function comment (details)
  62. [libc++] [test] Remove filenames from copyright headers. NFCI. (details)
  63. [lldb] [Host] Fix flipped logic in TerminalState::Save() (details)
  64. [NFC][Codegen][X86] Drop unused check prefixes in newly added tests (details)
  65. [AIX]implement the --syms and using "symbol index and qualname" for --sym --symbol--description for llvm-objdump for xcoff (details)
  66. [Transforms] Migrate from getNumArgOperands to arg_size (NFC) (details)
  67. [ORC] Remove OrcRPCExecutorProcessControl ad OrcRPCTPCServer. (details)
  68. [libc++] Revert the part of my b82683b that affected <version>. (details)
  69. [DetectDeadLanes] Enable machine verification after this pass (details)
  70. [ProcessImplicitDefs] Enable machine verification after this pass (details)
  71. [UnreachableMachineBlockElim] Enable machine verification after this pass (details)
  72. [LiveVariables] Skip verification of kills inside bundles (details)
  73. [MachineLoopInfo] Enable machine verification after this pass (details)
  74. [NFC][AttributeList] Replace index_begin/end with an iterator (details)
  75. [mlir][linalg] Include InitTensorOp in tiling canonicalization (details)
  76. [ORC] Remove ORC RPC. (details)
  77. [gn build] Port 33dd98e9e499 (details)
  78. [InstCombine] fold (trunc (X>>C1)) << C to shift+mask directly (details)
  79. [lldb] [Host] Sync TerminalState::Data to struct type (details)
  80. [ORC] Fix LLVM modulemap after removal of ORC RPC in 33dd98e9e49. (details)
  81. revert tsan part for investigation (details)
  82. [fir][NFC] Move fir.global printer to cpp file (details)
  83. [BasicAA] Add additional 32-bit truncation test (NFC) (details)
  84. [AIX] Don't pass namedsects in LTO mode (details)
  85. [NFC][X86][LV] Improve costmodel test coverage for interleaved i8 load/store stride=4 (details)
  86. [NFC][X86][Codegen] Add test coverage for interleaved i8 load/store stride=4 (details)
  87. [TwoAddressInstruction] Pre-commit a test case for D110944 (details)
  88. [TwoAddressInstruction] Tweak constraining of tied operands (details)
  89. [DAG] scalarizeExtractedVectorLoad - replace getABITypeAlign with allowsMemoryAccess (PR45116) (details)
  90. [Demangle][Rust] Parse non-ASCII identifiers (details)
  91. [gn build] Port c8c2b4629f75 (details)
  92. [mlir][capi] Add TypeID to MLIR C-API (details)
  93. [BasicAA] Add additional truncation tests (NFC) (details)
  94. [BasicAA] Make test more robust (NFC) (details)
  95. [mlir][sparse] Factoring out getZero() and avoiding unnecessary Type params (details)
  96. [mlir][sparse] Factoring out allocaIndices() (details)
  97. [mlir][sparse] Sharing calls to adaptor.getOperands()[0] (details)
  98. [Test] Add a test exposing a miscompile in SimpleLoopUnswitch. (details)
  99. [SimpleLoopUnswitch] Don't unswitch constant conditions (details)
  100. [DomTree] Assert that blocks in queries aren't from another function (details)
  101. [Profile] Add a warning when lock file failed in __llvm_profile_set_file_object with continuous mode (details)
  102. Revert "tsan: print a meaningful frame for stack races" (details)
  103. Revert "tsan: fix tls_race3 test on darwin" (details)
  104. Revert "tsan: fix and test detection of TLS races" (details)
  105. Revert "[DomTree] Assert that blocks in queries aren't from another function" (details)
  106. [NFC][PowerPC] Add test case for byval store. (details)
  107. [AArch64][GlobalISel] Change G_ANYEXT fed by scalar G_ICMP to G_ZEXT (details)
  108. [test] split flags-from-poison.ll to allow ease of autogen update (details)
  109. [SCEV] Remove invariant requirement from isSCEVExprNeverPoison (details)
  110. [SCEV] Stop blindly propagating flags from inbound geps to SCEV nodes (details)
  111. [test] add coverage for a SCEVUnknown scoped value in isSCEVExprNeverPoison (details)
  112. Revert "Extract LC_CODE_SIGNATURE related implementation out of LLD" (details)
  113. [gn build] Port 657f02d45804 (details)
  114. [libc++][Docs] Update benchmark doc wrt monorepo (details)
  115. [flang][OpenMP] Added OpenMP 5.0 specification based semantic checks for sections construct and test case for simd construct (details)
  116. Add a `check-mlir-build-only` build target that only builds the dependencies of the `check-mlir` test target (NFC) (details)
  117. Fix memory leaks in mlir/test/CAPI/ir.c (details)
Commit a63f57674d511eb287edbabad9674c6298cf8b84 by jperier
[flang][NFC] Fix header comments in some runtime headers
The file was modifiedflang/include/flang/Runtime/magic-numbers.h
Commit 2c1ce0755e09909c41db93845c4c3f42457cb9c8 by jperier
[flang] Add a wrapper for Fortran main program

Add a C wrapper that calls the Fortran runtime initialization and
finalization routines as well as the compiled Fortran main program
_QQmain.

Place it in its own library to satisfy shared library builds since it
contains a C main function.

- https://github.com/flang-compiler/f18-llvm-project/commit/cc7ac498f916d32a9b197d3ace816f4de5d36aad#diff-fa35a5efa62731fd2845e5e982eca9a2e36439783e11a4e4a463753c2160ec10R53
- was created in flang/test/Examples/main.c in Eric's branch
The file was modifiedflang/runtime/CMakeLists.txt
The file was addedflang/runtime/Fortran_main.c
The file was modifiedflang/cmake/modules/AddFlang.cmake
Commit b0e35fde21ecb47799603e1acfc9ffa7b83dea13 by jperier
[flang][NFC] Add debug dump method to evaluate::Expr and semantics::Symbol

Helps debugging when working with symbol/expression issue. The dump
method is easy to call in the debugger.
The file was modifiedflang/lib/Evaluate/expression.cpp
Commit b7c07ce15ffe6da9dcd69d457a3eca987452edc7 by jperier
[flang] Improve runtime interface with C99 complex

Follow up of https://reviews.llvm.org/D83397.

In folding, make pgmath usage conditional to C99 complex
support in C++. Disable warning in such case.

In lowering, use an empty class type to indicate C99 complex
type in runtime interface.

Add a unit test enforcing C99 complex can be processed
by FIR runtime interface builder.

Differential Revision: https://reviews.llvm.org/D110860
The file was modifiedflang/unittests/CMakeLists.txt
The file was modifiedflang/include/flang/Evaluate/pgmath.h.inc
The file was modifiedflang/lib/Evaluate/CMakeLists.txt
The file was modifiedflang/lib/Lower/RTBuilder.h
The file was addedflang/unittests/Lower/CMakeLists.txt
The file was addedflang/unittests/Lower/RTBuilder.cpp
Commit 7a6ab39e71c070cc2b96e93c7feed67952452c03 by jperier
[flang] Revert 3 commits pushed by mistake along b7c07ce15ffe6da9dcd69d457a3eca987452edc7

Revert "[flang][NFC] Add debug dump method to evaluate::Expr and semantics::Symbol"
This reverts commit b0e35fde21ecb47799603e1acfc9ffa7b83dea13.

Revert "[flang] Add a wrapper for Fortran main program"
This reverts commit 2c1ce0755e09909c41db93845c4c3f42457cb9c8.

Revert "[flang][NFC] Fix header comments in some runtime headers"
This reverts commit a63f57674d511eb287edbabad9674c6298cf8b84.
The file was removedflang/runtime/Fortran_main.c
The file was modifiedflang/cmake/modules/AddFlang.cmake
The file was modifiedflang/runtime/CMakeLists.txt
The file was modifiedflang/lib/Evaluate/expression.cpp
The file was modifiedflang/include/flang/Runtime/magic-numbers.h
Commit b04dd35f0e36e48aebf28798ad0bb42f1d3baff4 by clementval
[fir][NFC] Update doc for pinned attr in fir.alloca

Add descritpion for the attribute added in D110815.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D110877
The file was modifiedflang/include/flang/Optimizer/Dialect/FIROps.td
Commit a149b103ca1ff964c4ed52c6dfac8984631aba11 by clementval
[fir][NFC] Move fir.select_type builder to cpp file

Move the big builder out of the td file to the cpp file.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D110820
The file was modifiedflang/include/flang/Optimizer/Dialect/FIROps.td
The file was modifiedflang/lib/Optimizer/Dialect/FIROps.cpp
Commit b62e6f19d71359f2c901c834764191355ad06420 by sander.desmalen
[SelectionDAG] Handle promotion + widening in getCopyToPartsVector

Some vectors require both widening and promotion for their legalization.
This case is not yet handled in getCopyToPartsVector and falls back
on scalarizing by default. BBecause scalable vectors can't easily be
scalarised, we need to implement this in two separate stages:
1. Widen the vector.
2. Promote the vector.

As part of this patch, PromoteIntRes_CONCAT_VECTORS also needed to be
made scalable aware. Instead of falling back on scalarizing the vector
(fixed-width only), each sub-part of the CONCAT vector is promoted,
and the operation is performed on the type with the widest element type,
finally truncating the result to the promoted result type.

Differential Revision: https://reviews.llvm.org/D110646
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
The file was modifiedllvm/test/CodeGen/AArch64/sve-extract-scalable-vector.ll
Commit 1fb37334bdb3cdb028977382fbd84cebde64ebb2 by david.sherwood
[LoopVectorize] Permit vectorisation of more select(cmp(), X, Y) reduction patterns

This patch adds further support for vectorisation of loops that involve
selecting an integer value based on a previous comparison. Consider the
following C++ loop:

  int r = a;
  for (int i = 0; i < n; i++) {
    if (src[i] > 3) {
      r = b;
    }
    src[i] += 2;
  }

We should be able to vectorise this loop because all we are doing is
selecting between two states - 'a' and 'b' - both of which are loop
invariant. This just involves building a vector of values that contain
either 'a' or 'b', where the final reduced value will be 'b' if any lane
contains 'b'.

The IR generated by clang typically looks like this:

  %phi = phi i32 [ %a, %entry ], [ %phi.update, %for.body ]
  ...
  %pred = icmp ugt i32 %val, i32 3
  %phi.update = select i1 %pred, i32 %b, i32 %phi

We already detect min/max patterns, which also involve a select + cmp.
However, with the min/max patterns we are selecting loaded values (and
hence loop variant) in the loop. In addition we only support certain
cmp predicates. This patch adds a new pattern matching function
(isSelectCmpPattern) and new RecurKind enums - SelectICmp & SelectFCmp.
We only support selecting values that are integer and loop invariant,
however we can support any kind of compare - integer or float.

Tests have been added here:

  Transforms/LoopVectorize/AArch64/sve-select-cmp.ll
  Transforms/LoopVectorize/select-cmp-predicated.ll
  Transforms/LoopVectorize/select-cmp.ll

Differential Revision: https://reviews.llvm.org/D108136
The file was modifiedllvm/include/llvm/Transforms/Utils/LoopUtils.h
The file was modifiedllvm/lib/Analysis/IVDescriptors.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
The file was addedllvm/test/Transforms/LoopVectorize/AArch64/sve-select-cmp.ll
The file was addedllvm/test/Transforms/LoopVectorize/select-cmp.ll
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.cpp
The file was modifiedllvm/include/llvm/Analysis/IVDescriptors.h
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/scalable-reduction-inloop.ll
The file was addedllvm/test/Transforms/LoopVectorize/select-cmp-predicated.ll
The file was modifiedllvm/lib/Transforms/Utils/LoopUtils.cpp
Commit a3a0b066264fd132a2014edf2aef53072a1fe53a by 1.int32
[clang][ASTImporter] Import InheritedConstructor and ConstructorUsingShadowDecl.

Reviewed By: martong

Differential Revision: https://reviews.llvm.org/D110395
The file was modifiedclang/unittests/AST/ASTImporterTest.cpp
The file was modifiedclang/include/clang/ASTMatchers/ASTMatchers.h
The file was modifiedclang/lib/AST/ASTImporter.cpp
The file was modifiedclang/include/clang/AST/ASTImporter.h
Commit 3780de46001b510d78cd3f06f01a6f08793a4a45 by david.spickett
[flang][driver] Error if uuidgen is not installed

Ubuntu Bionic installs it by default, Focal does not.

Differential Revision: https://reviews.llvm.org/D110694
The file was modifiedflang/tools/f18/flang
Commit cad9ff531c71e7c28d7bd5a64a26f9b214156b59 by 1.int32
[clang][ASTImporter] Import ConstructorUsingShadowDecl correctly.

Fix import of ConstructorUsingShadowDecl and add tests.

Reviewed By: martong

Differential Revision: https://reviews.llvm.org/D110398
The file was modifiedclang/lib/AST/ASTImporter.cpp
The file was modifiedclang/unittests/AST/ASTImporterTest.cpp
Commit 685f1bfd0af3d5ee6023056d2f656f73990ef2c9 by krasimir
Revert "[LoopVectorize] Permit vectorisation of more select(cmp(), X, Y) reduction patterns"

It appears to cause stage2 clang build failures, e.g.,
https://lab.llvm.org/buildbot/#/builders/74/builds/7145.

This reverts commit 1fb37334bdb3cdb028977382fbd84cebde64ebb2.
The file was modifiedllvm/lib/Transforms/Utils/LoopUtils.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was removedllvm/test/Transforms/LoopVectorize/AArch64/sve-select-cmp.ll
The file was modifiedllvm/include/llvm/Analysis/IVDescriptors.h
The file was modifiedllvm/include/llvm/Transforms/Utils/LoopUtils.h
The file was removedllvm/test/Transforms/LoopVectorize/select-cmp-predicated.ll
The file was modifiedllvm/lib/Analysis/IVDescriptors.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/scalable-reduction-inloop.ll
The file was removedllvm/test/Transforms/LoopVectorize/select-cmp.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.cpp
Commit 5fbe9e40d1d1601119e72418eb797e5a216a1335 by david.spickett
Revert "[libcxx] Run u16string tests for gdb pretty printers"

This reverts commit e9564c3698edffc64439a8f957c7c28b19214613
due to a report of these tests failing.
The file was modifiedlibcxx/test/libcxx/gdb/gdb_pretty_printer_test.sh.cpp
Commit 81d2cea6902e70c8c29b8b09f56d0c626e093a40 by david.spickett
Revert "[libcxx][test] Use python specified by build rather than system default python"

This reverts commit 9f641c96cb15c9752c976bff286bb57adf86acab.

The "python" command in gdb uses the python gdb is linked to,
not what "python" would give you if you used it directly in the shell.
The file was modifiedlibcxx/utils/libcxx/test/features.py
Commit 57fbb9ed0e4c9717b1106ce18f5653ce8f7136fa by flo
[llvm-reduce] Skip updating calls where OldF isn't the called fn.

When replacing function calls, skip call instructions where the old
function is not the called function, but e.g. the old function is passed
as an argument.

This fixes a crash due to trying to construct invalid IR for the test
case.

Reviewed By: aeubanks

Differential Revision: https://reviews.llvm.org/D109759
The file was addedllvm/test/tools/llvm-reduce/remove-args-fn-passed-through-call.ll
The file was modifiedllvm/tools/llvm-reduce/deltas/ReduceArguments.cpp
Commit c1d46d34619bea0d9906874baafb5218e15e3b2a by kerry.mclaughlin
[SLPVectorizer] Fix crash in isShuffle with scalable vectors

D104809 changed `buildTree_rec` to check for extract element instructions
with scalable types. However, if the extract is extended or truncated,
these changes do not apply and we assert later on in isShuffle(), which
attempts to cast the type of the extract to FixedVectorType.

Reviewed By: ABataev

Differential Revision: https://reviews.llvm.org/D110640
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
The file was modifiedllvm/test/Transforms/SLPVectorizer/AArch64/scalable-vector.ll
Commit f085a9db8b8d408d08adcba8e283e637a0116622 by matthew.devereau
[AArch64][SVE] Replace fmul, fadd and fsub LLVM IR instrinsics with LLVM IR binary ops

Replacing fmul and fadd instrinsics with their binary ops results
more succinct AArch64 SVE output, e.g.:

4:   65428041 fmul z1.h, p0/m, z1.h, z2.h
8:   65408020 fadd z0.h, p0/m, z0.h, z1.h
->
4:   65620020   fmla    z0.h, p0/m, z1.h, z2.h
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
The file was addedllvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-fma-binops.ll
Commit 413b7ac6b535dfb4c57c2842388a2071901b9d56 by flo
[BasicAA] Add test showing 32 bit overflow issue for GEPs.

This patch additional tests with i64 GEP indices for 32 bit pointers.
@mustalias_overflow_in_32_bit_add_mul_gep highlights a case where
BasicAA currently incorrectly determines noalias.

Modeled in Alive2 for 32 bit pointers: https://alive2.llvm.org/ce/z/HHjQgb
Modeled in Alive2 for 64 bit pointers: https://alive2.llvm.org/ce/z/DoWK2c
The file was addedllvm/test/Analysis/BasicAA/gep-implicit-trunc-32-bit-pointers.ll
Commit 512aa8485010009f6ec1b8d9deea3effe67e0106 by kadircet
[clangd] Handle members of anon structs in SelectionTree

References to fields inside anon structs contain an implicit children
for the container, which has the same SourceLocation with the field.
This was resulting in SelectionTree always picking the anon-struct rather than
the field as the selection.

This patch prevents that by claiming the range for the field early.

https://github.com/clangd/clangd/issues/877.

Differential Revision: https://reviews.llvm.org/D110825
The file was modifiedclang-tools-extra/clangd/unittests/XRefsTests.cpp
The file was modifiedclang-tools-extra/clangd/Selection.cpp
Commit 58b4501eeabb2728a5c48e05295f3636db0ecee1 by mgorny
[lldb] [Host] Refactor TerminalState

Refactor TerminalState to make the code simpler.  Move 'struct termios'
to a PImpl-style subclass.  Add an RAII interface to automatically store
and restore the state.

Differential revision: https://reviews.llvm.org/D110721
The file was modifiedlldb/source/Host/common/Terminal.cpp
The file was modifiedlldb/include/lldb/Host/Terminal.h
The file was modifiedlldb/source/Target/Process.cpp
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
Commit fcaa64d9478bad86bc46967a6d63285b393d75f5 by fraser
[RISCV][NFC] Add closing parentheses to frame layout comments
The file was modifiedllvm/lib/Target/RISCV/RISCVFrameLowering.cpp
Commit 693c61b2e05005b584c53e388da3f971e1ced747 by pifon
[mlir] Enable loop peeling for "reduction" dimensions of tiled_loop.

Differential Revision: https://reviews.llvm.org/D110919
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Loops.cpp
Commit 369ac758531a4a5c4cf8a85610b4606e331fb2b1 by hans
[libFuzzer] Fix two typos
The file was modifiedcompiler-rt/lib/fuzzer/FuzzerDictionary.h
Commit 08b63db8bb3ea847543351e1268be31ea327ad6b by uday
[MLIR][GPU] Add GPU launch op support for dynamic shared memory

Add support for dynamic shared memory for GPU launch ops: add an
optional operand to gpu.launch and gpu.launch_func ops to specify the
amount of "dynamic" shared memory to use. Update lowerings to connect
this operand to the GPU runtime.

Differential Revision: https://reviews.llvm.org/D110800
The file was modifiedmlir/test/Conversion/GPUToSPIRV/builtins.mlir
The file was modifiedmlir/lib/Dialect/GPU/Transforms/KernelOutlining.cpp
The file was modifiedmlir/test/Conversion/GPUCommon/lower-launch-func-to-gpu-runtime-calls.mlir
The file was modifiedmlir/lib/Dialect/GPU/IR/GPUDialect.cpp
The file was modifiedmlir/test/Dialect/GPU/invalid.mlir
The file was modifiedmlir/include/mlir/Dialect/GPU/GPUOps.td
The file was modifiedmlir/lib/Conversion/GPUCommon/GPUToLLVMConversion.cpp
The file was modifiedmlir/test/Dialect/GPU/ops.mlir
Commit 8fa2394bad433558f3083cee158043e2fb66d781 by mgorny
[lldb] Add a gdb_remote_client test for connecting to pty

Add a minimal mock server utilizing a pty, and add a client test
connecting to that server.

Differential Revision: https://reviews.llvm.org/D110878
The file was modifiedlldb/test/API/functionalities/gdb_remote_client/TestProcessConnect.py
The file was modifiedlldb/test/API/functionalities/gdb_remote_client/gdbclientutils.py
The file was modifiedlldb/test/API/functionalities/gdb_remote_client/TestPlatformClient.py
The file was addedlldb/test/API/functionalities/gdb_remote_client/TestPty.py
Commit 15ea26de243ab56dd0cfe8cafee1366b59d2bb84 by clementval
[fir] Add fir.char_convert op

Add the fir-char_convert op.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D110818

Co-authored-by: Valentin Clement <clementval@gmail.com>
The file was modifiedflang/lib/Optimizer/Dialect/FIROps.cpp
The file was modifiedflang/include/flang/Optimizer/Dialect/FIROps.td
The file was modifiedflang/test/Fir/fir-ops.fir
The file was modifiedflang/test/Fir/invalid.fir
Commit 067312d28393e93ca15340b93278d3ba61fabd62 by clementval
[fir][NFC] Remove explicit num of inlined element for SmallVectors

Remove explicit number of inlined elements for SmallVector.

This patch is part of the upstreaming effort from fir-dev branch.

Co-authored-by: Jean Perier <jperier@nvidia.com>
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>

Reviewed By: awarzynski

Differential Revision: https://reviews.llvm.org/D110912
The file was modifiedflang/lib/Optimizer/Dialect/FIROps.cpp
The file was modifiedflang/include/flang/Optimizer/Dialect/FIROps.td
Commit dfb213c2dfdc813efdaf399af5867288573de186 by james.henderson
Fix ambiguous overload build failure

LLVM (llvmorg-14-init) under Debian sid using latest gcc (Debian
10.3.0-9) 10.3.0 fails due to ambiguous overload on operators == and !=:

/root/src/llvm/src/llvm/tools/obj2yaml/elf2yaml.cpp:212:22:
error: ambiguous overload for 'operator!='
(operand types are 'llvm::ELFYAML::ELF_SHF' and 'int')

/root/src/llvm/src/llvm/tools/obj2yaml/elf2yaml.cpp:204:32:
error: ambiguous overload for 'operator!='
(operand types are 'const llvm::yaml::Hex64' and 'int')

/root/src/llvm/src/llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp:629:35:
error: ambiguous overload for 'operator=='
(operand types are 'const uint64_t' {aka 'const long unsigned int'} and
'llvm::Register')

Reviewed by: StephenTozer, jmorse, Higuoxing

Differential Revision: https://reviews.llvm.org/D109534
The file was modifiedllvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp
The file was modifiedllvm/tools/obj2yaml/elf2yaml.cpp
Commit 12ee4c9ad87e5c144cde2e8ff8a4787da0ed71df by mgorny
[lldb] [test] Delay pty/tty imports to fix Windows builds

Delay pty/tty module imports until they are actually used, in order
to prevent their import failures on Windows.
The file was modifiedlldb/test/API/functionalities/gdb_remote_client/gdbclientutils.py
Commit 369d785574f5a22c086d0c40268a39a64bdd7217 by nemanja.i.ibm
[PowerPC] Optimal sequence for doubleword vec_all_{eq|ne} on Power7

These builtins produce inefficient code for CPU's prior to Power8
due to vcmpequd being unavailable. The predicate forms can actually
leverage the available vcmpequw along with xxlxor to produce a better
sequence.
The file was modifiedclang/lib/Headers/altivec.h
The file was modifiedclang/test/CodeGen/builtins-ppc-vsx.c
Commit ec4a82286674c44c9216e9585235b0fa5df4ae9f by thakis
[clang] Try to unbreak crash-report.cpp on PS4 bot after 8dfbe9b0a

Looks like exceptions are off-by-default with the PS4 triple.
Since adding -fexceptions defeats the purpose of the test change
in 8dfbe9b0a, pass an explicit triple instead.
The file was modifiedclang/test/Driver/crash-report.cpp
Commit 52c60459f5c6822c1d108bed91b9efa3ef053687 by fraser
[RISCV][NFC] Reformat a line of frame lowering code
The file was modifiedllvm/lib/Target/RISCV/RISCVFrameLowering.cpp
Commit 633ac5170996da6a80a2236bed99913b66ed1d27 by pavel
[lldb] Simplify TestCompletion.py
The file was modifiedlldb/test/API/functionalities/completion/TestCompletion.py
Commit bf2884974584c65481439b4e44527d0fb7dddb79 by gysit
[mlir][linalg] Retire PoolingMaxOp/PoolingMinOp/PoolingSumOp.

The pooling ops are among the last remaining hard coded Linalg operations that have no region attached. They got obsolete due to the OpDSL pooling operations. Removing them allows us to delete specialized code and tests that are not needed for the OpDSL counterparts that rely on the standard code paths.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D110909
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgOps.h
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
The file was modifiedmlir/test/Dialect/Linalg/roundtrip.mlir
The file was modifiedmlir/test/Dialect/Linalg/affine.mlir
The file was modifiedmlir/test/Dialect/Linalg/loops.mlir
The file was modifiedmlir/test/Dialect/Linalg/invalid.mlir
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Loops.cpp
Commit 05ba9ff6a6d243a07bd8adbe70c066c9f6ddc591 by jonathanchesterfield
[libomptarget][amdgpu] Refactor memory pool collection
The file was modifiedopenmp/libomptarget/plugins/amdgpu/src/rtl.cpp
Commit 2372249d8689928a8d4a59baed3671613743653a by clementval
[fir] Remove obsolete fir.negf and fir.modf ops

fir.negf op is replaced by mlir.negf and
fir.modf is just deleted.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D110932

Co-authored-by: Jean Perier <jperier@nvidia.com>
Co-authored-by: Valentin Clement <clementval@gmail.com>
The file was modifiedflang/test/Fir/fir-ops.fir
The file was modifiedflang/include/flang/Optimizer/Dialect/FIROps.td
The file was modifiedflang/lib/Lower/IntrinsicCall.cpp
Commit fb99424a6f65b5a68902a59e0b84d72607f8884d by anirudh_prasad
[SystemZ][z/OS] Introduce initial support for GOFF asm parser

- Introduce a skeleton outline for the GOFFAsmParser
- Before instantiating AsmParser/HLASMAsmParser, target specific asm parsers are attempted to be initialized first before proceeding. If it doesn't exist for a particular file type, we report a fatal error.
- This patch allows to properly instantiate the HLASMAsmParser on z/OS, and ensures we can write lit tests and unit tests which will involve the instantiation of asm parsers, without an assert / fatal error.

Reviewed By: uweigand, Kai

Differential Revision: https://reviews.llvm.org/D110730
The file was modifiedllvm/unittests/MC/SystemZ/SystemZAsmLexerTest.cpp
The file was modifiedllvm/lib/MC/MCParser/CMakeLists.txt
The file was modifiedllvm/lib/MC/MCParser/AsmParser.cpp
The file was addedllvm/lib/MC/MCParser/GOFFAsmParser.cpp
Commit 4f0a39b9b4ba67f26497688f831294e522eb53a5 by llvmgnsyncbot
[gn build] Port fb99424a6f65
The file was modifiedllvm/utils/gn/secondary/llvm/lib/MC/MCParser/BUILD.gn
Commit f44d9009c25827dd9fad5bfa240f6e59335d07b8 by lebedev.ri
[X86][Costmodel] Load/store i32/f32 Stride=2 VF=2 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/4rY96hnGT - for intels `Block RThroughput: =2.0`; for ryzens, `Block RThroughput: =1.0`
So pick cost of `2`.

For store we have:
https://godbolt.org/z/vbo37Y3r9 - for intels `Block RThroughput: =1.0`; for ryzens, `Block RThroughput: =0.5`
So pick cost of `1`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D110753
The file was modifiedllvm/test/Transforms/LoopVectorize/X86/interleaving.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-2.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-2.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-2.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-2.ll
Commit b12aeaec9aca28cbd23587dda6a3126ab0aaf1c0 by lebedev.ri
[X86][Costmodel] Load/store i32/f32 Stride=2 VF=4 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/EM5Ean7bd - for intels `Block RThroughput: =2.0`; for ryzens, `Block RThroughput: =1.0`
So pick cost of `2`.

For store we have:
https://godbolt.org/z/EM5Ean7bd - for intels `Block RThroughput: =2.0`; for ryzens, `Block RThroughput: <=2.0`
So pick cost of `2`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D110754
The file was modifiedllvm/test/Transforms/LoopVectorize/X86/interleaving.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-2.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-2.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-2.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-2.ll
Commit 3a0643e9c2252290a9f29c2b3ceb696033af4903 by lebedev.ri
[X86][Costmodel] Load/store i32/f32 Stride=2 VF=8 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/n8aMKeo4E - for intels `Block RThroughput: =4.0`; for ryzens, `Block RThroughput: <=2.0`
So pick cost of `4`.

For store we have:
https://godbolt.org/z/n8aMKeo4E - for intels `Block RThroughput: =4.0`; for ryzens, `Block RThroughput: =2.0`
So pick cost of `4`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D110755
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-2.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/X86/interleaving.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-2.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-2.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-2.ll
Commit 80cd8da78d027f59b54586887af4bb9c3b36a6ba by lebedev.ri
[X86][Costmodel] Load/store i32/f32 Stride=2 VF=16 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/M9eev3xe8 - for intels `Block RThroughput: =8.0`; for ryzens, `Block RThroughput: <=4.0`
So pick cost of `8`.

For store we have:
https://godbolt.org/z/M9eev3xe8 - for intels `Block RThroughput: =8.0`; for ryzens, `Block RThroughput: =4.0`
So pick cost of `8`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D110756
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-2.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-2.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-2.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-2.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
Commit ea76cb87ee4022d8663a7c25943478fe3f64e21a by lebedev.ri
[X86][Costmodel] Load/store i32/f32 Stride=2 VF=32 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

Here for `store` pattern we are starting to have spilling,
so accurate modelling may be problematic,
although if i drop the spilling, the measurements don't change.

For load we have:
https://godbolt.org/z/1oTTnncbx - for intels `Block RThroughput: =16.0`; for ryzens, `Block RThroughput: <=8.0`
So pick cost of `16`.

For store we have:
https://godbolt.org/z/1oTTnncbx - for intels `Block RThroughput: =16.0`; for ryzens, `Block RThroughput: =8.0`
So pick cost of `16`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D110761
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-2.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-2.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-2.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-2.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
Commit 612e5b05a281b867383f52e457781d1b5ba76c2d by lebedev.ri
[X86][Costmodel] Load/store i64/f64 Stride=2 VF=2 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/8a1cfGeMn - for intels `Block RThroughput: =2.0`; for ryzens, `Block RThroughput: =1.0`
So pick cost of `2`.

For store we have:
https://godbolt.org/z/jMdcM47bx - for intels `Block RThroughput: =2.0`; for ryzens, `Block RThroughput: <=2.0`
So pick cost of `2`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D110835
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-2.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-2.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-2.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-2.ll
Commit 71bc31b907193c294f718046ed8ef569e3d4b9fa by lebedev.ri
[X86][Costmodel] Load/store i64/f64 Stride=2 VF=4 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/j5co1qWEW - for intels `Block RThroughput: =4.0`; for ryzens, `Block RThroughput: <=2.0`
So pick cost of `4`.

For store we have:
https://godbolt.org/z/j5co1qWEW - for intels `Block RThroughput: =4.0`; for ryzens, `Block RThroughput: <=4.0`
So pick cost of `4`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D110837
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-2.ll
The file was removedllvm/test/Analysis/CostModel/X86/interleaved-load-store-i64.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-2.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-2.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was removedllvm/test/Analysis/CostModel/X86/interleaved-load-store-double.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-2.ll
Commit abd37de63ee97330f9397c4468802498b6101360 by lebedev.ri
[X86][Costmodel] Load/store i64/f64 Stride=2 VF=8 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/PGYbYKPq8 - for intels `Block RThroughput: =8.0`; for ryzens, `Block RThroughput: <=4.0`
So pick cost of `8`.

For store we have:
https://godbolt.org/z/PGYbYKPq8 - for intels `Block RThroughput: =8.0`; for ryzens, `Block RThroughput: <=8.0`
So pick cost of `8`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D110838
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-2.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-2.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-2.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-2.ll
Commit 3e260efdfc6064481396a0c3ade703a739023c77 by lebedev.ri
[X86][Costmodel] Load/store i64/f64 Stride=2 VF=16 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/1WMTojvfW - for intels `Block RThroughput: =16.0`; for ryzens, `Block RThroughput: <=8.0`
So pick cost of `16`.

For store we have:
https://godbolt.org/z/1WMTojvfW - for intels `Block RThroughput: =16.0`; for ryzens, `Block RThroughput: <=16.0`
So pick cost of `16`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D110840
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-2.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-2.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-2.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-2.ll
Commit 47d6274d4c31c9b46d059a7421277bef0395a869 by daniil.fukalov
[NFC][AMDGPU] Reduce includes dependencies, part 2

1. Splitted out some parts of R600 target to separate modules/headers.
2. Reduced some include lists in headers.
3. Minor forward declarations, redundant includes and flags in GCNSubtarget
   cleanup.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D109351
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.h
The file was modifiedllvm/lib/Target/AMDGPU/CMakeLists.txt
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
The file was addedllvm/lib/Target/AMDGPU/AMDGPUMCInstLower.h
The file was addedllvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
The file was addedllvm/lib/Target/AMDGPU/R600ISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/AMDGPU/R600TargetTransformInfo.cpp
The file was addedllvm/lib/Target/AMDGPU/R600MCInstLower.cpp
The file was modifiedllvm/lib/Target/AMDGPU/GCNSubtarget.h
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPULDSUtils.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPULDSUtils.h
Commit 532783f9e1e65c7bd48b1592d2376e9dd47c5a73 by daniel.kiss
[libunwind] Fix cfi_register for float registers.

Fixes D110144.
registers.getFloatRegister is not const in ARM therefor can't be called here.

Reviewed By: mstorsjo, #libunwind

Differential Revision: https://reviews.llvm.org/D110731
The file was modifiedlibunwind/src/DwarfInstructions.hpp
Commit baac82b4cfbc4795e4e5e9e9e3576c968a612f8d by spatel
[InstCombine] add tests for icmp of gep; NFC
The file was modifiedllvm/test/Transforms/InstCombine/icmp-gep.ll
Commit 9c49587cc158a5217602d8cb3800cc2bd51ad4da by llvmgnsyncbot
[gn build] Port 47d6274d4c31
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
Commit a3d0b5805e5ff2fd870df5be5c3197eee0bb74a0 by balazs.benics
[analyzer] Fix deprecated plistlib functions

It replaces the usage of readPlist,writePlist functions with load,dump
in plistlib package.

This fixes deprecation issues when analyzer reports are being generated
outside of docker.

Patch by Manas!

Reviewed By: steakhal

Differential Revision: https://reviews.llvm.org/D107312
The file was modifiedclang/utils/analyzer/SATestBuild.py
Commit 727a359979ece2da9b50ccacc682399e7c8287cc by lebedev.ri
[NFC][X86][LV] Improve costmodel test coverage for interleaved i8 load/store stride=3
The file was addedllvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-3.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i8.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i8.ll
The file was addedllvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-3.ll
Commit 657e1e316b7101216c1c4e70663d5112684e1df1 by lebedev.ri
[NFC][X86][Codegen] Add test coverage for interleaved i8 load/store stride=3
The file was addedllvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-3.ll
The file was addedllvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-3.ll
Commit d908118b8a2690c67daccd02ad0f264a790a7b72 by Lang Hames
[llvm-jitlink] Fix a FIXME.

ORC errors preserve the SymbolStringPool since 6fe2e9a9cc8, so we can stop
bailing out early.
The file was modifiedllvm/tools/llvm-jitlink/llvm-jitlink.cpp
Commit b82683b2eb3601f6e8970861b94ad7b37393aa90 by arthur.j.odwyer
[libc++] [test] Remove "// -*- C++ -*-" comments from generated .cpp files.

Even if these comments have a benefit in .h files (for editors that
care about language but can't be configured to treat .h as C++ code),
they certainly have no benefit for files with the .cpp extension.

Discussed in D110794.
The file was modifiedlibcxx/test/libcxx/diagnostics/detail.headers/algorithm/binary_search.module.verify.cpp
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The file was modifiedlibcxx/test/libcxx/diagnostics/detail.headers/ranges/ref_view.module.verify.cpp
The file was modifiedlibcxx/test/libcxx/diagnostics/detail.headers/ranges/view_interface.module.verify.cpp
The file was modifiedlibcxx/test/libcxx/diagnostics/detail.headers/algorithm/partial_sort_copy.module.verify.cpp
The file was modifiedlibcxx/test/libcxx/diagnostics/detail.headers/algorithm/shift_left.module.verify.cpp
The file was modifiedlibcxx/test/libcxx/diagnostics/detail.headers/algorithm/upper_bound.module.verify.cpp
The file was modifiedlibcxx/test/libcxx/diagnostics/detail.headers/concepts/predicate.module.verify.cpp
The file was modifiedlibcxx/test/libcxx/diagnostics/detail.headers/compare/is_eq.module.verify.cpp
The file was modifiedlibcxx/test/libcxx/diagnostics/detail.headers/memory/uninitialized_algorithms.module.verify.cpp
The file was modifiedlibcxx/test/libcxx/diagnostics/detail.headers/tuple.module.verify.cpp
The file was modifiedlibcxx/test/libcxx/diagnostics/detail.headers/memory/auto_ptr.module.verify.cpp
The file was modifiedlibcxx/test/libcxx/diagnostics/detail.headers/concepts/convertible_to.module.verify.cpp
The file was modifiedlibcxx/test/libcxx/diagnostics/detail.headers/iterator/ostream_iterator.module.verify.cpp
The file was modifiedlibcxx/test/libcxx/diagnostics/detail.headers/algorithm/minmax.module.verify.cpp
The file was modifiedlibcxx/test/libcxx/diagnostics/detail.headers/algorithm/equal.module.verify.cpp
The file was modifiedlibcxx/test/libcxx/diagnostics/detail.headers/concepts/copyable.module.verify.cpp
The file was modifiedlibcxx/test/libcxx/diagnostics/detail.headers/functional/binary_negate.module.verify.cpp
The file was modifiedlibcxx/test/libcxx/diagnostics/detail.headers/algorithm/shift_right.module.verify.cpp
The file was modifiedlibcxx/test/libcxx/diagnostics/detail.headers/memory/addressof.module.verify.cpp
The file was modifiedlibcxx/test/libcxx/diagnostics/detail.headers/algorithm/rotate.module.verify.cpp
The file was modifiedlibcxx/test/libcxx/diagnostics/detail.headers/concepts/class_or_enum.module.verify.cpp
The file was modifiedlibcxx/test/libcxx/diagnostics/detail.headers/utility/piecewise_construct.module.verify.cpp
The file was modifiedlibcxx/test/libcxx/diagnostics/detail.headers/iterator/common_iterator.module.verify.cpp
The file was modifiedlibcxx/test/libcxx/diagnostics/detail.headers/algorithm/find.module.verify.cpp
Commit d4b59a05fc7507cf69993109443dc5af47ae4fa8 by arthur.j.odwyer
[libc++] Remove "// -*- C++ -*-" comments from all .cpp files. NFCI.

Even if these comments have a benefit in .h files (for editors that
care about language but can't be configured to treat .h as C++ code),
they certainly have no benefit for files with the .cpp extension.

Discussed in D110794.
The file was modifiedlibcxx/test/std/containers/views/span.cons/default.pass.cpp
The file was modifiedlibcxx/test/std/utilities/variant/variant.variant/variant.ctor/in_place_type_args.pass.cpp
The file was modifiedlibcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new_size.verify.cpp
The file was modifiedlibcxx/test/std/containers/associative/multiset/empty.verify.cpp
The file was modifiedlibcxx/test/std/containers/views/span.sub/first.fail.cpp
The file was modifiedlibcxx/test/std/utilities/variant/variant.variant/variant_empty.fail.cpp
The file was modifiedlibcxx/test/std/experimental/language.support/support.coroutines/end.to.end/generator.pass.cpp
The file was modifiedlibcxx/test/std/containers/sequences/forwardlist/empty.verify.cpp
The file was modifiedlibcxx/test/std/utilities/variant/variant.variant/variant.mod/emplace_type_args.pass.cpp
The file was modifiedlibcxx/test/std/experimental/memory/memory.resource.aliases/header_regex_synop.pass.cpp
The file was modifiedlibcxx/test/std/utilities/variant/variant.visit/visit.pass.cpp
The file was modifiedlibcxx/test/std/experimental/language.support/support.coroutines/coroutine.handle/coroutine.handle.export/from_address.fail.cpp
The file was modifiedlibcxx/test/std/experimental/language.support/support.coroutines/end.to.end/expected.pass.cpp
The file was modifiedlibcxx/test/std/thread/thread.threads/thread.thread.this/sleep_for_tested_elsewhere.pass.cpp
The file was modifiedlibcxx/test/std/containers/unord/unord.multiset/empty.verify.cpp
The file was modifiedlibcxx/test/std/containers/views/span.obs/size_bytes.pass.cpp
The file was modifiedlibcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new_size_align.verify.cpp
The file was modifiedlibcxx/test/std/utilities/variant/variant.get/get_type.pass.cpp
The file was modifiedlibcxx/test/std/re/re.const/re.matchflag/match_flag_type.pass.cpp
The file was modifiedlibcxx/test/std/experimental/memory/memory.resource.aliases/header_unordered_map_synop.pass.cpp
The file was modifiedlibcxx/test/std/iterators/iterator.container/empty.initializer_list.verify.cpp
The file was modifiedlibcxx/test/std/utilities/variant/variant.variant/variant.ctor/default.pass.cpp
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The file was modifiedlibcxx/test/libcxx/experimental/language.support/support.coroutines/version.pass.cpp
The file was modifiedlibcxx/test/std/utilities/variant/variant.synopsis/variant_npos.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.cons/array.fail.cpp
The file was modifiedlibcxx/test/std/containers/views/span.cons/assign.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.cons/ptr_ptr.fail.cpp
The file was modifiedlibcxx/test/std/experimental/language.support/support.coroutines/end.to.end/go.pass.cpp
The file was modifiedlibcxx/test/std/utilities/variant/variant.variant/variant.assign/T.pass.cpp
The file was modifiedlibcxx/test/libcxx/experimental/language.support/support.coroutines/dialect_support.pass.cpp
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The file was modifiedlibcxx/test/libcxx/utilities/tuple/tuple.tuple/tuple.cnstr/PR20855_tuple_ref_binding_diagnostics.fail.cpp
The file was modifiedlibcxx/test/std/re/re.const/re.synopt/syntax_option_type.pass.cpp
The file was modifiedlibcxx/test/std/utilities/tuple/tuple.tuple/tuple.cnstr/recursion_depth.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.sub/subspan.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.cons/array.pass.cpp
The file was modifiedlibcxx/test/std/re/re.def/defns.regex.primary.equivalence.class/nothing_to_do.pass.cpp
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The file was modifiedlibcxx/test/std/experimental/memory/memory.resource.synop/nothing_to_do.pass.cpp
The file was modifiedlibcxx/src/support/win32/support.cpp
The file was modifiedlibcxx/test/libcxx/diagnostics/nodiscard_extensions.verify.cpp
The file was modifiedlibcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new_size.verify.cpp
The file was modifiedlibcxx/test/std/experimental/language.support/support.coroutines/coroutine.handle/coroutine.handle.hash/hash.pass.cpp
The file was modifiedlibcxx/test/libcxx/double_include.sh.cpp
The file was modifiedlibcxx/test/std/experimental/memory/memory.resource.aliases/header_set_synop.pass.cpp
The file was modifiedlibcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.arith/nothing_to_do.pass.cpp
The file was modifiedlibcxx/test/std/utilities/variant/variant.visit/robust_against_adl.pass.cpp
The file was modifiedlibcxx/test/std/containers/container.adaptors/stack/stack.defn/empty.verify.cpp
The file was modifiedlibcxx/test/libcxx/diagnostics/enable_nodiscard.verify.cpp
The file was modifiedlibcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new_size_nothrow.verify.cpp
The file was modifiedlibcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.templ/nothing_to_do.pass.cpp
The file was modifiedlibcxx/test/std/thread/futures/futures.state/nothing_to_do.pass.cpp
The file was modifiedlibcxx/test/std/experimental/language.support/support.coroutines/coroutine.trivial.awaitables/suspend_always.pass.cpp
The file was modifiedlibcxx/test/std/iterators/iterator.container/empty.array.verify.cpp
The file was modifiedlibcxx/test/std/re/re.traits/transform.pass.cpp
The file was modifiedlibcxx/test/std/re/re.def/defns.regex.format.specifier/nothing_to_do.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.cons/container.fail.cpp
The file was modifiedlibcxx/test/libcxx/utilities/variant/variant.variant/variant_size.pass.cpp
The file was modifiedlibcxx/test/std/re/re.def/defns.regex.regular.expression/nothing_to_do.pass.cpp
The file was modifiedlibcxx/test/std/experimental/language.support/support.coroutines/coroutine.handle/coroutine.handle.compare/less_comp.pass.cpp
The file was modifiedlibcxx/test/std/experimental/language.support/support.coroutines/coroutine.handle/coroutine.handle.resumption/resume.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.objectrep/as_writable_bytes.fail.cpp
The file was modifiedlibcxx/test/std/experimental/language.support/support.coroutines/coroutine.handle/coroutine.handle.prom/promise.pass.cpp
The file was modifiedlibcxx/test/std/experimental/language.support/support.coroutines/end.to.end/fullexpr-dtor.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.cons/copy.pass.cpp
The file was modifiedlibcxx/test/std/utilities/variant/variant.variant/variant_array.fail.cpp
The file was modifiedlibcxx/test/std/strings/basic.string.literals/literal.pass.cpp
The file was modifiedlibcxx/test/libcxx/debug/debug_register.pass.cpp
The file was modifiedlibcxx/test/std/language.support/support.dynamic/new.delete/new.delete.placement/new_array_ptr.verify.cpp
The file was modifiedlibcxx/test/std/containers/views/span.elem/back.pass.cpp
The file was modifiedlibcxx/test/std/experimental/memory/memory.resource.aliases/header_vector_synop.pass.cpp
The file was modifiedlibcxx/test/std/strings/basic.string/string.capacity/empty.verify.cpp
The file was modifiedlibcxx/src/support/win32/thread_win32.cpp
The file was modifiedlibcxx/test/std/experimental/language.support/support.coroutines/coroutine.handle/coroutine.handle.noop/noop_coroutine.pass.cpp
The file was modifiedlibcxx/test/std/utilities/variant/variant.helpers/variant_alternative.fail.cpp
The file was modifiedlibcxx/test/std/utilities/variant/variant.variant/variant.mod/emplace_index_init_list_args.pass.cpp
The file was modifiedlibcxx/test/std/experimental/language.support/support.coroutines/coroutine.handle/void_handle.pass.cpp
The file was modifiedlibcxx/test/std/re/re.const/re.err/error_type.pass.cpp
The file was modifiedlibcxx/test/std/utilities/variant/variant.helpers/variant_alternative.pass.cpp
The file was modifiedlibcxx/test/std/experimental/language.support/support.coroutines/end.to.end/await_result.pass.cpp
The file was modifiedlibcxx/test/std/language.support/support.dynamic/new.delete/new.delete.placement/new_ptr.verify.cpp
The file was modifiedlibcxx/test/std/utilities/variant/variant.bad_variant_access/bad_variant_access.pass.cpp
The file was modifiedlibcxx/test/libcxx/diagnostics/enable_nodiscard_disable_nodiscard_ext.verify.cpp
The file was modifiedlibcxx/test/std/utilities/variant/variant.relops/relops_bool_conv.fail.cpp
The file was modifiedlibcxx/test/std/containers/views/span.objectrep/as_bytes.pass.cpp
The file was modifiedlibcxx/test/std/strings/strings.general/nothing_to_do.pass.cpp
The file was modifiedlibcxx/test/std/utilities/variant/variant.variant/variant.ctor/in_place_index_args.pass.cpp
The file was modifiedlibcxx/test/std/containers/sequences/array/empty.verify.cpp
The file was modifiedlibcxx/test/std/containers/views/span.obs/empty.pass.cpp
The file was modifiedlibcxx/test/std/re/re.traits/types.pass.cpp
The file was modifiedlibcxx/test/libcxx/utilities/function.objects/abi_bug_cxx03_cxx11_example.sh.cpp
The file was modifiedlibcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new_size_nothrow.verify.cpp
The file was modifiedlibcxx/test/std/re/re.def/defns.regex.subexpression/nothing_to_do.pass.cpp
The file was modifiedlibcxx/test/std/utilities/time/time.duration/time.duration.literals/literals1.pass.cpp
The file was modifiedlibcxx/test/std/re/re.def/defns.regex.finite.state.machine/nothing_to_do.pass.cpp
The file was modifiedlibcxx/test/libcxx/diagnostics/nodiscard_extensions.pass.cpp
The file was modifiedlibcxx/test/std/containers/container.adaptors/priority.queue/priqueue.members/empty.verify.cpp
The file was modifiedlibcxx/test/std/utilities/variant/variant.visit/visit_return_type.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.elem/front.pass.cpp
The file was modifiedlibcxx/test/std/language.support/support.dynamic/ptr.launder/launder.types.fail.cpp
The file was modifiedlibcxx/test/std/re/re.def/defns.regex.matched/nothing_to_do.pass.cpp
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The file was modifiedlibcxx/test/std/utilities/variant/variant.variant/variant.dtor/dtor.pass.cpp
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The file was modifiedlibcxx/test/std/language.support/support.dynamic/ptr.launder/launder.nodiscard.verify.cpp
The file was modifiedlibcxx/test/libcxx/diagnostics/enable_nodiscard_disable_after_cxx17.verify.cpp
The file was modifiedlibcxx/test/std/containers/views/span.cons/ptr_len.pass.cpp
The file was modifiedlibcxx/test/libcxx/libcpp_alignof.pass.cpp
The file was modifiedlibcxx/test/std/utilities/variant/variant.get/get_if_type.pass.cpp
The file was modifiedlibcxx/test/libcxx/diagnostics/nodiscard_aftercxx17.verify.cpp
The file was modifiedlibcxx/benchmarks/deque.bench.cpp
The file was modifiedlibcxx/test/libcxx/diagnostics/nodiscard.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.obs/size.pass.cpp
The file was modifiedlibcxx/test/std/utilities/variant/variant.variant/variant.ctor/conv.pass.cpp
The file was modifiedlibcxx/test/libcxx/debug/extern-templates.sh.cpp
The file was modifiedlibcxx/test/std/experimental/language.support/support.coroutines/coroutine.handle/coroutine.handle.completion/done.pass.cpp
The file was modifiedlibcxx/test/std/strings/basic.string.literals/literal.verify.cpp
The file was modifiedlibcxx/test/std/containers/views/span.cons/ptr_ptr.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.cons/default.fail.cpp
The file was modifiedlibcxx/test/libcxx/libcpp_version.pass.cpp
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The file was modifiedlibcxx/test/std/containers/associative/map/map.access/empty.verify.cpp
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The file was modifiedlibcxx/test/std/atomics/atomics.syn/nothing_to_do.pass.cpp
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The file was modifiedlibcxx/test/std/experimental/memory/memory.resource.aliases/header_list_synop.pass.cpp
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The file was modifiedlibcxx/test/std/numerics/complex.number/complex.literals/literals1.compile.fail.cpp
The file was modifiedlibcxx/test/std/re/re.const/re.matchflag/match_multiline.pass.cpp
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The file was modifiedlibcxx/test/std/depr/depr.c.headers/errno_h.pass.cpp
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The file was modifiedlibcxx/test/std/utilities/variant/variant.variant/variant.status/index.pass.cpp
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The file was modifiedlibcxx/test/std/re/re.results/re.results.size/empty.verify.cpp
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The file was modifiedlibcxx/test/std/experimental/language.support/support.coroutines/coroutine.handle/coroutine.handle.con/assign.pass.cpp
The file was modifiedlibcxx/test/std/utilities/variant/variant.variant/variant.assign/conv.pass.cpp
The file was modifiedlibcxx/test/std/experimental/language.support/support.coroutines/end.to.end/multishot_func.pass.cpp
The file was modifiedlibcxx/test/std/strings/string.view/string_view.literals/literal.pass.cpp
The file was modifiedlibcxx/test/std/strings/string.view/string_view.literals/literal.verify.cpp
Commit 957b4c57501bf94492dbee7141b2ecf5b4e43b70 by jonathan.l.peyton
[OpenMP][testing] increase threshold for omp_get_wtime test
The file was modifiedopenmp/runtime/test/api/omp_get_wtime.c
Commit 343b9e8590db6bc815df3a3fec5bb25c23261476 by jonathan.l.peyton
[OpenMP][host runtime] Introduce kmp_cpuinfo_flags_t to replace integer flags

Store CPUID support flags as bits instead of using entire integers.

Differential Revision: https://reviews.llvm.org/D110091
The file was modifiedopenmp/runtime/src/kmp_utility.cpp
The file was modifiedopenmp/runtime/src/kmp_csupport.cpp
The file was modifiedopenmp/runtime/src/kmp.h
The file was modifiedopenmp/runtime/src/kmp_os.h
The file was modifiedopenmp/runtime/src/kmp_lock.cpp
The file was modifiedopenmp/runtime/src/kmp_settings.cpp
Commit f98a918d34959264f54757e9e559b5630b7bfa52 by anna
[TrivialDeadness] Update function comment

isInstructionTriviallyDead also works for certain side-effecting
instructions.
Update incorrect comment (as suggested in D109917).
The file was modifiedllvm/include/llvm/Transforms/Utils/Local.h
Commit c333505fa5d608ce21cb3887d0f49364e13a26df by arthur.j.odwyer
[libc++] [test] Remove filenames from copyright headers. NFCI.

Discussed in D110794.
The file was modifiedlibcxx/test/std/containers/views/span.cons/ptr_ptr.fail.cpp
The file was modifiedlibcxx/test/std/containers/views/span.obs/size.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.cons/span.fail.cpp
The file was modifiedlibcxx/test/std/containers/views/span.objectrep/as_bytes.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.cons/assign.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.cons/ptr_len.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.cons/stdarray.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.sub/first.fail.cpp
The file was modifiedlibcxx/test/std/containers/views/span.cons/ptr_len.fail.cpp
The file was modifiedlibcxx/test/std/containers/views/span.objectrep/as_writable_bytes.fail.cpp
The file was modifiedlibcxx/test/std/containers/views/span.obs/size_bytes.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.sub/first.pass.cpp
The file was modifiedlibcxx/test/support/constexpr_char_traits.h
The file was modifiedlibcxx/test/std/containers/views/span.cons/array.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.obs/empty.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.sub/subspan.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.cons/array.fail.cpp
The file was modifiedlibcxx/test/std/containers/views/span.cons/default.fail.cpp
The file was modifiedlibcxx/test/std/containers/views/span.elem/back.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.cons/default.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/types.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.elem/data.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.objectrep/as_writable_bytes.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.cons/container.fail.cpp
The file was modifiedlibcxx/test/std/containers/views/span.cons/ptr_ptr.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.cons/deduct.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.sub/last.fail.cpp
The file was modifiedlibcxx/test/std/containers/views/span.cons/span.dtor.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.sub/last.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.cons/copy.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.sub/subspan.fail.cpp
The file was modifiedlibcxx/test/support/test_macros.h
The file was modifiedlibcxx/test/std/containers/views/span.elem/front.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.cons/container.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.cons/span.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.elem/op_idx.pass.cpp
Commit bd21257bf5af211c4d269ddbec0911c76c3b6120 by mgorny
[lldb] [Host] Fix flipped logic in TerminalState::Save()
The file was modifiedlldb/source/Host/common/Terminal.cpp
Commit 907d5da3da195d2e3a78d5b36807cf44a13c3f25 by lebedev.ri
[NFC][Codegen][X86] Drop unused check prefixes in newly added tests
The file was modifiedllvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-3.ll
The file was modifiedllvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-3.ll
Commit 5b44c716ee0ffcb0b8943b9e76eb69473188768a by zhijian
[AIX]implement the --syms and using "symbol index and qualname" for --sym --symbol--description for llvm-objdump for xcoff

Summary:

for xcoff :

implement the getSymbolFlag and getSymbolType() for option --syms.
llvm-objdump --sym , if the symbol is label, print the containing section for the symbol too.
when using llvm-objdump --sym --symbol--description, print the symbol index and qualname for symbol.
for example:
--symbol-description
00000000000000c0 l .text (csect: (idx: 2) .foov[PR]) (idx: 3) .foov

and without --symbol-description
00000000000000c0 l .text (csect: .foov) .foov

Reviewers: James Henderson,Esme Yi

Differential Revision: https://reviews.llvm.org/D109452
The file was modifiedllvm/tools/llvm-objdump/XCOFFDump.cpp
The file was modifiedllvm/test/tools/llvm-objdump/XCOFF/print-linenumber.test
The file was modifiedllvm/include/llvm/Object/XCOFFObjectFile.h
The file was modifiedllvm/lib/Object/XCOFFObjectFile.cpp
The file was addedllvm/test/tools/llvm-objdump/XCOFF/symbol-table.test
The file was modifiedllvm/tools/llvm-objdump/XCOFFDump.h
The file was modifiedllvm/tools/llvm-objdump/llvm-objdump.cpp
Commit 4f0225f6d21b601d62b73dce913bf59d8fb93d87 by kazu
[Transforms] Migrate from getNumArgOperands to arg_size (NFC)

Note that getNumArgOperands is considered a legacy name.  See
llvm/include/llvm/IR/InstrTypes.h for details.
The file was modifiedllvm/lib/Transforms/Coroutines/CoroFrame.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
The file was modifiedllvm/lib/Transforms/Scalar/EarlyCSE.cpp
The file was modifiedllvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
The file was modifiedllvm/lib/Transforms/Scalar/Scalarizer.cpp
The file was modifiedllvm/lib/Transforms/Utils/InjectTLIMappings.cpp
The file was modifiedllvm/lib/Transforms/Scalar/TailRecursionElimination.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
The file was modifiedllvm/lib/Transforms/IPO/LowerTypeTests.cpp
The file was modifiedllvm/lib/Transforms/Scalar/GVN.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
The file was modifiedllvm/lib/Transforms/Utils/Local.cpp
The file was modifiedllvm/lib/Transforms/Utils/Evaluator.cpp
The file was modifiedllvm/lib/Transforms/IPO/FunctionAttrs.cpp
The file was modifiedllvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
The file was modifiedllvm/lib/Transforms/Coroutines/CoroInstr.h
The file was modifiedllvm/lib/Transforms/IPO/AttributorAttributes.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstructionCombining.cpp
The file was modifiedllvm/lib/Transforms/IPO/OpenMPOpt.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
The file was modifiedllvm/lib/Transforms/IPO/Attributor.cpp
The file was modifiedllvm/lib/Transforms/Coroutines/CoroSplit.cpp
The file was modifiedllvm/lib/Transforms/Coroutines/Coroutines.cpp
The file was modifiedllvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
The file was modifiedllvm/lib/Transforms/Utils/InlineFunction.cpp
Commit 6aeed7b19c41ca9f9c6654c1e63491e5a80b1285 by Lang Hames
[ORC] Remove OrcRPCExecutorProcessControl ad OrcRPCTPCServer.

All in-tree tools have moved to SimpleRemoteEPC.
The file was removedllvm/include/llvm/ExecutionEngine/Orc/OrcRPCExecutorProcessControl.h
The file was removedllvm/include/llvm/ExecutionEngine/Orc/TargetProcess/OrcRPCTPCServer.h
Commit 2a6b99d5f8231d96cb4cf03f86af0517743e8124 by arthur.j.odwyer
[libc++] Revert the part of my b82683b that affected <version>.

This reverts part of commit b82683b2eb3601f6e8970861b94ad7b37393aa90.
I hadn't intended to remove the `// -*- C++ -*-` comment line
from `libcxx/include/version`, only from the generated tests.
Thanks to Raul Tambre for the catch.
The file was modifiedlibcxx/include/version
The file was modifiedlibcxx/utils/generate_feature_test_macro_components.py
Commit fd8e99700de6b769c76bef9e580b712fee22205d by jay.foad
[DetectDeadLanes] Enable machine verification after this pass

Machine verification after DetectDeadLanes has been disabled since the
pass was first added in D18427, but I guess this was just due to copy-
and-paste. Enabling it does not show any problems in check-llvm in an
LLVM_ENABLE_EXPENSIVE_CHECKS build.

Differential Revision: https://reviews.llvm.org/D110689
The file was modifiedllvm/lib/CodeGen/TargetPassConfig.cpp
Commit 2bfe777a45cee1634ed5e3da32a0abeaf4aeaa72 by jay.foad
[ProcessImplicitDefs] Enable machine verification after this pass

Enabling this does not show any problems in check-llvm in an
LLVM_ENABLE_EXPENSIVE_CHECKS build.

Differential Revision: https://reviews.llvm.org/D110695
The file was modifiedllvm/lib/CodeGen/TargetPassConfig.cpp
Commit 08d41f75d9856718776d9c035b2eba666b0688ee by jay.foad
[UnreachableMachineBlockElim] Enable machine verification after this pass

Enabling this does not show any problems in check-llvm in an
LLVM_ENABLE_EXPENSIVE_CHECKS build.

Differential Revision: https://reviews.llvm.org/D110697
The file was modifiedllvm/lib/CodeGen/TargetPassConfig.cpp
Commit 04787239c930c386105d341a172b1d419c42fa9c by jay.foad
[LiveVariables] Skip verification of kills inside bundles

LiveVariables does not examine the contents of bundles, so
MachineVerifier should not expect it to know about kill flags on
operands of instructions inside a bundle.

With this fix we can enable machine verification after running the
LiveVariables analysis. Doing this does not show any problems in
check-llvm in an LLVM_ENABLE_EXPENSIVE_CHECKS build.

Differential Revision: https://reviews.llvm.org/D110700
The file was modifiedllvm/lib/CodeGen/MachineVerifier.cpp
The file was modifiedllvm/lib/CodeGen/TargetPassConfig.cpp
Commit 31c92d515dd21c49a2b3bcedd991fffb3b6dfd55 by jay.foad
[MachineLoopInfo] Enable machine verification after this pass

Enabling this does not show any problems in check-llvm in an
LLVM_ENABLE_EXPENSIVE_CHECKS build.

Differential Revision: https://reviews.llvm.org/D110703
The file was modifiedllvm/lib/CodeGen/TargetPassConfig.cpp
Commit a7b4ce9cfd110db56d89fa8d76b39023d038de11 by aeubanks
[NFC][AttributeList] Replace index_begin/end with an iterator

We expose the fact that we rely on unsigned wrapping to iterate through
all indexes. This can be confusing. Rather, keeping it as an
implementation detail through an iterator is less confusing and is less
code.

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D110885
The file was modifiedllvm/include/llvm/IR/Attributes.h
The file was modifiedllvm/lib/Transforms/Utils/FunctionComparator.cpp
The file was modifiedllvm/lib/Bitcode/Writer/ValueEnumerator.cpp
The file was modifiedllvm/lib/IR/Attributes.cpp
The file was modifiedllvm/lib/Bitcode/Writer/BitcodeWriter.cpp
The file was modifiedlldb/source/Plugins/LanguageRuntime/RenderScript/RenderScriptRuntime/RenderScriptx86ABIFixups.cpp
The file was modifiedllvm/tools/llvm-reduce/deltas/ReduceAttributes.cpp
Commit a3f425946d33d605c142ef39edf522d9455a4fe5 by antiagainst
[mlir][linalg] Include InitTensorOp in tiling canonicalization

Tiling can create dim ops and those dim ops can take `InitTensorOp`
as input. Including it in the tiling canonicalization patterns
allows us to fold those dim ops away.

Also sorted the existing ops along the way.

Reviewed By: mravishankar

Differential Revision: https://reviews.llvm.org/D110876
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Tiling.cpp
Commit 33dd98e9e4991c51d547ca3af9f56218d73b29cf by Lang Hames
[ORC] Remove ORC RPC.

With the removal of OrcRPCExecutorProcessControl and OrcRPCTPCServer in
6aeed7b19c4 the ORC RPC library no longer has any in-tree users.

Clients needing serialization for ORC should move to Simple Packed
Serialization (usually by adopting SimpleRemoteEPC for remote JITing).
The file was modifiedllvm/tools/lli/ChildTarget/ChildTarget.cpp
The file was removedllvm/include/llvm/ExecutionEngine/Orc/Shared/Serialization.h
The file was removedllvm/unittests/ExecutionEngine/Orc/QueueChannel.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/Shared/CMakeLists.txt
The file was removedllvm/unittests/ExecutionEngine/Orc/QueueChannel.h
The file was modifiedllvm/tools/llvm-jitlink/llvm-jitlink.h
The file was modifiedllvm/tools/llvm-jitlink/llvm-jitlink-executor/llvm-jitlink-executor.cpp
The file was removedllvm/unittests/ExecutionEngine/Orc/RPCUtilsTest.cpp
The file was removedllvm/include/llvm/ExecutionEngine/Orc/Shared/FDRawByteChannel.h
The file was removedllvm/lib/ExecutionEngine/Orc/Shared/RPCError.cpp
The file was removedllvm/include/llvm/ExecutionEngine/Orc/Shared/RPCUtils.h
The file was removedllvm/include/llvm/ExecutionEngine/Orc/Shared/RawByteChannel.h
The file was modifiedllvm/unittests/ExecutionEngine/Orc/CMakeLists.txt
Commit 06cea95a5a19f765cdd30ee473e02865a499a38d by llvmgnsyncbot
[gn build] Port 33dd98e9e499
The file was modifiedllvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/Shared/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/llvm/unittests/ExecutionEngine/Orc/BUILD.gn
Commit 3fabd98e5b3e4c9525c0bf97f5595a1aeff3e85a by spatel
[InstCombine] fold (trunc (X>>C1)) << C to shift+mask directly

This is no-externally-visible-functional-difference-intended.
That is, the test diffs show identical instructions other than
name changes (those are included specifically to verify the logic).

The existing transforms created extra instructions and relied
on subsequent folds to get to the final result, but that could
conflict with other transforms like the proposed D110170 (and
caused that patch to be reverted twice so far because of infinite
combine loops).
The file was modifiedllvm/test/Transforms/InstCombine/bswap.ll
The file was modifiedllvm/test/Transforms/InstCombine/shift-shift.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
Commit f8537895b9a63caec31a02b90b82fb367b852ae8 by mgorny
[lldb] [Host] Sync TerminalState::Data to struct type
The file was modifiedlldb/include/lldb/Host/Terminal.h
Commit 00e2306734b73b4099aa99438960125c03b1cd15 by Lang Hames
[ORC] Fix LLVM modulemap after removal of ORC RPC in 33dd98e9e49.
The file was modifiedllvm/include/llvm/module.modulemap
Commit 0e8862901ca50f85c91d1504cb2bc9f6feea46e3 by zijunzhao
revert tsan part for investigation
The file was modifiedcompiler-rt/test/tsan/CMakeLists.txt
The file was modifiedcompiler-rt/cmake/config-ix.cmake
The file was modifiedcompiler-rt/lib/tsan/CMakeLists.txt
Commit 3da95b68cd1e0088d955c129f61a19a8551366c4 by clementval
[fir][NFC] Move fir.global printer to cpp file

All big enough parser, printer and verifier are moved to the cpp file.
This is one of the last one to be moved.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D110929
The file was modifiedflang/include/flang/Optimizer/Dialect/FIROps.td
The file was modifiedflang/lib/Optimizer/Dialect/FIROps.cpp
Commit 04a6f80e9b23f42162f7408c539caa58151a6f2e by nikita.ppv
[BasicAA] Add additional 32-bit truncation test (NFC)

This is a variant with a variable index, in which case the pointer
size adjustment is not performed.
The file was modifiedllvm/test/Analysis/BasicAA/gep-implicit-trunc-32-bit-pointers.ll
Commit 9c31969e8df2f4b41b05e415fc9a66ff0bfa0802 by Jinsong Ji
[AIX] Don't pass namedsects in LTO mode

LTO don't need binder option , don't pass it in LTO mode.

Reviewed By: Whitney

Differential Revision: https://reviews.llvm.org/D110955
The file was modifiedclang/test/Driver/aix-ld.c
The file was modifiedclang/lib/Driver/ToolChains/AIX.cpp
Commit 53d7bdbfbf3ee578ff9341ed28b8a9df838ffa48 by lebedev.ri
[NFC][X86][LV] Improve costmodel test coverage for interleaved i8 load/store stride=4
The file was removedllvm/test/Analysis/CostModel/X86/interleaved-load-i8.ll
The file was addedllvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-4.ll
The file was removedllvm/test/Analysis/CostModel/X86/interleaved-store-i8.ll
The file was addedllvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-4.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-3.ll
Commit 3c407196034f12cb4ff612d32a944e41fd5ee647 by lebedev.ri
[NFC][X86][Codegen] Add test coverage for interleaved i8 load/store stride=4
The file was addedllvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-4.ll
The file was addedllvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-4.ll
Commit 61ecfc6f9dc56e994a133a78a8f32c403899d5c5 by jay.foad
[TwoAddressInstruction] Pre-commit a test case for D110944
The file was addedllvm/test/CodeGen/AMDGPU/twoaddr-constrain.ll
Commit dff3454bda097723799935e8ea7f026ff0626940 by jay.foad
[TwoAddressInstruction] Tweak constraining of tied operands

In collectTiedOperands, when handling an undef use that is tied to a
def, constrain the dst reg with the actual register class of the src
reg, instead of with the register class from the instructions's
MCInstrDesc. This makes a difference in some AMDGPU test cases like
this, before:

  %16:sgpr_96 = INSERT_SUBREG undef %15:sgpr_96_with_sub0_sub1(tied-def 0), killed %11:sreg_64_xexec, %subreg.sub0_sub1

After, without this patch:

  undef %16.sub0_sub1:sgpr_96 = COPY killed %11:sreg_64_xexec

This fails machine verification if you force it to run after
TwoAddressInstruction (currently it is disabled) with:

*** Bad machine code: Invalid register class for subregister index ***
- function:    s_load_constant_v3i32_align4
- basic block: %bb.0  (0xa011a88)
- instruction: undef %16.sub0_sub1:sgpr_96 = COPY killed %11:sreg_64_xexec
- operand 0:   undef %16.sub0_sub1:sgpr_96
Register class SGPR_96 does not fully support subreg index 4

After, with this patch:

  undef %16.sub0_sub1:sgpr_96_with_sub0_sub1 = COPY killed %11:sreg_64_xexec

See also svn r159120 which introduced the code to handle tied undef
uses.

Differential Revision: https://reviews.llvm.org/D110944
The file was modifiedllvm/test/CodeGen/AMDGPU/twoaddr-constrain.ll
The file was modifiedllvm/lib/CodeGen/TwoAddressInstructionPass.cpp
Commit df672f66b669ca6f347858d26af1cae0aeddf8c2 by llvm-dev
[DAG] scalarizeExtractedVectorLoad - replace getABITypeAlign with allowsMemoryAccess (PR45116)

One of the cases identified in PR45116 - we don't need to limit extracted loads to ABI alignment, we can use allowsMemoryAccess - which tests using getABITypeAlign, but also checks if a target permits (fast) misaligned memory loads by checking allowsMisalignedMemoryAccesses as a fallback.

I've also cleaned up the alignment calculation code - if we have a constant extraction index then the alignment can be based on an offset from the original vector load alignment, but for non-constant indices we should assume the worst (single element alignment only).

Differential Revision: https://reviews.llvm.org/D110486
The file was modifiedllvm/test/CodeGen/AArch64/arm64-indexed-vector-ldst.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/test/CodeGen/X86/merge-consecutive-stores-nt.ll
Commit c8c2b4629f7597ac16102dab6150da14d68167de by tomasz.miasko
[Demangle][Rust] Parse non-ASCII identifiers

Rust allows use of non-ASCII identifiers, which in Rust mangling scheme
are encoded using Punycode.

The encoding deviates from the standard by using an underscore as the
separator between ASCII part and a base-36 encoding of non-ASCII
characters (avoiding hypen-minus in the symbol name). Other than that,
the encoding follows the standard, and the decoder implemented here in
turn follows the one given in RFC 3492.

To avoid an extra intermediate memory allocation while decoding
Punycode, the interface of OutputStream is extended with an insert
method.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D104366
The file was modifiedllvm/include/llvm/Demangle/Utility.h
The file was modifiedlibcxxabi/src/demangle/Utility.h
The file was addedllvm/unittests/Demangle/OutputStreamTest.cpp
The file was modifiedllvm/test/Demangle/rust.test
The file was modifiedllvm/lib/Demangle/RustDemangle.cpp
The file was modifiedllvm/unittests/Demangle/CMakeLists.txt
Commit 4cdee8de6bad3cf38165bfb7788e58f2469a22ce by llvmgnsyncbot
[gn build] Port c8c2b4629f75
The file was modifiedllvm/utils/gn/secondary/llvm/unittests/Demangle/BUILD.gn
Commit 782a97a9776a945cf06a6defd37b227665ffe08b by danielzresnick
[mlir][capi] Add TypeID to MLIR C-API

Exposes mlir::TypeID to the C API as MlirTypeID along with various accessors
and helper functions.

Differential Revision: https://reviews.llvm.org/D110897
The file was modifiedmlir/test/CAPI/ir.c
The file was modifiedmlir/lib/CAPI/IR/IR.cpp
The file was modifiedmlir/include/mlir-c/IR.h
The file was modifiedmlir/include/mlir/CAPI/IR.h
Commit b7ff0489158cc842ab70a6744815180be37e29a2 by nikita.ppv
[BasicAA] Add additional truncation tests (NFC)

These show that the known bits and non-zero heuristics are incorrect
when truncation is involved.
The file was modifiedllvm/test/Analysis/BasicAA/gep-implicit-trunc-32-bit-pointers.ll
Commit b084b98abe07455fe190fba933d14f0dc365dd25 by nikita.ppv
[BasicAA] Make test more robust (NFC)

When taking into account the fact that GEP indices are truncated
to 32-bits in this test, the "path dependence" goes away, so
inferring MustAlias for all pointers would be correct. As this
goes against the spirit of the test, change it to extend from
i16 instead.
The file was modifiedllvm/test/Analysis/BasicAA/q.bad.ll
Commit ca010347145d2f03052f50a327bb84f4efd1fa49 by 2998727+wrengr
[mlir][sparse] Factoring out getZero() and avoiding unnecessary Type params

This is preliminary work towards D110790

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D110882
The file was modifiedmlir/lib/Dialect/SparseTensor/Transforms/SparseTensorConversion.cpp
Commit 14fffda979ae7f8c7f6425568d3e9615d3d7732f by 2998727+wrengr
[mlir][sparse] Factoring out allocaIndices()

This is preliminary work towards D110790. Depends On D110882.

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D110883
The file was modifiedmlir/lib/Dialect/SparseTensor/Transforms/SparseTensorConversion.cpp
Commit af7ac1d95b7daa7d758f69d0c117c4d91a21463e by 2998727+wrengr
[mlir][sparse] Sharing calls to adaptor.getOperands()[0]

This is preliminary work towards D110790. Depends On D110883.

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D110884
The file was modifiedmlir/lib/Dialect/SparseTensor/Transforms/SparseTensorConversion.cpp
Commit bdd52e8baedd4e37598efd30692a8541a26f61a1 by dsuchkov
[Test] Add a test exposing a miscompile in SimpleLoopUnswitch.

The miscompile was introduced by 6b4b1dc6ec6f0bf0a1bb414fbe751ccab99d41a0.
The file was addedllvm/test/Transforms/SimpleLoopUnswitch/nontrivial-unswitch-invariant-select-bug.ll
Commit 45bd8d947780811aa4a6ba7e6b42e3a2dce3e6bd by dsuchkov
[SimpleLoopUnswitch] Don't unswitch constant conditions

Added an additional check for constants after simplification of
"select _, true, false" pattern. We need to prevent attempts to unswitch constant
conditions for two reasons:
a) Doing that doesn't make any sense, in the best case it will just burn
some compile time.
b) SimpleLoopUnswitch isn't designed to unswitch constant conditions
(due to (a)), so attempting that can cause miscompiles. The attached
testcase is an example of such miscompile.

Also added an assertion that'll make sure we aren't trying to replace
constants, so it will help us prevent such bugs in future. The assertion
from D110751 is another layer of protection against such cases.

Reviewed By: aeubanks
Differential Revision: https://reviews.llvm.org/D110752
The file was modifiedllvm/test/Transforms/SimpleLoopUnswitch/nontrivial-unswitch-invariant-select-bug.ll
The file was modifiedllvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
Commit 86046516e4f4527213c595c154c9971d81a49601 by dsuchkov
[DomTree] Assert that blocks in queries aren't from another function

This assertion should help us catch cases when DT is used in a way that
doesn't make much sense and usually indicates usage errors. In D110752
you can see a test on which this assertion catches a miscompile.

The assertion is added to getNode since all queries seem to be
routed through that function for all non-trivial cases.

Reviewed By: aeubanks, MaskRay
Differential Revision: https://reviews.llvm.org/D110751
The file was modifiedllvm/include/llvm/Support/GenericDomTree.h
Commit ab694cd8453e10158fa61c0a0028a6bd3f474436 by zequanwu
[Profile] Add a warning when lock file failed in __llvm_profile_set_file_object with continuous mode
The file was modifiedcompiler-rt/lib/profile/InstrProfilingFile.c
Commit 2df1019576dbb369a8f5c33b34d013f2780f6a08 by amy.kwan1
Revert "tsan: print a meaningful frame for stack races"

This reverts commit ccc83ac7c501c8e117753af0729414350aa9c117.

Reverting this commit as it is dependent on additional commits breaking the
PPC BE bots.
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_thread.cpp
Commit 8b1984bb8ca497c0d43b882ed997677d14be0a2e by amy.kwan1
Revert "tsan: fix tls_race3 test on darwin"

This reverts commit ade5023c54cffcbefe0557b5473d55b06e40809b.

Reverting this commit as it is dependent on a test breaking the PPC BE bots.
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_platform_mac.cpp
Commit 103c1bd118926afe20d7c944d9190e99d811b516 by amy.kwan1
Revert "tsan: fix and test detection of TLS races"

This reverts commit b4c1e5cb73bd26e5853af77c2a235ca9f35e2577.

Reverting this as it contains a test that is currently failing on the PPC BE bots.
The file was removedcompiler-rt/test/tsan/tls_race3.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_platform_linux.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_thread.cpp
Commit a67c7deae72af3d4294a2999fd1fb920690319b7 by dsuchkov
Revert "[DomTree] Assert that blocks in queries aren't from another function"

This reverts commit 86046516e4f4527213c595c154c9971d81a49601.
This assertion fails on https://lab.llvm.org/buildbot/#/builders/98/builds/6690
Reverting it for now.
The file was modifiedllvm/include/llvm/Support/GenericDomTree.h
Commit 40f382ad107a17c691192883dd307a9808437dde by stefanp
[NFC][PowerPC] Add test case for byval store.

Added a test case for situations where a struct of size 1-7 bytes is
passed by value.
The file was addedllvm/test/CodeGen/PowerPC/ppc64-byval-multi-store.ll
Commit 96843d220dd8cf10ef5e67b8bdb0205d6bb9d7f7 by Jessica Paquette
[AArch64][GlobalISel] Change G_ANYEXT fed by scalar G_ICMP to G_ZEXT

This is a common pattern:

```
    %icmp:_(s32) = G_ICMP intpred(eq), ...
    %ext:_(s64) = G_ANYEXT %icmp(s32)
    %and:_(s64) = G_AND %ext, 1
```

Here's an example: https://godbolt.org/z/T13f6o8zE

This pattern appears because of the following combine in the
LegalizationArtifactCombiner:

```
// zext(trunc x) - > and (aext/copy/trunc x), mask
```

Which kicks in when we widen the result of G_ICMP from 1 bit to 32 bits.

We know that, on AArch64, a scalar G_ICMP will produce 0 or 1. So the result
of `%ext` will always be 0 or 1 as well.

We have some KnownBits combines which eliminate redundant G_ANDs with masks.
These combines don't kick in with G_ANYEXT.

So, if we replace the G_ANYEXT with G_ZEXT in this situation, the KnownBits
based combines can remove the redundant G_AND.

I wasn't sure if it woud be more appropriate to

* Take this route
* Put this in the LegalizationArtifactCombiner.
* Allow 64 bit G_ICMP destinations

I decided on this route because

1) It's simple

2) I'm not sure if philosophically-speaking, we should be handling non-artifact
instructions + target-specific details like TargetBooleanContents in the
LegalizationArtifactCombiner

3) There is a lot of existing code which assumes we only have 32 bit G_ICMP
destinations. So, adding support for 64-bit destinations seems rather invasive
right now. I think that adding support for 64-bit destinations, or modelling
G_ICMP as ADDS/SUBS/etc is probably cleaner long term though.

This gives minor code size savings on all CTMark benchmarks.

Differential Revision: https://reviews.llvm.org/D110959
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-anyext-to-zext.mir
The file was modifiedllvm/lib/Target/AArch64/AArch64Combine.td
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
Commit d0bca006bbfea8b9cf0366a15795159dceb63ed3 by listmail
[test] split flags-from-poison.ll to allow ease of autogen update
The file was addedllvm/test/Analysis/ScalarEvolution/flags-from-poison-noautogen.ll
The file was modifiedllvm/test/Analysis/ScalarEvolution/flags-from-poison.ll
Commit 24cde2f6023a765b66923f4a4ac033a91878b856 by listmail
[SCEV] Remove invariant requirement from isSCEVExprNeverPoison

This code is attempting to prove that I must execute if we enter the defining scope of the SCEV which will be created from I. In the case where it found a defining addrec scope, it had a rather odd restriction that all of the other operands must be loop invariant in that addrec's loop.

As near as I can tell here, we really only need a upper bound on the defining scope. If we can prove the stronger property, then we must also have proven the property on the exact defining scope as well.

In practice, the actual effect of this change is narrow. The compile time restriction at the top of the routine basically limits us to I being an arithmetic in some loop L with both an addrec operand in L, and a unknown operands in L. Possible to demonstrate, but the main value of the change is removing unneeded code.

Differential Revision: https://reviews.llvm.org/D110892
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was modifiedllvm/test/Analysis/ScalarEvolution/flags-from-poison.ll
Commit 2ca8a3f2132ec7d46151b4553ee166c4e635fd70 by listmail
[SCEV] Stop blindly propagating flags from inbound geps to SCEV nodes

This fixes a violation of the wrap flag rules introduced in c4048d8f. This was also noted in the (very old) PR23527.

The issue being fixed is that we assume the inbound flag on any GEP assumes that all users of *any* gep (or add) which happens to map to that SCEV would also be UB if the (other) gep overflowed. That's simply not true.

In terms of the test diffs, I don't see anything seriously problematic. The lost flags are expected (given the semantic restriction on when its legal to tag the SCEV), and there are several cases where the previously inferred flags are unsound per the new semantics.

The only common trend I noticed when looking at the deltas is that by not considering branch on poison as immediate UB in ValueTracking, we do miss a few cases we could reclaim. We may be able to claw some of these back with the follow ideas mentioned in PR51817.

It's worth noting that most of the changes are analysis result only changes. The two transform changes are pretty minimal. In one case, we miss the opportunity to infer a nuw (correctly). In the other, we fail to fold an exit and produce a loop invariant form instead. This one is probably over-reduced as the program appears to be undefined in practice, and neither before or after exploits that.

Differential Revision: https://reviews.llvm.org/D109789
The file was modifiedpolly/test/ScopInfo/unsigned-division-5.ll
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was modifiedllvm/test/Analysis/LoopAccessAnalysis/memcheck-wrapping-pointers.ll
The file was modifiedllvm/test/Analysis/ScalarEvolution/ptrtoint.ll
The file was modifiedllvm/test/Analysis/LoopCacheAnalysis/PowerPC/stencil.ll
The file was modifiedpolly/test/ScopInfo/pointer-type-expressions.ll
The file was modifiedllvm/test/Analysis/ScalarEvolution/no-wrap-add-exprs.ll
The file was modifiedllvm/test/Analysis/ScalarEvolution/srem.ll
The file was modifiedllvm/test/Analysis/ScalarEvolution/load.ll
The file was modifiedllvm/test/Transforms/IndVarSimplify/eliminate-exit-no-dl.ll
The file was modifiedllvm/test/Analysis/ScalarEvolution/nsw.ll
The file was modifiedllvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info.ll
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/X86/expander-crashes.ll
The file was modifiedllvm/test/Analysis/ScalarEvolution/no-wrap-symbolic-becount.ll
The file was modifiedpolly/test/ScopInfo/NonAffine/non-affine-loop-condition-dependent-access_2.ll
The file was modifiedllvm/test/Analysis/ScalarEvolution/sdiv.ll
Commit 91dfc0840ddf69778df4717dfbaf674170acc541 by listmail
[test] add coverage for a SCEVUnknown scoped value in isSCEVExprNeverPoison

Note that a couple of the "negative" tests also end up showing miscompiles due to D109845 which is not yet fixed.
The file was modifiedllvm/test/Analysis/ScalarEvolution/flags-from-poison.ll
Commit 657f02d45804b1b17aeec8cd887350e9f05ab6da by danielrodriguez
Revert "Extract LC_CODE_SIGNATURE related implementation out of LLD"

This reverts commit cc8229603b67763e77a46894f88f7d3ddd04de34.

As discussed in the review of https://reviews.llvm.org/D109972, this was not
right approach, so we are reverting to start with a different approach.

Differential Revision: https://reviews.llvm.org/D110974
The file was modifiedlld/MachO/SyntheticSections.cpp
The file was modifiedllvm/include/llvm/Object/MachO.h
The file was removedllvm/lib/Object/CodeSignatureSection.cpp
The file was modifiedllvm/lib/Object/CMakeLists.txt
The file was modifiedlld/MachO/SyntheticSections.h
Commit e420164f40a907643db40e65fff51a6041d40090 by llvmgnsyncbot
[gn build] Port 657f02d45804
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Object/BUILD.gn
Commit 237e9059f781d4c07ba347fa89d371346b57db44 by shivam98.tkg
[libc++][Docs] Update benchmark doc wrt monorepo

Seems this section is not updated since we have transited to llvm-project monorepo.
At the start, we build libcxx under monorepo configuration but later try to make the separate configuration for libcxx build
and running benchmark.

Reviewed By: ldionne, #libc

Differential Revision: https://reviews.llvm.org/D110722
The file was modifiedlibcxx/docs/TestingLibcxx.rst
Commit 063c5bc31b89d85aba9ea7c2aa0d2440ec468ed2 by nimishra
[flang][OpenMP] Added OpenMP 5.0 specification based semantic checks for sections construct and test case for simd construct

According to OpenMP 5.0 spec document, the following semantic restrictions have been dealt with in this patch.

1. [sections construct] Orphaned section directives are prohibited. That is, the section directives must appear within the sections construct and must not be encountered elsewhere in the sections region.

Semantic checks for the following are not necessary, since use of orphaned section construct (i.e. without an enclosing sections directive) throws parser errors and control flow never reaches the semantic checking phase. Added a test case for the same.

2. [sections construct] Must be a structured block

Added test case and made changes to branching logic

3. [simd construct] Must be a structured block / A program that branches in or out of a function with declare simd is non conforming

4. Fixed !$omp do's handling of unlabeled CYCLEs

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D108904
The file was modifiedflang/lib/Semantics/check-directive-structure.h
The file was addedflang/test/Semantics/omp-sections02.f90
The file was modifiedflang/test/Semantics/omp-simd01.f90
The file was addedflang/test/Semantics/omp-sections03.f90
Commit a1d1c31746ebb5bcae796bd5ff3c272b7fd0663c by joker.eph
Add a `check-mlir-build-only` build target that only builds the dependencies of the `check-mlir` test target (NFC)
The file was modifiedmlir/test/CMakeLists.txt
Commit 237d18a61a97e963c7757bc878f38aee31508de5 by joker.eph
Fix memory leaks in mlir/test/CAPI/ir.c
The file was modifiedmlir/test/CAPI/ir.c

Summary

  1. Use `check-mlir-build-only` for the build step instead of `mlir-opt` (details)
Commit f656ed64d112adb837cb51496a58d30bee21f3d9 by joker.eph
Use `check-mlir-build-only` for the build step instead of `mlir-opt`

`mlir-opt` was used as a proxy to build "most" of the code before
running the testing step. Replace it with the newly introduced
`check-mlir-build-only` target which includes all of the build target
needed to run the tests.
The file was modifiedbuildbot/osuosl/master/config/builders.py