Changes

Summary

  1. clang-ve-ninja: Fix source path (details)
  2. Disable bindings on x86_64-debian-dylib builder (details)
  3. clang-ve-ninja: remove redundant quotes (details)
Commit c2a8bb315f7f200fe51cdf13d4e03fd45318bef9 by simon.moll
clang-ve-ninja: Fix source path
The file was modifiedzorg/buildbot/builders/annotated/ve-linux.py (diff)
Commit e68798410bd09d03914e71bef646dd0d910bbc1f by 49720664+tbaederr
Disable bindings on x86_64-debian-dylib builder

The tests for the OCaml bindings fail when using the llvm.so dylib.
The file was modifiedbuildbot/osuosl/master/config/builders.py (diff)
Commit 6f05a8069dba47b1489c8117767d9be6c9ec327a by simon.moll
clang-ve-ninja: remove redundant quotes
The file was modifiedzorg/buildbot/builders/annotated/ve-linux.py (diff)

Summary

  1. [clang-repl] Allow loading of plugins in clang-repl. (details)
  2. Revert "[clang-repl] Allow loading of plugins in clang-repl." (details)
  3. [lldb] Remove some anonymous namespaces (details)
  4. [LiveIntervals] Fix verification of early-clobbered segments (details)
  5. [AArch64][GlobalISel] Legalize G_VECREDUCE_AND. (details)
  6. [fir] Split FIROptimizer lib into several smaller libraries (details)
  7. [runtimes] Set a default value for LLVM_LIT_ARGS (details)
  8. [libcxx] Don't autodetect pthreads on MinGW (details)
  9. [libcxx] [test] Move a missed test to ctime.timespec.compile.pass.cpp (details)
  10. [Support] Trim #include after b06df22 (details)
  11. Revert "[fir] Split FIROptimizer lib into several smaller libraries" (details)
  12. [mlir][Linalg] NFC - Add support to specify that a tensor value is known to bufferize to writeable memory (details)
  13. Revert "[lldb] Refactor variable parsing" (details)
  14. [fir] Split FIROptimizer lib into several smaller libraries (details)
  15. [AMDGPU] Pre-commit test for D111126 (NFC) (details)
  16. Revert "[fir] Split FIROptimizer lib into several smaller libraries" (details)
  17. AArch64+GISel: legalize vector remainder operations. (details)
  18. [AArch64] Make speculation-hardening-sls.ll x16 test more robust (details)
  19. [MLIR] Add an option to disable `maxIterations` in greedy pattern rewrites (details)
  20. [ARM] Reset speculation-hardening-sls.ll test checks. (details)
  21. [GlobalISel] Simplify narrowScalarMul. NFC. (details)
  22. [Support] Change fatal_error_handler_t to take a const char* instead of std::string (details)
  23. [AMDGPU][GlobalISel] Fix legalization of G_UMULH (details)
  24. [mlir] Convert ConstShapeOp to a static tensor type. (details)
  25. [SelectionDAG] Assume that a GlobalAlias may alias other global values (details)
  26. [SelectionDAG] Replace error prone index check in BaseIndexOffset::computeAliasing (details)
  27. [ELF][test] Enhance relative dynamic relocation tests (details)
  28. [lldb] Move DynamicRegisterInfo to public Target library (details)
  29. [gn build] Port 214054f78a4e (details)
  30. [Test] Add test showing profitable peeling opportunity (details)
  31. [clang][ASTImporter] Add import of thread safety attributes. (details)
  32. [llvm-cxxfilt][NFC] Fix test for running in Windows cmd (details)
  33. Silence an implicit conversion warning on the bit shift result in MSVC; NFC (details)
  34. [mlir][Linalg] Allow operand-less scf::ExecuteRegionOp to encapsulate scf::YieldOp (details)
  35. [GlobalISel] Combine fabs(fneg(x)) to fabs(x) (details)
  36. [SCCPSolver] Fix use-after-free in markArgInFuncSpecialization (details)
  37. [fir] Split FIROptimizer lib into several smaller libraries (details)
  38. Implement if consteval (P1938) (details)
  39. consteval if is now fully supported (details)
  40. [lldb][NFC] Remove unnecessary include in cpp/const_this test (details)
  41. [mlir][linalg] Move generalization pattern to Transforms (NFC). (details)
  42. [PowerPC][MMA] Allow MMA builtin types in pre-P10 compilation units (details)
  43. [DebugInfo][InstrRef] Track all of DBG_PHIs operands (details)
  44. Reland "[clang-repl] Allow loading of plugins in clang-repl." (details)
  45. tsan: make cur_thread_init return cur_thread (details)
  46. [PHIElimination] Update LiveVariables after handling an unspillable terminator (details)
  47. [mlir][spirv] Fix path in define_enum.sh script (details)
  48. tsan: improve detection of stack/tls races (details)
  49. [mlir] Add an 'cppNamespace' field to availability (details)
  50. [RISCV] Update to vlm.v and vsm.v according to v1.0-rc1. (details)
  51. [AMDGPU] Use "hostcall" module flag instead of searching for ockl_hostcall_internal() declaration. (details)
  52. [X86][Costmodel] Load/store i32/f32 Stride=4 VF=2 interleaving costs (details)
  53. [X86][Costmodel] Load/store i32/f32 Stride=4 VF=4 interleaving costs (details)
  54. [X86][Costmodel] Load/store i32/f32 Stride=4 VF=8 interleaving costs (details)
  55. [X86][Costmodel] Load/store i32/f32 Stride=4 VF=16 interleaving costs (details)
  56. [X86][Costmodel] Load/store i64/f64 Stride=4 VF=2 interleaving costs (details)
  57. [X86][Costmodel] Load/store i64/f64 Stride=4 VF=4 interleaving costs (details)
  58. [X86][Costmodel] Load/store i64/f64 Stride=4 VF=8 interleaving costs (details)
  59. [X86][Costmodel] Load/store i32/f32 Stride=6 VF=2 interleaving costs (details)
  60. [X86][Costmodel] Load/store i32/f32 Stride=6 VF=4 interleaving costs (details)
  61. [X86][Costmodel] Load/store i32/f32 Stride=6 VF=8 interleaving costs (details)
  62. [X86][Costmodel] Load/store i32/f32 Stride=6 VF=16 interleaving costs (details)
  63. [X86][Costmodel] Load/store i64/f64 Stride=6 VF=2 interleaving costs (details)
  64. [X86][Costmodel] Load/store i64/f64 Stride=6 VF=4 interleaving costs (details)
  65. [X86][Costmodel] Load/store i64/f64 Stride=6 VF=8 interleaving costs (details)
  66. Add .cmt and .cmti files for OCaml bindings (details)
  67. [libc++][test] Remove unused macro in is_constructible.pass.cpp. NFC. (details)
  68. [lldb testing] Avoid subtle terminfo behavioral differences (details)
  69. [AArch64][SVE] Propagate math flags from intrinsics to instructions (details)
  70. [AArch64][SVE] Remove redundant PTEST following PNEXT/PFIRST (details)
  71. [SystemZ] Implement memcpy of variable length with MVC. (details)
  72. Revert "Revert "Revert "[GlobalISel][IRTranslator] Emit trap intrinsic for "unreachable"""" (details)
  73. [llvm] Migrate from getNumArgOperands to arg_size (NFC) (details)
  74. [clangd] Include refs of base method in refs for derived method. (details)
  75. [APInt] Make insertBits and concat work with zero width APInts. (details)
  76. [clang] FatalErrorHandler.cpp - add explicit <stdio.h> include (details)
  77. [TableGen] CodeEmitterGen - emit report_fatal_error(const char*) instead of report_fatal_error(std::string&) (details)
  78. [Support] Update SmallVector report_fatal_error calls to use Twine and add missing implicit header dependency. (details)
  79. [ConstantFold] Refactor load folding (details)
  80. [clangd] IncludeCleaner: Mark used headers (details)
  81. [MacroFusion] Expose useful static methods. NFC. (details)
  82. [clang-tidy] Fix add_new_check.py to generate correct list.rst autofix column from relative path (details)
  83. [APInt] Fix type limits warning (NFC) (details)
  84. [SystemZ] Implement memcmp of variable length with CLC. (details)
  85. [mlir][sparse] add a "release" operation to sparse tensor dialect (details)
  86. [NFC][X86][LV] Add basic costmodel test coverage for not-fully-interleaved i32 loads (details)
  87. [SLP]Detect reused scalars in all possible gathers for better vectorization cost. (details)
  88. [MLIR][linalg] Preserve location during elementwise fusion (details)
  89. [clangd] Revert unwanted change from D108194 (details)
  90. [InstrProfData] Bump the raw profile version to 8 (details)
  91. [lldb] Improve help for platform put-file (details)
  92. [lldb testing] NFC: run through clang-format (details)
  93. [llvm] Update report_fatal_error calls from raw_string_ostream to use Twine(OS.str()) (details)
  94. [Sema] Allow comparisons between different ms ptr size address space types. (details)
  95. [mlir][tosa] tosa.cast support for unsigned integers (details)
  96. [libc++][test] Use = delete over DELETE_FUNCTION. NFC. (details)
  97. [mlir:Pass] Generate a reproducer as early as possible (details)
  98. [SCEV] Tweak the algorithm for figuring out if flags must apply to a SCEV [mostly-NFC] (details)
  99. [flang] Fold MAXLOC and MINLOC (details)
  100. [mlir][spirv] Add ops and patterns for lowering standard max/min ops (details)
  101. [libc++abi] Mark __cxa_new_handler with _LIBCPP_SAFE_STATIC (details)
  102. [fir] Add external name interop pass (details)
  103. [NFC] Fixup newly-added costmodel tests to actually test what they should (details)
  104. [lldb] Improve meta data stripping from JSON crashlogs (details)
  105. [NFC][sanitizer] Combine MSAN data in single field (details)
  106. [sanitizer] Fix Android bot (details)
  107. [tests] Cover cases we could infer SCEV flags, but don't (details)
  108. [SCEV] Don't check if propagation safe if there are no flags (NFC) (details)
  109. [lld][WebAssembly] Create optional internal symbols only after LTO object as been added (details)
  110. [InstCombine] refactor folds of 'not' instructions; NFC (details)
  111. Update the release notes for consteval if support; NFC (details)
  112. Fix some Sphinx warnings in the static analyzer docs (details)
  113. [libc++] Run the no-unicode CI job on new testing configs (details)
  114. [inliner] Mandatory inlining decisions produce remarks (details)
  115. [test] rework recently added SCEV tests (details)
  116. [test] factor out reliance on noundef return value (details)
  117. [lld][WebAssembly] Remove redundant check for undefined global (NFC) (details)
  118. [InstCombine] add tests for logical nand/nor; NFC (details)
  119. [InstCombine] add folds for logical nand/nor (details)
  120. [Profile] Add missing fflush in __llvm_profile_set_file_object (details)
  121. [mlir][Linalg] Add support for min/max reduction vectorization in linalg.generic (details)
  122. [runtimes] Allow FOO_TEST_CONFIG to be a relative path (details)
  123. [libc++] Pickle substitutions to pass them to dsl.sh.py (details)
  124. [WebAssembly] Remove WasmTagType (details)
  125. [libc++] Refactor how basic_string and vector hoist exception-throwing functions (details)
  126. [AMDGPU] Only remove branches in SIInstrInfo::removeBranch (details)
  127. [test] refresh a couple of autogen tests (details)
  128. [docs] Expand the pre-merge testing description a bit (details)
  129. [AMDGPU] Correction to 095c48fdf3d27a4f346f8680d1d7e89449bb557b. (details)
  130. [test] autogen a couple of additional tests (details)
  131. Address a rst format error caught by buildbot (details)
  132. Stop stripping the `std.` prefix when printing operations in a region with a defined default dialect (details)
  133. [JITLink][MachO][arm64] Make testcase less brittle. (details)
  134. (test commit) Fix capitalization in README.md (details)
  135. [NFC][sanitizer] Add basic hash test (details)
  136. [NFC][sanitizer] Add MurMur2Hash64Builder (details)
  137. [NFC][sanitizers] Add StackDepotBase Node::hash_type (details)
Commit 81fb640f83b6a5d099f9124739ab3049be79ea56 by v.g.vassilev
[clang-repl] Allow loading of plugins in clang-repl.

Differential revision: https://reviews.llvm.org/D110484
The file was modifiedclang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
The file was addedclang/test/Interpreter/plugins.cpp
The file was modifiedclang/lib/Interpreter/IncrementalParser.cpp
The file was modifiedclang/include/clang/Frontend/CompilerInstance.h
The file was modifiedclang/tools/clang-repl/ClangRepl.cpp
The file was modifiedclang/lib/Frontend/CompilerInstance.cpp
The file was modifiedclang/tools/clang-repl/CMakeLists.txt
Commit 3e9d04f7e422c3e62d9adac506df8e7d42acc206 by v.g.vassilev
Revert "[clang-repl] Allow loading of plugins in clang-repl."

This reverts commit 81fb640f83b6a5d099f9124739ab3049be79ea56 due to bot failures:
https://lab.llvm.org/buildbot#builders/57/builds/10807
The file was modifiedclang/tools/clang-repl/CMakeLists.txt
The file was modifiedclang/lib/Frontend/CompilerInstance.cpp
The file was modifiedclang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
The file was modifiedclang/tools/clang-repl/ClangRepl.cpp
The file was modifiedclang/include/clang/Frontend/CompilerInstance.h
The file was modifiedclang/lib/Interpreter/IncrementalParser.cpp
The file was removedclang/test/Interpreter/plugins.cpp
Commit 93c1b3caf052f6575abffd29ae53441db2849534 by pavel
[lldb] Remove some anonymous namespaces

.. and reduce the scope of others. They don't follow llvm coding
standards (which say they should be used only when the same effect
cannot be achieved with the static keyword), and they set a bad example.
The file was modifiedlldb/source/Host/linux/HostInfoLinux.cpp
The file was modifiedlldb/source/Host/posix/LockFilePosix.cpp
The file was modifiedlldb/source/Plugins/LanguageRuntime/RenderScript/RenderScriptRuntime/RenderScriptx86ABIFixups.cpp
The file was modifiedlldb/source/Host/common/UDPSocket.cpp
The file was modifiedlldb/source/Host/common/LockFileBase.cpp
The file was modifiedlldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
The file was modifiedlldb/source/Host/windows/LockFileWindows.cpp
The file was modifiedlldb/source/Host/posix/ConnectionFileDescriptorPosix.cpp
The file was modifiedlldb/source/Host/windows/Host.cpp
The file was modifiedlldb/source/Plugins/Platform/Android/AdbClient.cpp
The file was modifiedlldb/source/Host/posix/PipePosix.cpp
The file was modifiedlldb/source/Plugins/ABI/ARC/ABISysV_arc.cpp
The file was modifiedlldb/source/Host/windows/HostThreadWindows.cpp
The file was modifiedlldb/source/Host/windows/ProcessLauncherWindows.cpp
The file was modifiedlldb/source/Host/common/XML.cpp
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangExpressionDeclMap.cpp
The file was modifiedlldb/source/Host/common/TCPSocket.cpp
The file was modifiedlldb/source/Host/posix/HostProcessPosix.cpp
The file was modifiedlldb/source/Plugins/Language/ObjC/NSDictionary.cpp
The file was modifiedlldb/source/Host/posix/DomainSocket.cpp
The file was modifiedlldb/source/API/SBTarget.cpp
The file was modifiedlldb/source/Host/common/Socket.cpp
The file was modifiedlldb/source/Breakpoint/Breakpoint.cpp
The file was modifiedlldb/source/Host/windows/PipeWindows.cpp
The file was modifiedlldb/source/Plugins/LanguageRuntime/RenderScript/RenderScriptRuntime/RenderScriptExpressionOpts.cpp
The file was modifiedlldb/source/Interpreter/OptionValuePathMappings.cpp
The file was modifiedlldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_ppc64le.cpp
The file was modifiedlldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
The file was modifiedlldb/source/Core/PluginManager.cpp
The file was modifiedlldb/source/Host/macosx/objcxx/HostThreadMacOSX.mm
Commit 0bd4365445e6989be71b23438f7235bb24b9c188 by jay.foad
[LiveIntervals] Fix verification of early-clobbered segments

Enable verification of live intervals immediately after computing them
(when -early-live-intervals is used) and fix a problem that that
provokes: currently the verifier insists that a segment that ends at an
early-clobber slot must be followed by another segment starting at the
same slot. But before TwoAddressInstruction runs, the equivalent
condition is: a segment that ends at an early-clobber slot must have its
last use tied to an early-clobber def. That condition is harder to check
here, so for now just disable this check until tied operands have been
rewritten.

Differential Revision: https://reviews.llvm.org/D111065
The file was modifiedllvm/lib/CodeGen/MachineVerifier.cpp
The file was modifiedllvm/lib/CodeGen/TargetPassConfig.cpp
Commit 3fe475367c4616434075d16691b8e8aff191b594 by Amara Emerson
[AArch64][GlobalISel] Legalize G_VECREDUCE_AND.

These are handled identically to the already handled G_VECREDUCE_OR instructions.
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
The file was modifiedllvm/test/CodeGen/AArch64/reduce-and.ll
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-and.mir
Commit c2eff3d5b931191d77fe391f93e50283a4c88739 by clementval
[fir] Split FIROptimizer lib into several smaller libraries

Partition libFIROptimizer into smaller libraries that reflect the
structure. Adapt potential problems.

This patch is part of the upstreaming effort from fir-dev branch. It's a
building stone to upstreaming transformations.

Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>

Reviewed By: schweitz

Differential Revision: https://reviews.llvm.org/D111055
The file was addedflang/lib/Optimizer/Transforms/CMakeLists.txt
The file was removedflang/unittests/Lower/CMakeLists.txt
The file was modifiedflang/unittests/Optimizer/CMakeLists.txt
The file was addedflang/lib/Optimizer/Support/CMakeLists.txt
The file was addedflang/unittests/Optimizer/RTBuilder.cpp
The file was modifiedflang/tools/tco/CMakeLists.txt
The file was addedflang/lib/Optimizer/CodeGen/CMakeLists.txt
The file was removedflang/unittests/Lower/RTBuilder.cpp
The file was addedflang/lib/Optimizer/Dialect/CMakeLists.txt
The file was modifiedflang/unittests/CMakeLists.txt
The file was modifiedflang/lib/Lower/CMakeLists.txt
The file was modifiedflang/tools/fir-opt/CMakeLists.txt
The file was modifiedflang/lib/Optimizer/CMakeLists.txt
Commit a785e5c3958eda8aafd6a6da2b23be2b92d3b165 by martin
[runtimes] Set a default value for LLVM_LIT_ARGS

This matches the value used in
libcxx/cmake/Modules/HandleOutOfTreeLLVM.cmake.

Differential Revision: https://reviews.llvm.org/D110987
The file was modifiedruntimes/CMakeLists.txt
Commit a8d15a926689c126c4d316788786e0160cfc1d5d by martin
[libcxx] Don't autodetect pthreads on MinGW

e9ee517930f76a972fcda00d9dd0466db80d60f7 added support for using
winpthreads on Windows, enabled if `__WINPTHREADS_VERSION` was
defined (i.e. if winpthreads headers have been included before
including libcxx `__config`). This was fragile (libcxx changed
behaviour depending on what headers had been included externally
before), and was changed in a1bc823a59d5b6f310bdf6c7c7b62ec71b87d1aa
to use pthreads on Windows whenever the pthread.h header was
available.

This is also fragile; pthread.h might be unavailable while building
libcxx but installed later, and available when users include the
libcxx headers.

In practice, in every modern setup for building libcxx for Windows
I've seen, users end up manually configuring it with
`LIBCXX_HAS_WIN32_THREAD_API=ON`, as the users may have winpthreads
installed (for other libraries/projects to use) while wanting to
build libcxx with the default win32 threading.

Don't automatically pick up pthreads on Windows even if the header
is available. Instead require the user to configure the libcxx
build with `LIBCXX_HAS_PTHREAD_API=ON` if that's desired.

Differential Revision: https://reviews.llvm.org/D110975
The file was modifiedlibcxx/include/__config
Commit 204d56394845a36136e1d27cf93f300fb6795788 by martin
[libcxx] [test] Move a missed test to ctime.timespec.compile.pass.cpp

This was missed in ec574f5da463d303a3771597c233e52d2429db67. TIME_UTC
is a define that goes along with timespec_get. The testcase that it is
moved to is only run for >= C++17, so the surrounding ifdef guard
can be dropped.

Differential Revision: https://reviews.llvm.org/D110988
The file was modifiedlibcxx/test/std/language.support/support.runtime/ctime.pass.cpp
The file was modifiedlibcxx/test/std/language.support/support.runtime/ctime.timespec.compile.pass.cpp
Commit 4e91035387faf9e18134b1d46ce0fa803a6e9122 by sam.mccall
[Support] Trim #include after b06df22
The file was modifiedllvm/include/llvm/Support/FileSystem/UniqueID.h
Commit bc02a3d4281cd7a6535c657d3981af8b096a3aab by clementval
Revert "[fir] Split FIROptimizer lib into several smaller libraries"

This reverts commit c2eff3d5b931191d77fe391f93e50283a4c88739.
The file was removedflang/lib/Optimizer/Transforms/CMakeLists.txt
The file was modifiedflang/tools/tco/CMakeLists.txt
The file was removedflang/lib/Optimizer/Support/CMakeLists.txt
The file was removedflang/unittests/Optimizer/RTBuilder.cpp
The file was modifiedflang/tools/fir-opt/CMakeLists.txt
The file was removedflang/lib/Optimizer/CodeGen/CMakeLists.txt
The file was removedflang/lib/Optimizer/Dialect/CMakeLists.txt
The file was modifiedflang/lib/Lower/CMakeLists.txt
The file was addedflang/unittests/Lower/CMakeLists.txt
The file was modifiedflang/unittests/Optimizer/CMakeLists.txt
The file was modifiedflang/unittests/CMakeLists.txt
The file was addedflang/unittests/Lower/RTBuilder.cpp
The file was modifiedflang/lib/Optimizer/CMakeLists.txt
Commit 8096759519f2930dc9ba2ceddada1100fee34a0b by nicolas.vasilache
[mlir][Linalg] NFC - Add support to specify that a tensor value is known to bufferize to writeable memory

This change allows better interop with external clients of comprehensive bufferization functions
but is otherwise NFC for the MLIR pass itself.

Differential Revision: https://reviews.llvm.org/D111121
The file was modifiedmlir/include/mlir/Dialect/Linalg/Transforms/ComprehensiveBufferize.h
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/ComprehensiveBufferize.cpp
Commit ca5be065c4c612554acdcae3ead01a1474eff296 by pavel
Revert "[lldb] Refactor variable parsing"

This commit has introduced test failures in internal google tests.
Working theory is they are caused by a genuine problem in the patch
which gets tripped by some debug info from system libraries.

Reverting while we try to reproduce the problem in a self-contained
fashion.

This reverts commit 601168e42037ac4433e74b920bb22f76d59ba420.
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.h
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
Commit c02a8cdda8733aac26481b6819a4eef000ee91c8 by clementval
[fir] Split FIROptimizer lib into several smaller libraries

Partition libFIROptimizer into smaller libraries that reflect the
structure. Adapt potential problems.

This patch is part of the upstreaming effort from fir-dev branch. It's a
building stone to upstreaming transformations.

Reviewed By: schweitz

Differential Revision: https://reviews.llvm.org/D111055

Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
The file was addedflang/unittests/Optimizer/RTBuilder.cpp
The file was addedflang/lib/Optimizer/CodeGen/CMakeLists.txt
The file was modifiedflang/unittests/Optimizer/CMakeLists.txt
The file was addedflang/lib/Optimizer/Transforms/CMakeLists.txt
The file was modifiedflang/unittests/CMakeLists.txt
The file was addedflang/lib/Optimizer/Dialect/CMakeLists.txt
The file was modifiedflang/lib/Optimizer/CMakeLists.txt
The file was removedflang/unittests/Lower/CMakeLists.txt
The file was addedflang/lib/Optimizer/Support/CMakeLists.txt
The file was modifiedflang/tools/tco/CMakeLists.txt
The file was removedflang/unittests/Lower/RTBuilder.cpp
The file was modifiedflang/tools/fir-opt/CMakeLists.txt
The file was modifiedflang/lib/Lower/CMakeLists.txt
Commit e86d45ec00972e553cf98d3687e307a90d544e2a by carl.ritson
[AMDGPU] Pre-commit test for D111126 (NFC)
The file was addedllvm/test/CodeGen/AMDGPU/artificial-terminators.mir
Commit 4755fb2e187da57227a35166190d7eb337ec2ce2 by clementval
Revert "[fir] Split FIROptimizer lib into several smaller libraries"

This reverts commit c02a8cdda8733aac26481b6819a4eef000ee91c8.
The file was removedflang/lib/Optimizer/CodeGen/CMakeLists.txt
The file was addedflang/unittests/Lower/RTBuilder.cpp
The file was removedflang/lib/Optimizer/Transforms/CMakeLists.txt
The file was removedflang/lib/Optimizer/Support/CMakeLists.txt
The file was modifiedflang/tools/tco/CMakeLists.txt
The file was modifiedflang/unittests/Optimizer/CMakeLists.txt
The file was modifiedflang/tools/fir-opt/CMakeLists.txt
The file was modifiedflang/unittests/CMakeLists.txt
The file was removedflang/lib/Optimizer/Dialect/CMakeLists.txt
The file was modifiedflang/lib/Lower/CMakeLists.txt
The file was removedflang/unittests/Optimizer/RTBuilder.cpp
The file was modifiedflang/lib/Optimizer/CMakeLists.txt
The file was addedflang/unittests/Lower/CMakeLists.txt
Commit 5f65ee260d78a050c0dfd3afda1812c729ee697c by Tim Northover
AArch64+GISel: legalize vector remainder operations.
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-rem.mir
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
Commit 10b93a5deceaa7d7daae50f12bc59f49b47680fd by david.green
[AArch64] Make speculation-hardening-sls.ll x16 test more robust

As suggested in D110830, this copies the Arm backend method of testing
function calls through specific registers, using inline assembly to
force the variable into x16 to check that the __llvm_slsblr_thunk calls
do not use a register that may be clobbered by the linker.

Differential Revision: https://reviews.llvm.org/D111056
The file was modifiedllvm/test/CodeGen/AArch64/speculation-hardening-sls.ll
Commit 519663bebaf1c1bcb334ef7bae412a7314dd39e7 by frgossen
[MLIR] Add an option to disable `maxIterations` in greedy pattern rewrites

This option is needed for passes that are known to reach a fix point, but may
need many iterations depending on the size of the input IR.

Differential Revision: https://reviews.llvm.org/D111058
The file was modifiedmlir/lib/Transforms/Utils/GreedyPatternRewriteDriver.cpp
The file was modifiedmlir/include/mlir/Transforms/Passes.td
The file was modifiedmlir/include/mlir/Transforms/GreedyPatternRewriteDriver.h
Commit ffaaa9b05c594d774852ecdb0ec681e3c1dfdb98 by david.green
[ARM] Reset speculation-hardening-sls.ll test checks.

The commit e497b12a69604b6d691312a30f6b86da4f18f7f8 went and regenerated
all the checks lines in the Arm speculation-hardening-sls.ll test in a
way that removed most of the important checks. This just resets them
back to how they were before, with the single character fix to change:
; NOHARDENARM:     {{bxge lr$}}
to
; NOHARDENARM:     {{bxgt lr$}}

Differential Revision: https://reviews.llvm.org/D111074
The file was modifiedllvm/test/CodeGen/ARM/speculation-hardening-sls.ll
Commit 0a031f5c880690e794aad48487dafbb010342ea1 by jay.foad
[GlobalISel] Simplify narrowScalarMul. NFC.

Remove some redundancy because the source and result types of any
multiply are always the same.
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
Commit e463b69736da8b0a950ecd937cf990401bdfcdeb by llvm-dev
[Support] Change fatal_error_handler_t to take a const char* instead of std::string

https://commondatastorage.googleapis.com/chromium-browser-clang/llvm-include-analysis.html

Excessive use of the <string> header has a massive impact on compile time; its most commonly included via the ErrorHandling.h header, which has to be included in many key headers, impacting many source files that have no need for std::string.

As an initial step toward removing the <string> include from ErrorHandling.h, this patch proposes to update the fatal_error_handler_t handler to just take a raw const char* instead.

The next step will be to remove the report_fatal_error std::string variant, which will involve a lot of cleanup and better use of Twine/StringRef.

Differential Revision: https://reviews.llvm.org/D111049
The file was modifiedclang/tools/libclang/FatalErrorHandler.cpp
The file was modifiedllvm/include/llvm/Support/ErrorHandling.h
The file was modifiedllvm/tools/llvm-isel-fuzzer/llvm-isel-fuzzer.cpp
The file was modifiedclang/tools/driver/cc1_main.cpp
The file was modifiedclang/tools/driver/cc1as_main.cpp
The file was modifiedclang/tools/clang-repl/ClangRepl.cpp
The file was modifiedllvm/tools/llvm-opt-fuzzer/llvm-opt-fuzzer.cpp
The file was modifiedllvm/tools/llvm-as-fuzzer/llvm-as-fuzzer.cpp
The file was modifiedllvm/lib/Support/ErrorHandling.cpp
Commit 9ce4f372067c0e2cb5844c4a8e52c8cacd6877c5 by jay.foad
[AMDGPU][GlobalISel] Fix legalization of G_UMULH

Scalarize before narrowing because the narrowing implementation does not
work on vectors. This matches what we do for regular G_MUL.

Differential Revision: https://reviews.llvm.org/D111129
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umulh.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umulo.mir
Commit d009f6e51cae7e7a155d083c9170723554f2e776 by akuegel
[mlir] Convert ConstShapeOp to a static tensor type.

ConstShapeOp knows its shape, so it should also have a static tensor type.

Differential Revision: https://reviews.llvm.org/D111127
The file was modifiedmlir/lib/Conversion/ShapeToStandard/ShapeToStandard.cpp
The file was modifiedmlir/test/Conversion/ShapeToStandard/shape-to-standard.mlir
Commit 1896fb2cfffcf120eb28cefb67ac3d56035adc43 by bjorn.a.pettersson
[SelectionDAG] Assume that a GlobalAlias may alias other global values

This fixes a bug detected in DAGCombiner when using global alias
variables. Here is an example:
  @foo = global i16 0, align 1
  @aliasFoo = alias i16, i16 * @foo
  define i16 @bar() {
    ...
    store i16 7, i16 * @foo, align 1
    store i16 8, i16 * @aliasFoo, align 1
    ...
  }

BaseIndexOffset::computeAliasing would incorrectly derive NoAlias
for the two accesses in the example above, resulting in DAGCombiner
miscompiles.

This patch fixes the problem by a defensive approach letting
BaseIndexOffset::computeAliasing return false, i.e. that the aliasing
couldn't be determined, when comparing two global values and at least
one is a GlobalAlias. In the future we might improve this with a
deeper analysis to look at the aliasee for the GlobalAlias etc. But
that is a bit more complicated considering that we could have
'local_unnamed_addr' and situations with several 'alias' variables.

Fixes PR51878.

Differential Revision: https://reviews.llvm.org/D110064
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp
The file was addedllvm/test/CodeGen/X86/pr51878_computeAliasing.ll
The file was modifiedllvm/unittests/CodeGen/SelectionDAGAddressAnalysisTest.cpp
Commit 8ed0e6b2cf941aa29628acdf718e82618d60bfc0 by bjorn.a.pettersson
[SelectionDAG] Replace error prone index check in BaseIndexOffset::computeAliasing

Deriving NoAlias based on having the same index in two BaseIndexOffset
expressions seemed weird (and as shown in the added unittest the
correctness of doing so depended on undocumented pre-conditions that
the user of BaseIndexOffset::computeAliasing would need to take care
of.

This patch removes the code that dereived NoAlias based on indices
being the same. As a compensation, to avoid regressions/diffs in
various lit test, we also add a new check. The new check derives
NoAlias in case the two base pointers are based on two different
GlobalValue:s (neither of them being a GlobalAlias).

Reviewed By: niravd

Differential Revision: https://reviews.llvm.org/D110256
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp
The file was modifiedllvm/unittests/CodeGen/SelectionDAGAddressAnalysisTest.cpp
Commit 3334b9d70bc86501b91eae0a5ec2459ef2da6bb3 by andrew.ng
[ELF][test] Enhance relative dynamic relocation tests

Add checking of the value of the relocation with an addend. Also check
all relocation offsets.

Differential Revision: https://reviews.llvm.org/D111071
The file was modifiedlld/test/ELF/relative-dynamic-reloc-pie.s
The file was modifiedlld/test/ELF/relative-dynamic-reloc.s
Commit 214054f78a4e40656b17838300dff2f136032172 by mgorny
[lldb] Move DynamicRegisterInfo to public Target library

Move DynamicRegisterInfo from the internal lldbPluginProcessUtility
library to the public lldbTarget library.  This is a prerequisite
towards ABI plugin changes that are going to pass DynamicRegisterInfo
parameters.

Differential Revision: https://reviews.llvm.org/D110942
The file was addedlldb/include/lldb/Target/DynamicRegisterInfo.h
The file was modifiedlldb/source/Plugins/Process/Utility/RegisterContextMemory.h
The file was modifiedlldb/source/Plugins/Process/Utility/CMakeLists.txt
The file was modifiedlldb/source/Target/CMakeLists.txt
The file was removedlldb/unittests/Process/Utility/DynamicRegisterInfoTest.cpp
The file was addedlldb/source/Target/DynamicRegisterInfo.cpp
The file was removedlldb/source/Plugins/Process/Utility/DynamicRegisterInfo.h
The file was removedlldb/source/Plugins/Process/Utility/DynamicRegisterInfo.cpp
The file was modifiedlldb/source/Plugins/OperatingSystem/Python/OperatingSystemPython.cpp
The file was modifiedlldb/source/Plugins/OperatingSystem/Python/OperatingSystemPython.h
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.h
The file was addedlldb/unittests/Target/DynamicRegisterInfoTest.cpp
The file was modifiedlldb/unittests/Process/Utility/CMakeLists.txt
The file was modifiedlldb/source/Plugins/Process/Utility/RegisterContextMemory.cpp
The file was modifiedlldb/unittests/Target/CMakeLists.txt
Commit 8b2d6fd6cb24837428bef4256c4e621b08a76295 by llvmgnsyncbot
[gn build] Port 214054f78a4e
The file was modifiedllvm/utils/gn/secondary/lldb/source/Target/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/lldb/source/Plugins/Process/Utility/BUILD.gn
Commit 471b25e217e635e058bbdbca8c693e2998380a60 by mkazantsev
[Test] Add test showing profitable peeling opportunity

Patch by Dmitry Makogon!
The file was modifiedllvm/test/Transforms/LoopUnroll/peel-multiple-unreachable-exits.ll
Commit bcefea80a40ead1e1fbec2e6fa001dd4816ca5c2 by 1.int32
[clang][ASTImporter] Add import of thread safety attributes.

Attributes of "C/C++ Thread safety attributes" section in Attr.td
are added to ASTImporter. The not added attributes from this section
do not need special import handling.

Reviewed By: martong

Differential Revision: https://reviews.llvm.org/D110528
The file was modifiedclang/unittests/AST/ASTImporterTest.cpp
The file was modifiedclang/lib/AST/ASTImporter.cpp
Commit 02895eede1a9a650e84d72afea2cd6ecf35ac1e7 by orlando.hyams
[llvm-cxxfilt][NFC] Fix test for running in Windows cmd

The test llvm\test\tools\llvm-cxxfilt\delimiters.test started failling when run
from cmd.exe on Windows after D110986 which added a unicode character (⦙) to it.
Piping the unicode character in cmd.exe causes it to be converted to a '?'.
That causes the test to fail because the llvm-cxxfilt output becomes Foo?Bar
rather than the expected Foo⦙Bar.

Redirect the echo output to and from a temporary file to get around this
problem.

It's not entirely clear what the root cause is, but two separate downstream
builders are tripping up on this, so we are landing the work around for the
time being.

Differential Revision: https://reviews.llvm.org/D111072
The file was modifiedllvm/test/tools/llvm-cxxfilt/delimiters.test
Commit 1549be3e820f38f02484c5d990e12749d8121ba3 by aaron
Silence an implicit conversion warning on the bit shift result in MSVC; NFC
The file was modifiedllvm/lib/Object/XCOFFObjectFile.cpp
Commit af9dce18bfdb09ab1dd8b4c55979e67799a0b322 by nicolas.vasilache
[mlir][Linalg] Allow operand-less scf::ExecuteRegionOp to encapsulate scf::YieldOp

These are considered noops.
Buferization will still fail on scf.execute_region which yield values.
This is used to make comprehensive bufferization interoperate better with external clients.

Differential Revision: https://reviews.llvm.org/D111130
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/ComprehensiveBufferize.cpp
The file was modifiedmlir/test/Dialect/Linalg/comprehensive-module-bufferize.mlir
The file was modifiedmlir/test/Dialect/Linalg/comprehensive-module-bufferize-invalid.mlir
Commit 40e00063bcb77873274504094116f29ecc2d1080 by Mirko.Brkusanin
[GlobalISel] Combine fabs(fneg(x)) to fabs(x)

Differential Revision: https://reviews.llvm.org/D110943
The file was modifiedllvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
The file was modifiedllvm/include/llvm/Target/GlobalISel/Combine.td
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/combine-fabs-fneg.mir
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/roundeven.ll
Commit cdfc678572d60af414daf56a5f2f5811f7e6ca31 by sjoerd.meijer
[SCCPSolver] Fix use-after-free in markArgInFuncSpecialization

In SCCPSolver::markArgInFuncSpecialization, the ValueState map may be
reallocated *after* the initial ValueLatticeElement reference is grabbed, but
*before* its use in copy initialization. This causes a use-after-free.  To fix
this, this commit changes the behavior to create the new ValueLatticeElement
before assigning the old one to it.

Patch by: https://github.com/duck-37/

Differential Revision: https://reviews.llvm.org/D111112
The file was modifiedllvm/lib/Transforms/Utils/SCCPSolver.cpp
Commit b5a11a991e17982bb9915d295797410186aa9894 by clementval
[fir] Split FIROptimizer lib into several smaller libraries

Partition libFIROptimizer into smaller libraries that reflect the
structure. Adapt potential problems.

This patch is part of the upstreaming effort from fir-dev branch. It's a
building stone to upstreaming transformations.

Reviewed By: schweitz

Differential Revision: https://reviews.llvm.org/D111055

Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
The file was addedflang/lib/Optimizer/CodeGen/CMakeLists.txt
The file was modifiedflang/tools/fir-opt/CMakeLists.txt
The file was addedflang/lib/Optimizer/Dialect/CMakeLists.txt
The file was addedflang/lib/Optimizer/Support/CMakeLists.txt
The file was modifiedflang/lib/Lower/CMakeLists.txt
The file was addedflang/lib/Optimizer/Transforms/CMakeLists.txt
The file was modifiedflang/unittests/CMakeLists.txt
The file was modifiedflang/unittests/Optimizer/CMakeLists.txt
The file was removedflang/unittests/Lower/CMakeLists.txt
The file was addedflang/unittests/Optimizer/RTBuilder.cpp
The file was removedflang/unittests/Lower/RTBuilder.cpp
The file was modifiedflang/lib/Optimizer/CMakeLists.txt
The file was modifiedflang/tools/tco/CMakeLists.txt
Commit 424733c12aacc227a28114deba72061153f8dff2 by aaron
Implement if consteval (P1938)

Modify the IfStmt node to suppoort constant evaluated expressions.

Add a new ExpressionEvaluationContext::ImmediateFunctionContext to
keep track of immediate function contexts.

This proved easier/better/probably more efficient than walking the AST
backward as it allows diagnosing nested if consteval statements.
The file was modifiedclang/lib/Serialization/ASTReaderStmt.cpp
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/lib/Sema/TreeTransform.h
The file was modifiedclang/lib/Sema/SemaExprMember.cpp
The file was modifiedclang/lib/CodeGen/CGStmt.cpp
The file was modifiedclang/lib/Sema/SemaExpr.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/LocalizationChecker.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticParseKinds.td
The file was modifiedclang/lib/Sema/SemaDeclCXX.cpp
The file was modifiedclang/lib/AST/TextNodeDumper.cpp
The file was modifiedclang/lib/Analysis/CFG.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was modifiedclang/lib/Sema/JumpDiagnostics.cpp
The file was modifiedclang/test/AST/ast-dump-if-json.cpp
The file was modifiedclang/lib/Analysis/BodyFarm.cpp
The file was modifiedclang/lib/AST/ASTImporter.cpp
The file was modifiedclang/lib/Sema/SemaStmt.cpp
The file was modifiedclang/lib/AST/StmtPrinter.cpp
The file was modifiedclang/include/clang/AST/Stmt.h
The file was modifiedclang/lib/AST/Stmt.cpp
The file was addedclang/test/AST/Interp/if_consteval.cpp
The file was modifiedclang/test/AST/ast-dump-stmt.cpp
The file was modifiedclang/lib/AST/ExprConstant.cpp
The file was modifiedclang/include/clang/Basic/Specifiers.h
The file was modifiedclang/lib/Sema/SemaLambda.cpp
The file was modifiedclang/lib/AST/Interp/ByteCodeStmtGen.cpp
The file was modifiedclang/lib/Frontend/InitPreprocessor.cpp
The file was modifiedclang/lib/Parse/ParseStmt.cpp
The file was modifiedclang/lib/AST/JSONNodeDumper.cpp
The file was modifiedclang/lib/CodeGen/CodeGenPGO.cpp
The file was addedclang/test/CXX/stmt.stmt/stmt.select/stmt.if/p4.cpp
The file was modifiedclang/lib/Serialization/ASTWriterStmt.cpp
The file was addedclang/test/CodeGenCXX/cxx2b-consteval-if.cpp
Commit aa4f4d18e85d65f796ee9a9549ead1c0cd56ac1d by aaron
consteval if is now fully supported

This amends 424733c12aacc227a28114deba72061153f8dff2 which accidentally
dropped the change to the status page.
The file was modifiedclang/www/cxx_status.html
Commit cf818b55e79ee637c72f1f94a183eec26b4fa3b9 by Raphael Isemann
[lldb][NFC] Remove unnecessary include in cpp/const_this test
The file was modifiedlldb/test/API/lang/cpp/const_this/main.cpp
Commit e826db624040919a11e9dd3a9f3714105ee031ce by gysit
[mlir][linalg] Move generalization pattern to Transforms (NFC).

Move the generalization pattern to the other Linalg transforms to make it available to the codegen strategy.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D110728
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Generalization.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
Commit 8737c74fab3aee833d85b7d235d2c47ebb4eed2e by kamau.bridgeman
[PowerPC][MMA] Allow MMA builtin types in pre-P10 compilation units

This patch allows the use of __vector_quad and __vector_pair, PPC MMA builtin
types, on all PowerPC 64-bit compilation units. When these types are
made available the builtins that use them automatically become available
so semantic checking for mma and pair vector memop __builtins is also
expanded to ensure these builtin function call are only allowed on
Power10 and new architectures. All related test cases are updated to
ensure test coverage.

Reviewed By: #powerpc, nemanjai

Differential Revision: https://reviews.llvm.org/D109599
The file was modifiedclang/test/CodeGenCXX/ppc-mangle-mma-types.cpp
The file was addedclang/test/Sema/ppc-mma-builtins.c
The file was modifiedclang/lib/AST/ASTContext.cpp
The file was modifiedllvm/test/CodeGen/PowerPC/mma-acc-memops.ll
The file was modifiedclang/lib/Sema/Sema.cpp
The file was modifiedclang/lib/Sema/SemaChecking.cpp
The file was modifiedclang/test/AST/ast-dump-ppc-types.c
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/test/CodeGen/ppc-mma-types.c
The file was addedclang/test/Sema/ppc-paired-vector-builtins.c
Commit e265644b324424bbc00185293594d3207150ee6e by jeremy.morse
[DebugInfo][InstrRef] Track all of DBG_PHIs operands

An important part of the instruction referencing solution is that we
identify all the registers that values move between before we then compute
an SSA-like function from the machine code, and from the variable
intrinsics. DBG_PHIs weren't causing all the subregisters of their operands
to be tracked; this patch forces that to happen.

The practical implications were that not enough space is allocated for
storing values when analysing the function -- asan will crash on the
attached test case with an unpatched compiler. Non-asan llc's will produce
a DBG_VALUE $noreg, where it should be $dil.

Differential Revision: https://reviews.llvm.org/D109064
The file was modifiedllvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
The file was addedllvm/test/DebugInfo/MIR/InstrRef/dbg-phi-subregister-location.mir
Commit f4f9ad0f5d8e8994c677c3712dff7585bf8bd963 by v.g.vassilev
Reland "[clang-repl] Allow loading of plugins in clang-repl."

Differential revision: https://reviews.llvm.org/D110484
The file was addedclang/test/Interpreter/plugins.cpp
The file was modifiedclang/lib/Frontend/CompilerInstance.cpp
The file was modifiedclang/include/clang/Frontend/CompilerInstance.h
The file was modifiedclang/lib/Interpreter/IncrementalParser.cpp
The file was modifiedclang/tools/clang-repl/ClangRepl.cpp
The file was modifiedclang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
The file was modifiedclang/tools/clang-repl/CMakeLists.txt
Commit a0ed71ff293b4ca4895fa5d184a008d048ea6fb1 by dvyukov
tsan: make cur_thread_init return cur_thread

Whenever we call cur_thread_init, we call cur_thread on the next line.
So make cur_thread_init return the current thread directly.
Makes code a bit shorter, does not affect codegen.

Reviewed By: vitalybuka, melver

Differential Revision: https://reviews.llvm.org/D110384
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interceptors.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interface.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
Commit f65458df32f72d6c2cb0cdf42544576290e5d8c6 by jay.foad
[PHIElimination] Update LiveVariables after handling an unspillable terminator

Update the LiveVariables analysis after the special handling for
unspillable terminators which was added in D91358. This is just enough
to fix some "Block should not be in AliveBlocks" / "Block missing from
AliveBlocks" errors in the codegen test suite when machine verification
is forced to run after PHIElimination (currently it is disabled).

Differential Revision: https://reviews.llvm.org/D110939
The file was modifiedllvm/lib/CodeGen/PHIElimination.cpp
Commit 070b0af9b813443a1db0550478389ba05f9820c8 by antiagainst
[mlir][spirv] Fix path in define_enum.sh script

Reviewed By: mravishankar

Differential Revision: https://reviews.llvm.org/D108310
The file was modifiedmlir/utils/spirv/define_enum.sh
Commit c483140f3ce28ea243d414dd0dee0c0f13c5b01c by dvyukov
tsan: improve detection of stack/tls races

Print meaningful stack frames for stack/tls races
(instead of PC 1/2 that don't symbolize).

Imitate stack/tls writes after we create and initialize
the new thread, otherwise the races are not detected.

This is re-submit of the following reverted commits,
but without tests as they failed on a number of OSes/arches:
"tsan: fix and test detection of TLS races"
"tsan: fix tls_race3 test on darwin"
"tsan: print a meaningful frame for stack races"

Differential Revision: https://reviews.llvm.org/D111147
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_thread.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_platform_mac.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_platform_linux.cpp
Commit 83e074a0c652a668c8a5d572f8c77b58c8383ff0 by antiagainst
[mlir] Add an 'cppNamespace' field to availability

This allows us to generate interfaces in a namespace,
following other TableGen'erated code.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D108311
The file was modifiedmlir/include/mlir/Dialect/SPIRV/IR/SPIRVAvailability.td
The file was modifiedmlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
The file was modifiedmlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp
The file was modifiedmlir/include/mlir/Dialect/SPIRV/IR/SPIRVOps.h
The file was modifiedmlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
Commit 80a645630660b1096aa16e18ed4747b24995f6cb by kai.wang
[RISCV] Update to vlm.v and vsm.v according to v1.0-rc1.

vle1.v  -> vlm.v
vse1.v  -> vsm.v

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D106044
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vle.c
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-load-store.ll
The file was removedllvm/test/CodeGen/RISCV/rvv/vle1-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vadd-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-logic.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vselect-fp-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll
The file was modifiedllvm/test/MC/RISCV/rvv/store.s
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoV.td
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv-fastcc.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/extload-truncstore.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-splat.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect.ll
The file was modifiedclang/include/clang/Basic/riscv_vector.td
The file was modifiedllvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vse.c
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vselect-fp-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/load-mask.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vsm-rv32.ll
The file was modifiedllvm/test/MC/RISCV/rvv/load.s
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vse.c
The file was modifiedllvm/test/MC/RISCV/rvv/aliases.s
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-subvector.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv.ll
The file was modifiedllvm/include/llvm/IR/IntrinsicsRISCV.td
The file was addedllvm/test/CodeGen/RISCV/rvv/vlm-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-extload-truncstore.ll
The file was removedllvm/test/CodeGen/RISCV/rvv/vle1-rv32.ll
The file was removedllvm/test/CodeGen/RISCV/rvv/vse1-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-buildvec.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-setcc.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vlm-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/unaligned-loads-stores.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vsm-rv64.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
The file was removedllvm/test/CodeGen/RISCV/rvv/vse1-rv32.ll
Commit 095c48fdf3d27a4f346f8680d1d7e89449bb557b by kpyzhov
[AMDGPU] Use "hostcall" module flag instead of searching for ockl_hostcall_internal() declaration.
The current way to detect hostcalls by looking for "ockl_hostcall_internal()" function in the module seems to be not reliable enough. The LTO may rename the "ockl_hostcall_internal()" function when an application is compiled with "-fgpu-rdc", and MetadataStreamer pass to fail to detect hostcalls, therefore it does not set the "hidden_hostcall_buffer" kernel argument.
This change adds a new module flag: hostcall that can be used to detect whether GPU functions use host calls for printf.

Differential revision: https://reviews.llvm.org/D110337
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
The file was modifiedllvm/lib/Transforms/Utils/AMDGPUEmitPrintf.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/hsa-metadata-hostcall-present-v3.ll
Commit b6234c1edffc8286815c61887eb02fd6ddab0090 by lebedev.ri
[X86][Costmodel] Load/store i32/f32 Stride=4 VF=2 interleaving costs

Finally, we are getting to the heavy-hitter stuff!

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/7crGWoar6 - for intels `Block RThroughput: =4.0`; for ryzens, `Block RThroughput: <=2.0`
So could pick cost of `4`.

For store we have:
https://godbolt.org/z/T8aq3MszM - for intels `Block RThroughput: =5.0`; for ryzens, `Block RThroughput: <=2.0`
So we could pick cost of `5`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D111060
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-4.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-4.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-4.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4.ll
Commit 3c2e22b795485df28ca898bd3a58b6478c1e903d by lebedev.ri
[X86][Costmodel] Load/store i32/f32 Stride=4 VF=4 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/avq1oz98W - for intels `Block RThroughput: =8.0`; for ryzens, `Block RThroughput: =4.0`
So could pick cost of `8`.

For store we have:
https://godbolt.org/z/89PGMc1qs - for intels `Block RThroughput: =6.0`; for ryzens, `Block RThroughput: <=6.0`
So we could pick cost of `6`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D111061
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-4.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-4.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-4.ll
Commit 4aee1e5b93e79ffd350485b866d4c6c982aab15f by lebedev.ri
[X86][Costmodel] Load/store i32/f32 Stride=4 VF=8 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/a6rxMG6ec - for intels `Block RThroughput: =16.0`; for ryzens, `Block RThroughput: <=12.0`
So could pick cost of `16`.

For store we have:
https://godbolt.org/z/ced1bdqc9 - for intels `Block RThroughput: =16.0`; for ryzens, `Block RThroughput: <=8.0`
So we could pick cost of `16`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D111063
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-4.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-4.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-4.ll
Commit 7d91037fd2f71f1253bd8751a887eb4b6ed7d2ec by lebedev.ri
[X86][Costmodel] Load/store i32/f32 Stride=4 VF=16 interleaving costs

This one required quite a bit of assembly surgery, but the trend continues, so i think this is right.

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/EKWdj8cKT - for intels `Block RThroughput: <=32.0`; for ryzens, `Block RThroughput: <=24.0`
So could pick cost of `32`.

For store we have:
https://godbolt.org/z/zj4bb9P75 - for intels `Block RThroughput: =32.0`; for ryzens, `Block RThroughput: <=16.0`
So we could pick cost of `32`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D111064
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-4.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-4.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-4.ll
Commit dcc2b0d9336c6d377cab4e2bcc7278a44123263d by lebedev.ri
[X86][Costmodel] Load/store i64/f64 Stride=4 VF=2 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/z197317d1 - for intels `Block RThroughput: =6.0`; for ryzens, `Block RThroughput: =2.0`
So could pick cost of `6`.

For store we have:
https://godbolt.org/z/8dzszjf9q - for intels `Block RThroughput: =6.0`; for ryzens, `Block RThroughput: <=4.0`
So we could pick cost of `6`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D111073
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-4.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-4.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-4.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-4.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
Commit 000ce0bfd52bbfe48732f378f5a67f307424552b by lebedev.ri
[X86][Costmodel] Load/store i64/f64 Stride=4 VF=4 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/MTKdzjvnr - for intels `Block RThroughput: =8.0`; for ryzens, `Block RThroughput: <=4.0`
So could pick cost of `8`.

For store we have:
https://godbolt.org/z/cMYEvqoah - for intels `Block RThroughput: =8.0`; for ryzens, `Block RThroughput: <=4.0`
So we could pick cost of `8`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D111075
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-4.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-4.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-4.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-4.ll
Commit c800119c46fb266b7fc75409fd9cbbb1a6d8f72a by lebedev.ri
[X86][Costmodel] Load/store i64/f64 Stride=4 VF=8 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/3M3hbq7n8 - for intels `Block RThroughput: =20.0`; for ryzens, `Block RThroughput: =8.0`
So could pick cost of `20`.

For store we have:
https://godbolt.org/z/zvnPYWTx7 - for intels `Block RThroughput: =20.0`; for ryzens, `Block RThroughput: =8.0`
So we could pick cost of `20`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D111076
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-4.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-4.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-4.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-4.ll
Commit 764fd5f463e4a2d13e77751e0da1c623d2781d4b by lebedev.ri
[X86][Costmodel] Load/store i32/f32 Stride=6 VF=2 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/aec96Thee - for intels `Block RThroughput: =6.0`; for ryzens, `Block RThroughput: <=3.3`
So could pick cost of `6`.

For store we have:
https://godbolt.org/z/aec96Thee - for intels `Block RThroughput: =9.0`; for ryzens, `Block RThroughput: <=3.0`
So we could pick cost of `9`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D111083
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-6.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-6.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-6.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-6.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
Commit d51532d8aad529fcefeedd686f0f1d2d967661f5 by lebedev.ri
[X86][Costmodel] Load/store i32/f32 Stride=6 VF=4 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/szEj1ceee - for intels `Block RThroughput: =15.0`; for ryzens, `Block RThroughput: <=8.8`
So could pick cost of `15`.

For store we have:
https://godbolt.org/z/81bq4fTo1 - for intels `Block RThroughput: =12.0`; for ryzens, `Block RThroughput: <=10.0`
So we could pick cost of `12`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D111087
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-6.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-6.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-6.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-6.ll
Commit 2996a2b50fe39784b4c98748ba2a5b9595dc40f4 by lebedev.ri
[X86][Costmodel] Load/store i32/f32 Stride=6 VF=8 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/jK85GWKaK - for intels `Block RThroughput: =31.0`; for ryzens, `Block RThroughput: <=17.0`
So could pick cost of `31`.

For store we have:
https://godbolt.org/z/hPWWhEEf9 - for intels `Block RThroughput: =33.0`; for ryzens, `Block RThroughput: <=13.8`
So we could pick cost of `33`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D111089
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-6.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-6.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-6.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-6.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
Commit 79d6d12d9585dd584f259fa7395ad9465bef9aeb by lebedev.ri
[X86][Costmodel] Load/store i32/f32 Stride=6 VF=16 interleaving costs

This one required quite a bit of an assembly surgery, but i think it's in the right ballpark..

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/na97Kb96o - for intels `Block RThroughput: <=64.0`; for ryzens, `Block RThroughput: <=32.0`
So could pick cost of `64`.

For store we have:
https://godbolt.org/z/GG1WeoKar - for intels `Block RThroughput: =66.0`; for ryzens, `Block RThroughput: <=27.5`
So we could pick cost of `66`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D111091
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-6.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-6.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-6.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-6.ll
Commit 3960693048a067e295d25c252b5f3a985c637bf2 by lebedev.ri
[X86][Costmodel] Load/store i64/f64 Stride=6 VF=2 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/onese7rec - for intels `Block RThroughput: =6.0`; for ryzens, `Block RThroughput: =3.0`
So could pick cost of `6`.

For store we have:
https://godbolt.org/z/bMd7dddnT - for intels `Block RThroughput: =8.0`; for ryzens, `Block RThroughput: <=6.0`
So we could pick cost of `8`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D111092
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-6.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-6.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-6.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-6.ll
Commit e2784c5d8cf6b2fe29d4b72addebadc619044c44 by lebedev.ri
[X86][Costmodel] Load/store i64/f64 Stride=6 VF=4 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/rc8jYxW6M - for intels `Block RThroughput: =18.0`; for ryzens, `Block RThroughput: =6.0`
So could pick cost of `18`.

For store we have:
https://godbolt.org/z/9PhPEr65G - for intels `Block RThroughput: =15.0`; for ryzens, `Block RThroughput: =6.0`
So we could pick cost of `15`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D111093
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-6.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-6.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-6.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-6.ll
Commit 3f9b235482a0e75946e3fc76dff93e0e29f104ab by lebedev.ri
[X86][Costmodel] Load/store i64/f64 Stride=6 VF=8 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/1jfGddcre - for intels `Block RThroughput: =36.0`; for ryzens, `Block RThroughput: =12.0`
So could pick cost of `36`

For store we have:
https://godbolt.org/z/ao9srMT8r - for intels `Block RThroughput: =30.0`; for ryzens, `Block RThroughput: =12.0`
So we could pick cost of `30`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D111094
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-6.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-6.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-6.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-6.ll
Commit fe2b2cb58ebb57427c0a12e54a4ed63553c397ab by shivam98.tkg
Add .cmt and .cmti files for OCaml bindings

We can build .cmt and .cmti files for easier
code navigation for OCaml bindings
The file was modifiedllvm/cmake/modules/AddOCaml.cmake
Commit 0ad9013fcd05ce6d9a4ebcdadbaf526efdcffa7b by joeloser93
[libc++][test] Remove unused macro in is_constructible.pass.cpp. NFC.

Test file defines `LIBCPP11_STATIC_ASSERT` but it never uses it now. It
always uses `static_assert` unconditionally. So, remove the unused
macro.
The file was modifiedlibcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_constructible.pass.cpp
Commit 79bf032fe103333546fd1d6e14c5ac8905f25c2b by dave
[lldb testing] Avoid subtle terminfo behavioral differences

The original "arbitrary" changes were causing EINVAL on a Fedora 34 box.
The file was modifiedlldb/unittests/Host/posix/TerminalTest.cpp
Commit 2ac199993764e068494a69a85af098c0ae1ff37e by matthew.devereau
[AArch64][SVE] Propagate math flags from intrinsics to instructions

Retain floating-point math flags inside instCombineSVEVectorBinOp
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
The file was modifiedllvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-fma-binops.ll
Commit be26e6ff737d89827f0eb5678cbc88aae2068348 by peter.waller
[AArch64][SVE] Remove redundant PTEST following PNEXT/PFIRST

PNEXT and PFIRST set the NZCV flags, so the subsequent PTEST can be
optimized away in AArch64InstrInfo::optimizePTestInstr.

See-also: https://reviews.llvm.org/D93292

Differential Revision: https://reviews.llvm.org/D110177
The file was modifiedllvm/lib/Target/AArch64/SVEInstrFormats.td
The file was addedllvm/test/CodeGen/AArch64/sve-ptest-removal-pfirst-pnext.ll
Commit c6c13c58eebda605a9a05f1f13cac1e46407afc7 by paulsson
[SystemZ] Implement memcpy of variable length with MVC.

Instead of making a memcpy libcall, emit an MVC loop and an EXRL instruction
the same way as is already done for memset 0.

Review: Ulrich Weigand

Differential Revision: https://reviews.llvm.org/D106874
The file was modifiedllvm/test/CodeGen/SystemZ/loop-03.ll
The file was modifiedllvm/lib/Target/SystemZ/SystemZISelLowering.cpp
The file was modifiedllvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp
The file was modifiedllvm/test/CodeGen/SystemZ/tail-call-mem-intrinsics.ll
The file was modifiedllvm/test/CodeGen/SystemZ/memcpy-01.ll
Commit de5b16d8ca2d14ff0d9b6be9cf40566bc7eb5a01 by Amara Emerson
Revert "Revert "Revert "[GlobalISel][IRTranslator] Emit trap intrinsic for "unreachable""""

This reverts commit c93bc508ee446d17f9d5d59b48d98aef15f22d52.

Seems to break a different thing now.
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h
The file was removedllvm/test/CodeGen/AArch64/GlobalISel/irtranslator-unreachable.ll
The file was modifiedllvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
The file was modifiedllvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
Commit 3081de8c72fc9b6c0cc8b1bb5f02858b78ebaa4c by kazu
[llvm] Migrate from getNumArgOperands to arg_size (NFC)

Note that getNumArgOperands is considered a legacy name.  See
llvm/include/llvm/IR/InstrTypes.h for details.
The file was modifiedllvm/lib/Bitcode/Writer/BitcodeWriter.cpp
The file was modifiedllvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
The file was modifiedllvm/unittests/IR/InstructionsTest.cpp
Commit 6831c1d8689bebe745aac1fdd7354c2e2f692c1a by usx
[clangd] Include refs of base method in refs for derived method.

Addresses https://github.com/clangd/clangd/issues/881

Includes refs of base class method in refs of derived class method.
Previously we reported base class method's refs only for decl of derived
class method. Ideally this should work for all usages of derived class method.

Related patch:
https://github.com/llvm/llvm-project/commit/fbeff2ec2bc6e44b92931207b0063f83ff7a3b3a.

Differential Revision: https://reviews.llvm.org/D111039
The file was modifiedclang-tools-extra/clangd/unittests/XRefsTests.cpp
The file was modifiedclang-tools-extra/clangd/XRefs.cpp
Commit cc697fc292b0a405eaa42c6c8e5f117ba4f7d73b by clattner
[APInt] Make insertBits and concat work with zero width APInts.

These should both clearly work with our current model for zero width
integers, but don't until now!

Differential Revision: https://reviews.llvm.org/D111113
The file was modifiedllvm/unittests/ADT/APIntTest.cpp
The file was modifiedllvm/lib/Support/APInt.cpp
Commit 9503ad3b533cb84b51cfc80c51d262da50435013 by llvm-dev
[clang] FatalErrorHandler.cpp - add explicit <stdio.h> include

Required for fprintf/stderr usage in the error handler, noticed while trying to remove the <string> dependency described in D111049
The file was modifiedclang/tools/libclang/FatalErrorHandler.cpp
Commit 3ca232feb3526281bf9640f5f6f21e8f4c622b28 by llvm-dev
[TableGen] CodeEmitterGen - emit report_fatal_error(const char*) instead of report_fatal_error(std::string&)

As described on D111049, we're trying to remove the <string> dependency from error handling. In most cases the plan is to use the Twine() variant directly but to reduce introducing additional headers for the generated files, I'm using the const char* variant here instead.
The file was modifiedllvm/utils/TableGen/CodeEmitterGen.cpp
Commit d67935ed8e78e7ffef17b6f7193b4f11f52a143d by llvm-dev
[Support] Update SmallVector report_fatal_error calls to use Twine and add missing implicit header dependency.
The file was modifiedllvm/lib/Support/SmallVector.cpp
Commit c117d77e937f410a2b9c54eaec0fc5fe2a653399 by nikita.ppv
[ConstantFold] Refactor load folding

This refactors load folding to happen in two cleanly separated
steps: ConstantFoldLoadFromConstPtr() takes a pointer to load from
and decomposes it into a constant initializer base and an offset.
Then ConstantFoldLoadFromConst() loads from that initializer at
the given offset. This makes the core logic independent of having
actual GEP expressions (and those GEP expressions having certain
structure) and will allow exposing ConstantFoldLoadFromConst() as
an independent API in the future.

This is mostly only a refactoring, but it does make the folding
logic slightly more powerful.

Differential Revision: https://reviews.llvm.org/D111023
The file was modifiedllvm/lib/Analysis/ConstantFolding.cpp
The file was modifiedllvm/test/Transforms/InstSimplify/load.ll
The file was modifiedllvm/test/Transforms/InstSimplify/ConstProp/loads.ll
Commit ebfcd06d422286dcdd0e9a8c57e207a46c8fb8fb by kbobyrev
[clangd] IncludeCleaner: Mark used headers

Follow-up on D105426.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D108194
The file was modifiedclang-tools-extra/clangd/ParsedAST.cpp
The file was modifiedclang-tools-extra/clangd/Headers.h
The file was modifiedclang-tools-extra/clangd/unittests/IncludeCleanerTests.cpp
The file was modifiedclang-tools-extra/clangd/IncludeCleaner.cpp
The file was modifiedclang-tools-extra/clangd/IncludeCleaner.h
The file was modifiedclang-tools-extra/clangd/Headers.cpp
Commit 8f55fdf26cd9f08b3b706e9ff8819b0c7f72b651 by Joseph.Nash
[MacroFusion] Expose useful static methods. NFC.

hasLessThanNumFused and fuseInstructionPair are useful for
DAG mutations similar to MacroFusion, but which cannot use
MacroFusion as a whole (such as fusing non-dependent instruction).

Reviewed By: MatzeB

Differential Revision: https://reviews.llvm.org/D111070

Change-Id: I3a5d56aba0471d45ef64cebb9b724030e2eae2f3
The file was modifiedllvm/lib/CodeGen/MacroFusion.cpp
The file was modifiedllvm/include/llvm/CodeGen/MacroFusion.h
Commit 32ab79ebc496d73cb0eb3ad3b54d32b00fc49ba1 by kbobyrev
[clang-tidy] Fix add_new_check.py to generate correct list.rst autofix column from relative path

Previously, the code in add_new_check.py that looks for fixit keywords in check source files when generating list.rst assumed that the script would only be called from its own path. That means it doesn't find any source files for the checks it's attempting to scan for, and it defaults to writing out nothing in the "Offers fixes" column for all checks. Other parts of add_new_check.py work from other paths, just not this part.

After this fix, add_new_check.py's "offers fixes" column generation for list.rst will be consistent regardless of what path it's called from by using the caller path that's deduced elsewhere already from sys.argv[0].

Reviewed By: kbobyrev

Differential Revision: https://reviews.llvm.org/D110600
The file was modifiedclang-tools-extra/clang-tidy/add_new_check.py
Commit 64eaffb613d0cb7fa7542fa48281a2e617ad8ee9 by nikita.ppv
[APInt] Fix type limits warning (NFC)

Unsigned number is always >= 0.
The file was modifiedllvm/lib/Support/APInt.cpp
Commit 7a4e9a0c73667cb80e4572d41535a9e48f1ed9ef by paulsson
[SystemZ] Implement memcmp of variable length with CLC.

Following the same pattern of memset/memcpy, this patch implements a variable
length memcmp with a CLC loop followed by an EXRL instruction.

Review: Ulrich Weigand

Differential Revision: https://reviews.llvm.org/D107380
The file was modifiedllvm/lib/Target/SystemZ/SystemZISelLowering.cpp
The file was modifiedllvm/lib/Target/SystemZ/SystemZInstrFormats.td
The file was modifiedllvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp
The file was modifiedllvm/test/CodeGen/SystemZ/memcmp-01.ll
Commit 16b8f4ddae1cb36ac16c6eb451613c032e4064f6 by ajcbik
[mlir][sparse] add a "release" operation to sparse tensor dialect

We have several ways to materialize sparse tensors (new and convert) but no explicit operation to release the underlying sparse storage scheme at runtime (other than making an explicit delSparseTensor() library call). To simplify memory management, a sparse_tensor.release operation has been introduced that lowers to the runtime library call while keeping tensors, opague pointers, and memrefs transparent in the initial IR.

*Note* There is obviously some tension between the concept of immutable tensors and memory management methods. This tension is addressed by simply stating that after the "release" call, no further memref related operations are allowed on the tensor value. We expect the design to evolve over time, however, and arrive at a more satisfactory view of tensors and buffers eventually.

Bug:
http://llvm.org/pr52046

Reviewed By: bixia

Differential Revision: https://reviews.llvm.org/D111099
The file was modifiedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_out_simple.mlir
The file was modifiedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reductions.mlir
The file was modifiedmlir/test/Dialect/SparseTensor/roundtrip.mlir
The file was modifiedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_matvec.mlir
The file was modifiedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_scale.mlir
The file was modifiedmlir/test/Dialect/SparseTensor/conversion.mlir
The file was modifiedmlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorOps.td
The file was modifiedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_filter_conv2d.mlir
The file was modifiedmlir/lib/Dialect/SparseTensor/IR/SparseTensorDialect.cpp
The file was modifiedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_quantized_matmul.mlir
The file was modifiedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_mttkrp.mlir
The file was modifiedmlir/test/Integration/Dialect/SparseTensor/CPU/dense_output.mlir
The file was addedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_constant_to_sparse_tensor.mlir
The file was modifiedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_flatten.mlir
The file was modifiedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_storage.mlir
The file was removedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse-constant_to_sparse_tensor.mlir
The file was modifiedmlir/test/Dialect/SparseTensor/invalid.mlir
The file was modifiedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion.mlir
The file was modifiedmlir/test/Integration/Dialect/SparseTensor/CPU/lit.local.cfg
The file was modifiedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sampled_matmul.mlir
The file was modifiedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum.mlir
The file was modifiedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_cast.mlir
The file was modifiedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_spmm.mlir
The file was modifiedmlir/lib/Dialect/SparseTensor/Transforms/SparseTensorConversion.cpp
The file was modifiedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sampled_mm_fusion.mlir
Commit 200edc152b029eb5e7eab56f73a0750935799035 by lebedev.ri
[NFC][X86][LV] Add basic costmodel test coverage for not-fully-interleaved i32 loads

The coverage could have cumulative explosion here,
so i'm adding only the most basic cases,
and hoping it's enough, though more can be added if needed.
The file was addedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-2-indices-0u.ll
The file was addedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-3-indices-0uu.ll
The file was addedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4-indices-01uu.ll
The file was addedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4-indices-0uuu.ll
The file was addedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4-indices-012u.ll
The file was addedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-3-indices-01u.ll
Commit bebe702dbe8c883fd534d718288ed18319dea1a1 by a.bataev
[SLP]Detect reused scalars in all possible gathers for better vectorization cost.

Some initially gathered nodes missed the check for the reused scalars,
which leads to high gather cost. Such nodes still can be represented as
m gathers + shuffle instead of n gathers, where m < n.

Differential Revision: https://reviews.llvm.org/D111153
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/commutativity.ll
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Commit b983783d2e58742b03f7e9d495c50eed4001ec66 by gcmn
[MLIR][linalg] Preserve location during elementwise fusion

This otherwise loses a lot of debugging info and results in a painful
debugging experience.

Reviewed By: mravishankar, stellaraccident

Differential Revision: https://reviews.llvm.org/D111107
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp
Commit 0c14e279c7294cb354e803ba5f2557425fee7c59 by kbobyrev
[clangd] Revert unwanted change from D108194
The file was modifiedclang-tools-extra/clangd/ParsedAST.cpp
Commit 24c615fa6b6b7910c8743f9044226499adfac4e6 by phosek
[InstrProfData] Bump the raw profile version to 8

This is to account for the change that made CountersPtr in __profd_
relative which landed in a1532ed27582038e2d9588108ba0fe8237f01844.
That change hasn't updated the raw profile version, and while the
profile layout stayed the same, profiles generated by tip-of-tree
LLVM are incompatible with 13.x tooling.

Differential Revision: https://reviews.llvm.org/D111123
The file was modifiedllvm/include/llvm/ProfileData/InstrProfData.inc
The file was modifiedllvm/test/tools/llvm-profdata/misaligned-binary-ids-size.test
The file was modifiedllvm/test/tools/llvm-profdata/binary-ids-padding.test
The file was modifiedllvm/test/tools/llvm-profdata/raw-64-bits-le.test
The file was modifiedllvm/test/tools/llvm-profdata/raw-32-bits-be.test
The file was modifiedllvm/test/tools/llvm-profdata/raw-two-profiles.test
The file was modifiedllvm/test/tools/llvm-profdata/raw-32-bits-le.test
The file was modifiedllvm/test/tools/llvm-profdata/large-binary-id-size.test
The file was modifiedllvm/test/tools/llvm-profdata/Inputs/c-general.profraw
The file was modifiedllvm/include/llvm/ProfileData/InstrProf.h
The file was modifiedllvm/test/tools/llvm-profdata/insufficient-binary-ids-size.test
The file was modifiedllvm/test/tools/llvm-profdata/raw-64-bits-be.test
The file was modifiedllvm/test/tools/llvm-profdata/malformed-ptr-to-counter-array.test
The file was modifiedllvm/test/tools/llvm-profdata/Inputs/compressed.profraw
The file was modifiedcompiler-rt/include/profile/InstrProfData.inc
Commit 0f3254b29f375d449e815e91d63bef78d9e81354 by keithbsmiley
[lldb] Improve help for platform put-file

Previously it was not clear what arguments this required, or what it would do if you didn't pass the destination argument.

Differential Revision: https://reviews.llvm.org/D110981
The file was modifiedlldb/source/Commands/CommandObjectPlatform.cpp
Commit 5bc32ad08d9a25b1a4fc4fe7daa4056d1d1ef67f by dave
[lldb testing] NFC: run through clang-format
The file was modifiedlldb/unittests/Host/posix/TerminalTest.cpp
Commit 2e5daac21731eb27ef952efaad31cac2a5d8f254 by llvm-dev
[llvm] Update report_fatal_error calls from raw_string_ostream to use Twine(OS.str())

As described on D111049, we're trying to remove the <string> dependency from error handling and replace uses of report_fatal_error(const std::string&) with the Twine() variant which can be forward declared.

We can use the raw_string_ostream::str() method to perform the implicit flush() and return a reference to the std::string container that we can then wrap inside Twine().
The file was modifiedllvm/tools/obj2yaml/coff2yaml.cpp
The file was modifiedllvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
The file was modifiedllvm/lib/Object/Object.cpp
The file was modifiedllvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
The file was modifiedllvm/unittests/Analysis/VectorUtilsTest.cpp
The file was modifiedllvm/tools/llvm-readobj/ARMWinEHPrinter.cpp
The file was modifiedllvm/lib/ExecutionEngine/MCJIT/MCJIT.cpp
The file was modifiedllvm/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
The file was modifiedllvm/unittests/Analysis/TargetLibraryInfoTest.cpp
The file was modifiedllvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldCOFFThumb.h
The file was modifiedllvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
The file was modifiedllvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp
Commit c7104e506619b551ee7ab888a040114f260e8cb5 by akhuang
[Sema] Allow comparisons between different ms ptr size address space types.

We're currently using address spaces to implement __ptr32/__ptr64 attributes;
this patch fixes a bug where clang doesn't allow types with different pointer
size attributes to be compared.

Fixes https://bugs.llvm.org/show_bug.cgi?id=51889

Differential Revision: https://reviews.llvm.org/D110670
The file was addedclang/test/Sema/MicrosoftExtensions.cpp
The file was modifiedclang/test/CodeGen/ms-mixed-ptr-sizes.c
The file was modifiedclang/lib/Sema/SemaExprCXX.cpp
Commit d5a4c86d14488baee9c42c45b27c3addb8877624 by rob.suderman
[mlir][tosa] tosa.cast support for unsigned integers

Unsigned integers need to be handled for cast to floating point.

Reviewed By: NatashaKnk

Differential Revision: https://reviews.llvm.org/D111102
The file was modifiedmlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
The file was modifiedmlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
Commit 8cf5319affc2441c2901908140c14f7153078199 by joeloser93
[libc++][test] Use = delete over DELETE_FUNCTION. NFC.

Some tests repeat the definition of `DELETE_FUNCTION` macro locally.
However, it's not even requred to guard against in the C++03 case since
Clang supports `= delete;` in C++03 mode. A warning is issued but
`libc++` tests run with `-Wno-c++11-extensions`, so this isn't an issue.
Since we don't support other compilers in C++03 mode, `= delete;` is
always available for use. As such, inline all calls of `DELETE_FUNCTION`
to use `= delete;`.

Reviewed By: ldionne, #libc

Differential Revision: https://reviews.llvm.org/D111148
The file was modifiedlibcxx/test/std/utilities/memory/storage.iterator/raw_storage_iterator.pass.cpp
The file was modifiedlibcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.create/allocate_shared.pass.cpp
The file was modifiedlibcxx/test/support/test_iterators.h
The file was modifiedlibcxx/test/libcxx/iterators/contiguous_iterators.pass.cpp
The file was modifiedlibcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.create/make_shared.pass.cpp
The file was modifiedlibcxx/test/support/test_allocator.h
Commit b8ffcb12e2ed52e080532586ae1ed4e6f9e47b70 by riddleriver
[mlir:Pass] Generate a reproducer as early as possible

This avoids keeping references to passes that may be freed by
the time that the pass manager has finished executing (in the
non-crash case).

Fixes PR#52069

Differential Revision: https://reviews.llvm.org/D111106
The file was modifiedmlir/lib/Pass/PassCrashRecovery.cpp
The file was modifiedmlir/test/lib/Pass/TestDynamicPipeline.cpp
The file was addedmlir/test/Pass/crash-recovery-dynamic-failure.mlir
Commit c608b49d67e0c22cc3537569f76af500097cd3b4 by listmail
[SCEV] Tweak the algorithm for figuring out if flags must apply to a SCEV [mostly-NFC]

Behavior wise, this patch should be mostly NFC.  The only behavior difference known is that on the isSCEVExprNeverPoison path we'll consider a bound imposed by the SCEVable operands (if any).

Algorithmically, it's an invert of the existing code.  Previously, we checked for each operand if we could find a bound, then checked for must-execute given that bound.  With the patch, we use dominance to refine the innermost bound, then check must execute once.  The interesting case is when we have multiple unknowns within a single basic block.  While both dominance and must-execute are worst-case linear walks within the block, only dominance is cached.  As such, refining based on dominance should be more efficient.
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was modifiedllvm/include/llvm/Analysis/ScalarEvolution.h
Commit cc1d13f997f6db6f2e6c209b9449695b91a68e32 by pklausler
[flang] Fold MAXLOC and MINLOC

Generalize the code that folds FINDLOC to also handle
folding for MAXLOC and MINLOC.

Differential Revision: https://reviews.llvm.org/D110951
The file was modifiedflang/lib/Evaluate/fold-real.cpp
The file was modifiedflang/lib/Evaluate/fold-integer.cpp
The file was modifiedflang/lib/Evaluate/fold-reduction.h
The file was modifiedflang/include/flang/Evaluate/type.h
The file was modifiedflang/test/Evaluate/folding30.f90
The file was modifiedflang/lib/Evaluate/fold-character.cpp
Commit 7a89444cd99ceea8ee8d11f6cf4834680bbf26a0 by antiagainst
[mlir][spirv] Add ops and patterns for lowering standard max/min ops

Reviewed By: ThomasRaoux

Differential Revision: https://reviews.llvm.org/D111143
The file was modifiedmlir/include/mlir/Dialect/SPIRV/IR/SPIRVGLSLOps.td
The file was modifiedmlir/lib/Conversion/StandardToSPIRV/StandardToSPIRV.cpp
The file was modifiedmlir/test/Conversion/StandardToSPIRV/std-ops-to-spirv.mlir
The file was modifiedmlir/test/Target/SPIRV/glsl-ops.mlir
The file was modifiedmlir/test/Dialect/SPIRV/IR/glsl-ops.mlir
Commit d9346f525595da11a5a24db3c541efcd95ac3df0 by Louis Dionne
[libc++abi] Mark __cxa_new_handler with _LIBCPP_SAFE_STATIC

For consistency with the other handlers, and because requiring constant
initialization whenever we can is a good thing.

Differential Revision: https://reviews.llvm.org/D110866
The file was modifiedlibcxxabi/src/cxa_default_handlers.cpp
Commit fc66dbba1fe0a3120abd98134a1a8aebfede8553 by clementval
[fir] Add external name interop pass

Add the external name conversion pass needed for compiler
interoperability. This pass convert the Flang internal symbol name to
the common gfortran convention.

Clean up old passes without implementation in the Passes.ts file so
the project and fir-opt can build correctly.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: schweitz

Differential Revision: https://reviews.llvm.org/D111057
The file was addedflang/lib/Optimizer/Transforms/PassDetail.h
The file was modifiedflang/tools/fir-opt/fir-opt.cpp
The file was modifiedflang/unittests/Optimizer/InternalNamesTest.cpp
The file was modifiedflang/include/flang/Optimizer/Support/InternalNames.h
The file was modifiedflang/include/flang/Optimizer/Transforms/Passes.td
The file was addedflang/test/Fir/external-mangling.fir
The file was modifiedflang/include/flang/Optimizer/Transforms/Passes.h
The file was modifiedflang/lib/Optimizer/Support/InternalNames.cpp
The file was addedflang/lib/Optimizer/Transforms/ExternalNameConversion.cpp
The file was addedflang/test/Fir/external-mangling-emboxproc.fir
The file was modifiedflang/lib/Optimizer/Transforms/CMakeLists.txt
The file was modifiedflang/tools/fir-opt/CMakeLists.txt
Commit f92961d238efdfeccce27f9bb7b0a6629c376d4a by lebedev.ri
[NFC] Fixup newly-added costmodel tests to actually test what they should
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-2-indices-0u.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4-indices-01uu.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-3-indices-01u.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-3-indices-0uu.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4-indices-012u.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4-indices-0uuu.ll
Commit 730fca46fc87dad09040cb0b27ede10ae2c7c9d7 by Jonas Devlieghere
[lldb] Improve meta data stripping from JSON crashlogs

JSON crashlogs normally start with a single line of meta data that we
strip unconditionally. Some producers started omitting the meta data
which tripped up crashlog. Be more resilient by only removing the first
line when we know it really is meta data.

rdar://82641662
The file was modifiedlldb/examples/python/crashlog.py
The file was modifiedlldb/test/Shell/ScriptInterpreter/Python/Crashlog/patch-crashlog.py
The file was modifiedlldb/test/Shell/ScriptInterpreter/Python/Crashlog/json.test
Commit 6fab808f6f1bc935d7a74ff2ab002ccfa7dd806c by Vitaly Buka
[NFC][sanitizer] Combine MSAN data in single field

Reviewed By: morehouse

Differential Revision: https://reviews.llvm.org/D111118
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_stackdepot.cpp
Commit 84afd0252504bcce91da9337ad2a852f4df32290 by Vitaly Buka
[sanitizer] Fix Android bot

We don't need to check for equality, we need to check
that storage is large enough.
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_stackdepot.cpp
Commit 94c1c56cc54b809d70d0b13a7334654402d775f1 by listmail
[tests] Cover cases we could infer SCEV flags, but don't
The file was modifiedllvm/test/Analysis/ScalarEvolution/flags-from-poison.ll
Commit 0be9940ef240d04111c7ef7df360c3b4209dfdea by nikita.ppv
[SCEV] Don't check if propagation safe if there are no flags (NFC)

If there are no nowrap flags, then we don't need to determine
whether propagating flags is safe -- it will make no difference.
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
Commit 8fe128476eb85ba582c477f61bc8ed003dd04f03 by sbc
[lld][WebAssembly] Create optional internal symbols only after LTO object as been added

This is important for the cases where new symbols can be introduced
during LTO.   Specifically this happens for during TLS-lowering where
references to `__tls_base` can be introduced.

Fixes: https://github.com/emscripten-core/emscripten/issues/12489

Differential Revision: https://reviews.llvm.org/D111171
The file was modifiedlld/wasm/Driver.cpp
The file was modifiedlld/wasm/SymbolTable.cpp
The file was addedlld/test/wasm/lto/tls.ll
Commit 668beb8ae8ddf53e0f3dcb21eb99cd4848f6bfc1 by spatel
[InstCombine] refactor folds of 'not' instructions; NFC

This removes repeated calls to m_Not, so hopefully a little
more efficient.

Also, we may need to enhance some of these blocks to allow
logical and/or (select of bools).
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineInternal.h
Commit 1ddcb804f7e4883bda1877d0e5f9cfda70edc803 by aaron
Update the release notes for consteval if support; NFC

This support was landed in 424733c12aacc227a28114deba72061153f8dff2.
The file was modifiedclang/docs/ReleaseNotes.rst
Commit 939712734a563dd4d12b88f875d9c8e2b0fa6219 by aaron
Fix some Sphinx warnings in the static analyzer docs

A heading wasn't underlined properly, and two links share the same text
and so they should use an anonymous hyperlink instead of a named one.
The file was modifiedclang/docs/analyzer/checkers.rst
Commit 7c9d9e4e643f62de1879fea0bcfbc24cd645834c by Louis Dionne
[libc++] Run the no-unicode CI job on new testing configs

This was most likely an oversight, since we're running all other jobs on
the new configs.

Differential Revision: https://reviews.llvm.org/D111168
The file was modifiedlibcxx/utils/ci/run-buildbot
Commit 7d541eb4d49aaaab6a51a3568b9214fd8691e2d3 by mtrofin
[inliner] Mandatory inlining decisions produce remarks

This also removes the need to disable the mandatory inlining phase in
tests.

In a departure from the previous remark, we don't output a 'cost' in
this case, because there's no such thing. We just report that inlining
happened because of the attribute.

Differential Revision: https://reviews.llvm.org/D110891
The file was modifiedllvm/lib/Transforms/IPO/Inliner.cpp
The file was modifiedclang/test/Frontend/optimization-remark-line-directive.c
The file was modifiedclang/test/Frontend/optimization-remark-with-hotness-new-pm.c
The file was modifiedllvm/lib/Analysis/InlineAdvisor.cpp
The file was modifiedllvm/lib/Transforms/IPO/SampleProfile.cpp
The file was modifiedclang/test/Frontend/optimization-remark-new-pm.c
The file was modifiedllvm/lib/Transforms/IPO/AlwaysInliner.cpp
The file was modifiedclang/test/Frontend/optimization-remark.c
The file was addedllvm/test/Transforms/Inline/inline-remark-mandatory.ll
The file was modifiedllvm/include/llvm/Analysis/InlineAdvisor.h
Commit 5020e104a1349a0ae6532b007b48c68b8f64c049 by listmail
[test] rework recently added SCEV tests

These are meant to check a future patch which recurses through operands of SCEVs, but because all SCEVs are trivially bounded by function entry, we need to arrange the trivial scope not to be valid.  (i.e. we specifically need a lower defining scope)
The file was modifiedllvm/test/Analysis/ScalarEvolution/flags-from-poison.ll
Commit c59c32caa059868c31139b0b6e7e892c7244cefc by listmail
[test] factor out reliance on noundef return value
The file was modifiedllvm/test/Analysis/ScalarEvolution/flags-from-poison.ll
Commit 9a9ec8e04b6b0b5124a4e77dbc0916b85f03f6ee by aheejin
[lld][WebAssembly] Remove redundant check for undefined global (NFC)

Also does some refactoring.

Reviewed By: sbc100

Differential Revision: https://reviews.llvm.org/D111101
The file was modifiedlld/wasm/Relocations.cpp
Commit a56257e45ef658bb946d9c607d0bbb6d9b820368 by spatel
[InstCombine] add tests for logical nand/nor; NFC
The file was modifiedllvm/test/Transforms/InstCombine/not.ll
Commit bc72baa04789d337bca0261d4a13a3851e11c5be by spatel
[InstCombine] add folds for logical nand/nor

This is noted as a regression in:
https://llvm.org/PR52077
The file was modifiedllvm/test/Transforms/InstCombine/not.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
Commit 4e8efff53e24e368a5f0aa309515d22a5b356d77 by zequanwu
[Profile] Add missing fflush in __llvm_profile_set_file_object
The file was modifiedcompiler-rt/lib/profile/InstrProfilingFile.c
Commit eaf2588a51bf2d36a6aec573cd92c351062fa7d5 by diegocaballero
[mlir][Linalg] Add support for min/max reduction vectorization in linalg.generic

This patch extends Linalg core vectorization with support for min/max reductions
in linalg.generic ops. It enables the reduction detection for min/max combiner ops.
It also renames MIN/MAX combining kinds to MINS/MAXS to make the sign explicit for
floating point and signed integer types. MINU/MAXU should be introduce din the future
for unsigned integer types.

Reviewed By: pifon2a, ThomasRaoux

Differential Revision: https://reviews.llvm.org/D110854
The file was modifiedmlir/test/Dialect/Vector/invalid.mlir
The file was modifiedmlir/test/Integration/Dialect/Vector/CPU/test-reductions-f32.mlir
The file was modifiedmlir/test/Dialect/Linalg/vectorization.mlir
The file was modifiedmlir/test/Integration/Dialect/Vector/CPU/test-reductions-ui4.mlir
The file was modifiedmlir/include/mlir/Dialect/Vector/VectorOps.td
The file was modifiedmlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
The file was modifiedmlir/test/Dialect/Vector/ops.mlir
The file was modifiedmlir/lib/Dialect/Vector/VectorTransforms.cpp
The file was modifiedmlir/test/Integration/Dialect/Vector/CPU/test-reductions-f64-reassoc.mlir
The file was modifiedmlir/test/Integration/Dialect/Vector/CPU/test-reductions-f64.mlir
The file was modifiedmlir/test/Integration/Dialect/Vector/CPU/test-reductions-si4.mlir
The file was modifiedmlir/test/Integration/Dialect/Vector/CPU/test-reductions-i32.mlir
The file was modifiedmlir/test/Dialect/Vector/vector-contract-matvec-transforms.mlir
The file was modifiedmlir/test/Integration/Dialect/Vector/CPU/test-reductions-f32-reassoc.mlir
The file was modifiedmlir/test/Dialect/Vector/vector-multi-reduction-outer-lowering.mlir
The file was modifiedmlir/lib/Dialect/Vector/VectorOps.cpp
The file was modifiedmlir/test/Integration/Dialect/Vector/CPU/test-reductions-i4.mlir
The file was modifiedmlir/test/Integration/Dialect/Vector/CPU/test-reductions-i64.mlir
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
Commit 54a8a0d09a572a0581c0755541847e016274e15c by Louis Dionne
[runtimes] Allow FOO_TEST_CONFIG to be a relative path

That makes it possible to store that value in a CMake cache if needed.

Differential Revision: https://reviews.llvm.org/D110843
The file was modifiedlibcxxabi/CMakeLists.txt
The file was modifiedlibcxx/CMakeLists.txt
The file was modifiedlibcxx/utils/ci/run-buildbot
The file was modifiedlibcxx/utils/ci/apple-install-libcxx.sh
The file was modifiedlibunwind/CMakeLists.txt
Commit d51f57c23ca95f4b9b383f0942fee2957d36fd4f by Louis Dionne
[libc++] Pickle substitutions to pass them to dsl.sh.py

This is less brittle than hand-picking the substitutions that we
pass to the test, since a config could theorically use non-base
substitutions as well (such as defining %{flags} in terms of another
substitution like %{include}).

Also, print the decoded substitutions, which makes it much easier
to debug the test when it fails.

Differential Revision: https://reviews.llvm.org/D111179
The file was modifiedlibcxx/test/libcxx/selftest/dsl/dsl.sh.py
The file was modifiedlibcxx/test/libcxx/selftest/dsl/lit.local.cfg
Commit 3ec1760d91a38e30d9535c313e4231e332910dd3 by aheejin
[WebAssembly] Remove WasmTagType

This removes `WasmTagType`. `WasmTagType` contained an attribute and a
signature index:
```
struct WasmTagType {
  uint8_t Attribute;
  uint32_t SigIndex;
};
```

Currently the attribute field is not used and reserved for future use,
and always 0. And that this class contains `SigIndex` as its property is
a little weird in the place, because the tag type's signature index is
not an inherent property of a tag but rather a reference to another
section that changes after linking. This makes tag handling in the
linker also weird that tag-related methods are taking both `WasmTagType`
and `WasmSignature` even though `WasmTagType` contains a signature
index. This is because the signature index changes in linking so it
doesn't have any info at this point. This instead moves `SigIndex` to
`struct WasmTag` itself, as we did for `struct WasmFunction` in D111104.

In this CL, in lib/MC and lib/Object, this now treats tag types in the
same way as function types. Also in YAML, this removes `struct Tag`,
because now it only contains the tag index. Also tags set `SigIndex` in
`WasmImport` union, as functions do.

I think this makes things simpler and makes tag handling more in line
with function handling. These two shares similar properties in that both
of them have signatures, but they are kind of nominal so having the same
signature doesn't mean they are the same element.

Also a drive-by fix: the reserved 'attirubute' part's encoding changed
from uleb32 to uint8 a while ago. This was fixed in lib/MC and
lib/Object but not in YAML. This doesn't change object files because the
field's value is always 0 and its encoding is the same for the both
encoding.

This is effectively NFC; I didn't mark it as such just because it
changed YAML test results.

Reviewed By: sbc100, tlively

Differential Revision: https://reviews.llvm.org/D111086
The file was modifiedlld/wasm/SymbolTable.cpp
The file was modifiedllvm/test/MC/WebAssembly/tag-section-decoding.ll
The file was modifiedlld/include/lld/Common/LLVM.h
The file was modifiedlld/wasm/InputElement.h
The file was modifiedlld/test/wasm/tag-section.ll
The file was modifiedllvm/lib/Object/WasmObjectFile.cpp
The file was modifiedllvm/include/llvm/ObjectYAML/WasmYAML.h
The file was modifiedllvm/lib/ObjectYAML/WasmEmitter.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
The file was modifiedlld/wasm/Symbols.h
The file was modifiedllvm/include/llvm/MC/MCSymbolWasm.h
The file was modifiedllvm/test/MC/WebAssembly/tag-section.ll
The file was modifiedllvm/lib/MC/WasmObjectWriter.cpp
The file was modifiedlld/wasm/Symbols.cpp
The file was modifiedllvm/include/llvm/BinaryFormat/Wasm.h
The file was modifiedllvm/include/llvm/Object/Wasm.h
The file was modifiedlld/wasm/SyntheticSections.cpp
The file was modifiedllvm/test/ObjectYAML/wasm/event_section.yaml
The file was modifiedlld/wasm/InputFiles.cpp
The file was modifiedllvm/lib/ObjectYAML/WasmYAML.cpp
The file was modifiedlld/wasm/WriterUtils.cpp
The file was modifiedlld/wasm/WriterUtils.h
The file was modifiedllvm/tools/obj2yaml/wasm2yaml.cpp
Commit 84b0b52b036cc1fbe2b88038fd700e83b7b67055 by Louis Dionne
[libc++] Refactor how basic_string and vector hoist exception-throwing functions

In basic_string and vector, we've been encapsulating all exception
throwing code paths in helper functions of a base class, which are defined
in the compiled library. For example, __vector_base_common defines two
methods, __throw_length_error() and __throw_out_of_range(), and the class
is externally instantiated in the library. This was done a long time ago,
but after investigating, I believe the goal of the current design was to:

1. Encapsulate the code to throw an exception (which is non-trivial) in
   an externally-defined function so that the important code paths that
   call it (e.g. vector::at) are free from that code. Basically, the
   intent is for the "hot" code path to contain a single conditional jump
   (based on checking the error condition) to an externally-defined function,
   which handles all the exception-throwing business.

2. Avoid defining this exception-throwing function once per instantiation
   of the class template. In other words, we want a single copy of
   __throw_length_error even if we have vector<int>, vector<char>, etc.

3. Encapsulate the passing of the container-specific string (i.e. "vector"
   and "basic_string") to the underlying exception-throwing function
   so that object files don't contain those duplicated string literals.
   For example, we'd like to have a single "vector" string literal for
   passing to `std::__throw_length_error` in the library, instead of
   having one per translation unit.

However, the way this is achieved right now has two problems:

- Using a base class and exporting it is really weird - I've been confused
  about this ever since I first saw it. It's just a really unusual way of
  achieving the above goals. Also, it's made even worse by the fact that
  the definitions of __throw_length_error and __throw_out_of_range appear
  in the headers despite always being intended to be defined in the compiled
  library (via the extern template instantiation).

- We end up exporting those functions as weak symbols, which isn't great
  for load times. Instead, it would be better to export those as strong
  symbols from the library.

This patch fixes those issues while retaining ABI compatibility (e.g. we
still export the exact same symbols as before). Note that we need to
keep the base classes as-is to avoid breaking the ABI of someone who
might inherit from std::basic_string or std::vector.

Differential Revision: https://reviews.llvm.org/D111173
The file was modifiedlibcxx/include/vector
The file was modifiedlibcxx/src/vector.cpp
The file was modifiedlibcxx/src/string.cpp
The file was modifiedlibcxx/include/string
Commit adf7043a9fbafc35add555b8542a198c1c678cb7 by carl.ritson
[AMDGPU] Only remove branches in SIInstrInfo::removeBranch

Without this change _term instructions can be removed during
critical edge splitting.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D111126
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/artificial-terminators.mir
Commit d652724c0b9eb313b1b87fd9d859e9141b0b014e by listmail
[test] refresh a couple of autogen tests
The file was modifiedllvm/test/Transforms/LoopVectorize/loop-form.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/multilevel-break.ll
Commit e2f150c3cf8bcc9addcb6023ac4f73ff841838d2 by listmail
[docs] Expand the pre-merge testing description a bit

Core changes are:

    Be explicit about desired balance between missing true positives and reporting false positives.
    Mention the opt-out mechanism.
    Provide links to background, and give description of who to contact if needed.

Differential Revision: https://reviews.llvm.org/D110873
The file was modifiedllvm/docs/Phabricator.rst
Commit 7e390dfea704862685fbb092e1838f1bd5d2c6cc by kpyzhov
[AMDGPU] Correction to 095c48fdf3d27a4f346f8680d1d7e89449bb557b.

Differential Revision: https://reviews.llvm.org/D110337
The file was modifiedllvm/lib/Transforms/Utils/AMDGPUEmitPrintf.cpp
Commit e64ed3c8dff9f458b658106dc70471c33fa444c3 by listmail
[test] autogen a couple of additional tests
The file was modifiedllvm/test/Analysis/ScalarEvolution/trip-count-negative-stride.ll
The file was modifiedllvm/test/Transforms/JumpThreading/unreachable-loops.ll
Commit d60bfa6f193c0d67fadf052e5c65ceb7e1b68b63 by listmail
Address a rst format error caught by buildbot
The file was modifiedllvm/docs/Phabricator.rst
Commit 00b7d951828cdc56eab1ff7658214ffc4675ee0d by joker.eph
Stop stripping the `std.` prefix when printing operations in a region with a defined default dialect

This fixes round-trip / ambiguity when an operation in the standard dialect would
have the same name as an operation in the default dialect.

Differential Revision: https://reviews.llvm.org/D111204
The file was modifiedmlir/lib/IR/Operation.cpp
The file was modifiedmlir/test/IR/parser.mlir
Commit 2167bc1b0510329fafdda8542ac6610abeaf6e15 by Lang Hames
[JITLink][MachO][arm64] Make testcase less brittle.

The operand value is sign extended, so the test broke when sections were
re-ordered. The new test should be robust to reorderings.
The file was modifiedllvm/test/ExecutionEngine/JITLink/AArch64/MachO_arm64_relocations.s
Commit 02c018394e8a9feb08755421d84b392ed6e0a832 by forster
(test commit) Fix capitalization in README.md

This commit primarily checks that my newly acquired commit access works.
But this is also a real spelling fix.
The file was modifiedREADME.md
Commit dc603b0e53053772f48f13e1f8a3186f1e9990c7 by Vitaly Buka
[NFC][sanitizer] Add basic hash test

Differential Revision: https://reviews.llvm.org/D111176
The file was modifiedcompiler-rt/lib/sanitizer_common/tests/CMakeLists.txt
The file was addedcompiler-rt/lib/sanitizer_common/tests/sanitizer_hash_test.cpp
Commit 5ae9a3e4bf9351b0bc596bd4a9ec8e881377924d by Vitaly Buka
[NFC][sanitizer] Add MurMur2Hash64Builder

Depends on D111176.

Differential Revision: https://reviews.llvm.org/D111177
The file was modifiedcompiler-rt/lib/sanitizer_common/tests/sanitizer_hash_test.cpp
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_hash.h
Commit 3129aa5caf1f9b5c48ab708f43cb3fc5173dd021 by Vitaly Buka
[NFC][sanitizers] Add StackDepotBase Node::hash_type

Depends on D111177.

Differential Revision: https://reviews.llvm.org/D111182
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_stackdepotbase.h
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_stackdepot.cpp
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_chained_origin_depot.h
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_chained_origin_depot.cpp

Summary

  1. clang-ve-ninja: Fix source path (details)
  2. Disable bindings on x86_64-debian-dylib builder (details)
  3. clang-ve-ninja: remove redundant quotes (details)
Commit c2a8bb315f7f200fe51cdf13d4e03fd45318bef9 by simon.moll
clang-ve-ninja: Fix source path
The file was modifiedzorg/buildbot/builders/annotated/ve-linux.py
Commit e68798410bd09d03914e71bef646dd0d910bbc1f by 49720664+tbaederr
Disable bindings on x86_64-debian-dylib builder

The tests for the OCaml bindings fail when using the llvm.so dylib.
The file was modifiedbuildbot/osuosl/master/config/builders.py
Commit 6f05a8069dba47b1489c8117767d9be6c9ec327a by simon.moll
clang-ve-ninja: remove redundant quotes
The file was modifiedzorg/buildbot/builders/annotated/ve-linux.py