Commit
9bf5d91361655eaaea20006dc9a4a92d212323d2
by mikael.holmen[GlobalISel] Silence gcc warning about unused variable
|
 | llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp |
Commit
06404d5488ea505b00f711393973db3ae32d01e9
by Saiyedul.Islam[Clang][OpenMP] Fix windows buildbot failure for D105191
Fixes 4c4117089599cb5b6c6fa5635c28462ffd1bddf4.
|
 | clang/lib/Driver/ToolChains/Clang.cpp |
Commit
3fe7fe44249b0c640031a09800f3485a06a61d2d
by gysit[mlir][linalg] Add unsigned min/max/cast function to OpDSL.
Update OpDSL to support unsigned integers by adding unsigned min/max/cast signatures. Add tests in OpDSL and on the C++ side to verify the proper signed and unsigned operations are emitted.
The patch addresses an issue brought up in https://reviews.llvm.org/D111170.
Reviewed By: rsuderman
Differential Revision: https://reviews.llvm.org/D111230
|
 | mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp |
 | mlir/test/mlir-linalg-ods-gen/test-linalg-ods-yaml-gen.yaml |
 | mlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-yaml-gen.cpp |
 | mlir/python/mlir/dialects/linalg/opdsl/lang/scalar_expr.py |
 | mlir/test/python/dialects/linalg/opdsl/emit_structured_generic.py |
 | mlir/python/mlir/dialects/linalg/opdsl/ops/core_named_ops.py |
 | mlir/test/Dialect/Linalg/generalize-named-polymorphic-ops.mlir |
 | mlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOps.yaml |
 | mlir/python/mlir/dialects/linalg/opdsl/lang/emitter.py |
 | mlir/python/mlir/dialects/linalg/opdsl/lang/comprehension.py |
Commit
da5937654691d3287c36b00641867a427b3adfb1
by david.spickett[libcxx][CI] Install all locales used by the test suite
Reviewed By: #libc, ldionne
Differential Revision: https://reviews.llvm.org/D111235
|
 | libcxx/utils/ci/Dockerfile |
Commit
17608d345f69af8e2c7aefcf7952aba2ffc38c0e
by david.spickett[libcxx][pretty printers] Correct locale for u16/u32 string tests
When the locale is not some UTF-8 these tests fail. (different results for python2 linked gdbs vs. python3 but same issue)
Setting the locale just for the test works around this. By default Ubuntu comes with just C.UTF-8. I've chosen to use en_US.UTF-8 instead given that my Mac doesn't have the former and there's a slim chance this test might run there.
This also enables the u16string tests which are now passing.
Reviewed By: #libc, ldionne, saugustine
Differential Revision: https://reviews.llvm.org/D111138
|
 | libcxx/test/libcxx/gdb/gdb_pretty_printer_test.sh.cpp |
Commit
09fdfd03ea59604c54bf8aebc69a042c832090e7
by flo[VPlan] Replace hard-coded VPValue ids with patterns in tests.
This makes the tests a bit more robust with respect to small changes in the value numbering.
|
 | llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge.ll |
 | llvm/test/Transforms/LoopVectorize/vplan-printing.ll |
 | llvm/test/Transforms/LoopVectorize/first-order-recurrence-sink-replicate-region.ll |
Commit
42ba79b7b025c97c3aff2b958f18be90e70239f2
by cullen.rhodes[AArch64][SME] Update tile slice index offset
Changes in architecture revision 00eac1: * Tile slice index offset no longer prefixed with '#'. * The syntax for 128-bit (.Q) ZA tile slice accesses must now include an explicit zero index.
The reference can be found here: https://developer.arm.com/documentation/ddi0602/2021-09
Reviewed By: david-arm
Differential Revision: https://reviews.llvm.org/D111212
|
 | llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp |
 | llvm/test/MC/AArch64/SME/str.s |
 | llvm/test/MC/AArch64/SME/st1b-diagnostics.s |
 | llvm/test/MC/AArch64/SME/st1b.s |
 | llvm/test/MC/AArch64/SME/st1h-diagnostics.s |
 | llvm/test/MC/AArch64/SME/ld1w.s |
 | llvm/test/MC/AArch64/SME/ld1w-diagnostics.s |
 | llvm/test/MC/AArch64/SME/mova.s |
 | llvm/test/MC/AArch64/SME/st1h.s |
 | llvm/test/MC/AArch64/SME/st1q-diagnostics.s |
 | llvm/test/MC/AArch64/SME/ldr.s |
 | llvm/test/MC/AArch64/SME/ld1b.s |
 | llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h |
 | llvm/lib/Target/AArch64/AArch64InstrFormats.td |
 | llvm/test/MC/AArch64/SME/ld1q-diagnostics.s |
 | llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp |
 | llvm/test/MC/AArch64/SME/ld1b-diagnostics.s |
 | llvm/test/MC/AArch64/SME/st1d-diagnostics.s |
 | llvm/test/MC/AArch64/SME/ld1d.s |
 | llvm/test/MC/AArch64/SME/st1w.s |
 | llvm/lib/Target/AArch64/SMEInstrFormats.td |
 | llvm/test/MC/AArch64/SME/ld1q.s |
 | llvm/test/MC/AArch64/SME/ld1d-diagnostics.s |
 | llvm/test/MC/AArch64/SME/st1d.s |
 | llvm/test/MC/AArch64/SME/st1q.s |
 | llvm/test/MC/AArch64/SME/ld1h-diagnostics.s |
 | llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp |
 | llvm/test/MC/AArch64/SME/ld1h.s |
 | llvm/test/MC/AArch64/SME/mova-diagnostics.s |
 | llvm/test/MC/AArch64/SME/st1w-diagnostics.s |
Commit
14cb138b15adafe7d4a1cd7cb2e836c40a5957b5
by cullen.rhodes[AArch64][SME] Update DUP (predicate) instruction
Changes in architecture revision 00eac1: * Renamed to PSEL. * Copies whole source register. * Element type suffix removed from destination. * Element index no longer optional and '#' prefix has been removed.
The reference can be found here: https://developer.arm.com/documentation/ddi0602/2021-09
Depends on D111212.
Reviewed By: kmclaughlin
Differential Revision: https://reviews.llvm.org/D111213
|
 | llvm/test/MC/AArch64/SME/dup-diagnostics.s |
 | llvm/test/MC/AArch64/SME/psel.s |
 | llvm/lib/Target/AArch64/SMEInstrFormats.td |
 | llvm/test/MC/AArch64/SME/dup.s |
 | llvm/test/MC/AArch64/SME/psel-diagnostics.s |
 | llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td |
Commit
2bb208ddfd700f0fdd3028f83eecd280a8d6f3b5
by akuegel[mlir] Don't allow dynamic extent tensor types for ConstShapeOp.
ConstShapeOp has a constant shape, so its type can always be static. We still allow it to have ShapeType though.
Differential Revision: https://reviews.llvm.org/D111139
|
 | mlir/test/Dialect/Shape/ops.mlir |
 | mlir/lib/Dialect/Shape/IR/Shape.cpp |
 | mlir/lib/Dialect/Shape/IR/ShapeCanonicalization.td |
 | mlir/test/Dialect/Shape/canonicalize.mlir |
Commit
85abedd75074bf574e8b012883b5490674037093
by jay.foad[TwoAddressInstruction] Pre-commit a test case for D110848
|
 | llvm/test/CodeGen/SystemZ/twoaddr-kill.mir |
Commit
df2d4bc4cbc0626364bd4c5fc8203a00fabcd0d5
by jay.foad[TwoAddressInstruction] Fix ReplacedAllUntiedUses in processTiedPairs
Fix the calculation of ReplacedAllUntiedUses when any of the tied defs are early-clobber. The effect of this is to fix the placement of kill flags on an instruction like this (from @f2 in test/CodeGen/SystemZ/asm-18.ll):
INLINEASM &"stepb $1, $2" [attdialect], $0:[regdef-ec:GRH32Bit], def early-clobber %3:grh32bit, $1:[reguse tiedto:$0], killed %4:grh32bit(tied-def 3), $2:[reguse:GRH32Bit], %4:grh32bit
After TwoAddressInstruction without this patch:
%3:grh32bit = COPY killed %4:grh32bit INLINEASM &"stepb $1, $2" [attdialect], $0:[regdef-ec:GRH32Bit], def early-clobber %3:grh32bit, $1:[reguse tiedto:$0], %3:grh32bit(tied-def 3), $2:[reguse:GRH32Bit], %4:grh32bit
Note that the COPY kills %4, even though there is a later use of %4 in the INLINEASM. This fails machine verification if you force it to run after TwoAddressInstruction (currently it is disabled for other reasons).
After TwoAddressInstruction with this patch:
%3:grh32bit = COPY %4:grh32bit INLINEASM &"stepb $1, $2" [attdialect], $0:[regdef-ec:GRH32Bit], def early-clobber %3:grh32bit, $1:[reguse tiedto:$0], %3:grh32bit(tied-def 3), $2:[reguse:GRH32Bit], %4:grh32bit
Differential Revision: https://reviews.llvm.org/D110848
|
 | llvm/test/CodeGen/SystemZ/twoaddr-kill.mir |
 | llvm/lib/CodeGen/TwoAddressInstructionPass.cpp |
Commit
202af507fd1832462ecaf5d9086624bd5f9601bb
by pavelRecommit: [lldb] Remove "dwarf dynamic register size expressions" from RegisterInfo
The previous version of the patch did not update the definitions in conditionally compiled code. This patch includes changes to ARC and windows targets.
Original commit message was:
These were added to support some mips registers on linux, but linux mips support has now been removed due.
They are still referenced in the freebds mips implementation, but the completeness of that implementation is also unknown. All other architectures just set these fields to zero, which is a cause of significant bloat in our register info definitions.
Arm also has registers with variable sizes, but they were implemented in a more gdb-compatible fashion and don't use this feature.
Differential Revision: https://reviews.llvm.org/D110914
|
 | lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.cpp |
 | lldb/source/Plugins/Process/Windows/Common/x86/RegisterContextWindows_x86.cpp |
 | lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp |
 | lldb/source/Plugins/Process/Utility/RegisterInfos_ppc64.h |
 | lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp |
 | lldb/source/Plugins/ABI/Mips/ABISysV_mips64.cpp |
 | lldb/include/lldb/Target/RegisterContext.h |
 | lldb/source/Plugins/Process/Utility/RegisterContextWindows_i386.cpp |
 | lldb/source/Target/DynamicRegisterInfo.cpp |
 | lldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.cpp |
 | lldb/unittests/Target/DynamicRegisterInfoTest.cpp |
 | lldb/source/Plugins/Process/Utility/RegisterInfos_arm64_sve.h |
 | lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm.cpp |
 | lldb/source/Plugins/Process/Utility/RegisterInfos_i386.h |
 | lldb/source/Plugins/ABI/ARM/ABISysV_arm.cpp |
 | lldb/unittests/tools/lldb-server/tests/MessageObjects.cpp |
 | lldb/source/Plugins/ABI/SystemZ/ABISysV_s390x.cpp |
 | lldb/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.cpp |
 | lldb/source/Plugins/Process/Windows/Common/arm/RegisterContextWindows_arm.cpp |
 | lldb/source/Plugins/ABI/Mips/ABISysV_mips.cpp |
 | lldb/source/Plugins/Process/Utility/RegisterInfos_x86_64.h |
 | lldb/source/Plugins/ABI/ARC/ABISysV_arc.cpp |
 | lldb/source/Plugins/ABI/PowerPC/ABISysV_ppc.cpp |
 | lldb/source/Plugins/Process/minidump/RegisterContextMinidump_ARM.cpp |
 | lldb/source/Plugins/Process/Utility/RegisterContextDarwin_i386.cpp |
 | lldb/include/lldb/Target/DynamicRegisterInfo.h |
 | lldb/source/Plugins/Process/Utility/RegisterInfos_ppc64le.h |
 | lldb/source/Plugins/Process/Windows/Common/arm64/RegisterContextWindows_arm64.cpp |
 | lldb/source/Plugins/ABI/Hexagon/ABISysV_hexagon.cpp |
 | lldb/source/Plugins/Process/Utility/RegisterInfos_arm.h |
 | lldb/source/Plugins/Process/Utility/RegisterInfos_powerpc.h |
 | lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp |
 | lldb/include/lldb/lldb-private-types.h |
 | lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h |
 | lldb/source/Target/RegisterContext.cpp |
 | lldb/source/Plugins/Instruction/ARM64/EmulateInstructionARM64.cpp |
 | lldb/source/Plugins/Process/Utility/RegisterContextWindows_x86_64.cpp |
 | lldb/source/Plugins/Process/Utility/RegisterInfos_mips64.h |
 | lldb/source/Plugins/ABI/ARM/ABIMacOSX_arm.cpp |
 | lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm.cpp |
 | lldb/source/Plugins/Process/Utility/RegisterInfos_s390x.h |
 | lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h |
 | lldb/source/Plugins/Process/minidump/RegisterContextMinidump_ARM64.cpp |
 | lldb/source/Plugins/Process/Utility/RegisterContextLinux_x86_64.cpp |
 | lldb/source/Plugins/Process/Windows/Common/x64/RegisterContextWindows_x64.cpp |
 | lldb/source/Plugins/Process/Utility/RegisterContextLinux_i386.cpp |
Commit
88f08899da965f232d4c67842d5932481ea534fe
by david.spickett[libcxx][pretty printers] Report not being able to trace test program
If you don't have ptrace permissions this test will fail to run silently, this adds a check for that and anything else that might do similar things.
The output will now be: ``` FAILED test program did not run correctly, check gdb warnings
/usr/bin/gdb: warning: Couldn't determine a path for the index cache directory. No symbol table is loaded. Use the "file" command. warning: Error disabling address space randomization: Operation not permitted warning: Could not trace the inferior process. warning: ptrace: Operation not permitted
error: command failed with exit status: 255 ```
We already have a feature to check for a compatible python enabled gdb, so I think it's reasonable to check for this at test runtime.
Note that this is different to the catch all at the end of the test script. That would be a case where you can trace but something else made it stop mid way that wasn't our test breakpoints.
Reviewed By: saugustine
Differential Revision: https://reviews.llvm.org/D110936
|
 | libcxx/test/libcxx/gdb/gdb_pretty_printer_test.py |
Commit
bf916cdbd25db138baa7dd9a1a6bfe40005c481c
by david.green[ARM] Add tests for code that spills in tail predicate loops.
|
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/spillingmove.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/spillingmove.ll |
Commit
b7ac68d01ef9a126ea0eb26b3526a78c9d39533a
by 1.int32[clang][ASTImporter] Simplify code of attribute import [NFC].
The code of `ASTImporter::Import(const Attr *)` was repetitive, it is now simplified. (There is still room for improvement but probably only after big changes.)
Reviewed By: martong, steakhal
Differential Revision: https://reviews.llvm.org/D110810
|
 | clang/lib/AST/ASTImporter.cpp |
Commit
0c554a4769f2e21233b687c7427c1a47f7bd375e
by jonathanchesterfield[libomptarget] Move device environment to shared header, remove divergence
Follow on to D110006, related to D110957
Where implementations have diverged this resolves to match the new DeviceRTL
- replaces definitions of this struct in deviceRTL and plugins with include - changes the dynamic_shared_size field from D110006 to 32 bits - handles stdint being unavailable in DeviceRTL - adds a zero initializer for the field to amdgpu - moves the extern declaration for deviceRTL to target_interface (omptarget.h is more natural, but doesn't work due to include order with debug.h) - Renames the fields everywhere to match the LLVM format used in DeviceRTL - Makes debug_level uint32_t everywhere (previously sometimes int32_t)
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D111069
|
 | openmp/libomptarget/plugins/cuda/src/rtl.cpp |
 | openmp/libomptarget/deviceRTLs/nvptx/CMakeLists.txt |
 | openmp/libomptarget/include/DeviceEnvironment.h |
 | openmp/libomptarget/plugins/amdgpu/src/rtl.cpp |
 | openmp/libomptarget/deviceRTLs/common/device_environment.h |
 | openmp/libomptarget/deviceRTLs/target_interface.h |
 | openmp/libomptarget/deviceRTLs/common/debug.h |
 | openmp/libomptarget/deviceRTLs/common/src/omp_data.cu |
 | openmp/libomptarget/DeviceRTL/CMakeLists.txt |
 | openmp/libomptarget/DeviceRTL/src/Configuration.cpp |
 | openmp/libomptarget/deviceRTLs/amdgcn/CMakeLists.txt |
Commit
05910b6bebb6b285b09e98a950cf731915a3b27d
by llvm-devScalarEvolution.h - remove unused Hashing.h include
|
 | llvm/include/llvm/Analysis/ScalarEvolution.h |
Commit
e5fa68457a2e50cc0d27c0a5044be398dd9c9161
by llvm-dev[ExecutionEngine] remove unused <string> includes
|
 | llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldELFMips.h |
 | llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldMachOX86_64.h |
 | llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldMachOARM.h |
 | llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldMachOI386.h |
Commit
bb8dfefb23ad09dd8396ba11dd49e49e745ac582
by llvm-devMCSchedule.h - remove unused Optional.h include
|
 | llvm/include/llvm/MC/MCSchedule.h |
Commit
b4f4bc0a68d395e640dfc1654d8c0ced1013ed51
by llvm-devTargetSchedule.h - remove unused Optional.h include
|
 | llvm/include/llvm/CodeGen/TargetSchedule.h |
Commit
430ab92910e2423e61e55c9b396ba4c54105fe2b
by llvm-devFunctionLoweringInfo.h - remove unused Optional.h include
|
 | llvm/include/llvm/CodeGen/FunctionLoweringInfo.h |
Commit
81a2f39307a1f2169203abeb66c7bb00b5496edc
by pavel[lldb/gdb-remote] Delete SendPacketsAndConcatenateResponses
ReadExtFeature provides equivalent functionality. Also fix a but in ReadExtFeature, which prevented it from being used for auxv data (it contains nul characters).
|
 | lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.h |
 | lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp |
 | lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp |
Commit
322e13b91aac23ab324c3dcbbcfe8e73894f4c28
by Raphael Isemann[lldb] Rewrite/expand TestCppTypedef and document a lookup bug.
Just regrouping the checks for the same typedef together and also giving the different typedefs unique names. We might want to have a second test with identical names to see how LLDB handle the potential name conflict, but that should be a separate test and not part of the main typedef test.
Also this test is actually unintentionally passing. LLDB can't lookup typedefs in a struct/class scope, but in the test the check passes as the local variable in the expression evaluation scope pulls in the typedef. I added a second check that makes it clear that this is not working right now.
|
 | lldb/test/API/lang/cpp/typedef/TestCppTypedef.py |
 | lldb/test/API/lang/cpp/typedef/main.cpp |
Commit
b5d6ad20e182318b2048a923eac56a198250ed0a
by carl.ritson[MachineCopyPropagation] Handle propagation of undef copies
When propagating undefined copies the undef flag must also be propagated.
Reviewed By: foad
Differential Revision: https://reviews.llvm.org/D111219
|
 | llvm/test/CodeGen/AMDGPU/undef-copy-propagation.mir |
 | llvm/lib/CodeGen/MachineCopyPropagation.cpp |
Commit
73346f58486d29c0d2687af1208fa146168d62d8
by david.green[ARM] Introduce a MQPRCopy
Currently when creating tail predicated loops, we need to validate that all the live-outs of a loop will be equivalent with and without tail predication, and if they are not we cannot legally create a tail-predicated loop, leaving expensive vctp and vpst instructions in the loop. These notably can include register-allocation instructions like stack loads and stores, and copys lowered from COPYs to MVE_VORRs.
Instead of trying to prove this is valid late in the pipeline, this patch introduces a MQPRCopy pseudo instruction that COPY is lowered to. This can then either be converted to a MVE_VORR where possible, or to a couple of VMOVD instructions if not. This way they do not behave differently within and outside of tail-predications regions, and we can know by construction that they are always valid. The idea is that we can do the same with stack load and stores, converting them to VLDR/VSTR or VLDM/VSTM where required to prove tail predication is always valid.
This does unfortunately mean inserting multiple VMOVD instructions, instead of a single MVE_VORR, but my experiments show it to be an improvement in general.
Differential Revision: https://reviews.llvm.org/D111048
|
 | llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp |
 | llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/spillingmove.mir |
 | llvm/lib/Target/ARM/ARMInstrMVE.td |
 | llvm/unittests/Target/ARM/MachineInstrTest.cpp |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/spillingmove.ll |
Commit
7ee133d3fce730d39dba68b81d8ab2285ba8b349
by david.spickett[libcxx][pretty printers] Correct tests run detection
Missing "global" meant that we set a local "has_run_tests" so the global was False by the time everything has run.
|
 | libcxx/test/libcxx/gdb/gdb_pretty_printer_test.py |
Commit
1bf05fbc987dddebe94de7b33d810d8221eda1a5
by czhengsz[PowerPC] refactor rewriteLoadStores for reusing; nfc
This is split from https://reviews.llvm.org/D108750. Refactor rewriteLoadStores() so that we can reuse the outlined functions.
Reviewed By: jsji
Differential Revision: https://reviews.llvm.org/D110314
|
 | llvm/lib/Target/PowerPC/PPCLoopInstrFormPrep.cpp |
Commit
53801a59eb05863cc90c76911dd18117922a5fe1
by forsterFix two unused-variable warnings.
|
 | llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp |
Commit
8276ac13e91b16771da4b1e1fb5dd24e00a24879
by ezhulenev[mlir] Add alignment attribute to memref.global
Revived https://reviews.llvm.org/D102435
Add alignment attribute to `memref.global` and propagate it to llvm global in memref->llvm lowering
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D111309
|
 | mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td |
 | mlir/lib/Dialect/StandardOps/Transforms/TensorConstantBufferize.cpp |
 | mlir/test/Dialect/MemRef/invalid.mlir |
 | mlir/test/Conversion/MemRefToLLVM/memref-to-llvm.mlir |
 | mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp |
 | mlir/lib/Conversion/MemRefToLLVM/MemRefToLLVM.cpp |
Commit
6b1f653c94c0d5de8bb954286bf144f129fdb7ff
by springerm[mlir][linalg][bufferize] tensor.cast may require a copy
Differential Revision: https://reviews.llvm.org/D110806
|
 | mlir/lib/Dialect/Linalg/Transforms/ComprehensiveBufferize.cpp |
 | mlir/test/Dialect/Linalg/comprehensive-module-bufferize.mlir |
Commit
1d24b8c6038e4a0f076985a536779b6eeea358c7
by springerm[mlir][linalg][bufferize][NFC] Change bufferizableInPlaceAnalysis signature
Move getInplaceableOpResult() call into bufferizableInPlaceAnalysis.
Note: The only goal of this change is to make the signature of bufferizableInPlaceAnalysis smaller. (Fewer arguments.)
Differential Revision: https://reviews.llvm.org/D110915
|
 | mlir/lib/Dialect/Linalg/Transforms/ComprehensiveBufferize.cpp |
Commit
2baf7ad6d27fc9c08dd6eb9f8581d7e1353d4ece
by Saiyedul.Islam[Clang][OpenMP] Fix fat archive tests for Mac and Windows
Fixes missing libomptarget on Mac and Windows in check lines. Issue was introduced by D105191.
Differential Revision: https://reviews.llvm.org/D111311
|
 | clang/test/Driver/fat_archive_amdgpu.cpp |
 | clang/test/Driver/fat_archive_nvptx.cpp |
Commit
3964c1db915b00fffb77764892b890a3075e181e
by antiagainst[mlir][vector] Split populateVectorContractLoweringPatterns
It was bundling quite a lot of patterns that convert high-D vector ops into low-D elementary ops. It might not be good for all of the patterns to happen for a particular downstream user. For example, `ShapeCastOpRewritePattern` rewrites `vector.shape_cast` into data movement extract/insert ops.
Instead, split the entry point into multiple ones so users can pull in patterns on demand.
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D111225
|
 | mlir/test/lib/Dialect/Linalg/TestConvVectorization.cpp |
 | mlir/include/mlir/Dialect/Vector/VectorOps.h |
 | mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp |
 | mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp |
 | mlir/lib/Dialect/Vector/VectorTransforms.cpp |
Commit
56bf688a09ac6fa38e74b9a336ddba3694f803ef
by springerm[mlir][linalg][bufferize][NFC] Simplify getAliasingOpResult()
The signature of this function was confusing. Check for hasKnownBufferizationAliasingBehavior separately when needed.
Differential Revision: https://reviews.llvm.org/D110916
|
 | mlir/lib/Dialect/Linalg/Transforms/ComprehensiveBufferize.cpp |
Commit
9cdb2a5e30c6b809b69d5c3cccbdfa05ef7cae7e
by llvm-dev[DebugInfo] Remove unused Optional.h includes
|
 | llvm/include/llvm/DebugInfo/GSYM/StringTable.h |
 | llvm/include/llvm/DebugInfo/PDB/Native/PDBFileBuilder.h |
 | llvm/include/llvm/DebugInfo/PDB/Native/NativeLineNumber.h |
 | llvm/include/llvm/DebugInfo/PDB/Native/NativeTypeVTShape.h |
 | llvm/include/llvm/DebugInfo/PDB/Native/NamedStreamMap.h |
 | llvm/include/llvm/DebugInfo/CodeView/CVRecord.h |
 | llvm/include/llvm/DebugInfo/PDB/Native/NativeTypeFunctionSig.h |
Commit
262f04c7ecf3d782fcd00dfbb8be6e034d4c7cf7
by llvm-devLegalizerInfo.h - remove unused Optional.h + None.h includes
|
 | llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h |
Commit
bd8741f31dc35ac462fc17b2b489638c48075377
by llvm-devExecutorProcessControl.h - remove unused Optional.h include
|
 | llvm/include/llvm/ExecutionEngine/Orc/ExecutorProcessControl.h |
Commit
ecfab0b6f581c69b3e3e8b230f97a84f317bbec2
by mgorny[lldb] [DynamicRegisterInfo] Support iterating over registers()
Add DynamicRegisterInfo::registers() method that returns llvm::iterator_range<> over RegisterInfos. This is a convenient replacement for GetNumRegisters() + GetRegisterInfoAtIndex().
Differential Revision: https://reviews.llvm.org/D111136
|
 | lldb/include/lldb/Target/DynamicRegisterInfo.h |
 | lldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.cpp |
Commit
1097f48e3dc3ab6811419f867350e79e280fb0eb
by Saiyedul.IslamRevert "[Clang][OpenMP] Fix fat archive tests for Mac and Windows"
This reverts commit 2baf7ad6d27fc9c08dd6eb9f8581d7e1353d4ece.
|
 | clang/test/Driver/fat_archive_amdgpu.cpp |
 | clang/test/Driver/fat_archive_nvptx.cpp |
Commit
3eb44f4d28df3d9e9528b8b9f8f6b93ab4c2af67
by Saiyedul.IslamRevert "[Clang][OpenMP] Fix windows buildbot failure for D105191"
This reverts commit 06404d5488ea505b00f711393973db3ae32d01e9.
|
 | clang/lib/Driver/ToolChains/Clang.cpp |
Commit
94e2b0258a176c7451dd8291cdf060ea048fee44
by Saiyedul.IslamRevert "[Clang][OpenMP] Add partial support for Static Device Libraries"
This reverts commit 4c4117089599cb5b6c6fa5635c28462ffd1bddf4.
|
 | clang/lib/Driver/ToolChains/Clang.cpp |
 | clang/test/Driver/fat_archive_nvptx.cpp |
 | clang/lib/Driver/ToolChains/CommonArgs.h |
 | clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp |
 | clang/test/Driver/Inputs/openmp_static_device_link/libFatArchive.a |
 | clang/lib/Driver/ToolChains/Cuda.cpp |
 | clang/test/Driver/fat_archive_amdgpu.cpp |
 | clang/tools/clang-offload-bundler/ClangOffloadBundler.cpp |
 | clang/lib/Driver/ToolChains/CommonArgs.cpp |
Commit
5ae6df1feabbf3b582bda2a76f6d04d915ee3c51
by spatel[InstSimplify] add tests for (x || y) && (x || !y); NFC
|
 | llvm/test/Transforms/InstSimplify/select-logical.ll |
Commit
519752062c6056adb99a5cff070852c9c698fd0b
by spatel[PatternMatch] add matchers for commutative logical and/or
We need these to add folds with the same structure as regular commuted logic ops.
|
 | llvm/include/llvm/IR/PatternMatch.h |
 | llvm/unittests/IR/PatternMatch.cpp |
Commit
716883736bc644cf3f0d83f5096d9bc910762591
by llvm-dev[CostModel][TTI] Replace BAD_ICMP_PREDICATE with ICMP_SGT for generic sadd/ssub sat cost expansion
The comparison always checks for negative values so know the icmp predicate will be ICMP_SGT
|
 | llvm/include/llvm/CodeGen/BasicTTIImpl.h |
 | llvm/test/Analysis/CostModel/X86/arith-ssat.ll |
Commit
9072183cb6346926fefa0c0d24cdc31cf028dcc8
by gbreynoo[llvm-objdump] Fix --prefix and --prefix-strip
In the command guide --prefix and --prefix-strip is used in the form --prefix=<prefix> however currently it is used in the form --prefix <prefix>. This change fixes these options to match the command guide.
Differential Revision: https://reviews.llvm.org/D110551
|
 | llvm/test/tools/llvm-objdump/X86/source-interleave-prefix.test |
 | llvm/tools/llvm-objdump/ObjdumpOpts.td |
Commit
d550930afcbb84740681c219ab13efd133143f88
by koraq[libc++][format] Adds string formatter.
Implements the formatter for all string types. [format.formatter.spec]/2.2 For each charT, the string type specializations ``` template<> struct formatter<charT*, charT>; template<> struct formatter<const charT*, charT>; template<size_t N> struct formatter<const charT[N], charT>; template<class traits, class Allocator> struct formatter<basic_string<charT, traits, Allocator>, charT>; template<class traits> struct formatter<basic_string_view<charT, traits>, charT>; ``` This removes the stub implemented in D96664.
Implements parts of: - P0645 Text Formatting - P1868 width: clarifying units of width and precision in std::format
Reviewed By: #libc, ldionne, vitaut
Differential Revision: https://reviews.llvm.org/D103425
|
 | libcxx/include/__format/format_string.h |
 | libcxx/test/std/utilities/format/format.formatter/format.context/format.formatter.spec/formatter.c_string.pass.cpp |
 | libcxx/include/__format/formatter_string.h |
 | libcxx/test/std/utilities/format/format.formatter/format.context/format.formatter.spec/formatter.const_char_array.pass.cpp |
 | libcxx/include/CMakeLists.txt |
 | libcxx/include/format |
 | libcxx/include/module.modulemap |
 | libcxx/test/libcxx/diagnostics/detail.headers/format/formatter_string.module.verify.cpp |
 | libcxx/test/std/utilities/format/format.functions/vformat.pass.cpp |
 | libcxx/include/__format/formatter.h |
 | libcxx/test/std/utilities/format/format.functions/formatted_size.pass.cpp |
 | libcxx/test/std/utilities/format/format.functions/format_tests.h |
 | libcxx/include/__format/parser_std_format_spec.h |
 | libcxx/test/std/utilities/format/format.functions/format.pass.cpp |
 | libcxx/test/std/utilities/format/format.formatter/format.context/format.formatter.spec/formatter.string.pass.cpp |
Commit
c50162b2711e03fa07ff3dff354c2a235ecab147
by llvmgnsyncbot[gn build] Port d550930afcbb
|
 | llvm/utils/gn/secondary/libcxx/include/BUILD.gn |
Commit
3e9689d72cdffab9672427c664d699334948088a
by koraq[libc++][format] Adds integer formatter.
Implements the formatter for all fundamental integer types (except `char`, `wchar_t`, and `bool`). [format.formatter.spec]/2.3 For each charT, for each cv-unqualified arithmetic type ArithmeticT other than char, wchar_t, char8_t, char16_t, or char32_t, a specialization ``` template<> struct formatter<ArithmeticT, charT>; ``` This removes the stub implemented in D96664.
As an extension it adds partial support for 128-bit integer types.
Implements parts of: - P0645 Text Formatting - P1652 Printf corner cases in std::format
Completes: - LWG-3248 #b, #B, #o, #x, and #X presentation types misformat negative numbers
Reviewed By: #libc, ldionne, vitaut
Differential Revision: https://reviews.llvm.org/D103433
|
 | libcxx/include/CMakeLists.txt |
 | libcxx/docs/Status/Cxx20Papers.csv |
 | libcxx/include/module.modulemap |
 | libcxx/test/libcxx/diagnostics/detail.headers/format/formatter_integral.module.verify.cpp |
 | libcxx/docs/Status/Cxx20Issues.csv |
 | libcxx/include/__format/formatter_integer.h |
 | libcxx/include/format |
 | libcxx/test/libcxx/diagnostics/detail.headers/format/formatter_integer.module.verify.cpp |
 | libcxx/test/std/utilities/format/format.functions/locale-specific_form.pass.cpp |
 | libcxx/include/__format/formatter.h |
 | libcxx/include/__format/formatter_integral.h |
 | libcxx/test/std/utilities/format/format.functions/format_tests.h |
 | libcxx/test/libcxx/utilities/format/format.string/format.string.std/std_format_spec_integral.pass.cpp |
 | libcxx/test/libcxx/utilities/format/format.string/format.string.std/std_format_spec_integer.pass.cpp |
 | libcxx/include/__format/parser_std_format_spec.h |
Commit
bd4dad87f421db82430f9958b52fbccc69d91b16
by stephen.tozer[MachineInstr] Move MIParser's DBG_VALUE RegState::Debug invariant into MachineInstr::addOperand
Based on the reasoning of D53903, register operands of DBG_VALUE are invariably treated as RegState::Debug operands. This change enforces this invariant as part of MachineInstr::addOperand so that all passes emit this flag consistently.
RegState::Debug is inconsistently set on DBG_VALUE registers throughout LLVM. This runs the risk of a filtering iterator like MachineRegisterInfo::reg_nodbg_iterator to process these operands erroneously when not parsed from MIR sources.
This issue was observed in the development of the llvm-mos fork which adds a backend that relies on physical register operands much more than existing targets. Physical RegUnit 0 has the same numeric encoding as $noreg (indicating an undef for DBG_VALUE). Allowing debug operands into the machine scheduler correlates $noreg with RegUnit 0 (i.e. a collision of register numbers with different zero semantics). Eventually, this causes an assert where DBG_VALUE instructions are prohibited from participating in live register ranges.
Reviewed By: MatzeB, StephenTozer
Differential Revision: https://reviews.llvm.org/D110105
|
 | llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp |
 | llvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp |
 | llvm/lib/CodeGen/MachineFunction.cpp |
 | llvm/lib/CodeGen/MachineVerifier.cpp |
 | llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp |
 | llvm/lib/CodeGen/MIRParser/MIParser.cpp |
 | llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp |
 | llvm/lib/Target/NVPTX/NVPTXPrologEpilogPass.cpp |
 | llvm/lib/CodeGen/MachineInstr.cpp |
 | llvm/unittests/CodeGen/MachineInstrTest.cpp |
 | llvm/lib/CodeGen/PrologEpilogInserter.cpp |
 | llvm/lib/Target/WebAssembly/WebAssemblyReplacePhysRegs.cpp |
 | llvm/lib/Target/AMDGPU/SIFrameLowering.cpp |
 | llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp |
 | llvm/lib/Target/X86/X86FastISel.cpp |
 | llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp |
 | llvm/lib/CodeGen/MachineOperand.cpp |
Commit
6c8e80c3c2ae9d6158889add1ae4b0dc8d5823c4
by llvmgnsyncbot[gn build] Port 3e9689d72cdf
|
 | llvm/utils/gn/secondary/libcxx/include/BUILD.gn |
Commit
49e736d845d8e1beb3db0abcc782c9525e44f31e
by koraq[libc++][format] Adds char formatter.
Implements the formatter for all fundamental integer types. [format.formatter.spec]/2.1 The specializations ``` template<> struct formatter<char, char>; template<> struct formatter<char, wchar_t>; template<> struct formatter<wchar_t, wchar_t>; ``` This removes the stub implemented in D96664.
Implements parts of: - P0645 Text Formatting
Reviewed By: #libc, ldionne
Differential Revision: https://reviews.llvm.org/D103466
|
 | libcxx/include/__format/formatter_char.h |
 | libcxx/test/libcxx/diagnostics/detail.headers/format/formatter_char.module.verify.cpp |
 | libcxx/include/module.modulemap |
 | libcxx/test/libcxx/utilities/format/format.string/format.string.std/std_format_spec_char.pass.cpp |
 | libcxx/include/format |
 | libcxx/test/std/utilities/format/format.functions/format_tests.h |
 | libcxx/include/CMakeLists.txt |
Commit
7fb9f99f3bb645337b4f4e6a2a3515219be82011
by koraq[libc++][format] Adds bool formatter.
Implements the formatter for Boolean types. [format.formatter.spec]/2.3 For each charT, for each cv-unqualified arithmetic type ArithmeticT other than char, wchar_t, char8_t, char16_t, or char32_t, a specialization ``` template<> struct formatter<ArithmeticT, charT>; ``` This removes the stub implemented in D96664.
Implements parts of: - P0645 Text Formatting - P1652 Printf corner cases in std::format
Completes: - P1868 width: clarifying units of width and precision in std::format
Reviewed By: #libc, ldionne
Differential Revision: https://reviews.llvm.org/D103670
|
 | libcxx/test/std/utilities/format/format.functions/format_to.pass.cpp |
 | libcxx/test/std/utilities/format/format.functions/format_tests.h |
 | libcxx/test/std/utilities/format/format.functions/format_to.locale.pass.cpp |
 | libcxx/test/std/utilities/format/format.formatter/format.context/format.formatter.spec/formatter.bool.pass.cpp |
 | libcxx/test/std/utilities/format/format.functions/vformat_to.locale.pass.cpp |
 | libcxx/test/std/utilities/format/format.functions/locale-specific_form.pass.cpp |
 | libcxx/include/CMakeLists.txt |
 | libcxx/include/__format/formatter_bool.h |
 | libcxx/include/module.modulemap |
 | libcxx/include/format |
 | libcxx/test/libcxx/utilities/format/format.string/format.string.std/std_format_spec_bool.pass.cpp |
 | libcxx/test/libcxx/diagnostics/detail.headers/format/formatter_bool.module.verify.cpp |
 | libcxx/test/std/utilities/format/format.functions/vformat_to.pass.cpp |
 | libcxx/docs/Status/Cxx20Papers.csv |
Commit
2cb4f53612d3cbbfaaa1dd747a8e0eac559e2d36
by llvmgnsyncbot[gn build] Port 49e736d845d8
|
 | llvm/utils/gn/secondary/libcxx/include/BUILD.gn |
Commit
a34dffb5480864ab1aa34799ed47a43680220fd8
by llvmgnsyncbot[gn build] Port 7fb9f99f3bb6
|
 | llvm/utils/gn/secondary/libcxx/include/BUILD.gn |
Commit
5be266db7ab2c16072d1669aaa01c9dfac0dc9bc
by bradley.smith[AArch64][SVE] Improve VECTOR_SPLICE codegen for VL > 128-bit
Differential Revision: https://reviews.llvm.org/D111135
|
 | llvm/lib/Target/AArch64/SVEInstrFormats.td |
 | llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td |
 | llvm/test/CodeGen/AArch64/named-vector-shuffles-sve.ll |
 | llvm/lib/Target/AArch64/AArch64ISelLowering.cpp |
 | llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp |
Commit
80e39366ee403ac420f2087883550398e5fbf968
by kazu[lldb, mlir] Migrate from getNumArgOperands and arg_operands (NFC)
Note that getNumArgOperands and arg_operands are considered legacy names. See llvm/include/llvm/IR/InstrTypes.h for details.
|
 | lldb/source/Plugins/ExpressionParser/Clang/IRForTarget.cpp |
 | lldb/source/Expression/IRInterpreter.cpp |
 | mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp |
Commit
3a5aa57c9b1c01c990700bfcedcebc14ef9a97dc
by gbreynoo[llvm-objdump][docs] Add details to the help output and command guide
This change is to add some missing details, clarifies some options and brings the help text and command guide of objdump closer together.
- Added to the help that --all-headers also outputs symbols and relocations to match the command guide. - Added to the help that --debug-vars accepts an optional ascii/unicode format to match the command guide. - Changed the help descriptions for --disassemble, --disassemble-all, --dwarf=<value>, --fault-map-section, --line-numbers, --no-leading-addr and --source descriptions to match the command guide. - Added to the help that --start-address and --stop-address also effect relocation entries and the symbol table output to match the command guide. - Added a note to the command guide that --unwind-info and -u are not available for the elf format.
Differential Revision: https://reviews.llvm.org/D110633
|
 | llvm/docs/CommandGuide/llvm-objdump.rst |
 | llvm/tools/llvm-objdump/ObjdumpOpts.td |
Commit
11c8efd4db0fe58a2858459353cc5c0c41565ee5
by mtrofin[Inline] Introduce Constant::hasOneLiveUse, use it instead of hasOneUse in inline cost model (PR51667)
Otherwise, inlining costs may be pessimized by dead constants.
Fixes https://bugs.llvm.org/show_bug.cgi?id=51667.
Reviewed By: mtrofin, aeubanks
Differential Revision: https://reviews.llvm.org/D109294
|
 | llvm/lib/Analysis/InlineCost.cpp |
 | llvm/lib/IR/Constants.cpp |
 | llvm/include/llvm/IR/Constant.h |
 | llvm/test/Transforms/Inline/inline-cost-dead-users.ll |
 | llvm/test/Transforms/Inline/last-callsite.ll |
Commit
b25f618857b6f236bcaf7c14d5a0657e20b46bd6
by koraq[libcxx[ Run generate_private_header_tests.py
The script was recently updated to generate different output. This breaks the CI due the patches which used the old version of the script.
|
 | libcxx/test/libcxx/diagnostics/detail.headers/format/formatter_integer.module.verify.cpp |
 | libcxx/test/libcxx/diagnostics/detail.headers/format/formatter_integral.module.verify.cpp |
 | libcxx/test/libcxx/diagnostics/detail.headers/format/formatter_string.module.verify.cpp |
 | libcxx/test/libcxx/diagnostics/detail.headers/format/formatter_char.module.verify.cpp |
 | libcxx/test/libcxx/diagnostics/detail.headers/format/formatter_bool.module.verify.cpp |
Commit
a61c0adba1944ef0792ecb4e5aa75072a240d5da
by chris.jackson[DebugInfo][LSR] Limit the size of SCEV translated to DIExpression
SCEV-based salvaging will use excessive resources if it encounters very long SCEV expressions. This patch places a limit on the length of SCEV expression that salvaging will attempt to translate.
Reviewed by: Orlando
Differential Revision: https://reviews.llvm.org/D110558
|
 | llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp |
 | llvm/test/Transforms/LoopStrengthReduce/pr51656.ll |
Commit
5d6d30edf8b9b2c69215bdbbc651a85e4d0dc4ff
by stellaraccident[mlir] Extend C and Python API to support bulk loading of DenseElementsAttr.
* This already half existed in terms of reading the raw buffer backing a DenseElementsAttr. * Documented the precise expectations of the buffer layout. * Extended the Python API to support construction from bitcasted buffers, allowing construction of all primitive element types (even those that lack a compatible representation in Python). * Specifically, the Python API can now load all integer types at all bit widths and all floating point types (f16, f32, f64, bf16).
Differential Revision: https://reviews.llvm.org/D111284
|
 | mlir/lib/CAPI/IR/BuiltinAttributes.cpp |
 | mlir/include/mlir/IR/BuiltinAttributes.h |
 | mlir/lib/Bindings/Python/IRAttributes.cpp |
 | mlir/test/python/ir/array_attributes.py |
 | mlir/include/mlir-c/BuiltinAttributes.h |
 | mlir/lib/IR/BuiltinAttributes.cpp |
Commit
20c074ee969d41aa4af84beaf91b3e19eb0ca639
by markslC] Add option to ARCOptAddrMode to disable the pass and diagnose errors Fixed formatting issues reported by clang-format
Differential Revision: https://reviews.llvm.org/D111255
|
 | llvm/lib/Target/ARC/ARCOptAddrMode.cpp |
Commit
5ecdb77fc5e71daf994d39840fbe753f46aeca43
by david.spickett[lldb] Mark abort signal test unsupported on AArch64 Linux
This has started failing since we moved our bots to Focal. For unknown reasons the abort_caller stack is missing when we check from the handler breakpoint.
Mark unsupported while I investigate.
|
 | lldb/test/API/functionalities/signal/handle-abrt/TestHandleAbort.py |
Commit
b8608b87239ca7817d1536376a8ce4b5265747ee
by koraq[libc++] Use addressof in assignment operator.
Replace `&__rhs` with `_VSTD::addressof(__rhs)` to guard against ADL hijacking of `operator&` in `operator=`. Thanks to @CaseyCarter for bringing it to our attention.
Similar issues with hijacking `operator&` still exist, they will be addressed separately.
Reviewed By: #libc, Quuxplusone, ldionne
Differential Revision: https://reviews.llvm.org/D110852
|
 | libcxx/test/support/operator_hijacker.h |
 | libcxx/test/std/containers/associative/set/set.cons/copy_assign.addressof.compile.pass.cpp |
 | libcxx/test/std/containers/container.adaptors/queue/queue.defn/assign_copy.addressof.compile.pass.cpp |
 | libcxx/test/std/containers/unord/unord.multimap/unord.multimap.cnstr/assign_copy.addressof.compile.pass.cpp |
 | libcxx/include/list |
 | libcxx/test/std/containers/container.adaptors/priority.queue/priqueue.cons/assign_copy.addressof.compile.pass.cpp |
 | libcxx/include/map |
 | libcxx/test/std/containers/sequences/forwardlist/forwardlist.cons/assign_copy.addressof.compile.pass.cpp |
 | libcxx/test/std/containers/sequences/list/list.cons/assign_copy.addressof.compile.pass.cpp |
 | libcxx/include/deque |
 | libcxx/include/__tree |
 | libcxx/include/forward_list |
 | libcxx/test/std/containers/associative/map/map.cons/copy_assign.addressof.compile.pass.cpp |
 | libcxx/test/std/containers/sequences/deque/deque.cons/move_assign.addressof.compile.pass.cpp |
 | libcxx/test/std/containers/unord/unord.map/unord.map.cnstr/assign_copy.addressof.compile.pass.cpp |
 | libcxx/test/std/containers/unord/unord.set/unord.set.cnstr/assign_copy.addressof.compile.pass.cpp |
 | libcxx/test/std/containers/sequences/vector/vector.cons/assign_copy.addressof.compile.pass.cpp |
 | libcxx/test/std/containers/associative/multiset/multiset.cons/copy_assign.addressof.compile.pass.cpp |
 | libcxx/include/unordered_map |
 | libcxx/include/__hash_table |
 | libcxx/test/std/containers/associative/multimap/multimap.cons/copy_assign.addressof.compile.pass.cpp |
 | libcxx/test/std/containers/sequences/array/array.cons/implicit_copy.addressof.compile.pass.cpp |
 | libcxx/include/valarray |
 | libcxx/test/std/numerics/numarray/template.valarray/valarray.assign/value_assign.addressof.compile.pass.cpp |
 | libcxx/test/std/containers/unord/unord.multiset/unord.multiset.cnstr/assign_copy.addressof.compile.pass.cpp |
 | libcxx/include/vector |
Commit
14d76a376a412d5720cc83c40d00d8e5fb163105
by gbreynoo[llvm-readelf][docs] Add missing options and details to the help output and the command guide
This change is to keep the help text and command guide of llvm-readelf in tandem.
- In the help text mention that --section-data, --section-relocations, --section-symbols and --stack-sizes have no effect on GNU style output; give the accepted values for --elf-output-style and update the description of --gnu-hash-table to use the command guide description. - In the command guide add the missing options -a, --dependant-libraries,--no-demangle, --wide and -W. Also update the description of --symbols so it matches the help text.
Differential Revision: https://reviews.llvm.org/D111240
|
 | llvm/tools/llvm-readobj/Opts.td |
 | llvm/docs/CommandGuide/llvm-readelf.rst |
Commit
fdbf2bb4eed187a7267780edee003483dee12739
by spatel[InstSimplify] (x || y) && (x || !y) --> x
https://alive2.llvm.org/ce/z/4BE33w
This is the logical (select-form) equivalent of the bitwise logic fold: e36d351d19b1
This is another part of solving the regression from: https://llvm.org/PR52077
|
 | llvm/test/Transforms/InstSimplify/select-logical.ll |
 | llvm/lib/Analysis/InstructionSimplify.cpp |
Commit
74b1ac7155a01e5d29cff612717f773da095d696
by amy.kwan1[NFC] Update return type of vec_popcnt to vector unsigned.
This patch updates the vec_popcnt builtins to return vector unsigned, as defined by the Power Vector Intrinsics Programming Reference. This patch is NFC and all existing tests pass.
Differential Revision: https://reviews.llvm.org/D110934
|
 | clang/lib/Headers/altivec.h |
Commit
aec66f895bf516564346a4366d5e06139b8370ed
by paul.robinson[PS4][TargetLibraryInfo] Set TLI info correctly for PS4
|
 | llvm/lib/Analysis/TargetLibraryInfo.cpp |
Commit
d456fed1a9feaa441847038d6adbb93ff3bf8f66
by aaronAdd information about partially implemented features
Desccribe in cxx_status.html the missing parts of the partially implemented proposals described in cxx_status.html.
Uses <details> blocks so the information appears collapsed by default.
|
 | clang/www/cxx_status.html |
Commit
c4803bd416d432702020a1c3822edfc4ab20b5b6
by craig.topper[RISCV] Handle vector of pointer in getTgtMemIntrinsic for strided load/store.
getScalarSizeInBits() doesn't work if the scalar type is a pointer. For that we need to go through DataLayout.
|
 | llvm/test/CodeGen/RISCV/rvv/fixed-vector-strided-load-store.ll |
 | llvm/lib/Target/RISCV/RISCVISelLowering.cpp |
Commit
3d7d5437433c16fd4a9a3674d3752c246961d70e
by kazu[lldb] Fix a "missing field" warning
This patch fixes:
llvm-project/lldb/source/Plugins/ABI/PowerPC/ABISysV_ppc.cpp:204:6: error: missing field 'invalidate_regs' initializer [-Werror,-Wmissing-field-initializers]
|
 | lldb/source/Plugins/ABI/PowerPC/ABISysV_ppc.cpp |
Commit
6283d468e28b35e2731dda1a9e0efcb3d9acf557
by luke.drummondWorkaround build error for mingw-g++
mingw-g++ does not correctly support the full `std::errc` namespace as worded in the standard[1]. As such, we cannot reliably use all names therein. This patch changes the use of `std::errc::state_not_recoverable`, to use portable error codes from the `llvm::errc` equivalent.
[1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71444
Reviewed by v.g.vassilev Differential Revision: https://reviews.llvm.org/D111315
|
 | clang/lib/Interpreter/Interpreter.cpp |
Commit
b0c34e0dab7820fa4dc442ae8f5118064c306285
by bjorn.a.pettersson[test] Pre-commit test case for PR51981. NFC
Reviewed By: fhahn
Differential Revision: https://reviews.llvm.org/D110812
|
 | llvm/test/Transforms/LoopRotate/pr51981-scev-problem.ll |
Commit
7f93bb4a5827ffce67a469da3ac0e23194538441
by bjorn.a.pettersson[LoopRotate] Forget SCEV values in RewriteUsesOfClonedInstructions
This patch fixes problems reported in PR51981.
When rotating a loop it isn't enough to just forget SCEV for that loop nest. When rotating we might clone some instructions from the old header into the preheader, and insert new PHI nodes to merge values together. There could be users of the original value that are updated to use the PHI result. And those users were not necessarily depending on a PHI node earlier, so they weren't cleaned up when just forgetting all SCEV:s for the loop nest. So we need to explicitly forget those values to avoid invalid cached SCEV expressions.
Reviewed By: fhahn, mkazantsev
Differential Revision: https://reviews.llvm.org/D110813
|
 | llvm/test/Transforms/LoopRotate/pr51981-scev-problem.ll |
 | llvm/lib/Transforms/Utils/LoopRotationUtils.cpp |
Commit
548b01c7a6d3193d38f16942acc7804dbaf32ee2
by jay.foad[MIRParser] Add support for IsInlineAsmBrIndirectTarget
Print this basic block flag as inlineasm-br-indirect-target and parse it. This allows you to write MIR test cases for INLINEASM_BR. The test case I added is one that I wanted to precommit anyway for D110834.
Differential Revision: https://reviews.llvm.org/D111291
|
 | llvm/test/CodeGen/X86/callbr-asm-kill.mir |
 | llvm/lib/CodeGen/MIRParser/MILexer.h |
 | llvm/lib/CodeGen/MachineBasicBlock.cpp |
 | llvm/lib/CodeGen/MIRParser/MILexer.cpp |
 | llvm/docs/MIRLangRef.rst |
 | llvm/test/CodeGen/X86/tail-dup-asm-goto.ll |
 | llvm/lib/CodeGen/MIRParser/MIParser.cpp |
 | llvm/test/CodeGen/X86/callbr-asm-outputs-pred-succ.ll |
Commit
97c231666a949b05dc3d1243771e03bc9c341541
by kevin.neal[NFC] Rename functions to match our naming scheme.
In the review of D111085 it was pointed out that these functions don't conform to the naming scheme in use in LLVM. With this commit we should be good for all of FPEnv.h.
|
 | llvm/lib/IR/IntrinsicInst.cpp |
 | llvm/lib/IR/FPEnv.cpp |
 | llvm/include/llvm/IR/FPEnv.h |
 | llvm/include/llvm/IR/IRBuilder.h |
Commit
f66b1b2717e84edef8a9e132638de6d866d01eab
by i[LangRef] Update ifunc syntax
Extracted from Itay Bookstein's D108872.
|
 | llvm/docs/LangRef.rst |
Commit
392a2a554cdef684b27d2bf0abc4a736602e89c1
by AkiraRefactor code in ObjCARC.cpp. NFC
This is in preparation for another patch I'm planning to send later.
|
 | llvm/lib/Transforms/ObjCARC/ObjCARC.cpp |
Commit
e356027016c6365b3d8924f54c33e2c63d931492
by craig.topper[RISCV] Correct FileCheck prefixes in rv32zbc-intrinsic.ll and rv64zbc-intrinsic.ll. NFC
Zbc RUN lines should use ZBC instead of BC in their prefix.
|
 | llvm/test/CodeGen/RISCV/rv32zbc-intrinsic.ll |
 | llvm/test/CodeGen/RISCV/rv64zbc-intrinsic.ll |
Commit
8bfc0e06dc85663ba3317da0c7b472260bf27948
by Amara Emerson[GlobalISel] Port the udiv -> mul by constant combine.
This is a straight port from the equivalent DAG combine.
Differential Revision: https://reviews.llvm.org/D110890
|
 | llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h |
 | llvm/include/llvm/Target/GlobalISel/Combine.td |
 | llvm/test/CodeGen/AArch64/GlobalISel/combine-udiv.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll |
 | llvm/include/llvm/CodeGen/GlobalISel/Utils.h |
 | llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp |
 | llvm/test/CodeGen/AArch64/GlobalISel/combine-udiv.ll |
 | llvm/lib/CodeGen/GlobalISel/Utils.cpp |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i32.ll |
Commit
29e00b29f76adb15a51c1ccd6c1fdb6fce5f4d7b
by tra[CUDA] Make sure <string.h> is included with original __THROW defined.
Otherwise we may end up with an inconsistent redeclarations of the standard library functions if _FORTIFY_SOURCE is in effect.
https://bugs.llvm.org/show_bug.cgi?id=47869
Differential Revision: https://reviews.llvm.org/D110781
|
 | clang/lib/Headers/__clang_cuda_runtime_wrapper.h |
Commit
42d07bdc400f7acda912bfe889c4961b1413a6a4
by jay.foad[X86] Pre-commit a test case for D110829
|
 | llvm/test/CodeGen/X86/twoaddr-mul2.mir |
Commit
5b8befdd026d75562f127a34e0b0584820b03581
by jay.foad[X86] Special-case ADD of two identical registers in convertToThreeAddress
X86InstrInfo::convertToThreeAddress would convert this:
%1:gr32 = ADD32rr killed %0:gr32(tied-def 0), %0:gr32, implicit-def dead $eflags
to this:
undef %2.sub_32bit:gr64 = COPY killed %0:gr32 undef %3.sub_32bit:gr64_nosp = COPY %0:gr32 %1:gr32 = LEA64_32r killed %2:gr64, 1, killed %3:gr64_nosp, 0, $noreg
Note that in the ADD32rr, %0 was used twice and the first use had a kill flag, which is what MachineInstr::addRegisterKilled does.
In the converted code, each use of %0 is copied to a new reg, and the first COPY inherits the kill flag from the ADD32rr. This causes machine verification to fail (if you force it to run after TwoAddressInstructionPass) because the second COPY uses %0 after it is killed. Note that machine verification is currently disabled after TwoAddressInstructionPass but this is a step towards being able to enable it.
Fix this by not inserting more than one COPY from the same source register.
Differential Revision: https://reviews.llvm.org/D110829
|
 | llvm/test/CodeGen/X86/twoaddr-mul2.mir |
 | llvm/lib/Target/X86/X86InstrInfo.cpp |
Commit
c5f445d143485f898353df6d422eea1dea22c7a8
by stellaraccident[mlir][python] Temporarily disable test for converting unsupported DenseElementsAttr types to a buffer.
* Need to investigate the proper solution to https://github.com/pybind/pybind11/issues/3336 or engineer something different. * The attempt to produce an empty buffer_info as a workaround triggers asan/ubsan. * Usage of this API does not arise naturally in practice yet, and it is more important to be asan/crash clean than have a solution right now. * Switching back to raising an exception, even though that triggers terminate().
|
 | mlir/lib/Bindings/Python/IRAttributes.cpp |
 | mlir/test/python/ir/array_attributes.py |
Commit
3b01cf9286e3f3462865cd467ad1edb1534f50d3
by clementval[mlir][openmp] Add an interface for Outlineable OpenMP ops
Add an interface for outlineable OpenMP operations. This patch was initially done in fir-dev and is now needed for the upstreaming.
Reviewed By: schweitz
Differential Revision: https://reviews.llvm.org/D111310
|
 | mlir/lib/Dialect/OpenMP/CMakeLists.txt |
 | mlir/include/mlir/Dialect/OpenMP/OpenMPDialect.h |
 | mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td |
 | mlir/include/mlir/Dialect/OpenMP/CMakeLists.txt |
 | mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td |
Commit
13d1592716a65444314f501109ec9ca344ef1f87
by schmeiseReland A new option -print-on-crash that prints the IR as it was upon entering the last pass when there is a crash.
Summary: The IR is saved in its print form before each pass is started and a signal handler is registered. If the compilation crashes, the signal handler will print the saved IR to dbgs(). This option can be modified using -print-module-scope to get the IR for the complete module. Filtering options can be used to improve performance by limiting which passes (or functions) save the IR. Note that this option only works with the new pass manager.
Author: Jamie Schmeiser <schmeise@ca.ibm.com> Reviewed By: aeubanks (Arthur Eubanks) yrouban (Yevgeny Rouban) Differential Revision: https://reviews.llvm.org/D86657
|
 | llvm/include/llvm/Passes/StandardInstrumentations.h |
 | llvm/lib/Passes/PassBuilder.cpp |
 | llvm/lib/Passes/StandardInstrumentations.cpp |
 | llvm/test/Other/print-on-crash.ll |
 | llvm/lib/Passes/PassRegistry.def |
Commit
41094830134092daf07dc3fa4715b2bc439c2dde
by jay.foad[PHIElimination] Pre-commit a test case for D110834
|
 | llvm/test/CodeGen/X86/callbr-asm-kill.mir |
Commit
3c9dfba1894c6bceba0e087a8bd84212fd231d34
by jay.foad[PHIElimination] Account for INLINEASM_BR when inserting kills
When PHIElimination adds kills after lowering PHIs to COPYs it knows that some instructions after the inserted COPY might use the same SrcReg, but it was only looking at the terminator instructions at the end of the block, not at other instructions like INLINEASM_BR that can appear after the COPY insertion point.
Since we have already called findPHICopyInsertPoint, which knows about INLINEASM_BR, we might as well reuse the insertion point that it calculated when looking for instructions that might use SrcReg.
This fixes a machine verification failure if you force machine verification to run after PHIElimination (currently it is disabled for other reasons) when running test/CodeGen/X86/callbr-asm-phi-placement.ll.
Differential Revision: https://reviews.llvm.org/D110834
|
 | llvm/lib/CodeGen/PHIElimination.cpp |
 | llvm/test/CodeGen/X86/callbr-asm-kill.mir |
Commit
3ff0a5747dd1e500260a0b3863f800450d234892
by jay.foad[PHIElimination] Enable machine verification after this pass
Differential Revision: https://reviews.llvm.org/D111006
|
 | llvm/lib/CodeGen/TargetPassConfig.cpp |
Commit
27c57e791a0af914792404a157f8022e91187a33
by jay.foad[TwoAddressInstruction] Enable machine verification after this pass
Differential Revision: https://reviews.llvm.org/D111007
|
 | llvm/lib/CodeGen/TargetPassConfig.cpp |
Commit
d95ebef4b8ecbbb9a9ef1d9cdd73f3fc8d06798a
by spatel[InstCombine] ease use check for fold of bitcasted extractelt to trunc
This helps with examples like: https://llvm.org/PR52057 ...but we need at least one more fold to fix that case.
|
 | llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp |
 | llvm/test/Transforms/InstCombine/extractelement.ll |
Commit
1bc3a6e41b6f7ccb86e5a9701fb9024e3a679d0e
by jonathanchesterfield[libomptarget] Reapply 2bc4d48a78b which was accidentally reverted
|
 | openmp/libomptarget/plugins/amdgpu/src/rtl.cpp |
Commit
bd5befb55087199ee1c0c3e344847cd06a2ca839
by schmeiseRevert "Reland A new option -print-on-crash that prints the IR as it was upon entering the last pass when there is a crash."
This reverts commit 13d1592716a65444314f501109ec9ca344ef1f87.
|
 | llvm/lib/Passes/PassRegistry.def |
 | llvm/include/llvm/Passes/StandardInstrumentations.h |
 | llvm/lib/Passes/StandardInstrumentations.cpp |
 | llvm/lib/Passes/PassBuilder.cpp |
 | llvm/test/Other/print-on-crash.ll |
Commit
0885afb8b0584becc0e315217d37776cb0518115
by keithbsmiley[lld][test] Fix darwin REQUIRES (NFC)
Some subprojects like compiler-rt define the `darwin` feature in their lit config, but lld does not do that, so we need to use the global system-darwin here instead. This test seems to have drifted from the actual behavior so I also had to add `/usr/local/lib` here to make it pass.
Differential Revision: https://reviews.llvm.org/D111268
|
 | lld/test/MachO/search-paths-darwin.test |
Commit
f6a74908a7e725cb13769ad12b9202185d87b83b
by Louis Dionne[runtimes] Add tests for vendor-specific properties
Vendors take libc++ and ship it in various ways. Some vendors might ship it differently from what upstream LLVM does, i.e. the install location might be different, some ABI properties might differ, etc.
In the past few years, I've come across several instances where having a place to test some of these properties would have been incredibly useful. I also just got bitten by the lack of tests of that kind, so I'm adding some now.
The tests added by this commit for Apple platforms have numerous TODOs that capture discrepancies between the upstream LLVM CMake and the slightly-modified build we perform internally to produce Apple's system libc++. In the future, the goal would be to upstream all those differences so that it's possible to build a faithful Apple system libc++ with the upstream LLVM sources only.
But this isn't only useful for Apple - this lays out the path for any vendor being able to add their own checks (either upstream or downstream) to libc++.
This is a re-application of 9892d1644f, which was reverted in 138dc27186be because it broke the build. The issue was that we didn't apply the required changes to libunwind and our CI didn't notice it because we were not running the libunwind tests. This has been fixed now, and we're running the libunwind tests in CI now too.
Differential Revision: https://reviews.llvm.org/D110736
|
 | libcxx/test/libcxx/vendor/apple/system-install-properties.sh.cpp |
 | libunwind/test/lit.site.cfg.in |
 | libcxx/utils/libcxx/test/params.py |
 | libcxx/test/configs/legacy.cfg.in |
 | libcxxabi/test/vendor/apple/system-install-properties.sh.cpp |
 | libcxx/utils/libcxx/test/config.py |
 | libcxx/cmake/caches/Apple.cmake |
 | libcxxabi/test/lit.site.cfg.in |
Commit
f6e321f74d8d1a16c2690d15bfb39afed274a426
by gcmn[Bazel] Update config for 3b01cf9286
Updates the Bazel config for changes from https://github.com/llvm/llvm-project/commit/3b01cf9286 by adding configuration for the new OpenMPOpsInterfaces tablegn target.
Differential Revision: https://reviews.llvm.org/D111347
|
 | utils/bazel/llvm-project-overlay/mlir/BUILD.bazel |
Commit
c5245dd33904bd1b69a2a49d17b1bea156e8dabf
by nikita.ppv[LoopFlatten] Mark loop analyses as preserved
LoopFlatten does preserve loop analyses (DT, LI and SCEV), but currently doesn't mark them as preserved in the NewPM (they are marked as preserved in the LegacyPM). I think this doesn't really have an effect in the end because the loop pass adaptor will just assume they're preserved anyway, but let's be explicit about this for the sake of clarity.
Differential Revision: https://reviews.llvm.org/D111328
|
 | llvm/lib/Transforms/Scalar/LoopFlatten.cpp |
Commit
9f9ed7a81ab8ad6af46c7c5ba9109a7ef29fc7a7
by keithbsmiley[clang] Fix darwin REQUIRES test annotation (NFC)
Some subprojects like compiler-rt define the `darwin` feature in their lit config, but clang does not do that, so we need to use the global `system-darwin` here instead.
Differential Revision: https://reviews.llvm.org/D111267
|
 | clang/test/Driver/mtargetos-darwin.c |
 | clang/test/Driver/apple-arm64-arch.c |
 | clang/test/Driver/darwin-warning-options.c |
Commit
417f8ea4baba9d577f5018ea211f50d3be21a54f
by marksl[ARC] ARCRegisterInfo cleanup prior to adding core register pairs (ARC32) and 64-bit core registers (ARC64)
Differential Revision: https://reviews.llvm.org/D11108
|
 | llvm/lib/Target/ARC/ARCRegisterInfo.h |
 | llvm/lib/Target/ARC/ARCOptAddrMode.cpp |
 | llvm/lib/Target/ARC/ARCRegisterInfo.cpp |
 | llvm/lib/Target/ARC/ARCInstrInfo.cpp |
 | llvm/lib/Target/ARC/ARCRegisterInfo.td |
 | llvm/lib/Target/ARC/ARCSubtarget.cpp |
 | llvm/lib/Target/ARC/ARCInstrInfo.h |
 | llvm/lib/Target/ARC/ARCSubtarget.h |
Commit
c77a5c21bbf061bdfdfa90a62aa60679c5810306
by nikita.ppv[BasicAA] Use base of decomposed GEP in recursive queries (NFC)
DecompGEP.Base and UnderlyingV are currently always the same. However, logically DecompGEP.Base is the right value to use here, because the decomposed offset is relative to that base.
|
 | llvm/lib/Analysis/BasicAliasAnalysis.cpp |
Commit
097339b1cadcd6c24b607355db0f4c271d8ed261
by jay.foad[TargetPassConfig] Enable machine verification after miscellaneous passes
In a couple of places machine verification was disabled for no apparent reason, probably just because an "addPass(..., false)" line was cut and pasted from elsewhere.
After this patch the only remaining place where machine verification is disabled in the generic TargetPassConfig code, is after addPreEmitPass.
|
 | llvm/lib/CodeGen/TargetPassConfig.cpp |
Commit
e996cf7dce2c86d40fec263d82545dd363d9f445
by jay.foad[AMDGPU] Preserve MachineDominatorTree in SILowerControlFlow
Updating the MachineDominatorTree is easy since SILowerControlFlow only splits and removes basic blocks. This should save a bit of compile time because previously we would recompute the dominator tree from scratch after this pass.
Another reason for doing this is that SILowerControlFlow preserves LiveIntervals which transitively requires MachineDominatorTree. I think that means that SILowerControlFlow is obliged to preserve MachineDominatorTree too as explained here: https://lists.llvm.org/pipermail/llvm-dev/2020-November/146923.html although it does not seem to have caused any problems in practice yet.
Differential Revision: https://reviews.llvm.org/D111313
|
 | llvm/test/CodeGen/AMDGPU/llc-pipeline.ll |
 | llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp |
Commit
09cb376d27aeca4b2539b31e16706c32cda82a4e
by listmail[scev] Put comments on the right fields [nfc]
|
 | llvm/include/llvm/Analysis/ScalarEvolution.h |
Commit
f4a5fb0c5573477c2a597c3246513d8dba2f5e63
by pklausler[flang] Error checking for IBCLR/IBSET and ISHFT/SHIFT[ALR]
Bit positions for the intrinsics IBCLR and IBSET and shift counts for the intrinsics ISHFT/SHIFTA/SHIFTL/SHIFTR should be validated when folding.
Differential Revision: https://reviews.llvm.org/D111327
|
 | flang/lib/Evaluate/fold-integer.cpp |
Commit
78c5754813f3525ff249780a19198894bd336b78
by Vitaly Buka[sanitizer] Uninline slow path of PersistentAllocator::alloc
|
 | compiler-rt/lib/sanitizer_common/sanitizer_persistent_allocator.cpp |
 | compiler-rt/lib/sanitizer_common/sanitizer_persistent_allocator.h |
Commit
8f3e52538d77f42c319b9e40bfae6f45041df195
by Vitaly Buka[NFC][sanitizer] Remove global PersistentAllocator
This way is easier to track memory usage and do other incremental refactorings.
Differential Revision: https://reviews.llvm.org/D111256
|
 | compiler-rt/lib/sanitizer_common/sanitizer_persistent_allocator.cpp |
 | compiler-rt/lib/sanitizer_common/sanitizer_persistent_allocator.h |
 | compiler-rt/lib/sanitizer_common/sanitizer_stackdepotbase.h |
 | compiler-rt/lib/sanitizer_common/sanitizer_chained_origin_depot.h |
 | compiler-rt/lib/sanitizer_common/sanitizer_chained_origin_depot.cpp |
 | compiler-rt/lib/sanitizer_common/sanitizer_stackdepot.cpp |
Commit
c86e7ec42c10f14c35376bbc6838dac23ba40f85
by Vitaly Buka[sanitizer] Remove traces from the header
This will simplify removing id proposed by @dvyukov on D111183 Also now we have more flexiliby for traces compressio they are not interleaving with uncompressable headers.
Depends on D111256.
Differential Revision: https://reviews.llvm.org/D111274
|
 | compiler-rt/lib/sanitizer_common/sanitizer_stackdepot.cpp |
Commit
0332d5d14d21b8e4dc98f42e196660e263f1d5f1
by Vitaly Buka[NFC][sanitizer] Annotate a few branches in StackDepot
|
 | compiler-rt/lib/sanitizer_common/sanitizer_persistent_allocator.h |
 | compiler-rt/lib/sanitizer_common/sanitizer_stackdepotbase.h |
Commit
4651576edd09bb4b0978db8592e938484e7bbd4f
by Adrian PrantlRecognize the Swift compiler in DW_AT_producer
This patch adds support for Swift compiler producer strings to DWARFUnit.
Differential Revision: https://reviews.llvm.org/D111278
|
 | lldb/unittests/SymbolFile/DWARF/DWARFUnitTest.cpp |
 | lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.h |
 | lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp |
Commit
9f93f2bfbd3fedb94490d42e48b89c2a8f05ff0a
by Adrian PrantlDo not emit prologue_end for line 0 locs if there is a non-zero loc present
This change fixes a bug where the compiler generates a prologue_end for line 0 locs. That is because line 0 is not associated with any source location, so there should not be a prolgoue_end at a location that doesn't correspond to a source location.
There were some LLVM tests that were explicitly checking for line 0 prologue_end's as well since I believe that to be incorrect, I had to change those tests as well.
Patch by Shubham Rastogi!
Differential Revision: https://reviews.llvm.org/D110740
|
 | llvm/test/CodeGen/X86/no-non-zero-debug-loc-prologue.ll |
 | llvm/test/DebugInfo/X86/dbg-prolog-end.ll |
 | llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp |
 | llvm/test/CodeGen/X86/line-zero-prologue-end.ll |
 | llvm/test/DebugInfo/MIR/X86/debug-loc-0.mir |
Commit
6727832c324c1fb43946275d24e2931fde94bc0d
by kostyak[scudo] Reduce the scope of AllocAfterFork
`ScudoWrappersCppTest.AllocAfterFork` was failing obscurely sometimes. Someone pointed us to Linux's `vm.max_map_count` that can be significantly lower on some machines than others. It turned out that on a machine with that setting set to 65530, some `ENOMEM` errors would occur with `mmap` & `mprotect` during that specific test.
Reducing the number of times we fork, and the maximum size allocated during that test makes it pass on those machines.
Differential Revision: https://reviews.llvm.org/D111342
|
 | compiler-rt/lib/scudo/standalone/tests/wrappers_cpp_test.cpp |
Commit
b1a45c62f03ecbeb4544b0c65a01ee4586235a61
by wlei[llvm-profgen] Ignore branch count against outline function
For some transformations like hot-cold split or coro split, it can outline its part of function ranges. Since sample loader is the early stage of backend and no split happens at that time, compiler can't recognize those function, so in llvm-profgen we should attribute the sample to the original function. This is already done for the body range samples since we use the symbols from dwarf which is created before the split.
But for branch samples, the call from master function to its outlined function is actually not a call to the original function, we shouldn't add head/callsie samples for it. So instead of dwarf symbol, we use the symbols from symbol table and ignore those functions with special suffixes(like `.cold` ,`.resume`) for accumulating the callsite/head samples.
Reviewed By: hoy, wenlei
Differential Revision: https://reviews.llvm.org/D110864
|
 | llvm/test/tools/llvm-profgen/Inputs/coroutine.perfbin |
 | llvm/test/tools/llvm-profgen/Inputs/func-split.perfbin |
 | llvm/test/tools/llvm-profgen/Inputs/func-split.perfscript |
 | llvm/test/tools/llvm-profgen/func-split.test |
 | llvm/test/tools/llvm-profgen/coroutine.test |
 | llvm/tools/llvm-profgen/ProfileGenerator.h |
 | llvm/test/tools/llvm-profgen/Inputs/coroutine.perfscript |
 | llvm/tools/llvm-profgen/ProfileGenerator.cpp |
Commit
976aa4d759c7c85786a23de5d09ad771f1e890e0
by leonardchanReland "[clang][Fuchsia] Re-enable compiler-rt tests in runtimes build"
This reverts commit a625fd26cea579853bfe6c00f8fd8e6e88388630.
Round 3: The scudo test was addressed in 6727832c324c1fb43946275d24e2931fde94bc0d.
|
 | clang/cmake/caches/Fuchsia-stage2.cmake |
Commit
c07b80ca536158a42d1557a10d892c09ccd1f268
by Louis Dionne[libc++] Add a from-scratch testing config for GCC
Differential Revision: https://reviews.llvm.org/D111329
|
 | libcxx/utils/ci/run-buildbot |
 | libcxx/test/configs/llvm-libc++-shared-gcc.cfg.in |
Commit
1262f8a64d21ca0cfca81b2039809d14ae4691bc
by Louis Dionne[libc++] Remove the CI job for Apple/System/Noexceptions
When we recently started using DYLD_LIBRARY_PATH to run the test suite on the Apple/System configuration of the library, the -fno-exceptions variant started failing.
It started failing because under that configuration, libc++abi.dylib doesn't provide support for exceptions. For example, it doesn't provide some symbols such as ___gxx_personality_v0. Now, the problem is that when the test suite is run with DYLD_LIBRARY_PATH, /usr/lib/libobjc.dylib uses the just-built libc++abi.dylib, which doesn't support exceptions, and we end up with an unresolved reference to ___gxx_personality_v0.
Previously, using -Wl,-rpath,path/to/lib, we would be loading both /usr/lib/libc++abi.dylib and <just-built>/lib/libc++abi.dylib. /usr/lib/libobjc.dylib would use the system libc++abi.dylib, which contains support for exceptions, and the tests would be using the just-built one, which doesn't.
Disentangling that led me to believe that we shouldn't try to test this configuration where libc++/libc++abi are built as system libraries, but where they don't support exceptions, since that just doesn't make any sense. Doing so is like trying to build libc++/libc++abi and test it as a system library after performing an ABI break -- of course nothing is going to work.
For that reason, I am removing this configuration. Note that we could still test the library on macOS without exceptions if we wanted, only we wouldn't be building it as a system library. This patch doesn't add that because we already have a -fno-exceptions CI job on Linux.
Differential Revision: https://reviews.llvm.org/D111349
|
 | libcxx/utils/ci/buildkite-pipeline.yml |
 | libcxx/utils/ci/run-buildbot |
Commit
a4095df44cd402cdd99fccdef83cac867620e179
by aeubanksDon't print uselistorder in --print-changed
Using uselistorders is fairly niche, it shouldn't be on by default and mostly just clutters the output.
Reviewed By: jamieschmeiser
Differential Revision: https://reviews.llvm.org/D111282
|
 | llvm/lib/Passes/StandardInstrumentations.cpp |
Commit
856a07e47ab2fef96c2e32fd28927044dbf90a19
by daltenty[NFC] Including <string> in llvm-cxxdump/Error.cpp
A [[ https://reviews.llvm.org/rGf6fa95b77f33c3690e4201e505cb8dce1433abd9 | recent commit ]] removed `<string>` from `ErrorHandling.h`. The removal caused `<string>` to be no longer included for `llvm/tools/llvm-cxxdump/Error.cpp` which uses the string type.
This patch adds `<string>` to `llvm/tools/llvm-cxxdump/Error.cpp`.
Reviewed By: jsji
Differential Revision: https://reviews.llvm.org/D111354
|
 | llvm/tools/llvm-cxxdump/Error.cpp |
Commit
6526fa35894f2782abed9d608d91019f98ed397d
by lebedev.ri[NFC][VectorCombine] Add baseline test coverage for GEP scalarization
|
 | llvm/test/Transforms/VectorCombine/X86/scalarize-vector-gep.ll |
Commit
dfeaa1941bd0fa6f65ac34f26868f2f04efd9d1d
by keithbsmiley[lld][test] Remove /usr/local/lib test requirement
This field only exists if the directory exists on the machine running the test. It likely exists for most Intel macOS users because of homebrew, but doesn't exist on some of the CI machines. This unfortunately makes this test a bit less strict.
Differential Revision: https://reviews.llvm.org/D111361
|
 | lld/test/MachO/search-paths-darwin.test |
Commit
690da88a9585542a2205e137aaeb44c79ec63950
by lebedev.riWorkaround broken FileCheck default yet another time
|
 | llvm/test/Transforms/VectorCombine/X86/scalarize-vector-gep.ll |
Commit
b913065bf470bcaf1ee8ff8b6a647b877110a4ba
by Jonas Devlieghere[lldb] Support missing threadState in JSON crashlogs
Gracefully deal with JSON crashlogs that don't have thread state available and print an error saying as much: "No thread state (register information) available".
rdar://83955858
Differential revision: https://reviews.llvm.org/D111341
|
 | lldb/examples/python/crashlog.py |
 | lldb/test/Shell/ScriptInterpreter/Python/Crashlog/Inputs/no_threadState.ips |
 | lldb/test/Shell/ScriptInterpreter/Python/Crashlog/no_threadState.test |
Commit
b225c5f7861c7f99de3d52dc1ed23e358c5cce36
by Jonas Devlieghere[lldb] Parse and display reporting errors from JSON crashlogs
JSON crashlogs have an optional field named reportNotes that contains any potential errors encountered by the crash reporter when generating the crashlog. Parse and display them in LLDB.
Differential revision: https://reviews.llvm.org/D111339
|
 | lldb/examples/python/crashlog.py |
 | lldb/test/Shell/ScriptInterpreter/Python/Crashlog/json.test |
 | lldb/test/Shell/ScriptInterpreter/Python/Crashlog/Inputs/a.out.ips |
Commit
5d001f58f241a0e15751feea8f087ede0ca6371f
by amy.zhuang[mlir] Fix a bug in Affine LICM.
Currently Affine LICM checks iterOperands and does not hoist out any instruction containing iterOperands. We should check iterArgs instead.
Reviewed By: bondhugula
Differential Revision: https://reviews.llvm.org/D111090
|
 | mlir/test/Dialect/Affine/affine-loop-invariant-code-motion.mlir |
 | mlir/lib/Dialect/Affine/Transforms/AffineLoopInvariantCodeMotion.cpp |
Commit
ebcfd3ae8cc506e5f6056517dc295b74a3463d24
by phosek[CMake] Include llvm-libtool-darwin in Fuchsia toolchain
We want to use this tool in our build.
Differential Revision: https://reviews.llvm.org/D111366
|
 | clang/cmake/caches/Fuchsia-stage2.cmake |
Commit
9fad9de5c0032898a481e06bf5f696ca50c804c1
by vsapsai[modules] Fix IRGen assertion on accessing ObjC ivar inside a method.
When have ObjCInterfaceDecl with the same name in 2 different modules, hitting the assertion
> Assertion failed: (Index < RL->getFieldCount() && "Ivar is not inside record layout!"), > function lookupFieldBitOffset, file llvm-project/clang/lib/AST/RecordLayoutBuilder.cpp, line 3434.
on accessing an ivar inside a method. The assertion happens because ivar belongs to one module while its containing interface belongs to another module and then we fail to find the ivar inside the containing interface. We already keep a single ObjCInterfaceDecl definition in redecleration chain and in this case containing interface was correct. The issue is with ObjCIvarDecl. IVar decl for IRGen is taken from ObjCIvarRefExpr that is created in `Sema::BuildIvarRefExpr` using ivar decl returned from `Sema::LookupIvarInObjCMethod`. And ivar lookup returns a wrong decl because basically we take the first ObjCIvarDecl found in `ASTReader::FindExternalVisibleDeclsByName` (called by `DeclContext::lookup`). And in `ASTReader.Lookups` lookup table for a wrong module comes first because `ASTReader::finishPendingActions` processes `PendingUpdateRecords` in reverse order and the first encountered ObjCIvarDecl will end up the last in `ASTReader.Lookups`.
Fix by merging ObjCIvarDecl from different modules correctly and by using a canonical one in IRGen.
rdar://82854574
Differential Revision: https://reviews.llvm.org/D110280
|
 | clang/lib/AST/RecordLayoutBuilder.cpp |
 | clang/test/Modules/merge-objc-interface.m |
 | clang/lib/Serialization/ASTReaderDecl.cpp |
 | clang/include/clang/AST/DeclObjC.h |
Commit
4281946390989a0392e42e3f02b9d93a80234674
by ravishankarm[mlir][Tensor] Add ReifyRankedShapedTypeOpInterface to tensor.extract_slice.
Differential Revision: https://reviews.llvm.org/D111263
|
 | mlir/lib/Dialect/Tensor/IR/TensorOps.cpp |
 | mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td |
 | mlir/test/Dialect/Tensor/resolve-shaped-type-result-dims.mlir |
Commit
ef85ea9a4fbd65e7df2cef0b058f733dee15a42c
by Vitaly Buka[msan] Print both shadow and user address
before: 00 00 00 00 ff ff ff ff 00 00 00 00 00 00 00 00 Shadow map of [0x211000000005, 0x21100000012e), 297 bytes: now: 0x2f60d213ac10[0x7f60d213ac10] 00 00 00 00 ff ff ff ff 00 00 00 00 00 00 00 00 Shadow map [0x211000000005, 0x21100000012e) of [0x711000000005, 0x711000000135), 297 bytes:
Differential Revision: https://reviews.llvm.org/D111261
|
 | compiler-rt/test/msan/msan_check_mem_is_initialized.cpp |
 | compiler-rt/test/msan/msan_print_shadow3.cpp |
 | compiler-rt/test/msan/msan_dump_shadow.cpp |
 | compiler-rt/test/msan/msan_print_shadow.cpp |
 | compiler-rt/lib/msan/msan_report.cpp |
 | compiler-rt/test/msan/msan_print_shadow2.cpp |
 | compiler-rt/lib/msan/msan.cpp |
Commit
44710940af5bed3c338c4c397c561bfb83790218
by jhuber6[OpenMP][FIX] Data race in the SPMD execution of the new runtime
We need to synchronize the threads *before* we destroy the RAII objects that hold the old values and not after to avoid threads executing the parallel region but seeing an inconsistent state.
Reviewed By: tianshilei1992
Differential Revision: https://reviews.llvm.org/D111369
|
 | openmp/libomptarget/DeviceRTL/src/Parallelism.cpp |
Commit
6f9b189aa64564346d6d8845606b15ca5a4a90d4
by powerman1st[RISCV][test] Add more tests of (add (mul r, c0), c1)
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D111140
|
 | llvm/test/CodeGen/RISCV/addimm-mulimm.ll |
Commit
c236883b6ba791881256b31cfdb8a8520a821a67
by pengfei.wang[X86] Optimize fdiv with reciprocal instructions for half type
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D110557
|
 | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp |
 | llvm/lib/Target/X86/X86ISelLowering.cpp |
 | llvm/test/CodeGen/X86/avx512fp16-arith.ll |
 | llvm/test/CodeGen/X86/avx512fp16-arith-vl-intrinsics.ll |
 | llvm/test/CodeGen/X86/avx512fp16vl-intrinsics.ll |
 | llvm/test/CodeGen/X86/avx512fp16-intrinsics.ll |
Commit
faa0e2ae7644c332180cfe4e19daf378bc7a46a9
by pengfei.wang[SelectionDAG] Fix shift libcall ABI mismatch in shift-amount argument
The shift libcalls have a shift amount parameter of MVT::i32, but sometimes ExpandIntRes_Shift may be called with a node whose second operand is a type that is larger than that. This leads to an ABI mismatch, and for example causes a spurious zeroing of a register in RV32 for 64-bit shifts. Note that at present regular shift intstructions already have their shift amount operand adapted at SelectionDAGBuilder::visitShift time, and funnelled shifts bypass that.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D110508
|
 | llvm/test/CodeGen/RISCV/shifts.ll |
 | llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp |
 | llvm/test/CodeGen/X86/shift_minsize.ll |
 | llvm/test/CodeGen/AArch64/shift_minsize.ll |
Commit
af4599b8abcaff02450449a22a7206dbb694b952
by tianshilei1992[OpenMP][DeviceRTL] Add the support for printf in a freestanding way
For NVPTX, `printf` can be used just with a function declaration. For AMDGCN, an function definition is added, but it simply returns.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D109728
|
 | openmp/libomptarget/DeviceRTL/include/Debug.h |
Commit
9efdca87c78256bb00ed51521272dec2deed7f23
by jhuber6[OpenMP] Introduce new flags to assert thread and team usage in the runtime
This patch adds two flags to be supported for the new runtime. The flags are `-fopenmp-assume-threads-oversubscription` and -fopenmp-assume-teams-oversubscription`. These add global values that can be checked by the work sharing runtime functions to make better judgements about how to distribute work between the threads.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D111348
|
 | clang/lib/Frontend/CompilerInvocation.cpp |
 | clang/test/OpenMP/target_globals_codegen.cpp |
 | llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h |
 | llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp |
 | clang/include/clang/Basic/LangOptions.def |
 | clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp |
 | clang/test/OpenMP/target_debug_codegen.cpp |
 | clang/include/clang/Driver/Options.td |
 | clang/lib/Driver/ToolChains/Clang.cpp |
Commit
5f4c91583ee772a6ce2c4f192e25b07e6075eb00
by czhengsz[XCOFF] support DWARF for 32-bit XCOFF for object output
Reviewed By: jsji
Differential Revision: https://reviews.llvm.org/D97184
|
 | llvm/test/CodeGen/PowerPC/aix-dwarf.ll |
 | llvm/test/DebugInfo/XCOFF/empty.ll |
 | llvm/lib/MC/MCSectionXCOFF.cpp |
 | llvm/lib/MC/XCOFFObjectWriter.cpp |
Commit
8a959625c433f311233682afa7bfe1c76367700d
by mkazantsev[LoopPeel] Peel loops with deoptimizing exits
Added support for peeling loops with "deoptimizing" exits - such exits that it or any of its children (or any of their children, etc) either has a @llvm.experimental.deoptimize call prior to the terminating return instruction of this basic block or is terminated with unreachable. All blocks in the the sequence must have a single successor, maybe except for the last one.
Previously we only checked the exit block for being deoptimizing. Now we check if the last reachable block from the exit is deoptimizing.
Patch by Dmitry Makogon!
Differential Revision: https://reviews.llvm.org/D110922 Reviewed By: mkazantsev
|
 | llvm/lib/Transforms/Utils/LoopPeel.cpp |
 | llvm/lib/Transforms/Utils/BasicBlockUtils.cpp |
 | llvm/test/Transforms/LoopUnroll/peel-multiple-unreachable-exits.ll |
 | llvm/include/llvm/Transforms/Utils/BasicBlockUtils.h |
Commit
7c1171a0f36ac244d687cd9d3d456f8e5de58b5c
by czhengszuse right separator for windows.
|
 | llvm/test/DebugInfo/XCOFF/empty.ll |
Commit
f2ad8c9dc6d84cd5f080845848b63da5d524c9d7
by craig.topper[RISCV] Remove experimental-b extension that includes all Zb* extensions
At this point it looks like a B extension will never exist. Instead Zba, Zbb, Zbc, and Zbs are individual extensions being ratified together as a package. Unknown at this time when or if the other Zb* extensions will be ratified.
This patch removes references to the B extension. I've updated and split tests accordingly.
This has been split from D110669 to make review a little easier.
Differential Revision: https://reviews.llvm.org/D111338
|
 | clang/test/Driver/riscv-arch.c |
 | llvm/test/MC/RISCV/rv32zba-valid.s |
 | llvm/test/MC/RISCV/rv32zbt-valid.s |
 | llvm/test/MC/RISCV/rv32zbe-valid.s |
 | llvm/test/CodeGen/RISCV/rv32zbe-intrinsic.ll |
 | clang/test/Preprocessor/riscv-target-features.c |
 | llvm/test/MC/RISCV/rv64zbe-valid.s |
 | llvm/lib/Target/RISCV/RISCVInstrInfoZb.td |
 | llvm/test/CodeGen/RISCV/rv32zbb.ll |
 | llvm/test/MC/RISCV/rv64zbp-aliases-valid.s |
 | llvm/lib/Target/RISCV/RISCVSubtarget.h |
 | llvm/test/MC/RISCV/rv64zbr-valid.s |
 | llvm/test/MC/RISCV/rv64zbf-valid.s |
 | llvm/test/MC/RISCV/rv64zbt-valid.s |
 | llvm/test/CodeGen/RISCV/rv64zbb-zbp.ll |
 | llvm/test/MC/RISCV/rv64zbs-invalid.s |
 | llvm/test/CodeGen/RISCV/rv64zbp-intrinsic.ll |
 | llvm/test/MC/RISCV/rv64zbs-valid.s |
 | llvm/test/MC/RISCV/attribute-arch.s |
 | llvm/test/CodeGen/RISCV/rv64zbc-intrinsic.ll |
 | llvm/test/MC/RISCV/rv32zbs-invalid.s |
 | llvm/test/CodeGen/RISCV/rv32zba.ll |
 | llvm/test/MC/RISCV/rv32zbs-aliases-valid.s |
 | llvm/test/MC/RISCV/rv64zbbp-valid.s |
 | llvm/test/CodeGen/RISCV/attributes.ll |
 | llvm/test/CodeGen/RISCV/rv32zbp.ll |
 | llvm/lib/Target/RISCV/RISCVInstrInfo.td |
 | llvm/test/CodeGen/RISCV/rv64zbb.ll |
 | clang/lib/Basic/Targets/RISCV.cpp |
 | llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp |
 | llvm/test/MC/RISCV/rv32zbb-aliases-valid.s |
 | llvm/test/CodeGen/RISCV/rv32zbc-intrinsic.ll |
 | llvm/test/MC/RISCV/rv64zbb-aliases-valid.s |
 | llvm/test/CodeGen/RISCV/rv32zbb-intrinsic.ll |
 | llvm/test/MC/RISCV/rv64zba-valid.s |
 | llvm/test/Transforms/LoopIdiom/RISCV/popcnt.ll |
 | llvm/test/MC/RISCV/rv64zbs-aliases-valid.s |
 | llvm/test/MC/RISCV/rv64zbp-valid.s |
 | llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp |
 | llvm/test/CodeGen/RISCV/rv64zbp.ll |
 | llvm/test/MC/RISCV/rv32zbp-valid.s |
 | llvm/lib/Target/RISCV/RISCV.td |
 | llvm/test/MC/RISCV/rv64zbm-valid.s |
 | llvm/test/MC/RISCV/rv64b-aliases-valid.s |
 | llvm/test/CodeGen/RISCV/rv32zbs.ll |
 | llvm/test/MC/RISCV/rv64zba-aliases-valid.s |
 | llvm/test/MC/RISCV/rv32zbp-only-valid.s |
 | llvm/test/MC/RISCV/rv32zbbp-only-valid.s |
 | clang/lib/Driver/ToolChains/Arch/RISCV.cpp |
 | llvm/test/CodeGen/RISCV/rv32zbt.ll |
 | llvm/test/CodeGen/RISCV/rv64zba.ll |
 | llvm/test/CodeGen/RISCV/rv64zbb-intrinsic.ll |
 | llvm/test/MC/RISCV/rv64zbb-valid.s |
 | llvm/test/MC/RISCV/rv32zbp-aliases-valid.s |
 | llvm/test/CodeGen/RISCV/rv32zbp-intrinsic.ll |
 | llvm/test/CodeGen/RISCV/rv64zbe-intrinsic.ll |
 | llvm/test/CodeGen/RISCV/rv64zbt.ll |
 | llvm/lib/Target/RISCV/RISCVInstrInfoB.td |
 | llvm/test/MC/RISCV/rv32zbb-valid.s |
 | clang/lib/Basic/Targets/RISCV.h |
 | llvm/test/MC/RISCV/rv32b-aliases-valid.s |
 | llvm/test/CodeGen/RISCV/rv32zbb-zbp.ll |
 | llvm/test/MC/RISCV/rv32zbr-valid.s |
 | llvm/test/MC/RISCV/rv32zbc-valid.s |
 | llvm/test/MC/RISCV/rv32zbf-valid.s |
 | llvm/test/CodeGen/RISCV/rv64zbs.ll |
 | llvm/test/MC/RISCV/rv32zbs-valid.s |
 | llvm/test/MC/RISCV/rv32zbbp-valid.s |
Commit
d4c1f222f2afe40567fb2602955cf5930ce2a5f2
by aeubanksRevert "[sanitizer] Support Intel CET"
This reverts commit fdf4c035225de52f596899931b1f6100e5e3e928.
Breaks macOS bots, e.g. https://crbug.com/1257863. Still figuring out if this is actually supported on macOS. Other places that include <cet.h> only do so on Linux.
|
 | compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors_vfork_i386.inc.S |
 | compiler-rt/lib/sanitizer_common/sanitizer_asm.h |
 | compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors_vfork_x86_64.inc.S |
 | compiler-rt/lib/hwasan/hwasan_setjmp_x86_64.S |
 | compiler-rt/lib/tsan/rtl/tsan_rtl_amd64.S |
Commit
82cd8b81aad5f33b054e6576b5ee85ceb9063107
by joker.ephFix test-rsqrt.mlir to accept AMD's approximation of rsqrt as well
These kind of function can behave differently on these X86 chips, there isn't really "one true answer" so we'll accept both.
Also remove spurious passes and use mattr="avx" to match the instruction used here.
Differential Revision: https://reviews.llvm.org/D111373
|
 | mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-rsqrt.mlir |