Changes

[builder][amdgpu][openmp] disable use of ccache for now

Revert "[builder][amdgpu][openmp] disable use of ccache for now"

This reverts commit 856646ccf14eb08adc29fef8d4a591465b835791.

CCACHE is helping our build times. putting it back

[Orc] Support atexit in Orc(JITLink)

There is a bug reported at https://bugs.llvm.org/show_bug.cgi?id=48938

After looking through the glibc, I found the `atexit(f)` is the same as `__cxa_atexit(f, NULL, NULL)`. In orc runtime, we identify different JITDylib by their dso_handle value, so that a NULL dso_handle is invalid. So in this patch, I added a `PlatformJDDSOHandle` to ELFNixRuntimeState, and functions which are registered by atexit will be registered at PlatformJD.

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D111413

[Test] Add commit justifying revert of D110922

Test by Arthur Eubanks!

[LoopDeletion] Support selects when symbolically evaluating 1st iteration

Adds support for selects for which we know value on the 1st iteration.

Differential Revision: https://reviews.llvm.org/D104111
Reviewed By: nikic

[Orc] Fix global variable destructor function support when --jit-kind=orc-lazy

The bug was reported here https://bugs.llvm.org/show_bug.cgi?id=52030

This patch follows the idea that @lhames commented in the above webpage.

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D110990

[MCPseudoProbe] Clean up includes (NFC)

This was including various things that don't appear to be used in
the header at all.

[Type] Avoid APFloat.h include (NFC)

This is only used by a handful of methods working on fltSemantics,
and having these defined inline in the header does not look
particularly important.

[clang-format][docs][NFC] correct the "first supported versions" of some of the clang-format options

Some of the first supported version field were incorrectly attributed to a later branch.

It wasn't possible to correctly determine the "introduced version" with my naive implementation
using git blame alone, (especially if the type had been changed from a bool -> enum)

I saw more things attributed to clang-format 13 than I remembered and reviewed
those options to determine their introduced version.

Reviewed By: HazardyKnusperkeks

Differential Revision: https://reviews.llvm.org/D110803

[clang-format][NFC] Fix spelling mistake

[Driver][OpenBSD] Use ToolChain reference instead of getToolChain().

Differential Revision: https://reviews.llvm.org/D111462

[clang-format][NFC] Fix spelling mistakes

[libc++][doc] Update format status.

Updated based on recent commits.

[NFC][libc++] Update back_insert_iterator style.

As suggested in D110573 land the rename part separately.

Fix a diagnoses-valid in C++20 with variadic macros

C++20 and later allow you to pass no argument for the ... parameter in
a variadic macro, whereas earlier language modes and C disallow it.

We no longer diagnose in C++20 and later modes. This fixes PR51609.

[lldb][NFC] Early-exit in DWARFASTParserClang::ParseSingleMember

ParseSingleMember has two large ifs around the back of it's body:
`if (!is_artificial)` and `if (member_type)`. This patch just converts those
to early-exits. The patch is NFC. It even retains the curious fact that
Objective-C properties that fail to parse are silently ignored, but now there
is at least a FIXME that points this out.

[lldb] [DynamicRegisterInfo] Remove obsolete dwarf typedefs (NFC)

Revert "Reland "[gn build] (manually) port 6fe2beba7d2a (ExceptionTests)""

This reverts commit 842035d8bdf470af05848114ce1808802c5d4aef.
1dba6b3 was reverted yet again in 04aff395047a.

[AArch64] Make -mcpu=generic schedule for an in-order core

We would like to start pushing -mcpu=generic towards enabling the set of
features that improves performance for some CPUs, without hurting any
others. A blend of the performance options hopefully beneficial to all
CPUs. The largest part of that is enabling in-order scheduling using the
Cortex-A55 schedule model. This is similar to the Arm backend change
from eecb353d0e25ba which made -mcpu=generic perform in-order scheduling
using the cortex-a8 schedule model.

The idea is that in-order cpu's require the most help in instruction
scheduling, whereas out-of-order cpus can for the most part out-of-order
schedule around different codegen. Our benchmarking suggests that
hypothesis holds. When running on an in-order core this improved
performance by 3.8% geomean on a set of DSP workloads, 2% geomean on
some other embedded benchmark and between 1% and 1.8% on a set of
singlecore and multicore workloads, all running on a Cortex-A55 cluster.

On an out-of-order cpu the results are a lot more noisy but show flat
performance or an improvement. On the set of DSP and embedded
benchmarks, run on a Cortex-A78 there was a very noisy 1% speed
improvement. Using the most detailed results I could find, SPEC2006 runs
on a Neoverse N1 show a small increase in instruction count (+0.127%),
but a decrease in cycle counts (-0.155%, on average). The instruction
count is very low noise, the cycle count is more noisy with a 0.15%
decrease not being significant. SPEC2k17 shows a small decrease (-0.2%)
in instruction count leading to a -0.296% decrease in cycle count. These
results are within noise margins but tend to show a small improvement in
general.

When specifying an Apple target, clang will set "-target-cpu apple-a7"
on the command line, so should not be affected by this change when
running from clang. This also doesn't enable more runtime unrolling like
-mcpu=cortex-a55 does, only changing the schedule used.

A lot of existing tests have updated. This is a summary of the important
differences:
 - Most changes are the same instructions in a different order.
 - Sometimes this leads to very minor inefficiencies, such as requiring
   an extra mov to move variables into r0/v0 for the return value of a test
   function.
 - misched-fusion.ll was no longer fusing the pairs of instructions it
   should, as per D110561. I've changed the schedule used in the test
   for now.
 - neon-mla-mls.ll now uses "mul; sub" as opposed to "neg; mla" due to
   the different latencies. This seems fine to me.
 - Some SVE tests do not always remove movprfx where they did before due
   to different register allocation giving different destructive forms.
 - The tests argument-blocks-array-of-struct.ll and arm64-windows-calls.ll
   produce two LDR where they previously produced an LDP due to
   store-pair-suppress kicking in.
 - arm64-ldp.ll and arm64-neon-copy.ll are missing pre/postinc on LPD.
 - Some tests such as arm64-neon-mul-div.ll and
   ragreedy-local-interval-cost.ll have more, less or just different
   spilling.
 - In aarch64_generated_funcs.ll.generated.expected one part of the
   function is no longer outlined. Interestingly if I switch this to use
   any other scheduled even less is outlined.

Some of these are expected to happen, such as differences in outlining
or register spilling. There will be places where these result in worse
codegen, places where they are better, with the SPEC instruction counts
suggesting it is not a decrease overall, on average.

Differential Revision: https://reviews.llvm.org/D110830

[CanonicalizeFreeze] Drop IVUsers.h include (NFC)

Looking for users of IVUsers, this was a false positive. Only LSR
uses IVUsers.

Fixed some errors detected by PVS Studio

Fixed some errors detected by PVS Studio

[InstCombine] add tests for (iN X s>> N-1) | Y; NFC

These are for a sibling fold suggested in D111410.
The tests correspond to the 'and' tests added with:
a35673f4cfc4

[InstCombine] add tests for icmp of negated op; NFC

[InstCombine] enhance icmp with sub folds

There were 2 related but over-specified folds for:
C1 - X == C

One allowed multi-use but was limited to equal constants.
The other allowed different constants but disallowed multi-use.

This combines the 2 folds into a more general match.
The test diffs show the multi-use cases that were falling
through the cracks.

https://alive2.llvm.org/ce/z/4_hEt2

  define i1 @src(i8 %x, i8 %subC, i8 %C) {
    %s = sub i8 %subC, %x
    %r = icmp eq i8 %s, %C
    ret i1 %r
  }

  define i1 @tgt(i8 %x, i8 %subC, i8 %C) {
    %newC = sub i8 %subC, %C
    %isneg = icmp eq i8 %x, %newC
    ret i1 %isneg
  }

[IR] Remove arg_operands and getNumArgOperands (NFC)

The last uses were removed on Oct 8, 2021 in commit
46ef2e0bf995d8db4cbdf69f3d1bbc2487030ba0.

This is a relanding of b2ee408dde374d6a27a34746fd7c7b5bab97ea89.

[libomptarget][amdgpu][NFC] tweak a comment

Fix a comment at call-site to match the declared parameter (NFC)

(clang-tidy warning)

[clang-format][NFC] improve the visual of the "clang-formatted %"

NOTE: some files are being removed from those files that are clang-formatted
which means some lack of formatting is slipping through the net on reviews

[mlir] Vectorize induction variables

1. Add support to vectorize induction variables of loops that are
   not mapped to any vector dimension in SuperVectorize pass.
2. Fix a bug in getForInductionVarOwner.

Reviewed By: dcaballe

Differential Revision: https://reviews.llvm.org/D111370

[libc++][test] Remove empty {ind.move.subsumption.compile.pass.cpp}

`{ind.move.subsumption.compile.pass.cpp}` was accidentally commited in
https://reviews.llvm.org/D102639. Per the conversation on Discord in

[lldb/test] Disable 'TestScriptedProcess.py' on macOS

This is disabling 'TestScriptedProcess.py' on macOS since it fails on
Green Dragon: https://green.lab.llvm.org/green/view/LLDB/job/lldb-cmake/35974

Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>

[clang] Fix JSON AST output when a filter is used

Without this, the combination of `-ast-dump=json` and `-ast-dump-filter FILTER` produces invalid JSON: the first line is a string that says `Dumping $SOME_DECL_NAME: `.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D108441

[GlobalISel] Fix the stores of truncates -> wide store combine for non-evenly dividing type sizes.

If the wide store we'd generate is not a multiple of the memory type of the
narrow stores (e.g. s48 and s32), we'd assert. Fix that.

[BitcodeAnalyzer] allow a motivated user to dump BLOCKINFO

This adds the `--dump-blockinfo` flag to `llvm-bcanalyzer`, allowing a sufficiently motivated user to dump (parts of) the `BLOCKINFO_BLOCK` block. The default behavior is unchanged, and `--dump-blockinfo` only takes effect in the same context as other flags that control dump behavior (i.e., requires that `--dump` is also passed).

Reviewed By: tejohnson

Differential Revision: https://reviews.llvm.org/D107536

[builder][amdgpu][openmp] disable use of ccache for now

Revert "[builder][amdgpu][openmp] disable use of ccache for now"

This reverts commit 856646ccf14eb08adc29fef8d4a591465b835791.

CCACHE is helping our build times. putting it back