Changes

clang-ve-ninja: build and install compiler-rt

clang-ve-ninja: check compiler-rt

mlir-s390x-linux: collapse requests

[MLIR] Fix affine loop unroll corner case for full unroll

Fix affine loop unroll for zero trip count loops. Add missing check.

Differential Revision: https://reviews.llvm.org/D111375

[NFC] Allow to include sanitizer_allocator_bytemap.h

[NFC][sanitizer] Rename ByteMap to Map

[NFC][sanitizer] Add constexpr to FlatMap::size

[NFC][sanitizer] Clang-format sanitizer_flat_map.h

[NFC][sanitizer] Add a few consts

[DFSan] Fix flakey release_shadow_space.c accounting for Origin chains.

Test sometimes fails on buildbot (after two non-Origins executions):

/usr/bin/ld: warning: Cannot export local symbol 'dfsan_flush'
RSS at start: 4620, after mmap: 107020, after mmap+set label: 209424, after fixed map: 4624, after another mmap+set label: 209424, after munmap: 4624
/usr/bin/ld: warning: Cannot export local symbol 'dfsan_flush'
RSS at start: 4620, after mmap: 107020, after mmap+set label: 209424, after fixed map: 4624, after another mmap+set label: 209424, after munmap: 4624
/usr/bin/ld: warning: Cannot export local symbol 'dfsan_flush'
RSS at start: 4620, after mmap: 107020, after mmap+set label: 317992, after fixed map: 10792, after another mmap+set label: 317992, after munmap: 10792
release_shadow_space.c.tmp: /b/sanitizer-x86_64-linux/build/llvm-project/compiler-rt/test/dfsan/release_shadow_space.c:91: int main(int, char **): Assertion `after_fixed_mmap <= before + delta' failed.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D111522

[LoopIdiom] Fix store size SCEV type.

We were using the type of the loop back edge count to represent the
store size. This failed for small loop counts (e.g. in the added test,
the loop count was an i2).

Use the index type instead.

Fixes PR52104.

Differential Revision: https://reviews.llvm.org/D111401

[LLDB] Skip TestScriptedProcess on Arm/AArch64 Linux

This is failing on Arm and AArch64 Linux buildbots since the time it was
comitted.

https://lab.llvm.org/buildbot/#/builders/96/builds/12628

Differential Revision: https://reviews.llvm.org/D107585

re-land "[AA] Teach BasicAA to recognize basic GEP range information."

Now that PR52104 is fixed.

[fir] Add the abstract result conversion pass

Add pass that convert abstract result to function argument.
This pass is needed before the conversion to LLVM IR.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: schweitz

Differential Revision: https://reviews.llvm.org/D111146

Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>

[libcxx][pretty printers] Disable u16string tests

Due to reported failures in a local build.

FAIL: Something is wrong in the test framework.
Converting character sets: Invalid argument.

(was enabled in https://reviews.llvm.org/D111138)

[LoopVectorize] Permit vectorisation of more select(cmp(), X, Y) reduction patterns

This patch adds further support for vectorisation of loops that involve
selecting an integer value based on a previous comparison. Consider the
following C++ loop:

  int r = a;
  for (int i = 0; i < n; i++) {
    if (src[i] > 3) {
      r = b;
    }
    src[i] += 2;
  }

We should be able to vectorise this loop because all we are doing is
selecting between two states - 'a' and 'b' - both of which are loop
invariant. This just involves building a vector of values that contain
either 'a' or 'b', where the final reduced value will be 'b' if any lane
contains 'b'.

The IR generated by clang typically looks like this:

  %phi = phi i32 [ %a, %entry ], [ %phi.update, %for.body ]
  ...
  %pred = icmp ugt i32 %val, i32 3
  %phi.update = select i1 %pred, i32 %b, i32 %phi

We already detect min/max patterns, which also involve a select + cmp.
However, with the min/max patterns we are selecting loaded values (and
hence loop variant) in the loop. In addition we only support certain
cmp predicates. This patch adds a new pattern matching function
(isSelectCmpPattern) and new RecurKind enums - SelectICmp & SelectFCmp.
We only support selecting values that are integer and loop invariant,
however we can support any kind of compare - integer or float.

Tests have been added here:

  Transforms/LoopVectorize/AArch64/sve-select-cmp.ll
  Transforms/LoopVectorize/select-cmp-predicated.ll
  Transforms/LoopVectorize/select-cmp.ll

Differential Revision: https://reviews.llvm.org/D108136

[BasicAA][NFC] Improve comment.

[AArch64] Emit AssertZExt for i1 arguments

AAPCS requires i1 argument to be zero-extended to 8-bits by the
caller. Emit a new AArch64ISD::ASSERT_ZEXT_BOOL hint (or AssertZExt
for GlobalISel) to enable some optimization opportunities. In
particular, when the argument is forwarded to the callee, we can avoid
zero-extension and use it as-is.

Differential Revision: https://reviews.llvm.org/D107160

[Clang] Enable IC/IF mode for __ibm128

As for 128-bit floating points on PowerPC, compiler should have three
machine modes:

- IFmode, always IBM extended double
- KFmode, always IEEE 754R 128-bit floating point
- TFmode, matches the semantics for long double

This commit adds support for IF mode with its complex variant, IC mode.

Reviewed By: rjmccall

Differential Revision: https://reviews.llvm.org/D109950

[LLDB] Remove xfail decorator TestInferiorAssert.py AArch64/Linux

TestInferiorAssert.py test_inferior_asserting_disassemble passes after
upgrading LLDB AArch64/Linux buildbot to Ubuntu Focal.

[lldb] [ConnectionFileDescriptorPosix] Combine m_read_sp & m_write_sp

Combine m_read_sp and m_write_sp into a single m_io_sp.  In all
currently existing code paths, they are pointing to the same object
anyway.

Differential Revision: https://reviews.llvm.org/D111396

[lldb] [DynamicRegisterInfo] Remove non-const GetRegisterInfoAtIndex()

Differential Revision: https://reviews.llvm.org/D111408

[lldb] Make char[N] formatters respect the end of the array (PR44649)

I believe this is a more natural behavior, and it also matches what gdb
does.

Differential Revision: https://reviews.llvm.org/D111399

[AArch64][SVE] Ensure LowerEXTRACT_SUBVECTOR is not called for illegal types

The lowering for EXTRACT_SUBVECTOR should not be called during type
legalization, only as part of lowering, hence return SDValue() when
called on illegal types.

This also adds missing tests for extracting fixed types from illegal
scalable types.

Differential Revision: https://reviews.llvm.org/D111412

[lldb] Don't print to stderr in TypeSystemClang::GetBuiltinTypeForDWARFEncodingAndBitSize

The current code just prints to the System's 'error log' which is usually stderr
(+ some other log backend). Printing to stderr however just interferes with
LLDB's console UI, so when this code is triggered during for example command
completion it just breaks the LLDB console interface until the next redraw.

Instead just use the normal LLDB log which is by default hidden and is what
users usually attach to bug reports.

The only known bug that triggers this is
https://bugs.llvm.org/show_bug.cgi?id=46775

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D111149

[lldb] Add support for DW_AT_calling_convention to the DWARF parser

This adds support for parsing DW_AT_calling_convention in the DWARF parser.

The generic DWARF parsing code already support extracting this attribute from A
DIE and TypeSystemClang already offers a parameter to add a calling convention
to a function type (as the PDB parser supports calling convention parsing), so
this patch just converts the DWARF enum value to the Clang enum value and adds a
few tests.

There are two tests in this patch.:

* A unit test for the added DWARF parsing code that should run on all platforms.

* An API tests that covers the whole expression evaluation machinery by trying
to call functions with non-standard calling conventions. The specific subtests
are target specific as some calling conventions only work on e.g. win32 (or, if
they work on other platforms they only really have observable differences on a
specific target).  The tests are also highly compiler-specific, so if GCC or
Clang tell us that they don't support a specific calling convention then we just
skip the test.

Note that some calling conventions are supported by Clang but aren't implemented
in LLVM (e.g. `pascal`), so there we just test that if this ever gets
implemented in LLVM that LLDB works too. There are also some more tricky/obscure
conventions that are left out such as the different swift* conventions, some
planned Obj-C conventions (`Preserve*`), AAPCS* conventions (as the DWARF->Clang
conversion is ambiguous for AAPCS and APPCS-VFP) and conventions only used for
OpenCL etc.

Reviewed By: aprantl

Differential Revision: https://reviews.llvm.org/D108629

[flang][driver] Add actions that execute despite semantic errors

This patch adds a new abstract class for frontend actions:
`PrescanAndSemaDebugAction`. It's almost identical to
`PrescanAndSemaAction`, but in the presence of semantic errors it does
not skip the corresponding `ExecuteAction` specialisation. Instead, it
runs it as if there were no semantic errors. This class is for developer
actions only (i.e.  front-end driver options).

The new behaviour does not affect the return code from `flang-new -fc1`
when the input file is semantically incorrect. The return code is
inferred from the number of driver diagnostics generated in
`CompilerInstance::ExecuteAction` and this patch does not change that.
More specifically, the semantic errors are still reported and hence the
driver is able to correctly report that the compilation has failed (with
a non-zero return code).

This new base class is meant for debug actions only and
`DebugDumpAllAction` is updated to demonstrate the new behaviour. With
this change, `flang-new -fc1 -fdebug-dump-all` dumps the parse tree and
symbols for all input files, regardless of whether any semantic errors
were found.

This patch addresses https://bugs.llvm.org/show_bug.cgi?id=52097.

Differential Revision: https://reviews.llvm.org/D111308

[fir] Update clang-tidy for the Optimizer directory

Update .clang-tidy file with the value used in fir-dev.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: rovka

Differential Revision: https://reviews.llvm.org/D111525

Co-authored-by: Valentin Clement <clementval@gmail.com>

[lldb] [test] Rewrite g/p/G/P tests not to rely on hardcoded ARM regs

Rewrite the register reading/writing tests to use explicit qRegisterInfo
packets rather than relying on ARM registers being hardcoded in LLDB.
While at it, use x86_64 for tests -- since it was easier for me to get
the register lists from that architecture.

Differential Revision: https://reviews.llvm.org/D111496

[LLD] [TEST] Add test case for patching an absolute relocation to a weak undef

I noticed that we had this case in our internal testsuite but couldn't find it in LLD's tests.

This adds that case.

Differential Revision: https://reviews.llvm.org/D110716

[lldb][NFCI] Refactor out attribute parsing from DWARFASTParserClang::ParseSingleMember

D68422 introduced `ParsedDWARFTypeAttributes` which encapsulated attribute
parsing and storage into its own small struct. This patch is doing the same for
the member type attribute parsing. One utility class is parsing normal member
attributes and the other is parsing the dedicated Objective-C property
attributes.

Right now the patch just makes the `ParseSingleMember` function a bit shorter,
but the bigger benefit is that we can now split up the function into Objective-C
property parsing and parsing of normal members (struct/class members and
Objective-C ivars). The only shared code between those two parsing logic is the
normal member attribute parsing.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D111494

[X86][AVX] Add test case for PR52122

[fir] Clean up InitFIR.h

Clean up InitFIR.h file.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D111539

Co-authored-by: Valentin Clement <clementval@gmail.com>

[lldb][NFC] Remove unnecessary reference from ParseChildMembers's default_accessibility parameter

[X86][AVX] Ensure we retain zero elements in select(pshufb,pshufb) -> or(pshufb,pshufb) fold (PR52122)

The select(pshufb,pshufb) -> or(pshufb,pshufb) fold uses getConstVector to create the refreshed pshufb masks, which treats all negative indices as undef.

PR52122 shows that if we were selecting an element that the PSHUFB has set to zero we must set it back to 0x80 when we recreate the PSHUFB mask and not just leave it as SM_SentinelZero

[fir] Add fir.convert canonicalization patterns

Add rewrite patterns for fir.convert op canonicalization.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D111537

Co-authored-by: Valentin Clement <clementval@gmail.com>

[Object] Deduplicate the three createError functions

The Object library currently has three identical functions that translate a
Twine into a parser error. Until recently these functions have coexisted
peacefully, but since D110320 Clang with enabled modules is now diagnosing that
we have several definitions of `createError` in Object.

This patch just merges them all and puts them into Object's `Error.h` where the
error code for `parse_failed` is also defined which seems cleaner and unbreaks
the bots.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D111541

[lldb] [ABI] Apply AugmentRegisterInfo() to DynamicRegisterInfo::Registers

Call ABI::AugmentRegisterInfo() once with a vector of all defined
registers rather than calling it for every individual register.  Move
and rename RemoteRegisterInfo from gdb-remote to
DynamicRegisterInfo::Register, and use this class when augmenting
registers.

Differential Revision: https://reviews.llvm.org/D111142

[lldb] [Target] Make addSupplementaryRegister() work on Register vector

Move DynamicRegisterInfo::AddSupplementaryRegister() into a standalone
function working on std::vector<DynamicRegisterInfo::Register>.

Differential Revision: https://reviews.llvm.org/D111295

[lldb] [ABI/AArch64] Add pseudo-regs if missing

Create pseudo-registers on the AArch64 target if they are not provided
by the remote server. This is the case for gdbserver. The created
registers are:

- 32-bit wN partials for 64-bit xN registers
- double precision floating-point dN registers (overlapping with vN)
- single precision floating-point sN registers (overlapping with vN)

Differential Revision: https://reviews.llvm.org/D109876

[lldb] [DynamicRegisterInfo] Support setting from vector<Register>

Add an overload of DynamicRegisterInfo::SetRegisterInfo() that accepts
a std::vector<Register> as an argument.  This moves the conversion
from DRI::Register to RegisterInfo directly into DynamicRegisterInfo,
and avoids the necessity of creating fully-compatible intermediate
RegisterInfo instances.

While the new method could technically reuse AddRegister(), the ultimate
goal is to replace AddRegister() with SetRegisterInfo() entirely.

Differential Revision: https://reviews.llvm.org/D111435

[MS compat] Handle #pragma fenv_access like #pragma STDC FENV_ACCESS (PR50694)

This adds support for the MSVC spelling of the pragma in -fms-extensions
mode.

Differential revision: https://reviews.llvm.org/D111440

[mlir] add user-level documentation for Python bindings

Until now, we only had documentation oriented towards developers of the
bindings. Provide some documentation for users of the bindings that don't want
or need to understand the inner workings.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D111540

[SimpleLoopUnswitch] Re-fix introduction of UB when hoisted condition may be undef or poison

https://bugs.llvm.org/show_bug.cgi?id=27506
https://bugs.llvm.org/show_bug.cgi?id=31652
https://bugs.llvm.org/show_bug.cgi?id=51043

Problems with SimpleLoopUnswitch cause the bug reports above.

```
while (...) {
  if (C) { A }
  else   { B }
}
Into:

C' = freeze(C)
if (C') {
  while (...) { A }
} else {
  while (...) { B }
}
```
This problem can be solved by adding a freeze on hoisted branches(above transform) and has been solved by D29015.
However, D29015 is now reverted by performance regression(https://github.com/llvm/llvm-project/commit/2b5a8976514de326bb84f0913d9d451089c11d22)

It is not the first time that an added freeze has caused performance regression.
SimplifyCFG also had a problem with UB caused by branching-on-undef, which was solved by adding freeze to the branching condition. (D104569)
Performance regression occurred in D104569, and patches such as D105344 and D105392 were written to minimize it.

This patch will correct the SimpleLoopUnswitch as D104569 handles the SimplyCFG while minimizing performance loss by introducing patches like D105344 and D105392(This patch was rebased with the author's permission)

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D106041

[OpenMP] libomp: add OpenMP 5.1 memory allocation routines.

Aligned allocation routines added.
Fortran interfaces added for all allocation routines.

Differential Revision: https://reviews.llvm.org/D110923

[ORC] Add static and dynamic library generator support to C API.

Adds LLVMOrcCreateStaticLibrarySearchGeneratorForPath and
LLVMOrcCreateDynamicLibrarySearchGeneratorForPath functions to create generators
for static and dynamic libraries.

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D108535

[Clang][ARM][AArch64] Add support for Armv9-A, Armv9.1-A and Armv9.2-A

armv9-a, armv9.1-a and armv9.2-a can be targeted using the -march option
both in ARM and AArch64.

 - Armv9-A maps to Armv8.5-A.
 - Armv9.1-A maps to Armv8.6-A.
 - Armv9.2-A maps to Armv8.7-A.
 - The SVE2 extension is enabled by default on these architectures.
 - The cryptographic extensions are disabled by default on these
 architectures.

The Armv9-A architecture is described in the Arm® Architecture Reference
Manual Supplement Armv9, for Armv9-A architecture profile
(https://developer.arm.com/documentation/ddi0608/latest).

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D109517

[ELF] Demote !isUsedInRegularObj lazy symbol

I think D79300 has fixed the D51892 (`__i686.get_pc_thunk.bx`) issue, so
we can bring back rL330869.
D79300 says `would error undefined symbol instead of the more relevant discarded section`
but it doesn't reproduce now.

This avoids a quirk in `isUndefWeak()`.

Reviewed By: peter.smith

Differential Revision: https://reviews.llvm.org/D111365

[ORC] Fix an 80 column violation.

[RISCV] Require tail policy argument to builtins to be an integer constant expression

The IR intrinsics use ImmArg for the policy operand so this needs to be enforced as a constant in the frontend.

Differential Revision: https://reviews.llvm.org/D110779

[SCEV] Extend trip count to avoid overflow by default

As a brief reminder, an "exit count" is the number of times the backedge executes before some event. It can be zero if we exit before the backedge is reached. A "trip count" is the number of times the loop header is entered if we branch into the loop. In general, TC = BTC + 1 and thus a zero trip count is ill defined

There is a cornercases which we don't handle well. Let's assume i8 for our examples to keep things simple. If BTC = 255, then the correct trip count is 256. However, 256 is not representable in i8.

In theory, code which needs to reason about trip counts is responsible for checking for this cornercase, and either bailing out, or handling it correctly. Historically, we don't have a great track record about actually doing so.

When reviewing D109676, I found myself asking a basic question. Was there any good reason to preserve the current wrap-to-zero behavior when converting from backedge taken counts to trip counts? After reviewing existing code, I could not find a single case which appears to correctly and precisely handle the overflow case.

This patch changes the default behavior to extend instead of wrap. That is, if the result might be 256, we return a value of i9 type to ensure we interpret the count correctly. I did leave the legacy behavior as an option since a) loop-flatten stops triggering if I extend due to weirdly specific pattern matching I didn't understand and b) we could reasonably use the mode if we'd externally established a lack of overflow.

I want to emphasize that this change is *not* NFC. There are two call sites (one in ScalarEvolution.cpp, one in LoopCacheAnalysis.cpp) which are switched to the extend semantics. The former appears imprecise (but correct) for a constant 255 BTC. The later appears incorrect, though I don't have a test case.

Differential Revision: https://reviews.llvm.org/D110587

[llc] Support -time-trace in llc

Mostly copied from opt.cpp.

Reviewed By: hans

Differential Revision: https://reviews.llvm.org/D111466

[docs] Mention in release notes that we now support 2^32 alignment

Missed in D110451.

Reviewed By: hans

Differential Revision: https://reviews.llvm.org/D111472

[AMDGPU] Support shared literals in FMAMK/FMAAK

These instructions should allow src0 to be a literal with the same
value as the mandatory other literal. Enable it by introducing an
operand that defers adding its value to the MI when decoding till
the mandatory literal is parsed.

Reviewed By: dp, foad

Differential Revision: https://reviews.llvm.org/D111067

Change-Id: I22b0ae0d35bad17b6f976808e48bffe9a6af70b7

[scudo] Skip AllocAfterFork test on machines with low max_map_count

Reducing the number of iterations in that test with D111342 helped,
but the failure still occured flakily when the test is ran as part
of a large test suite.

Reducing further the number of iterations might not be good enough,
so we will skip the test if the `max_map_count` variable can be
read, and if lower than a given threshold.

Differential Revision: https://reviews.llvm.org/D111465

[flang][NFC] Document behavior for nonspecified/ambiguous cases

Add explicit documentation for a couple of cases where the Fortran
standard has been observed to be ambiguous or nonspecific and we've
had to choose the behavior of the implementation from some possible
alternatives (and may be distinct from other implementations).

Differential Revision: https://reviews.llvm.org/D111446

[Sema] Use llvm::is_contained (NFC)

Revert "Allow signposts to take advantage of deferred string substitution"

This reverts commits f9aba9a5afe09788eceb9879aa5c3ad345e0f1e9 and
035217ff515b8ecdc871e39fa840f3cba1b9cec7.

As explained in the original commit message, this didn't have the
intended effect of improving the common LLDB use case, but still
provided a marginal improvement for the places where LLDB creates a
scoped time with a string literal.

The reason for the revert is that this change pulls in the os/signpost.h
header in Signposts.h. The former transitively includes loader.h, which
contains a series of macro defines that conflict with MachO.h. There are
ways to work around that, but Adrian and I concluded that  none of them
are worth the trade-off in complicating Signposts.h even further.

[clang/CFG] Rewrap a line to 80 columns

[clang] Convert a few loops to for-each

[clang] Remove an else-after-return

[libc++] Verify span and string_view are trivially copyable

Implement P2251 which requires `span` and `basic_string_view` to be
trivially copyable. They already are - this just adds tests to bind that
behavior.

Reviewed By: ldionne, Quuxplusone, Mordante, #libc

Differential Revision: https://reviews.llvm.org/D111197

[gn build] (manually) port 070315d04c6b

[libc++] P2401: conditional noexcept for std::exchange

Implement P2401 which adds a `noexcept` specification to
`std::exchange`. Treated as a defect fix which is the motivation for
applying this change to all standards mode rather than just C++23 or
later as the paper suggests.

Reviewed By: Quuxplusone, Mordante, #libc

Differential Revision: https://reviews.llvm.org/D111481

[NFC][X86][Codegen] Add basic PAVG chain test (PR52131)

[Bazel] Update config for 070315d04c6b

This updates the Bazel configuration for
https://github.com/llvm/llvm-project/commit/070315d04c6b which moved
`LLVM_SUPPORT_XCODE_SIGNPOSTS` from llvm-config.h.cmake to
config.h.cmake.

Also adds a comment for `HAVE_PROC_PID_RUSAGE`, that I spotted was
missing.

Differential Revision: https://reviews.llvm.org/D111569

[mlir][sparse] accept affine subscripts in outer dimensions of dense memrefs

This relaxes vectorization of dense memrefs a bit so that affine expressions
are allowed in more outer dimensions. Vectorization of non unit stride
references is disabled though, since this seems ineffective anyway.

Reviewed By: bixia

Differential Revision: https://reviews.llvm.org/D111469

[lldb] Remove "0x" prefix from hex values in dirty-pages

Remove the redudant "0x" prefix in the "dirty-pages" key of
qMemoryRegionInfo packet.  The client accepts hex values both with
and without the prefix.

Differential Revision: https://reviews.llvm.org/D110510

[Orc] Handle hangup messages in SimpleRemoteEPC

On the controller-side, handle `Hangup` messages from the executor. The executor passed `Error::success()` or a failure message as payload.

Hangups cause an immediate disconnect of the transport layer. The disconnect function may be called later again and so implementations should be prepared. `FDSimpleRemoteEPCTransport::disconnect()` already has a flag to check that:
https://github.com/llvm/llvm-project/blob/cd1bd95d8707371da0e4f75cd01669c427466931/llvm/lib/ExecutionEngine/Orc/Shared/SimpleRemoteEPCUtils.cpp#L112

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D111527

[VPlan] Print live-in backedge taken count as part of plan.

At the moment, a VPValue is created for the backedge-taken count, which
is used by some recipes. To make it easier to identify the operands of
recipes using the backedge-taken count, print it at the beginning of the
VPlan if it is used.

Reviewed By: a.elovikov

Differential Revision: https://reviews.llvm.org/D111298

[NFC][X86][Codegen] Add semi-negative PAVG chain test (PR52131)

[AMDGPU] Fix copying a machine operand

Without this I get:

*** Bad machine code: Instruction has operand with wrong parent set ***
- function:    available_externally_test
- basic block: %bb.0  (0x7dad598)
- instruction: %0:r600_treg32_x = MOV 1, 0, 0, 0, $alu_literal_x, 0, 0, 0, -1, 1, $pred_sel_off, @available_externally, 0

Differential Revision: https://reviews.llvm.org/D111549

[PHIElimination] Fix accounting for undef uses when updating LiveVariables

PHI elimination updates LiveVariables info as described here:

    // We only need to update the LiveVariables kill of SrcReg if this was the
    // last PHI use of SrcReg to be lowered on this CFG edge and it is not live
    // out of the predecessor. We can also ignore undef sources.

Unfortunately if the last use also happened to be an undef use then it
would fail to update the LiveVariables at all. Fix this by not counting
undef uses in the VRegPHIUse map.

Thanks to Mikael Holmén for the test case!

Differential Revision: https://reviews.llvm.org/D111552

AddGlobalAnnotations for function with or without function body.

When AnnotateAttr is on a function, AddGlobalAnnotations is only called
in CodeGenModule::EmitGlobalFunctionDefinition which means AnnotateAttr
on function declaration without function body will be ignored.
The patch will move AddGlobalAnnotations  to
CodeGenModule::SetFunctionAttributes, so with or without function body,
the AnnotateAttr will get code gen for a function.

It'll help case when AnnotateAttr is on external function, and the
AnnotateAttr will be consumed in IR level.

For example, a pass to collect num of uses for functions with
__attribute((annotate("count_use"))) after optimizations,
As long as there's __attribute((annotate("count_use"))), function with
or without function body should be counted.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D111109

Patch by:  python3kgae (Xiang Li)

Add release note about `TypeLoc` matchers.

Reviewed By: ymandel, aaron.ballman

Differential Revision: https://reviews.llvm.org/D111518

[mlir][ODS] Support result type inference in custom assembly format

Operations that have the InferTypeOpInterface trait can now omit the return
types in their custom assembly formats.

Differential Revision: https://reviews.llvm.org/D111326

[TypeSwitch/Compiler.h] Provide a LLVM_NODEBUG macro and use it in TypeSwitch.h

TypeSwitch.h is used pervasively in MLIR and often has dozens of types switched
over.  It uses "zero cost" variadic templates to implement the dispatching
mechanism... which isn't zero cost in debug builds, and which causes a massive
problem for actually debugging things that use it - you get dozens of nonsense
frames in the debugger for simple things like a visitor.

Fix this by marking the key method in TypeSwitch as nodebug + alwaysinline.
This resolves LLVM PR49301

Differential Revision: https://reviews.llvm.org/D111520

[SCCP] Properly report changes when changing a pointer argument

Fixes one of the issues in PR51946.

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D111277

[InstCombine] add signbit check for or'd operands; NFC

[InstCombine] fold signbit check of X | (X -1)

There may be some other patterns like this or a generalization,
but this is an example that I noticed would definitely regress
with a planned follow-up to D111410.

https://alive2.llvm.org/ce/z/GVpQDb

[LCG] Don't skip invalidation of LazyCallGraph if CFG analyses are preserved

The CFG being changed and the overall call graph are not related, we can introduce/remove calls without changing the CFG.

Resolves one of the issues in PR51946.

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D111275

[KnownBits] Introduce `countMaxActiveBits()` and use it in a few places

[ARM] Be more explicit about disabling CombineBaseUpdate for MVE.

This shouldn't be called for non-neon targets at the moment in either
case, but it is good to be expliit about the CombineBaseUpdate being a
NEON function, not expecting to be run under MVE.

[IVUsers] Check for preheader instead of loop simplify form

IVUsers currently makes sure that all loops dominating a user are
in loop simplify form, because SCEVExpander needs a preheader to
insert into. However, loop simplify form requires much more than
that. In particular, it requires dedicated exits, which means that
exits need to be found and walked. For large functions with many
nested loops, this can result in pathological compile-time explosion.

Fix this by only checking the property we're actually interested in,
which is incidentally cheap to check.

Differential Revision: https://reviews.llvm.org/D111493

[ORC] Propagate out-of-band errors in callAsync.

Returned out-of-band errors should be wrapped as llvm::Errors and passed to the
SendDeserializedResult function. Failure to do this results in an assertion when
we try to deserialize from the WrapperFunctionResult while it's in the
out-of-band error state.

[ORC] Destroy FinalizeErr if there is a serialization error.

If there is a serialization error then FinalizeErr should never be set, so we
can use cantFail rather than consumeError here.

[ORC] Propagate errors to handlers when sendMessage fails.

In SimpleRemoteEPC, calls to from callWrapperAsync to sendMessage may fail.
The handlers may or may not be sent failure messages by handleDisconnect,
depending on when that method is run. This patch adds a check for an un-failed
handler, and if it finds one sends it a failure message.

[LoopSimplifyCFG] Do not require MSSA. Continue to preserve if available.

LoopSimplifyCFG does not need MSSA, but should preserve it if it's available.

This is a legacy PM change, aimed to denoise the test changes in D109958.

Differential Revision: https://reviews.llvm.org/D111578

[AIX] Unsupported newly added AMDGPU clang test

[GlobalISel] Regenerate some MIR tests with CHECK-NEXT for another patch.

[mlir] Restrict to requiring traits when using InferTensorType trait.

Avoids running into segfaults accidentally.

Differential Revision: https://reviews.llvm.org/D110297

[TwoAddressInstructionPass] Improve the SrcRegMap and DstRegMap computation

This patch contains following enhancements to SrcRegMap and DstRegMap:

  1 In findOnlyInterestingUse not only check if the Reg is two address usage,
    but also check after commutation can it be two address usage.

  2 If a physical register is clobbered, remove SrcRegMap entries that are
    mapped to it.

  3 In processTiedPairs, when create a new COPY instruction, add a SrcRegMap
    entry only when the COPY instruction is coalescable. (The COPY src is
    killed)

With these enhancements isProfitableToCommute can do better commute decision,
and finally more register copies are removed.

Differential Revision: https://reviews.llvm.org/D108731

[clang][Fuchsia] Support availability attr on Fuchsia

This patch adds support to __attribute__((availability)) annotation for
Fuchsia platform. This patch also adds '-ffuchsia-api-level' to allow
specify Fuchsia API level from the command line.

Differential Revision: https://reviews.llvm.org/D108592

Revert "[Clang] Ignore BTFTag attr if used as a type attribute"

This reverts commit b875343873a584965daf507d73ff1fe71eab1953.

Per discussion in https://reviews.llvm.org/D111199, instead to make
existing btf_tag attribute as a type-or-decl attribute, we will
make existing btf_tag attribute as a decl only attribute, and
introduce btf_type_tag as a type only attribute. This will make
it easy for cases like typedef where an attribute may be applied
as either a type attribute or a decl attribute.

[AArch64][GlobalISel] Fix combiner assertion in matchConstantOp().

We shouldn't call APInt::getSExtValue() on a >64b value.

[RISCV][test] Add more tests of immediate materialisation

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D111483

Remove checks for old gcc versions for LLVM_ATTRIBUTE_*

According to [1] we only support gcc 5.1+. So these checks for older gcc versions are not supported.

[1] https://llvm.org/docs/GettingStarted.html#host-c-toolchain-both-compiler-and-standard-library

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D111581

Revert "Remove checks for old gcc versions for LLVM_ATTRIBUTE_*"

This reverts commit f5b524530ab4d9e13279ac23e67f3bac8edb4e76.

Breaks bots, e.g. https://lab.llvm.org/buildbot/#/builders/169/builds/3147

PR52139: Properly handle more kinds of declaration when checking for
usage of an abstract class type within itself.

We were missing handling for deduction guides (which would assert),
friend declarations, and variable templates. We were mishandling inline
variables and other variables defined inside the class definition.

These diagnostics should be downgraded to warnings, or perhaps removed
entirely, once we implement P0929R2.

LLVM_ATTRIBUTE_NODEBUG: GCC 4.0 apparently had ((nodebug)) but removed it.

This should fix a bunch of warnings on the flang-aarch64-latest-gcc builder.

Revert "[clang][Fuchsia] Support availability attr on Fuchsia"

This reverts commit 1131b1eb3509b47d30a36ea9b42367ab1d7373a2, which
breaks several llvm bots.

[libc++][docs] Mark LWG3447 as complete

Mark LWG3447 as complete since it was not an issue since the original
implementation of `take_view` from
0f4b41e038537ab2ab6fa2aa048e55c28a03ab68. Currently, `take_view`'s
deduction guide does not constrain the range on the `range` concept.

Reviewed By: ldionne, Mordante, #libc

Differential Revision: https://reviews.llvm.org/D111501

Reland "[clang][Fuchsia] Support availability attr on Fuchsia"

This reland commit 1131b1eb3509b47d30a36ea9b42367ab1d7373a2, which
adds support to __attribute__((availability)) annotation for Fuchsia
platform. This patch also adds '-ffuchsia-api-level' to allow specify
Fuchsia API level from the command line.

Differential Revision: https://reviews.llvm.org/D108592

[Driver] Re-enable aarch64-cpus.c test for arm64-apple.

"darwin" is ambiguous.  When there isn't a better source
of truth (e.g., SDKs), the driver will either interpret it
as "iOS" when cross-compiling to a different architecture,
or "the host" when not.  That's now the case on AS Macs.

Update the test to more explicitly test the OS.
aarch64-mac-cpus.c already tests the mac-specific driver logic.

[JITLink][ORC] Major JITLinkMemoryManager refactor.

This commit substantially refactors the JITLinkMemoryManager API to: (1) add
asynchronous versions of key operations, (2) give memory manager implementations
full control over link graph address layout, (3) enable more efficient tracking
of allocated memory, and (4) support "allocation actions" and finalize-lifetime
memory.

Together these changes provide a more usable API, and enable more powerful and
efficient memory manager implementations.

To support these changes the JITLinkMemoryManager::Allocation inner class has
been split into two new classes: InFlightAllocation, and FinalizedAllocation.
The allocate method returns an InFlightAllocation that tracks memory (both
working and executor memory) prior to finalization. The finalize method returns
a FinalizedAllocation object, and the InFlightAllocation is discarded. Breaking
Allocation into InFlightAllocation and FinalizedAllocation allows
InFlightAllocation subclassses to be written more naturally, and FinalizedAlloc
to be implemented and used efficiently (see (3) below).

In addition to the memory manager changes this commit also introduces a new
MemProt type to represent memory protections (MemProt replaces use of
sys::Memory::ProtectionFlags in JITLink), and a new MemDeallocPolicy type that
can be used to indicate when a section should be deallocated (see (4) below).

Plugin/pass writers who were using sys::Memory::ProtectionFlags will have to
switch to MemProt -- this should be straightworward. Clients with out-of-tree
memory managers will need to update their implementations. Clients using
in-tree memory managers should mostly be able to ignore it.

Major features:

(1) More asynchrony:

The allocate and deallocate methods are now asynchronous by default, with
synchronous convenience wrappers supplied. The asynchronous versions allow
clients (including JITLink) to request and deallocate memory without blocking.

(2) Improved control over graph address layout:

Instead of a SegmentRequestMap, JITLinkMemoryManager::allocate now takes a
reference to the LinkGraph to be allocated. The memory manager is responsible
for calculating the memory requirements for the graph, and laying out the graph
(setting working and executor memory addresses) within the allocated memory.
This gives memory managers full control over JIT'd memory layout. For clients
that don't need or want this degree of control the new "BasicLayout" utility can
be used to get a segment-based view of the graph, similar to the one provided by
SegmentRequestMap. Once segment addresses are assigned the BasicLayout::apply
method can be used to automatically lay out the graph.

(3) Efficient tracking of allocated memory.

The FinalizedAlloc type is a wrapper for an ExecutorAddr and requires only
64-bits to store in the controller. The meaning of the address held by the
FinalizedAlloc is left up to the memory manager implementation, but the
FinalizedAlloc type enforces a requirement that deallocate be called on any
non-default values prior to destruction. The deallocate method takes a
vector<FinalizedAlloc>, allowing for bulk deallocation of many allocations in a
single call.

Memory manager implementations will typically store the address of some
allocation metadata in the executor in the FinalizedAlloc, as holding this
metadata in the executor is often cheaper and may allow for clean deallocation
even in failure cases where the connection with the controller is lost.

(4) Support for "allocation actions" and finalize-lifetime memory.

Allocation actions are pairs (finalize_act, deallocate_act) of JITTargetAddress
triples (fn, arg_buffer_addr, arg_buffer_size), that can be attached to a
finalize request. At finalization time, after memory protections have been
applied, each of the "finalize_act" elements will be called in order (skipping
any elements whose fn value is zero) as

((char*(*)(const char *, size_t))fn)((const char *)arg_buffer_addr,
                                     (size_t)arg_buffer_size);

At deallocation time the deallocate elements will be run in reverse order (again
skipping any elements where fn is zero).

The returned char * should be null to indicate success, or a non-null
heap-allocated string error message to indicate failure.

These actions allow finalization and deallocation to be extended to include
operations like registering and deregistering eh-frames, TLS sections,
initializer and deinitializers, and language metadata sections. Previously these
operations required separate callWrapper invocations. Compared to callWrapper
invocations, actions require no extra IPC/RPC, reducing costs and eliminating
a potential source of errors.

Finalize lifetime memory can be used to support finalize actions: Sections with
finalize lifetime should be destroyed by memory managers immediately after
finalization actions have been run. Finalize memory can be used to support
finalize actions (e.g. with extra-metadata, or synthesized finalize actions)
without incurring permanent memory overhead.

Revert "[JITLink][ORC] Major JITLinkMemoryManager refactor."

This reverts commit e50aea58d59c8cfae807a7fee21c4227472c0678 while I
investigate bot failures.

[RISCV] Define _m intrinsics as builtins, instead of macros.

In the original design, we levarage _mt intrinsics to define macros for
_m intrinsics. Such as,

```
__builtin_rvv_vadd_vv_i8m1_mt((vbool8_t)(op0), (vint8m1_t)(op1), (vint8m1_t)(op2), (vint8m1_t)(op3), (size_t)(op4), (size_t)VE_TAIL_AGNOSTIC)
```

However, we could not define generic interface for mask intrinsics any
more due to clang_builtin_alias only accepts clang builtins as its
argument.

In the example,

```
 __rvv_overloaded
 __attribute__((clang_builtin_alias(__builtin_rvv_vadd_vv_i8m1_mt)))
  vint8m1_t vadd(vbool8_t op0, vint8m1_t op1, vint8m1_t op2, vint8m1_t
  op3, size_t op4, size_t op5);
```

op5 is the tail policy argument. When users want to use vadd generic
interface for masked vector add, they need to specify tail policy in the
previous design. In this patch, we define _m intrinsics as clang
builtins to solve the problem.

Differential Revision: https://reviews.llvm.org/D110684

[X86][ISel] Lowering llvm.thread.pointer

Reviewed By: pengfei

Differential Revision: https://reviews.llvm.org/D110681

[llvm-jitlink] Fix a broken warning.

This warning should only be issued if -slab-page-size has not been used.

[NFC][Attr] rename attribute btf_tag to btf_decl_tag

Per discussion in https://reviews.llvm.org/D111199,
the existing btf_tag attribute will be renamed to
btf_decl_tag. This patch mostly updated the Bitcode and
DebugInfo test cases with new attribute name.

Differential Revision: https://reviews.llvm.org/D111591

[AMDGPU] Remove dead frame indices after sgpr spill.

All those frame indices which are dead after sgpr spill should be removed from
the function frame. Othewise, there is a side effect such as re-mapping of free
frame index ids by the later pass(es) like "stack slot coloring" which in turn
could mess-up with the book keeping of "frame index to VGPR lane".

Reviewed By: cdevadas

Differential Revision: https://reviews.llvm.org/D111150

[CFE][Codegen][In-progress] Remove CodeGenFunction::InitTempAlloca()

Sequel patch to https://reviews.llvm.org/D111293.

Remove call to CodeGenFunction::InitTempAlloca() from OpenMP related
codegen part.

Also remove the metadata `!llvm.access.group` from the updated lit
tests.

Reviewed By: rjmccall

Differential Revision: https://reviews.llvm.org/D111316

BPF: rename BTF_KIND_TAG to BTF_KIND_DECL_TAG

Per discussion in https://reviews.llvm.org/D111199,
the existing btf_tag attribute will be renamed to
btf_decl_tag. This patch updated BTF backend to
use btf_decl_tag attribute name and also
renamed BTF_KIND_TAG to BTF_KIND_DECL_TAG.

Differential Revision: https://reviews.llvm.org/D111592

[CFE][Codegen] Remove CodeGenFunction::InitTempAlloca()

Sequel patch to https://reviews.llvm.org/D111316

Finally, remove the defintion of CodeGenFunction::InitTempAlloca().

Reviewed By: rjmccall

Differential Revision: https://reviews.llvm.org/D111324

Re-apply e50aea58d59, "Major JITLinkMemoryManager refactor". with fixes.

Adds explicit narrowing casts to JITLinkMemoryManager.cpp.

Honors -slab-address option in llvm-jitlink.cpp, which was accidentally
dropped in the refactor.

This effectively reverts commit 6641d29b70993bce6dbd7e0e0f1040753d38842f.

[ORC] Fix a typo in a variable name.

[gn build] Port 962a2479b57f

[ORC] Add more explicit narrowing casts.

This should fix the buildbot failure at
https://lab.llvm.org/buildbot/#/builders/187/builds/2140

clang-ve-ninja: build and install compiler-rt

clang-ve-ninja: check compiler-rt

mlir-s390x-linux: collapse requests