Changes

Summary

  1. clang-ve-ninja: build and install compiler-rt (details)
  2. clang-ve-ninja: check compiler-rt (details)
  3. mlir-s390x-linux: collapse requests (details)
Commit 74ca6968913aa5e26828e51e0e6a7e6d7db25386 by simon.moll
clang-ve-ninja: build and install compiler-rt
The file was modifiedzorg/buildbot/builders/annotated/ve-linux-steps.make (diff)
Commit f3145e433344ed18f056a2a68d82b6e70813d188 by simon.moll
clang-ve-ninja: check compiler-rt
The file was modifiedzorg/buildbot/builders/annotated/ve-linux-steps.make (diff)
Commit dfd41aa8267c78dd71b8dd01187bbb3c87ae25e3 by ulrich.weigand
mlir-s390x-linux: collapse requests
The file was modifiedbuildbot/osuosl/master/config/builders.py (diff)

Summary

  1. [MLIR] Fix affine loop unroll corner case for full unroll (details)
  2. [NFC] Allow to include sanitizer_allocator_bytemap.h (details)
  3. [NFC][sanitizer] Rename ByteMap to Map (details)
  4. [NFC][sanitizer] Add constexpr to FlatMap::size (details)
  5. [NFC][sanitizer] Clang-format sanitizer_flat_map.h (details)
  6. [NFC][sanitizer] Add a few consts (details)
  7. [DFSan] Fix flakey release_shadow_space.c accounting for Origin chains. (details)
  8. [LoopIdiom] Fix store size SCEV type. (details)
  9. [LLDB] Skip TestScriptedProcess on Arm/AArch64 Linux (details)
  10. re-land "[AA] Teach BasicAA to recognize basic GEP range information." (details)
  11. [fir] Add the abstract result conversion pass (details)
  12. [libcxx][pretty printers] Disable u16string tests (details)
  13. [LoopVectorize] Permit vectorisation of more select(cmp(), X, Y) reduction patterns (details)
  14. [BasicAA][NFC] Improve comment. (details)
  15. [AArch64] Emit AssertZExt for i1 arguments (details)
  16. [Clang] Enable IC/IF mode for __ibm128 (details)
  17. [LLDB] Remove xfail decorator TestInferiorAssert.py AArch64/Linux (details)
  18. [lldb] [ConnectionFileDescriptorPosix] Combine m_read_sp & m_write_sp (details)
  19. [lldb] [DynamicRegisterInfo] Remove non-const GetRegisterInfoAtIndex() (details)
  20. [lldb] Make char[N] formatters respect the end of the array (PR44649) (details)
  21. [AArch64][SVE] Ensure LowerEXTRACT_SUBVECTOR is not called for illegal types (details)
  22. [lldb] Don't print to stderr in TypeSystemClang::GetBuiltinTypeForDWARFEncodingAndBitSize (details)
  23. [lldb] Add support for DW_AT_calling_convention to the DWARF parser (details)
  24. [flang][driver] Add actions that execute despite semantic errors (details)
  25. [fir] Update clang-tidy for the Optimizer directory (details)
  26. [lldb] [test] Rewrite g/p/G/P tests not to rely on hardcoded ARM regs (details)
  27. [LLD] [TEST] Add test case for patching an absolute relocation to a weak undef (details)
  28. [lldb][NFCI] Refactor out attribute parsing from DWARFASTParserClang::ParseSingleMember (details)
  29. [X86][AVX] Add test case for PR52122 (details)
  30. [fir] Clean up InitFIR.h (details)
  31. [lldb][NFC] Remove unnecessary reference from ParseChildMembers's default_accessibility parameter (details)
  32. [X86][AVX] Ensure we retain zero elements in select(pshufb,pshufb) -> or(pshufb,pshufb) fold (PR52122) (details)
  33. [fir] Add fir.convert canonicalization patterns (details)
  34. [Object] Deduplicate the three createError functions (details)
  35. [lldb] [ABI] Apply AugmentRegisterInfo() to DynamicRegisterInfo::Registers (details)
  36. [lldb] [Target] Make addSupplementaryRegister() work on Register vector (details)
  37. [lldb] [ABI/AArch64] Add pseudo-regs if missing (details)
  38. [lldb] [DynamicRegisterInfo] Support setting from vector<Register> (details)
  39. [MS compat] Handle #pragma fenv_access like #pragma STDC FENV_ACCESS (PR50694) (details)
  40. [mlir] add user-level documentation for Python bindings (details)
  41. [SimpleLoopUnswitch] Re-fix introduction of UB when hoisted condition may be undef or poison (details)
  42. [OpenMP] libomp: add OpenMP 5.1 memory allocation routines. (details)
  43. [ORC] Add static and dynamic library generator support to C API. (details)
  44. [Clang][ARM][AArch64] Add support for Armv9-A, Armv9.1-A and Armv9.2-A (details)
  45. [ELF] Demote !isUsedInRegularObj lazy symbol (details)
  46. [ORC] Fix an 80 column violation. (details)
  47. [RISCV] Require tail policy argument to builtins to be an integer constant expression (details)
  48. [SCEV] Extend trip count to avoid overflow by default (details)
  49. [llc] Support -time-trace in llc (details)
  50. [docs] Mention in release notes that we now support 2^32 alignment (details)
  51. [AMDGPU] Support shared literals in FMAMK/FMAAK (details)
  52. [scudo] Skip AllocAfterFork test on machines with low max_map_count (details)
  53. [flang][NFC] Document behavior for nonspecified/ambiguous cases (details)
  54. [Sema] Use llvm::is_contained (NFC) (details)
  55. Revert "Allow signposts to take advantage of deferred string substitution" (details)
  56. [clang/CFG] Rewrap a line to 80 columns (details)
  57. [clang] Convert a few loops to for-each (details)
  58. [clang] Remove an else-after-return (details)
  59. [libc++] Verify span and string_view are trivially copyable (details)
  60. [gn build] (manually) port 070315d04c6b (details)
  61. [libc++] P2401: conditional noexcept for std::exchange (details)
  62. [NFC][X86][Codegen] Add basic PAVG chain test (PR52131) (details)
  63. [Bazel] Update config for 070315d04c6b (details)
  64. [mlir][sparse] accept affine subscripts in outer dimensions of dense memrefs (details)
  65. [lldb] Remove "0x" prefix from hex values in dirty-pages (details)
  66. [Orc] Handle hangup messages in SimpleRemoteEPC (details)
  67. [VPlan] Print live-in backedge taken count as part of plan. (details)
  68. [NFC][X86][Codegen] Add semi-negative PAVG chain test (PR52131) (details)
  69. [AMDGPU] Fix copying a machine operand (details)
  70. [PHIElimination] Fix accounting for undef uses when updating LiveVariables (details)
  71. AddGlobalAnnotations for function with or without function body. (details)
  72. Add release note about `TypeLoc` matchers. (details)
  73. [mlir][ODS] Support result type inference in custom assembly format (details)
  74. [TypeSwitch/Compiler.h] Provide a LLVM_NODEBUG macro and use it in TypeSwitch.h (details)
  75. [SCCP] Properly report changes when changing a pointer argument (details)
  76. [InstCombine] add signbit check for or'd operands; NFC (details)
  77. [InstCombine] fold signbit check of X | (X -1) (details)
  78. [LCG] Don't skip invalidation of LazyCallGraph if CFG analyses are preserved (details)
  79. [KnownBits] Introduce `countMaxActiveBits()` and use it in a few places (details)
  80. [ARM] Be more explicit about disabling CombineBaseUpdate for MVE. (details)
  81. [IVUsers] Check for preheader instead of loop simplify form (details)
  82. [ORC] Propagate out-of-band errors in callAsync. (details)
  83. [ORC] Destroy FinalizeErr if there is a serialization error. (details)
  84. [ORC] Propagate errors to handlers when sendMessage fails. (details)
  85. [LoopSimplifyCFG] Do not require MSSA. Continue to preserve if available. (details)
  86. [AIX] Unsupported newly added AMDGPU clang test (details)
  87. [GlobalISel] Regenerate some MIR tests with CHECK-NEXT for another patch. (details)
  88. [mlir] Restrict to requiring traits when using InferTensorType trait. (details)
  89. [TwoAddressInstructionPass] Improve the SrcRegMap and DstRegMap computation (details)
  90. [clang][Fuchsia] Support availability attr on Fuchsia (details)
  91. Revert "[Clang] Ignore BTFTag attr if used as a type attribute" (details)
  92. [AArch64][GlobalISel] Fix combiner assertion in matchConstantOp(). (details)
  93. [RISCV][test] Add more tests of immediate materialisation (details)
  94. Remove checks for old gcc versions for LLVM_ATTRIBUTE_* (details)
  95. Revert "Remove checks for old gcc versions for LLVM_ATTRIBUTE_*" (details)
  96. PR52139: Properly handle more kinds of declaration when checking for (details)
  97. LLVM_ATTRIBUTE_NODEBUG: GCC 4.0 apparently had ((nodebug)) but removed it. (details)
  98. Revert "[clang][Fuchsia] Support availability attr on Fuchsia" (details)
  99. [libc++][docs] Mark LWG3447 as complete (details)
  100. Reland "[clang][Fuchsia] Support availability attr on Fuchsia" (details)
  101. [Driver] Re-enable aarch64-cpus.c test for arm64-apple. (details)
  102. [JITLink][ORC] Major JITLinkMemoryManager refactor. (details)
  103. Revert "[JITLink][ORC] Major JITLinkMemoryManager refactor." (details)
  104. [RISCV] Define _m intrinsics as builtins, instead of macros. (details)
  105. [X86][ISel] Lowering llvm.thread.pointer (details)
  106. [llvm-jitlink] Fix a broken warning. (details)
  107. [NFC][Attr] rename attribute btf_tag to btf_decl_tag (details)
  108. [AMDGPU] Remove dead frame indices after sgpr spill. (details)
  109. [CFE][Codegen][In-progress] Remove CodeGenFunction::InitTempAlloca() (details)
  110. BPF: rename BTF_KIND_TAG to BTF_KIND_DECL_TAG (details)
  111. [CFE][Codegen] Remove CodeGenFunction::InitTempAlloca() (details)
  112. Re-apply e50aea58d59, "Major JITLinkMemoryManager refactor". with fixes. (details)
  113. [ORC] Fix a typo in a variable name. (details)
  114. [gn build] Port 962a2479b57f (details)
  115. [ORC] Add more explicit narrowing casts. (details)
Commit b2217b36fe436d84766be0a527a0560feda1a67a by uday
[MLIR] Fix affine loop unroll corner case for full unroll

Fix affine loop unroll for zero trip count loops. Add missing check.

Differential Revision: https://reviews.llvm.org/D111375
The file was modifiedmlir/test/Dialect/Affine/unroll.mlir
The file was modifiedmlir/lib/Transforms/Utils/LoopUtils.cpp
Commit 74277e254c55a8bed1a9af5e6326b21b0611c3b1 by Vitaly Buka
[NFC] Allow to include sanitizer_allocator_bytemap.h
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_allocator_bytemap.h
Commit 76b7784bcd80404ba4e039ebb6a6413353ae2e9d by Vitaly Buka
[NFC][sanitizer] Rename ByteMap to Map
The file was modifiedcompiler-rt/lib/sanitizer_common/CMakeLists.txt
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_allocator.h
The file was addedcompiler-rt/lib/sanitizer_common/sanitizer_flat_map.h
The file was modifiedllvm/utils/gn/secondary/compiler-rt/lib/sanitizer_common/BUILD.gn
The file was modifiedcompiler-rt/lib/sanitizer_common/tests/CMakeLists.txt
The file was modifiedcompiler-rt/lib/sanitizer_common/tests/sanitizer_allocator_test.cpp
The file was addedcompiler-rt/lib/sanitizer_common/tests/sanitizer_flat_map_test.cpp
The file was removedcompiler-rt/lib/sanitizer_common/sanitizer_allocator_bytemap.h
Commit eff6b369bfadd69b077c85ccb6de929ad35e5975 by Vitaly Buka
[NFC][sanitizer] Add constexpr to FlatMap::size
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_flat_map.h
Commit 982bfec8f0a3e7d6bf7703d17fab1477c53d84dd by Vitaly Buka
[NFC][sanitizer] Clang-format sanitizer_flat_map.h
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_flat_map.h
Commit 9ccb6024a0d0af7e2484b67efa036c0d790c5108 by Vitaly Buka
[NFC][sanitizer] Add a few consts
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_flat_map.h
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_allocator_primary32.h
Commit 50a08e2c6d4185df6a5b0a5b41c7ef8849aad269 by Vitaly Buka
[DFSan] Fix flakey release_shadow_space.c accounting for Origin chains.

Test sometimes fails on buildbot (after two non-Origins executions):

/usr/bin/ld: warning: Cannot export local symbol 'dfsan_flush'
RSS at start: 4620, after mmap: 107020, after mmap+set label: 209424, after fixed map: 4624, after another mmap+set label: 209424, after munmap: 4624
/usr/bin/ld: warning: Cannot export local symbol 'dfsan_flush'
RSS at start: 4620, after mmap: 107020, after mmap+set label: 209424, after fixed map: 4624, after another mmap+set label: 209424, after munmap: 4624
/usr/bin/ld: warning: Cannot export local symbol 'dfsan_flush'
RSS at start: 4620, after mmap: 107020, after mmap+set label: 317992, after fixed map: 10792, after another mmap+set label: 317992, after munmap: 10792
release_shadow_space.c.tmp: /b/sanitizer-x86_64-linux/build/llvm-project/compiler-rt/test/dfsan/release_shadow_space.c:91: int main(int, char **): Assertion `after_fixed_mmap <= before + delta' failed.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D111522
The file was modifiedcompiler-rt/test/dfsan/release_shadow_space.c
Commit 6aaf1e7ea931a1865cc97ebf8fcb084772f8142e by courbet
[LoopIdiom] Fix store size SCEV type.

We were using the type of the loop back edge count to represent the
store size. This failed for small loop counts (e.g. in the added test,
the loop count was an i2).

Use the index type instead.

Fixes PR52104.

Differential Revision: https://reviews.llvm.org/D111401
The file was modifiedllvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
The file was addedllvm/test/Transforms/LoopIdiom/memset-pr52104.ll
Commit c63cb0c80ec7eb2dedad6e89fb9a3042b71d3b0f by omair.javaid
[LLDB] Skip TestScriptedProcess on Arm/AArch64 Linux

This is failing on Arm and AArch64 Linux buildbots since the time it was
comitted.

https://lab.llvm.org/buildbot/#/builders/96/builds/12628

Differential Revision: https://reviews.llvm.org/D107585
The file was modifiedlldb/test/API/functionalities/scripted_process/TestScriptedProcess.py
Commit 83ded5d3239170a430e49cde80ea40e68b9af230 by courbet
re-land "[AA] Teach BasicAA to recognize basic GEP range information."

Now that PR52104 is fixed.
The file was modifiedllvm/test/Analysis/BasicAA/sequential-gep.ll
The file was modifiedllvm/test/Analysis/BasicAA/assume-index-positive.ll
The file was addedllvm/test/Analysis/BasicAA/range.ll
The file was modifiedllvm/lib/Analysis/BasicAliasAnalysis.cpp
Commit b0eef1eef0500315bf74721dda3d7a8e3c6a6eac by clementval
[fir] Add the abstract result conversion pass

Add pass that convert abstract result to function argument.
This pass is needed before the conversion to LLVM IR.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: schweitz

Differential Revision: https://reviews.llvm.org/D111146

Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
The file was modifiedflang/lib/Optimizer/Transforms/CMakeLists.txt
The file was addedflang/test/Fir/abstract-results.fir
The file was modifiedflang/include/flang/Optimizer/Transforms/Passes.td
The file was modifiedflang/include/flang/Optimizer/Transforms/Passes.h
The file was addedflang/lib/Optimizer/Transforms/AbstractResult.cpp
The file was modifiedflang/lib/Optimizer/Dialect/FIROps.cpp
Commit cd1bd95d8707371da0e4f75cd01669c427466931 by david.spickett
[libcxx][pretty printers] Disable u16string tests

Due to reported failures in a local build.

FAIL: Something is wrong in the test framework.
Converting character sets: Invalid argument.

(was enabled in https://reviews.llvm.org/D111138)
The file was modifiedlibcxx/test/libcxx/gdb/gdb_pretty_printer_test.sh.cpp
Commit 26b7d9d62275e782da190d1717849c49588a4b0c by david.sherwood
[LoopVectorize] Permit vectorisation of more select(cmp(), X, Y) reduction patterns

This patch adds further support for vectorisation of loops that involve
selecting an integer value based on a previous comparison. Consider the
following C++ loop:

  int r = a;
  for (int i = 0; i < n; i++) {
    if (src[i] > 3) {
      r = b;
    }
    src[i] += 2;
  }

We should be able to vectorise this loop because all we are doing is
selecting between two states - 'a' and 'b' - both of which are loop
invariant. This just involves building a vector of values that contain
either 'a' or 'b', where the final reduced value will be 'b' if any lane
contains 'b'.

The IR generated by clang typically looks like this:

  %phi = phi i32 [ %a, %entry ], [ %phi.update, %for.body ]
  ...
  %pred = icmp ugt i32 %val, i32 3
  %phi.update = select i1 %pred, i32 %b, i32 %phi

We already detect min/max patterns, which also involve a select + cmp.
However, with the min/max patterns we are selecting loaded values (and
hence loop variant) in the loop. In addition we only support certain
cmp predicates. This patch adds a new pattern matching function
(isSelectCmpPattern) and new RecurKind enums - SelectICmp & SelectFCmp.
We only support selecting values that are integer and loop invariant,
however we can support any kind of compare - integer or float.

Tests have been added here:

  Transforms/LoopVectorize/AArch64/sve-select-cmp.ll
  Transforms/LoopVectorize/select-cmp-predicated.ll
  Transforms/LoopVectorize/select-cmp.ll

Differential Revision: https://reviews.llvm.org/D108136
The file was modifiedllvm/lib/Transforms/Utils/LoopUtils.cpp
The file was modifiedllvm/lib/Analysis/IVDescriptors.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
The file was addedllvm/test/Transforms/LoopVectorize/AArch64/sve-select-cmp.ll
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/scalable-reduction-inloop.ll
The file was modifiedllvm/include/llvm/Transforms/Utils/LoopUtils.h
The file was addedllvm/test/Transforms/LoopVectorize/select-cmp-predicated.ll
The file was addedllvm/test/Transforms/LoopVectorize/select-cmp.ll
The file was modifiedllvm/include/llvm/Analysis/IVDescriptors.h
Commit 342d7b654c63cadaa6135913c9582a7272fced58 by courbet
[BasicAA][NFC] Improve comment.
The file was modifiedllvm/test/Analysis/BasicAA/assume-index-positive.ll
Commit 7ae8f392a1610992c9a925c867fd7238c70d3ce0 by andrew.savonichev
[AArch64] Emit AssertZExt for i1 arguments

AAPCS requires i1 argument to be zero-extended to 8-bits by the
caller. Emit a new AArch64ISD::ASSERT_ZEXT_BOOL hint (or AssertZExt
for GlobalISel) to enable some optimization opportunities. In
particular, when the argument is forwarded to the callee, we can avoid
zero-extension and use it as-is.

Differential Revision: https://reviews.llvm.org/D107160
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-switch.ll
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll
The file was modifiedllvm/test/CodeGen/AArch64/i1-contents.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.td
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h
The file was modifiedllvm/test/CodeGen/AArch64/arm64-aapcs.ll
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/call-lowering-signext.ll
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Commit d11ec6f67e45c630ab87bfb6010dcc93e89542fc by qiucofan
[Clang] Enable IC/IF mode for __ibm128

As for 128-bit floating points on PowerPC, compiler should have three
machine modes:

- IFmode, always IBM extended double
- KFmode, always IEEE 754R 128-bit floating point
- TFmode, matches the semantics for long double

This commit adds support for IF mode with its complex variant, IC mode.

Reviewed By: rjmccall

Differential Revision: https://reviews.llvm.org/D109950
The file was modifiedclang/test/Sema/attr-mode.c
The file was modifiedclang/lib/Basic/TargetInfo.cpp
The file was modifiedclang/test/CodeGenCXX/ibm128-declarations.cpp
The file was modifiedclang/lib/Sema/SemaDeclAttr.cpp
Commit 483db1c706864d0940206228dfe64bdcd17faa4e by omair.javaid
[LLDB] Remove xfail decorator TestInferiorAssert.py AArch64/Linux

TestInferiorAssert.py test_inferior_asserting_disassemble passes after
upgrading LLDB AArch64/Linux buildbot to Ubuntu Focal.
The file was modifiedlldb/test/API/functionalities/inferior-assert/TestInferiorAssert.py
Commit fee461b1d830564048c09aef90631b1d4be4e450 by mgorny
[lldb] [ConnectionFileDescriptorPosix] Combine m_read_sp & m_write_sp

Combine m_read_sp and m_write_sp into a single m_io_sp.  In all
currently existing code paths, they are pointing to the same object
anyway.

Differential Revision: https://reviews.llvm.org/D111396
The file was modifiedlldb/source/Host/posix/ConnectionFileDescriptorPosix.cpp
The file was modifiedlldb/include/lldb/Host/posix/ConnectionFileDescriptorPosix.h
Commit 36195d7d80e37063ef7f1fbc6c1970e515bb502c by mgorny
[lldb] [DynamicRegisterInfo] Remove non-const GetRegisterInfoAtIndex()

Differential Revision: https://reviews.llvm.org/D111408
The file was modifiedlldb/source/Target/DynamicRegisterInfo.cpp
The file was modifiedlldb/include/lldb/Target/DynamicRegisterInfo.h
Commit 8093c2ea574b9f7cbeb6c150f6584446cfd93517 by pavel
[lldb] Make char[N] formatters respect the end of the array (PR44649)

I believe this is a more natural behavior, and it also matches what gdb
does.

Differential Revision: https://reviews.llvm.org/D111399
The file was modifiedlldb/source/DataFormatters/FormatManager.cpp
The file was modifiedlldb/test/API/functionalities/data-formatter/stringprinter/main.cpp
Commit 03065ecd85366d0d0f8502469be7543be6fece70 by bradley.smith
[AArch64][SVE] Ensure LowerEXTRACT_SUBVECTOR is not called for illegal types

The lowering for EXTRACT_SUBVECTOR should not be called during type
legalization, only as part of lowering, hence return SDValue() when
called on illegal types.

This also adds missing tests for extracting fixed types from illegal
scalable types.

Differential Revision: https://reviews.llvm.org/D111412
The file was modifiedllvm/test/CodeGen/AArch64/sve-extract-fixed-vector.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Commit 592e89cc4e9a7d184e16d4c61abcbcb62cf7e6ed by Raphael Isemann
[lldb] Don't print to stderr in TypeSystemClang::GetBuiltinTypeForDWARFEncodingAndBitSize

The current code just prints to the System's 'error log' which is usually stderr
(+ some other log backend). Printing to stderr however just interferes with
LLDB's console UI, so when this code is triggered during for example command
completion it just breaks the LLDB console interface until the next redraw.

Instead just use the normal LLDB log which is by default hidden and is what
users usually attach to bug reports.

The only known bug that triggers this is
https://bugs.llvm.org/show_bug.cgi?id=46775

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D111149
The file was modifiedlldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
Commit 3256aa8fe6fd785df12cc39f95e55bef0bc371c2 by Raphael Isemann
[lldb] Add support for DW_AT_calling_convention to the DWARF parser

This adds support for parsing DW_AT_calling_convention in the DWARF parser.

The generic DWARF parsing code already support extracting this attribute from A
DIE and TypeSystemClang already offers a parameter to add a calling convention
to a function type (as the PDB parser supports calling convention parsing), so
this patch just converts the DWARF enum value to the Clang enum value and adds a
few tests.

There are two tests in this patch.:

* A unit test for the added DWARF parsing code that should run on all platforms.

* An API tests that covers the whole expression evaluation machinery by trying
to call functions with non-standard calling conventions. The specific subtests
are target specific as some calling conventions only work on e.g. win32 (or, if
they work on other platforms they only really have observable differences on a
specific target).  The tests are also highly compiler-specific, so if GCC or
Clang tell us that they don't support a specific calling convention then we just
skip the test.

Note that some calling conventions are supported by Clang but aren't implemented
in LLVM (e.g. `pascal`), so there we just test that if this ever gets
implemented in LLVM that LLDB works too. There are also some more tricky/obscure
conventions that are left out such as the different swift* conventions, some
planned Obj-C conventions (`Preserve*`), AAPCS* conventions (as the DWARF->Clang
conversion is ambiguous for AAPCS and APPCS-VFP) and conventions only used for
OpenCL etc.

Reviewed By: aprantl

Differential Revision: https://reviews.llvm.org/D108629
The file was addedlldb/test/API/lang/c/calling-conventions/fastcall.c
The file was modifiedlldb/unittests/SymbolFile/DWARF/DWARFASTParserClangTests.cpp
The file was addedlldb/test/API/lang/c/calling-conventions/ms_abi.c
The file was addedlldb/test/API/lang/c/calling-conventions/regcall.c
The file was addedlldb/test/API/lang/c/calling-conventions/sysv_abi.c
The file was addedlldb/test/API/lang/c/calling-conventions/vectorcall.c
The file was addedlldb/test/API/lang/c/calling-conventions/stdcall.c
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
The file was addedlldb/test/API/lang/c/calling-conventions/Makefile
The file was addedlldb/test/API/lang/c/calling-conventions/TestCCallingConventions.py
The file was addedlldb/test/API/lang/c/calling-conventions/pascal.c
Commit 6f8ef1d6e8796993b69d4b1cf8e56590273268e3 by andrzej.warzynski
[flang][driver] Add actions that execute despite semantic errors

This patch adds a new abstract class for frontend actions:
`PrescanAndSemaDebugAction`. It's almost identical to
`PrescanAndSemaAction`, but in the presence of semantic errors it does
not skip the corresponding `ExecuteAction` specialisation. Instead, it
runs it as if there were no semantic errors. This class is for developer
actions only (i.e.  front-end driver options).

The new behaviour does not affect the return code from `flang-new -fc1`
when the input file is semantically incorrect. The return code is
inferred from the number of driver diagnostics generated in
`CompilerInstance::ExecuteAction` and this patch does not change that.
More specifically, the semantic errors are still reported and hence the
driver is able to correctly report that the compilation has failed (with
a non-zero return code).

This new base class is meant for debug actions only and
`DebugDumpAllAction` is updated to demonstrate the new behaviour. With
this change, `flang-new -fc1 -fdebug-dump-all` dumps the parse tree and
symbols for all input files, regardless of whether any semantic errors
were found.

This patch addresses https://bugs.llvm.org/show_bug.cgi?id=52097.

Differential Revision: https://reviews.llvm.org/D111308
The file was modifiedflang/include/flang/Frontend/FrontendActions.h
The file was modifiedflang/lib/Frontend/FrontendActions.cpp
The file was addedflang/test/Driver/dump-all-bad.f90
Commit edec659f480f02642461cebd422ab35152cdfd23 by clementval
[fir] Update clang-tidy for the Optimizer directory

Update .clang-tidy file with the value used in fir-dev.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: rovka

Differential Revision: https://reviews.llvm.org/D111525

Co-authored-by: Valentin Clement <clementval@gmail.com>
The file was modifiedflang/lib/Optimizer/.clang-tidy
The file was modifiedflang/include/flang/Optimizer/.clang-tidy
Commit 270c989f6fef3bc336f7a4238754faa7c5993d3d by mgorny
[lldb] [test] Rewrite g/p/G/P tests not to rely on hardcoded ARM regs

Rewrite the register reading/writing tests to use explicit qRegisterInfo
packets rather than relying on ARM registers being hardcoded in LLDB.
While at it, use x86_64 for tests -- since it was easier for me to get
the register lists from that architecture.

Differential Revision: https://reviews.llvm.org/D111496
The file was modifiedlldb/test/API/functionalities/gdb_remote_client/a.yaml
The file was modifiedlldb/test/API/functionalities/gdb_remote_client/gdbclientutils.py
The file was modifiedlldb/test/API/functionalities/gdb_remote_client/TestGDBRemoteClient.py
Commit aaeba6483fdafa442b950427bfa3e6443034f78d by Ben.Dunbobbin
[LLD] [TEST] Add test case for patching an absolute relocation to a weak undef

I noticed that we had this case in our internal testsuite but couldn't find it in LLD's tests.

This adds that case.

Differential Revision: https://reviews.llvm.org/D110716
The file was modifiedlld/test/ELF/relocation-undefined-weak.s
The file was modifiedlld/test/ELF/weak-undef.s
The file was modifiedlld/test/ELF/weak-undef-rw.s
Commit f110999bf6b5fe1b5e2b945ea462003655f034d0 by Raphael Isemann
[lldb][NFCI] Refactor out attribute parsing from DWARFASTParserClang::ParseSingleMember

D68422 introduced `ParsedDWARFTypeAttributes` which encapsulated attribute
parsing and storage into its own small struct. This patch is doing the same for
the member type attribute parsing. One utility class is parsing normal member
attributes and the other is parsing the dedicated Objective-C property
attributes.

Right now the patch just makes the `ParseSingleMember` function a bit shorter,
but the bigger benefit is that we can now split up the function into Objective-C
property parsing and parsing of normal members (struct/class members and
Objective-C ivars). The only shared code between those two parsing logic is the
normal member attribute parsing.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D111494
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
Commit 84adaabf3e04d1938a137b1299a677d2fa489383 by llvm-dev
[X86][AVX] Add test case for PR52122
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
Commit 31a2ccc0b54c9f1209d1d6cead792a32715a759c by clementval
[fir] Clean up InitFIR.h

Clean up InitFIR.h file.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D111539

Co-authored-by: Valentin Clement <clementval@gmail.com>
The file was modifiedflang/include/flang/Optimizer/Support/InitFIR.h
The file was modifiedflang/tools/fir-opt/fir-opt.cpp
Commit 8249e50bf4286deee314e36ce7e67f38bcd79db2 by Raphael Isemann
[lldb][NFC] Remove unnecessary reference from ParseChildMembers's default_accessibility parameter
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
Commit ad16c6e52fb74c2e784530f14c19e72d93c9ad62 by llvm-dev
[X86][AVX] Ensure we retain zero elements in select(pshufb,pshufb) -> or(pshufb,pshufb) fold (PR52122)

The select(pshufb,pshufb) -> or(pshufb,pshufb) fold uses getConstVector to create the refreshed pshufb masks, which treats all negative indices as undef.

PR52122 shows that if we were selecting an element that the PSHUFB has set to zero we must set it back to 0x80 when we recreate the PSHUFB mask and not just leave it as SM_SentinelZero
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit c3abfe4207d35c221f1667d5b0c79a6511be5ea3 by clementval
[fir] Add fir.convert canonicalization patterns

Add rewrite patterns for fir.convert op canonicalization.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D111537

Co-authored-by: Valentin Clement <clementval@gmail.com>
The file was modifiedflang/lib/Optimizer/Transforms/CMakeLists.txt
The file was modifiedflang/lib/Optimizer/Dialect/FIROps.cpp
The file was addedflang/test/Fir/convert-fold.fir
The file was modifiedflang/include/flang/Optimizer/Transforms/CMakeLists.txt
The file was addedflang/include/flang/Optimizer/Transforms/RewritePatterns.td
Commit bdc35b0efca9445950990fe642f18c3d82ab1299 by Raphael Isemann
[Object] Deduplicate the three createError functions

The Object library currently has three identical functions that translate a
Twine into a parser error. Until recently these functions have coexisted
peacefully, but since D110320 Clang with enabled modules is now diagnosing that
we have several definitions of `createError` in Object.

This patch just merges them all and puts them into Object's `Error.h` where the
error code for `parse_failed` is also defined which seems cleaner and unbreaks
the bots.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D111541
The file was modifiedllvm/include/llvm/Object/ELF.h
The file was modifiedllvm/lib/Object/COFFModuleDefinition.cpp
The file was modifiedllvm/include/llvm/Object/Error.h
The file was modifiedllvm/lib/Object/XCOFFObjectFile.cpp
Commit 58492191265759e952a032c0de48a9231c526b55 by mgorny
[lldb] [ABI] Apply AugmentRegisterInfo() to DynamicRegisterInfo::Registers

Call ABI::AugmentRegisterInfo() once with a vector of all defined
registers rather than calling it for every individual register.  Move
and rename RemoteRegisterInfo from gdb-remote to
DynamicRegisterInfo::Register, and use this class when augmenting
registers.

Differential Revision: https://reviews.llvm.org/D111142
The file was modifiedlldb/source/Plugins/ABI/AArch64/ABIAArch64.cpp
The file was modifiedlldb/include/lldb/Target/DynamicRegisterInfo.h
The file was modifiedlldb/include/lldb/Target/ABI.h
The file was modifiedlldb/source/Target/ABI.cpp
The file was modifiedlldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
The file was modifiedlldb/source/Plugins/ABI/AArch64/ABIAArch64.h
The file was modifiedlldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
Commit 1afda54f199327b3391f2b32cf4cd785cedfd94c by mgorny
[lldb] [Target] Make addSupplementaryRegister() work on Register vector

Move DynamicRegisterInfo::AddSupplementaryRegister() into a standalone
function working on std::vector<DynamicRegisterInfo::Register>.

Differential Revision: https://reviews.llvm.org/D111295
The file was modifiedlldb/include/lldb/Target/DynamicRegisterInfo.h
The file was modifiedlldb/source/Target/DynamicRegisterInfo.cpp
The file was modifiedlldb/unittests/Target/DynamicRegisterInfoTest.cpp
Commit 583f67cb4eef6171326d72da8bbb3001c846bbfb by mgorny
[lldb] [ABI/AArch64] Add pseudo-regs if missing

Create pseudo-registers on the AArch64 target if they are not provided
by the remote server. This is the case for gdbserver. The created
registers are:

- 32-bit wN partials for 64-bit xN registers
- double precision floating-point dN registers (overlapping with vN)
- single precision floating-point sN registers (overlapping with vN)

Differential Revision: https://reviews.llvm.org/D109876
The file was modifiedlldb/source/Plugins/ABI/AArch64/ABIAArch64.cpp
The file was modifiedlldb/test/API/functionalities/gdb_remote_client/TestGDBServerTargetXML.py
Commit 660632778f308e101c5c168912ed423934aa8b21 by mgorny
[lldb] [DynamicRegisterInfo] Support setting from vector<Register>

Add an overload of DynamicRegisterInfo::SetRegisterInfo() that accepts
a std::vector<Register> as an argument.  This moves the conversion
from DRI::Register to RegisterInfo directly into DynamicRegisterInfo,
and avoids the necessity of creating fully-compatible intermediate
RegisterInfo instances.

While the new method could technically reuse AddRegister(), the ultimate
goal is to replace AddRegister() with SetRegisterInfo() entirely.

Differential Revision: https://reviews.llvm.org/D111435
The file was modifiedlldb/unittests/Target/DynamicRegisterInfoTest.cpp
The file was modifiedlldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
The file was modifiedlldb/include/lldb/Target/DynamicRegisterInfo.h
The file was modifiedlldb/source/Target/DynamicRegisterInfo.cpp
Commit 774388241e25529308c8bbac6012a20b62b82f29 by hans
[MS compat] Handle #pragma fenv_access like #pragma STDC FENV_ACCESS (PR50694)

This adds support for the MSVC spelling of the pragma in -fms-extensions
mode.

Differential revision: https://reviews.llvm.org/D111440
The file was modifiedclang/lib/Parse/ParsePragma.cpp
The file was modifiedclang/include/clang/Parse/Parser.h
The file was modifiedclang/lib/Parse/Parser.cpp
The file was addedclang/test/Parser/pragma-fenv_access-ms.c
The file was modifiedclang/test/CodeGen/pragma-fenv_access.c
The file was modifiedclang/include/clang/Basic/DiagnosticParseKinds.td
The file was modifiedclang/include/clang/Basic/TokenKinds.def
The file was modifiedclang/lib/Parse/ParseStmt.cpp
Commit bacb0cac1580a0cd83a0d3c5cb12f3f80d26a0f4 by zinenko
[mlir] add user-level documentation for Python bindings

Until now, we only had documentation oriented towards developers of the
bindings. Provide some documentation for users of the bindings that don't want
or need to understand the inner workings.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D111540
The file was modifiedmlir/docs/Bindings/Python.md
Commit 0aeb37324dbb83d442b9222f465cece691fe29e0 by gusrb406
[SimpleLoopUnswitch] Re-fix introduction of UB when hoisted condition may be undef or poison

https://bugs.llvm.org/show_bug.cgi?id=27506
https://bugs.llvm.org/show_bug.cgi?id=31652
https://bugs.llvm.org/show_bug.cgi?id=51043

Problems with SimpleLoopUnswitch cause the bug reports above.

```
while (...) {
  if (C) { A }
  else   { B }
}
Into:

C' = freeze(C)
if (C') {
  while (...) { A }
} else {
  while (...) { B }
}
```
This problem can be solved by adding a freeze on hoisted branches(above transform) and has been solved by D29015.
However, D29015 is now reverted by performance regression(https://github.com/llvm/llvm-project/commit/2b5a8976514de326bb84f0913d9d451089c11d22)

It is not the first time that an added freeze has caused performance regression.
SimplifyCFG also had a problem with UB caused by branching-on-undef, which was solved by adding freeze to the branching condition. (D104569)
Performance regression occurred in D104569, and patches such as D105344 and D105392 were written to minimize it.

This patch will correct the SimpleLoopUnswitch as D104569 handles the SimplyCFG while minimizing performance loss by introducing patches like D105344 and D105392(This patch was rebased with the author's permission)

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D106041
The file was addedllvm/test/Transforms/SimpleLoopUnswitch/nontrivial-unswitch-freeze.ll
The file was modifiedllvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
Commit f5c0c9179f555b2406fcc1a5921d60fd1e534425 by Andrey.Churbanov
[OpenMP] libomp: add OpenMP 5.1 memory allocation routines.

Aligned allocation routines added.
Fortran interfaces added for all allocation routines.

Differential Revision: https://reviews.llvm.org/D110923
The file was modifiedopenmp/runtime/src/kmp_alloc.cpp
The file was modifiedopenmp/runtime/src/include/omp_lib.h.var
The file was addedopenmp/runtime/test/api/omp_aligned_alloc.c
The file was modifiedopenmp/runtime/src/kmp_stub.cpp
The file was modifiedopenmp/runtime/src/kmp_csupport.cpp
The file was addedopenmp/runtime/test/api/omp_aligned_calloc.c
The file was modifiedopenmp/runtime/src/kmp.h
The file was modifiedopenmp/runtime/src/include/omp.h.var
The file was modifiedopenmp/runtime/src/include/omp_lib.f90.var
The file was modifiedopenmp/runtime/src/dllexports
The file was modifiedopenmp/runtime/tools/generate-def.pl
Commit 42b588a2000e872d63326a623982c75ab5ac28a9 by Lang Hames
[ORC] Add static and dynamic library generator support to C API.

Adds LLVMOrcCreateStaticLibrarySearchGeneratorForPath and
LLVMOrcCreateDynamicLibrarySearchGeneratorForPath functions to create generators
for static and dynamic libraries.

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D108535
The file was modifiedllvm/lib/ExecutionEngine/Orc/OrcV2CBindings.cpp
The file was modifiedllvm/include/llvm-c/Orc.h
Commit 3550e242fad672696da361f7ddadf53a41114dfd by victor.campos
[Clang][ARM][AArch64] Add support for Armv9-A, Armv9.1-A and Armv9.2-A

armv9-a, armv9.1-a and armv9.2-a can be targeted using the -march option
both in ARM and AArch64.

- Armv9-A maps to Armv8.5-A.
- Armv9.1-A maps to Armv8.6-A.
- Armv9.2-A maps to Armv8.7-A.
- The SVE2 extension is enabled by default on these architectures.
- The cryptographic extensions are disabled by default on these
architectures.

The Armv9-A architecture is described in the Arm® Architecture Reference
Manual Supplement Armv9, for Armv9-A architecture profile
(https://developer.arm.com/documentation/ddi0608/latest).

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D109517
The file was modifiedllvm/include/llvm/Support/ARMTargetParser.def
The file was modifiedllvm/include/llvm/Support/AArch64TargetParser.def
The file was modifiedclang/lib/Basic/Targets/AArch64.cpp
The file was modifiedllvm/lib/Target/ARM/ARMSubtarget.h
The file was modifiedclang/test/Preprocessor/aarch64-target-features.c
The file was modifiedllvm/test/MC/AArch64/SVE2/directive-arch-negative.s
The file was modifiedllvm/include/llvm/ADT/Triple.h
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.td
The file was modifiedllvm/test/MC/AArch64/SVE2/directive-arch.s
The file was modifiedllvm/lib/Support/AArch64TargetParser.cpp
The file was modifiedllvm/lib/Support/ARMTargetParser.cpp
The file was modifiedllvm/lib/Support/Triple.cpp
The file was modifiedllvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
The file was modifiedclang/lib/Basic/Targets/AArch64.h
The file was modifiedclang/test/Preprocessor/arm-target-features.c
The file was modifiedllvm/test/MC/AArch64/SME/directives-negative.s
The file was modifiedllvm/lib/Target/AArch64/AArch64.td
The file was modifiedllvm/lib/Target/ARM/ARM.td
The file was modifiedllvm/unittests/Support/TargetParserTest.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64Subtarget.h
The file was modifiedllvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
The file was modifiedclang/test/Driver/aarch64-cpus.c
The file was modifiedclang/test/Driver/arm-cortex-cpus.c
The file was modifiedclang/lib/Driver/ToolChains/Arch/AArch64.cpp
The file was modifiedclang/lib/Basic/Targets/ARM.cpp
The file was modifiedllvm/test/MC/AArch64/SME/directives.s
Commit 71ec1e501572ed327c16cb958b93652ea0d74f6f by i
[ELF] Demote !isUsedInRegularObj lazy symbol

I think D79300 has fixed the D51892 (`__i686.get_pc_thunk.bx`) issue, so
we can bring back rL330869.
D79300 says `would error undefined symbol instead of the more relevant discarded section`
but it doesn't reproduce now.

This avoids a quirk in `isUndefWeak()`.

Reviewed By: peter.smith

Differential Revision: https://reviews.llvm.org/D111365
The file was modifiedlld/ELF/SyntheticSections.cpp
The file was modifiedlld/ELF/Symbols.h
The file was modifiedlld/ELF/Driver.cpp
Commit b7543c485d22bdd57d758f5a461ae99fd5b1f3aa by Lang Hames
[ORC] Fix an 80 column violation.
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/SimpleRemoteEPC.h
Commit a5c3508ac71bf30a6d2da35f438e90cc153d8d84 by craig.topper
[RISCV] Require tail policy argument to builtins to be an integer constant expression

The IR intrinsics use ImmArg for the policy operand so this needs to be enforced as a constant in the frontend.

Differential Revision: https://reviews.llvm.org/D110779
The file was modifiedclang/utils/TableGen/RISCVVEmitter.cpp
Commit 7f55209cee55fa2f7d5954f7ec7df77d90585a7b by listmail
[SCEV] Extend trip count to avoid overflow by default

As a brief reminder, an "exit count" is the number of times the backedge executes before some event. It can be zero if we exit before the backedge is reached. A "trip count" is the number of times the loop header is entered if we branch into the loop. In general, TC = BTC + 1 and thus a zero trip count is ill defined

There is a cornercases which we don't handle well. Let's assume i8 for our examples to keep things simple. If BTC = 255, then the correct trip count is 256. However, 256 is not representable in i8.

In theory, code which needs to reason about trip counts is responsible for checking for this cornercase, and either bailing out, or handling it correctly. Historically, we don't have a great track record about actually doing so.

When reviewing D109676, I found myself asking a basic question. Was there any good reason to preserve the current wrap-to-zero behavior when converting from backedge taken counts to trip counts? After reviewing existing code, I could not find a single case which appears to correctly and precisely handle the overflow case.

This patch changes the default behavior to extend instead of wrap. That is, if the result might be 256, we return a value of i9 type to ensure we interpret the count correctly. I did leave the legacy behavior as an option since a) loop-flatten stops triggering if I extend due to weirdly specific pattern matching I didn't understand and b) we could reasonably use the mode if we'd externally established a lack of overflow.

I want to emphasize that this change is *not* NFC. There are two call sites (one in ScalarEvolution.cpp, one in LoopCacheAnalysis.cpp) which are switched to the extend semantics. The former appears imprecise (but correct) for a constant 255 BTC. The later appears incorrect, though I don't have a test case.

Differential Revision: https://reviews.llvm.org/D110587
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was modifiedllvm/include/llvm/Analysis/ScalarEvolution.h
The file was modifiedllvm/lib/Transforms/Scalar/LoopFlatten.cpp
Commit 337cf0a5abcff3b51a898e610ae0acbb895b4ead by aeubanks
[llc] Support -time-trace in llc

Mostly copied from opt.cpp.

Reviewed By: hans

Differential Revision: https://reviews.llvm.org/D111466
The file was addedllvm/test/tools/llc/time-trace.ll
The file was modifiedllvm/tools/llc/llc.cpp
Commit b41cfbfcbbe27d519171b5847a8d44ca8a5a0f13 by aeubanks
[docs] Mention in release notes that we now support 2^32 alignment

Missed in D110451.

Reviewed By: hans

Differential Revision: https://reviews.llvm.org/D111472
The file was modifiedllvm/docs/ReleaseNotes.rst
The file was modifiedclang/docs/ReleaseNotes.rst
The file was modifiedllvm/docs/LangRef.rst
Commit b4b7e605a6b2e2a9f8c5ce6df042b32f320d239a by Joseph.Nash
[AMDGPU] Support shared literals in FMAMK/FMAAK

These instructions should allow src0 to be a literal with the same
value as the mandatory other literal. Enable it by introducing an
operand that defers adding its value to the MI when decoding till
the mandatory literal is parsed.

Reviewed By: dp, foad

Differential Revision: https://reviews.llvm.org/D111067

Change-Id: I22b0ae0d35bad17b6f976808e48bffe9a6af70b7
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
The file was modifiedllvm/test/MC/AMDGPU/gfx10_asm_vop2.s
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
The file was modifiedllvm/lib/Target/AMDGPU/SIDefines.h
The file was modifiedllvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
The file was modifiedllvm/test/MC/AMDGPU/gfx9_asm_vop2.s
The file was modifiedllvm/test/MC/AMDGPU/literals.s
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.td
The file was modifiedllvm/test/MC/AMDGPU/gfx10_asm_err.s
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.td
The file was modifiedllvm/lib/Target/AMDGPU/VOP2Instructions.td
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/gfx9_dasm_all.txt
The file was modifiedllvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
The file was modifiedllvm/test/MC/AMDGPU/vop2.s
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/gfx10_dasm_all.txt
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
Commit 56a9effc427b10203dfb7f691a12924a82ba5cd5 by kostyak
[scudo] Skip AllocAfterFork test on machines with low max_map_count

Reducing the number of iterations in that test with D111342 helped,
but the failure still occured flakily when the test is ran as part
of a large test suite.

Reducing further the number of iterations might not be good enough,
so we will skip the test if the `max_map_count` variable can be
read, and if lower than a given threshold.

Differential Revision: https://reviews.llvm.org/D111465
The file was modifiedcompiler-rt/lib/scudo/standalone/tests/wrappers_cpp_test.cpp
Commit ef44cad53d3a69d52b3131d8eb6f1d1ca8a70e46 by pklausler
[flang][NFC] Document behavior for nonspecified/ambiguous cases

Add explicit documentation for a couple of cases where the Fortran
standard has been observed to be ambiguous or nonspecific and we've
had to choose the behavior of the implementation from some possible
alternatives (and may be distinct from other implementations).

Differential Revision: https://reviews.llvm.org/D111446
The file was modifiedflang/docs/Extensions.md
The file was modifiedflang/runtime/derived.cpp
Commit d4090482013599b1c246f3553717e2a88d6b24a5 by kazu
[Sema] Use llvm::is_contained (NFC)
The file was modifiedclang/lib/Sema/SemaAccess.cpp
The file was modifiedclang/lib/Sema/SemaTemplateInstantiate.cpp
The file was modifiedclang/lib/Sema/SemaExpr.cpp
The file was modifiedclang/lib/Sema/SemaLookup.cpp
The file was modifiedclang/lib/Sema/SemaOpenMP.cpp
The file was modifiedclang/lib/Sema/SemaDeclAttr.cpp
The file was modifiedclang/lib/Sema/SemaInit.cpp
The file was modifiedclang/lib/Sema/AnalysisBasedWarnings.cpp
The file was modifiedclang/lib/Sema/SemaDecl.cpp
Commit 070315d04c6bb259ab058bd15a851124a7c7f6e6 by Jonas Devlieghere
Revert "Allow signposts to take advantage of deferred string substitution"

This reverts commits f9aba9a5afe09788eceb9879aa5c3ad345e0f1e9 and
035217ff515b8ecdc871e39fa840f3cba1b9cec7.

As explained in the original commit message, this didn't have the
intended effect of improving the common LLDB use case, but still
provided a marginal improvement for the places where LLDB creates a
scoped time with a string literal.

The reason for the revert is that this change pulls in the os/signpost.h
header in Signposts.h. The former transitively includes loader.h, which
contains a series of macro defines that conflict with MachO.h. There are
ways to work around that, but Adrian and I concluded that  none of them
are worth the trade-off in complicating Signposts.h even further.
The file was modifiedllvm/include/llvm/Config/config.h.cmake
The file was modifiedllvm/lib/Support/Timer.cpp
The file was modifiedllvm/include/llvm/Config/llvm-config.h.cmake
The file was modifiedllvm/include/llvm/Support/Signposts.h
The file was modifiedlldb/include/lldb/Utility/Timer.h
The file was modifiedlldb/source/Utility/Timer.cpp
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDebugMap.cpp
The file was modifiedllvm/lib/Support/Signposts.cpp
The file was modifiedlldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
Commit 144f851f6f5203969ef8b8052060ad56fcaab934 by thakis
[clang/CFG] Rewrap a line to 80 columns
The file was modifiedclang/lib/Analysis/CFG.cpp
Commit 00ca004dda3215dce98cf081cd6b1ee8b7a8b3d6 by thakis
[clang] Convert a few loops to for-each
The file was modifiedclang/lib/Sema/AnalysisBasedWarnings.cpp
The file was modifiedclang/lib/Sema/SemaAvailability.cpp
The file was modifiedclang/lib/Analysis/CFG.cpp
Commit 5ab2a95edb62e67478095e4e5619a07efc95ee21 by thakis
[clang] Remove an else-after-return
The file was modifiedclang/lib/Analysis/CFG.cpp
Commit 70d7bef1e8ef4bb5b0d3cb3c0d89b088103eb83d by joeloser93
[libc++] Verify span and string_view are trivially copyable

Implement P2251 which requires `span` and `basic_string_view` to be
trivially copyable. They already are - this just adds tests to bind that
behavior.

Reviewed By: ldionne, Quuxplusone, Mordante, #libc

Differential Revision: https://reviews.llvm.org/D111197
The file was addedlibcxx/test/std/strings/string.view/trivially_copyable.compile.pass.cpp
The file was modifiedlibcxx/docs/Status/Cxx2bPapers.csv
The file was addedlibcxx/test/std/containers/views/trivially_copyable.compile.pass.cpp
Commit 63aab4065b452ae5693481dfd12fed3c184261c7 by thakis
[gn build] (manually) port 070315d04c6b
The file was modifiedllvm/utils/gn/secondary/llvm/include/llvm/Config/BUILD.gn
Commit 0d450aa641f94ae2e50cc38438ad1b52e3ed900f by joeloser93
[libc++] P2401: conditional noexcept for std::exchange

Implement P2401 which adds a `noexcept` specification to
`std::exchange`. Treated as a defect fix which is the motivation for
applying this change to all standards mode rather than just C++23 or
later as the paper suggests.

Reviewed By: Quuxplusone, Mordante, #libc

Differential Revision: https://reviews.llvm.org/D111481
The file was modifiedlibcxx/include/utility
The file was modifiedlibcxx/test/std/utilities/utility/exchange/exchange.pass.cpp
The file was modifiedlibcxx/docs/Status/Cxx2bPapers.csv
The file was modifiedlibcxx/include/__utility/exchange.h
Commit 76495ea317da91338c4e43438ad2721bbff1e6fb by lebedev.ri
[NFC][X86][Codegen] Add basic PAVG chain test (PR52131)
The file was modifiedllvm/test/CodeGen/X86/avg.ll
Commit 011d8633eb11d31c801ae86bd1aecbe72953082a by gcmn
[Bazel] Update config for 070315d04c6b

This updates the Bazel configuration for
https://github.com/llvm/llvm-project/commit/070315d04c6b which moved
`LLVM_SUPPORT_XCODE_SIGNPOSTS` from llvm-config.h.cmake to
config.h.cmake.

Also adds a comment for `HAVE_PROC_PID_RUSAGE`, that I spotted was
missing.

Differential Revision: https://reviews.llvm.org/D111569
The file was modifiedutils/bazel/llvm-project-overlay/llvm/include/llvm/Config/llvm-config.h
The file was modifiedutils/bazel/llvm-project-overlay/llvm/include/llvm/Config/config.h
The file was modifiedutils/bazel/llvm_configs/llvm-config.h.cmake
The file was modifiedutils/bazel/llvm_configs/config.h.cmake
Commit 849f016ce8322d492e7d85eaf0c2d322e8836a64 by ajcbik
[mlir][sparse] accept affine subscripts in outer dimensions of dense memrefs

This relaxes vectorization of dense memrefs a bit so that affine expressions
are allowed in more outer dimensions. Vectorization of non unit stride
references is disabled though, since this seems ineffective anyway.

Reviewed By: bixia

Differential Revision: https://reviews.llvm.org/D111469
The file was modifiedmlir/lib/Dialect/SparseTensor/Transforms/Sparsification.cpp
The file was modifiedmlir/test/Dialect/SparseTensor/sparse_vector.mlir
Commit ec2d0ded1b3fc941119935c66576329b9f43a9f1 by mgorny
[lldb] Remove "0x" prefix from hex values in dirty-pages

Remove the redudant "0x" prefix in the "dirty-pages" key of
qMemoryRegionInfo packet.  The client accepts hex values both with
and without the prefix.

Differential Revision: https://reviews.llvm.org/D110510
The file was modifiedlldb/test/API/functionalities/gdb_remote_client/TestMemoryRegionDirtyPages.py
The file was modifiedlldb/tools/debugserver/source/RNBRemote.cpp
Commit a6c9506365fb4027f5403e2e39301ad8e0668267 by Stefan Gränitz
[Orc] Handle hangup messages in SimpleRemoteEPC

On the controller-side, handle `Hangup` messages from the executor. The executor passed `Error::success()` or a failure message as payload.

Hangups cause an immediate disconnect of the transport layer. The disconnect function may be called later again and so implementations should be prepared. `FDSimpleRemoteEPCTransport::disconnect()` already has a flag to check that:
https://github.com/llvm/llvm-project/blob/cd1bd95d8707371da0e4f75cd01669c427466931/llvm/lib/ExecutionEngine/Orc/Shared/SimpleRemoteEPCUtils.cpp#L112

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D111527
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/SimpleRemoteEPC.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/SimpleRemoteEPC.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/Shared/SimpleRemoteEPCUtils.h
Commit ab33427c86825a88dff612f4ae29f07c601321d4 by flo
[VPlan] Print live-in backedge taken count as part of plan.

At the moment, a VPValue is created for the backedge-taken count, which
is used by some recipes. To make it easier to identify the operands of
recipes using the backedge-taken count, print it at the beginning of the
VPlan if it is used.

Reviewed By: a.elovikov

Differential Revision: https://reviews.llvm.org/D111298
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/first-order-recurrence-sink-replicate-region.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge.ll
Commit 7af6a44077c164e59bf6787864e73a5e8d287629 by lebedev.ri
[NFC][X86][Codegen] Add semi-negative PAVG chain test (PR52131)
The file was modifiedllvm/test/CodeGen/X86/avg.ll
Commit 2e1ad93201e51ae0fc4529ac7a877443e2a5bd82 by jay.foad
[AMDGPU] Fix copying a machine operand

Without this I get:

*** Bad machine code: Instruction has operand with wrong parent set ***
- function:    available_externally_test
- basic block: %bb.0  (0x7dad598)
- instruction: %0:r600_treg32_x = MOV 1, 0, 0, 0, $alu_literal_x, 0, 0, 0, -1, 1, $pred_sel_off, @available_externally, 0

Differential Revision: https://reviews.llvm.org/D111549
The file was modifiedllvm/lib/Target/AMDGPU/R600ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/global-constant.ll
Commit edfdce2627633a161292c6ba46e868330569ee9d by jay.foad
[PHIElimination] Fix accounting for undef uses when updating LiveVariables

PHI elimination updates LiveVariables info as described here:

    // We only need to update the LiveVariables kill of SrcReg if this was the
    // last PHI use of SrcReg to be lowered on this CFG edge and it is not live
    // out of the predecessor. We can also ignore undef sources.

Unfortunately if the last use also happened to be an undef use then it
would fail to update the LiveVariables at all. Fix this by not counting
undef uses in the VRegPHIUse map.

Thanks to Mikael Holmén for the test case!

Differential Revision: https://reviews.llvm.org/D111552
The file was modifiedllvm/lib/CodeGen/PHIElimination.cpp
The file was addedllvm/test/CodeGen/X86/phielim-undef.mir
Commit 121b2252de0eed68f2ddf5f09e924a6c35423d47 by chris.bieneman
AddGlobalAnnotations for function with or without function body.

When AnnotateAttr is on a function, AddGlobalAnnotations is only called
in CodeGenModule::EmitGlobalFunctionDefinition which means AnnotateAttr
on function declaration without function body will be ignored.
The patch will move AddGlobalAnnotations  to
CodeGenModule::SetFunctionAttributes, so with or without function body,
the AnnotateAttr will get code gen for a function.

It'll help case when AnnotateAttr is on external function, and the
AnnotateAttr will be consumed in IR level.

For example, a pass to collect num of uses for functions with
__attribute((annotate("count_use"))) after optimizations,
As long as there's __attribute((annotate("count_use"))), function with
or without function body should be counted.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D111109

Patch by:  python3kgae (Xiang Li)
The file was modifiedclang/lib/CodeGen/CodeGenModule.cpp
The file was modifiedclang/test/CodeGenCXX/attr-annotate.cpp
The file was modifiedclang/test/CodeGen/annotations-global.c
Commit 25fabc434ad5d1d7edd994b1fafb87e70ee2cda1 by yitzhakm
Add release note about `TypeLoc` matchers.

Reviewed By: ymandel, aaron.ballman

Differential Revision: https://reviews.llvm.org/D111518
The file was modifiedclang/docs/ReleaseNotes.rst
Commit 1760d8b36b4804758a9a4801edc1d97c0ba4f25c by danielzresnick
[mlir][ODS] Support result type inference in custom assembly format

Operations that have the InferTypeOpInterface trait can now omit the return
types in their custom assembly formats.

Differential Revision: https://reviews.llvm.org/D111326
The file was modifiedmlir/tools/mlir-tblgen/OpFormatGen.cpp
The file was modifiedmlir/test/mlir-tblgen/op-format-spec.td
The file was modifiedmlir/docs/OpDefinitions.md
The file was modifiedmlir/test/mlir-tblgen/op-format.mlir
The file was modifiedmlir/test/lib/Dialect/Test/TestOps.td
Commit e0582e69f517c5d4a47f52130ae4bd066c3d8edd by clattner
[TypeSwitch/Compiler.h] Provide a LLVM_NODEBUG macro and use it in TypeSwitch.h

TypeSwitch.h is used pervasively in MLIR and often has dozens of types switched
over.  It uses "zero cost" variadic templates to implement the dispatching
mechanism... which isn't zero cost in debug builds, and which causes a massive
problem for actually debugging things that use it - you get dozens of nonsense
frames in the debugger for simple things like a visitor.

Fix this by marking the key method in TypeSwitch as nodebug + alwaysinline.
This resolves LLVM PR49301

Differential Revision: https://reviews.llvm.org/D111520
The file was modifiedllvm/include/llvm/ADT/TypeSwitch.h
The file was modifiedllvm/include/llvm/Support/Compiler.h
Commit fbddf22ef72d3c2e9b14e1501841b03380eef12b by aeubanks
[SCCP] Properly report changes when changing a pointer argument

Fixes one of the issues in PR51946.

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D111277
The file was modifiedllvm/lib/Transforms/Scalar/SCCP.cpp
The file was addedllvm/test/Transforms/SCCP/report-changed.ll
Commit 518ec39de7935f984fba13cbf5973774f4f05ea8 by spatel
[InstCombine] add signbit check for or'd operands; NFC
The file was modifiedllvm/test/Transforms/InstCombine/icmp-or.ll
Commit 59441c73296e7c489ac1d71ffda2de3060bdd4f8 by spatel
[InstCombine] fold signbit check of X | (X -1)

There may be some other patterns like this or a generalization,
but this is an example that I noticed would definitely regress
with a planned follow-up to D111410.

https://alive2.llvm.org/ce/z/GVpQDb
The file was modifiedllvm/test/Transforms/InstCombine/icmp-or.ll
The file was modifiedllvm/test/Transforms/InstCombine/or.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
Commit 259390de9af659e2432c5b2af041ec6576c1b26d by aeubanks
[LCG] Don't skip invalidation of LazyCallGraph if CFG analyses are preserved

The CFG being changed and the overall call graph are not related, we can introduce/remove calls without changing the CFG.

Resolves one of the issues in PR51946.

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D111275
The file was modifiedllvm/lib/Analysis/LazyCallGraph.cpp
The file was addedllvm/test/Analysis/LazyCallGraph/invalidate.ll
Commit 684cbae89a78f4329a018237ec6f230a82dbc883 by lebedev.ri
[KnownBits] Introduce `countMaxActiveBits()` and use it in a few places
The file was modifiedllvm/include/llvm/Support/KnownBits.h
The file was modifiedllvm/unittests/Support/KnownBitsTest.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
The file was modifiedllvm/lib/Analysis/InstructionSimplify.cpp
Commit 860b4479dccad323ae22361294e69765c3fdd25f by david.green
[ARM] Be more explicit about disabling CombineBaseUpdate for MVE.

This shouldn't be called for non-neon targets at the moment in either
case, but it is good to be expliit about the CombineBaseUpdate being a
NEON function, not expecting to be run under MVE.
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
Commit 2a2a37d97207ea7017f1ad9d1312e462c0de9e79 by nikita.ppv
[IVUsers] Check for preheader instead of loop simplify form

IVUsers currently makes sure that all loops dominating a user are
in loop simplify form, because SCEVExpander needs a preheader to
insert into. However, loop simplify form requires much more than
that. In particular, it requires dedicated exits, which means that
exits need to be found and walked. For large functions with many
nested loops, this can result in pathological compile-time explosion.

Fix this by only checking the property we're actually interested in,
which is incidentally cheap to check.

Differential Revision: https://reviews.llvm.org/D111493
The file was modifiedllvm/lib/Analysis/IVUsers.cpp
Commit 8abf46d39a0cf93d0299ea31426a566747064f69 by Lang Hames
[ORC] Propagate out-of-band errors in callAsync.

Returned out-of-band errors should be wrapped as llvm::Errors and passed to the
SendDeserializedResult function. Failure to do this results in an assertion when
we try to deserialize from the WrapperFunctionResult while it's in the
out-of-band error state.
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/Shared/WrapperFunctionUtils.h
The file was modifiedllvm/unittests/ExecutionEngine/Orc/WrapperFunctionUtilsTest.cpp
Commit 4fc2a4cc013b87d240b7a8bd4109fbc58495d302 by Lang Hames
[ORC] Destroy FinalizeErr if there is a serialization error.

If there is a serialization error then FinalizeErr should never be set, so we
can use cantFail rather than consumeError here.
The file was modifiedllvm/lib/ExecutionEngine/Orc/EPCGenericJITLinkMemoryManager.cpp
Commit 17a0858f9d17a5d0d1b70b0e409e59a9f96967ca by Lang Hames
[ORC] Propagate errors to handlers when sendMessage fails.

In SimpleRemoteEPC, calls to from callWrapperAsync to sendMessage may fail.
The handlers may or may not be sent failure messages by handleDisconnect,
depending on when that method is run. This patch adds a check for an un-failed
handler, and if it finds one sends it a failure message.
The file was modifiedllvm/lib/ExecutionEngine/Orc/Shared/SimpleRemoteEPCUtils.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/ExecutorProcessControl.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/SimpleRemoteEPC.cpp
Commit f7ca54289c1466e47eb5e77a9e3f751f13223428 by asbirlea
[LoopSimplifyCFG] Do not require MSSA. Continue to preserve if available.

LoopSimplifyCFG does not need MSSA, but should preserve it if it's available.

This is a legacy PM change, aimed to denoise the test changes in D109958.

Differential Revision: https://reviews.llvm.org/D111578
The file was modifiedllvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp
Commit 64d1d5f336c3356ac77c588329ce3e449cc46de3 by Jinsong Ji
[AIX] Unsupported newly added AMDGPU clang test
The file was modifiedclang/test/Driver/fat_archive_amdgpu.cpp
Commit da904719e9a74a524a69010b59d144cf6d299771 by Amara Emerson
[GlobalISel] Regenerate some MIR tests with CHECK-NEXT for another patch.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/combine-urem-pow-2.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-getelementptr.ll
Commit c3dcf39554dbea780d6cb7e12239451ba47a2668 by jpienaar
[mlir] Restrict to requiring traits when using InferTensorType trait.

Avoids running into segfaults accidentally.

Differential Revision: https://reviews.llvm.org/D110297
The file was modifiedmlir/include/mlir/Interfaces/InferTypeOpInterface.h
Commit 6599961c17073204ac868958e632cf4d92353cbe by carrot
[TwoAddressInstructionPass] Improve the SrcRegMap and DstRegMap computation

This patch contains following enhancements to SrcRegMap and DstRegMap:

  1 In findOnlyInterestingUse not only check if the Reg is two address usage,
    but also check after commutation can it be two address usage.

  2 If a physical register is clobbered, remove SrcRegMap entries that are
    mapped to it.

  3 In processTiedPairs, when create a new COPY instruction, add a SrcRegMap
    entry only when the COPY instruction is coalescable. (The COPY src is
    killed)

With these enhancements isProfitableToCommute can do better commute decision,
and finally more register copies are removed.

Differential Revision: https://reviews.llvm.org/D108731
The file was modifiedllvm/test/CodeGen/X86/pmulh.ll
The file was modifiedllvm/test/CodeGen/X86/sshl_sat.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-combining.ll
The file was modifiedllvm/test/CodeGen/X86/ssub_sat_vec.ll
The file was modifiedllvm/test/CodeGen/X86/umul_fix.ll
The file was modifiedllvm/test/CodeGen/X86/iabs.ll
The file was modifiedllvm/test/CodeGen/X86/vector-unsigned-cmp.ll
The file was modifiedllvm/test/CodeGen/X86/bitreverse.ll
The file was modifiedllvm/test/CodeGen/X86/add-cmov.ll
The file was modifiedllvm/test/CodeGen/X86/rotate-multi.ll
The file was modifiedllvm/test/CodeGen/X86/umax.ll
The file was modifiedllvm/test/CodeGen/X86/abs.ll
The file was modifiedllvm/test/CodeGen/X86/vec_ssubo.ll
The file was modifiedllvm/test/CodeGen/X86/vec_shift6.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-rot-128.ll
The file was modifiedllvm/test/CodeGen/X86/avx512-inc-dec.ll
The file was modifiedllvm/test/CodeGen/X86/rev16.ll
The file was modifiedllvm/test/CodeGen/X86/vector-tzcnt-128.ll
The file was modifiedllvm/test/CodeGen/X86/tbm-intrinsics-fast-isel.ll
The file was modifiedllvm/test/CodeGen/X86/avg.ll
The file was modifiedllvm/test/CodeGen/X86/sse-minmax.ll
The file was modifiedllvm/test/CodeGen/X86/vector-lzcnt-128.ll
The file was modifiedllvm/test/CodeGen/X86/vselect-zero.ll
The file was modifiedllvm/test/CodeGen/X86/x86-no_caller_saved_registers-preserve.ll
The file was modifiedllvm/test/CodeGen/X86/vector-reduce-fmax.ll
The file was modifiedllvm/test/CodeGen/X86/horizontal-reduce-fadd.ll
The file was modifiedllvm/test/CodeGen/X86/vector-mul.ll
The file was modifiedllvm/test/CodeGen/ARM/ssat.ll
The file was modifiedllvm/test/CodeGen/X86/combine-sra.ll
The file was modifiedllvm/test/CodeGen/X86/fshl.ll
The file was modifiedllvm/test/CodeGen/X86/haddsub-shuf.ll
The file was modifiedllvm/test/CodeGen/X86/mul-constant-i16.ll
The file was modifiedllvm/test/CodeGen/X86/vector-reduce-fadd.ll
The file was modifiedllvm/test/CodeGen/X86/pmul.ll
The file was modifiedllvm/test/CodeGen/X86/vec_minmax_uint.ll
The file was modifiedllvm/test/CodeGen/X86/vector-reduce-fadd-fast.ll
The file was modifiedllvm/test/CodeGen/X86/mul128.ll
The file was modifiedllvm/test/CodeGen/X86/rot16.ll
The file was modifiedllvm/test/CodeGen/X86/vector-idiv-udiv-128.ll
The file was modifiedllvm/test/CodeGen/X86/avx512-mask-op.ll
The file was modifiedllvm/test/CodeGen/X86/mul-constant-i8.ll
The file was modifiedllvm/test/CodeGen/X86/sdiv_fix.ll
The file was modifiedllvm/test/CodeGen/X86/combine-mulo.ll
The file was modifiedllvm/test/CodeGen/X86/vec_sdiv_to_shift.ll
The file was modifiedllvm/test/CodeGen/X86/vec_ctbits.ll
The file was modifiedllvm/test/CodeGen/SystemZ/int-cmp-57.ll
The file was modifiedllvm/test/CodeGen/X86/vector-popcnt-128.ll
The file was modifiedllvm/test/CodeGen/X86/smin.ll
The file was modifiedllvm/test/CodeGen/X86/DynamicCalleeSavedRegisters.ll
The file was modifiedllvm/test/CodeGen/X86/popcnt.ll
The file was modifiedllvm/test/CodeGen/X86/combine-smin.ll
The file was modifiedllvm/test/CodeGen/X86/umulo-128-legalisation-lowering.ll
The file was modifiedllvm/test/CodeGen/X86/combine-srem.ll
The file was modifiedllvm/test/CodeGen/Thumb/pr35836_2.ll
The file was modifiedllvm/test/CodeGen/X86/urem-seteq-vec-nonzero.ll
The file was modifiedllvm/test/CodeGen/X86/sat-add.ll
The file was modifiedllvm/test/CodeGen/X86/smax.ll
The file was modifiedllvm/test/CodeGen/X86/midpoint-int-vec-128.ll
The file was modifiedllvm/test/CodeGen/X86/avx512-regcall-NoMask.ll
The file was modifiedllvm/test/CodeGen/X86/cmp-concat.ll
The file was modifiedllvm/test/CodeGen/X86/combine-sdiv.ll
The file was modifiedllvm/test/CodeGen/X86/umulo-64-legalisation-lowering.ll
The file was modifiedllvm/test/CodeGen/X86/tbm-intrinsics-fast-isel-x86_64.ll
The file was modifiedllvm/test/CodeGen/X86/combine-udiv.ll
The file was modifiedllvm/test/CodeGen/X86/palignr.ll
The file was modifiedllvm/test/CodeGen/X86/sqrt-fastmath.ll
The file was modifiedllvm/test/CodeGen/X86/vector-reduce-smax.ll
The file was modifiedllvm/test/CodeGen/X86/rotate-extract.ll
The file was modifiedllvm/test/CodeGen/X86/vector-popcnt-128-ult-ugt.ll
The file was modifiedllvm/test/CodeGen/X86/mul-constant-i64.ll
The file was modifiedllvm/test/CodeGen/X86/ssub_sat.ll
The file was modifiedllvm/test/CodeGen/X86/urem-lkk.ll
The file was modifiedllvm/test/CodeGen/X86/fshr.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-rot-sub128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-rot-sub128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-trunc-math.ll
The file was modifiedllvm/test/CodeGen/X86/bswap_tree2.ll
The file was modifiedllvm/test/CodeGen/X86/x86-shifts.ll
The file was modifiedllvm/test/CodeGen/X86/arithmetic_fence2.ll
The file was modifiedllvm/test/CodeGen/X86/horizontal-sum.ll
The file was modifiedllvm/test/CodeGen/AVR/hardware-mul.ll
The file was modifiedllvm/test/CodeGen/X86/ctpop-combine.ll
The file was modifiedllvm/test/CodeGen/X86/phaddsub.ll
The file was modifiedllvm/test/CodeGen/X86/imul.ll
The file was modifiedllvm/test/CodeGen/ARM/usat.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shift-ashr-sub128.ll
The file was modifiedllvm/test/CodeGen/X86/recip-fastmath.ll
The file was modifiedllvm/test/CodeGen/X86/vec_umulo.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shift-ashr-128.ll
The file was modifiedllvm/test/CodeGen/X86/vec_minmax_sint.ll
The file was modifiedllvm/test/CodeGen/AVR/ctpop.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-128.ll
The file was modifiedllvm/test/CodeGen/X86/unfold-masked-merge-scalar-variablemask.ll
The file was modifiedllvm/test/CodeGen/X86/vec-strict-fptoint-128.ll
The file was modifiedllvm/test/CodeGen/X86/avx512dq-mask-op.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-128.ll
The file was modifiedllvm/test/CodeGen/X86/powi.ll
The file was modifiedllvm/test/CodeGen/X86/select-constant-xor.ll
The file was modifiedllvm/test/CodeGen/X86/avx512bw-mask-op.ll
The file was modifiedllvm/test/CodeGen/X86/overflow.ll
The file was modifiedllvm/test/CodeGen/X86/haddsub-undef.ll
The file was modifiedllvm/test/CodeGen/X86/vector-ext-logic.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-rot-128.ll
The file was modifiedllvm/test/CodeGen/X86/addsub-constant-folding.ll
The file was modifiedllvm/test/CodeGen/X86/stack-folding-fp-avx512.ll
The file was modifiedllvm/test/CodeGen/X86/combine-smax.ll
The file was modifiedllvm/test/CodeGen/X86/pr42998.ll
The file was modifiedllvm/test/CodeGen/X86/vector-bitreverse.ll
The file was modifiedllvm/test/CodeGen/X86/sqrt-fastmath-tune.ll
The file was modifiedllvm/test/CodeGen/X86/vector-reduce-umax.ll
The file was modifiedllvm/test/CodeGen/X86/funnel-shift.ll
The file was modifiedllvm/test/CodeGen/X86/combine-or.ll
The file was modifiedllvm/test/CodeGen/X86/vec_saddo.ll
The file was modifiedllvm/test/CodeGen/X86/smul_fix_sat.ll
The file was modifiedllvm/test/CodeGen/X86/umin.ll
The file was modifiedllvm/test/CodeGen/X86/udiv_fix_sat.ll
The file was modifiedllvm/test/CodeGen/X86/vector-reduce-fmul-fast.ll
The file was modifiedllvm/test/CodeGen/X86/haddsub.ll
The file was modifiedllvm/test/CodeGen/X86/vector-reduce-fmul.ll
The file was modifiedllvm/test/CodeGen/X86/stack-folding-int-avx512.ll
The file was modifiedllvm/test/CodeGen/X86/align-down.ll
The file was modifiedllvm/lib/CodeGen/TwoAddressInstructionPass.cpp
The file was modifiedllvm/test/CodeGen/X86/vec_smulo.ll
The file was modifiedllvm/test/CodeGen/X86/i128-mul.ll
The file was modifiedllvm/test/CodeGen/X86/combine-mul.ll
The file was modifiedllvm/test/CodeGen/X86/vselect-minmax.ll
The file was modifiedllvm/test/CodeGen/X86/mul-constant-i32.ll
The file was modifiedllvm/test/CodeGen/X86/umul_fix_sat.ll
The file was modifiedllvm/test/CodeGen/X86/select.ll
The file was modifiedllvm/test/CodeGen/X86/shift-logic.ll
The file was modifiedllvm/test/CodeGen/X86/combine-srl.ll
The file was modifiedllvm/test/CodeGen/X86/vector-rotate-128.ll
Commit 1131b1eb3509b47d30a36ea9b42367ab1d7373a2 by haowei
[clang][Fuchsia] Support availability attr on Fuchsia

This patch adds support to __attribute__((availability)) annotation for
Fuchsia platform. This patch also adds '-ffuchsia-api-level' to allow
specify Fuchsia API level from the command line.

Differential Revision: https://reviews.llvm.org/D108592
The file was addedclang/test/Driver/attr-availability-fuchsia.c
The file was modifiedclang/include/clang/Driver/Options.td
The file was modifiedclang/include/clang/Basic/Attr.td
The file was modifiedclang/lib/Basic/Targets/OSTargets.h
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedclang/lib/Sema/SemaDeclAttr.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was addedclang/test/Sema/attr-availability-fuchsia.c
The file was modifiedclang/include/clang/Basic/LangOptions.def
Commit c5fb1a09533ec2ed43a80f39c1592e5ee887ef9e by yhs
Revert "[Clang] Ignore BTFTag attr if used as a type attribute"

This reverts commit b875343873a584965daf507d73ff1fe71eab1953.

Per discussion in https://reviews.llvm.org/D111199, instead to make
existing btf_tag attribute as a type-or-decl attribute, we will
make existing btf_tag attribute as a decl only attribute, and
introduce btf_type_tag as a type only attribute. This will make
it easy for cases like typedef where an attribute may be applied
as either a type attribute or a decl attribute.
The file was modifiedclang/lib/Sema/SemaType.cpp
The file was modifiedclang/include/clang/Basic/AttrDocs.td
The file was modifiedclang/lib/AST/TypePrinter.cpp
The file was modifiedclang/test/Sema/attr-btf_tag.c
The file was modifiedclang/include/clang/Basic/Attr.td
Commit 53ebfa7c5d1bc121267dbf399b6386b2a3300d19 by Amara Emerson
[AArch64][GlobalISel] Fix combiner assertion in matchConstantOp().

We shouldn't call APInt::getSExtValue() on a >64b value.
The file was modifiedllvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-trivial-arith.mir
Commit c9db5f0f3ab9f8bf6ea31238f9c1dbede680646f by powerman1st
[RISCV][test] Add more tests of immediate materialisation

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D111483
The file was modifiedllvm/test/CodeGen/RISCV/imm.ll
Commit f5b524530ab4d9e13279ac23e67f3bac8edb4e76 by aeubanks
Remove checks for old gcc versions for LLVM_ATTRIBUTE_*

According to [1] we only support gcc 5.1+. So these checks for older gcc versions are not supported.

[1] https://llvm.org/docs/GettingStarted.html#host-c-toolchain-both-compiler-and-standard-library

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D111581
The file was modifiedllvm/include/llvm/Support/Compiler.h
Commit 627224c9ef732271ca06716393654bbb8e03da7d by aeubanks
Revert "Remove checks for old gcc versions for LLVM_ATTRIBUTE_*"

This reverts commit f5b524530ab4d9e13279ac23e67f3bac8edb4e76.

Breaks bots, e.g. https://lab.llvm.org/buildbot/#/builders/169/builds/3147
The file was modifiedllvm/include/llvm/Support/Compiler.h
Commit 25b3370ff25f7a21f71e0dc6c4d7624d52cab604 by richard
PR52139: Properly handle more kinds of declaration when checking for
usage of an abstract class type within itself.

We were missing handling for deduction guides (which would assert),
friend declarations, and variable templates. We were mishandling inline
variables and other variables defined inside the class definition.

These diagnostics should be downgraded to warnings, or perhaps removed
entirely, once we implement P0929R2.
The file was modifiedclang/test/SemaCXX/cxx1z-class-template-argument-deduction.cpp
The file was modifiedclang/test/SemaCXX/abstract.cpp
The file was modifiedclang/lib/Sema/SemaDeclCXX.cpp
Commit a185d5132dad19566763f27b1f2dc0caa95daadf by clattner
LLVM_ATTRIBUTE_NODEBUG: GCC 4.0 apparently had ((nodebug)) but removed it.

This should fix a bunch of warnings on the flang-aarch64-latest-gcc builder.
The file was modifiedllvm/include/llvm/Support/Compiler.h
Commit b5e8348bf2ded134e45dab879a13d26f5b9c5815 by haowei
Revert "[clang][Fuchsia] Support availability attr on Fuchsia"

This reverts commit 1131b1eb3509b47d30a36ea9b42367ab1d7373a2, which
breaks several llvm bots.
The file was modifiedclang/include/clang/Driver/Options.td
The file was modifiedclang/lib/Basic/Targets/OSTargets.h
The file was removedclang/test/Driver/attr-availability-fuchsia.c
The file was modifiedclang/include/clang/Basic/Attr.td
The file was modifiedclang/include/clang/Basic/LangOptions.def
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedclang/lib/Sema/SemaDeclAttr.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was removedclang/test/Sema/attr-availability-fuchsia.c
Commit e889099986bc3ff9e27605d3e4433d24048a6d7f by joeloser93
[libc++][docs] Mark LWG3447 as complete

Mark LWG3447 as complete since it was not an issue since the original
implementation of `take_view` from
0f4b41e038537ab2ab6fa2aa048e55c28a03ab68. Currently, `take_view`'s
deduction guide does not constrain the range on the `range` concept.

Reviewed By: ldionne, Mordante, #libc

Differential Revision: https://reviews.llvm.org/D111501
The file was modifiedlibcxx/docs/Status/Cxx2bIssues.csv
Commit 998e067a0a579bd483c2a2d411385e58494ffbca by haowei
Reland "[clang][Fuchsia] Support availability attr on Fuchsia"

This reland commit 1131b1eb3509b47d30a36ea9b42367ab1d7373a2, which
adds support to __attribute__((availability)) annotation for Fuchsia
platform. This patch also adds '-ffuchsia-api-level' to allow specify
Fuchsia API level from the command line.

Differential Revision: https://reviews.llvm.org/D108592
The file was modifiedclang/include/clang/Basic/Attr.td
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was addedclang/test/Sema/attr-availability-fuchsia.c
The file was modifiedclang/include/clang/Basic/LangOptions.def
The file was modifiedclang/lib/Basic/Targets/OSTargets.h
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedclang/lib/Sema/SemaDeclAttr.cpp
The file was modifiedclang/include/clang/Driver/Options.td
The file was addedclang/test/Driver/attr-availability-fuchsia.c
Commit c30a52852ba5e85bdd3b1b70b4add7335fabca9a by Ahmed Bougacha
[Driver] Re-enable aarch64-cpus.c test for arm64-apple.

"darwin" is ambiguous.  When there isn't a better source
of truth (e.g., SDKs), the driver will either interpret it
as "iOS" when cross-compiling to a different architecture,
or "the host" when not.  That's now the case on AS Macs.

Update the test to more explicitly test the OS.
aarch64-mac-cpus.c already tests the mac-specific driver logic.
The file was modifiedclang/test/Driver/aarch64-cpus.c
Commit e50aea58d59c8cfae807a7fee21c4227472c0678 by Lang Hames
[JITLink][ORC] Major JITLinkMemoryManager refactor.

This commit substantially refactors the JITLinkMemoryManager API to: (1) add
asynchronous versions of key operations, (2) give memory manager implementations
full control over link graph address layout, (3) enable more efficient tracking
of allocated memory, and (4) support "allocation actions" and finalize-lifetime
memory.

Together these changes provide a more usable API, and enable more powerful and
efficient memory manager implementations.

To support these changes the JITLinkMemoryManager::Allocation inner class has
been split into two new classes: InFlightAllocation, and FinalizedAllocation.
The allocate method returns an InFlightAllocation that tracks memory (both
working and executor memory) prior to finalization. The finalize method returns
a FinalizedAllocation object, and the InFlightAllocation is discarded. Breaking
Allocation into InFlightAllocation and FinalizedAllocation allows
InFlightAllocation subclassses to be written more naturally, and FinalizedAlloc
to be implemented and used efficiently (see (3) below).

In addition to the memory manager changes this commit also introduces a new
MemProt type to represent memory protections (MemProt replaces use of
sys::Memory::ProtectionFlags in JITLink), and a new MemDeallocPolicy type that
can be used to indicate when a section should be deallocated (see (4) below).

Plugin/pass writers who were using sys::Memory::ProtectionFlags will have to
switch to MemProt -- this should be straightworward. Clients with out-of-tree
memory managers will need to update their implementations. Clients using
in-tree memory managers should mostly be able to ignore it.

Major features:

(1) More asynchrony:

The allocate and deallocate methods are now asynchronous by default, with
synchronous convenience wrappers supplied. The asynchronous versions allow
clients (including JITLink) to request and deallocate memory without blocking.

(2) Improved control over graph address layout:

Instead of a SegmentRequestMap, JITLinkMemoryManager::allocate now takes a
reference to the LinkGraph to be allocated. The memory manager is responsible
for calculating the memory requirements for the graph, and laying out the graph
(setting working and executor memory addresses) within the allocated memory.
This gives memory managers full control over JIT'd memory layout. For clients
that don't need or want this degree of control the new "BasicLayout" utility can
be used to get a segment-based view of the graph, similar to the one provided by
SegmentRequestMap. Once segment addresses are assigned the BasicLayout::apply
method can be used to automatically lay out the graph.

(3) Efficient tracking of allocated memory.

The FinalizedAlloc type is a wrapper for an ExecutorAddr and requires only
64-bits to store in the controller. The meaning of the address held by the
FinalizedAlloc is left up to the memory manager implementation, but the
FinalizedAlloc type enforces a requirement that deallocate be called on any
non-default values prior to destruction. The deallocate method takes a
vector<FinalizedAlloc>, allowing for bulk deallocation of many allocations in a
single call.

Memory manager implementations will typically store the address of some
allocation metadata in the executor in the FinalizedAlloc, as holding this
metadata in the executor is often cheaper and may allow for clean deallocation
even in failure cases where the connection with the controller is lost.

(4) Support for "allocation actions" and finalize-lifetime memory.

Allocation actions are pairs (finalize_act, deallocate_act) of JITTargetAddress
triples (fn, arg_buffer_addr, arg_buffer_size), that can be attached to a
finalize request. At finalization time, after memory protections have been
applied, each of the "finalize_act" elements will be called in order (skipping
any elements whose fn value is zero) as

((char*(*)(const char *, size_t))fn)((const char *)arg_buffer_addr,
                                     (size_t)arg_buffer_size);

At deallocation time the deallocate elements will be run in reverse order (again
skipping any elements where fn is zero).

The returned char * should be null to indicate success, or a non-null
heap-allocated string error message to indicate failure.

These actions allow finalization and deallocation to be extended to include
operations like registering and deregistering eh-frames, TLS sections,
initializer and deinitializers, and language metadata sections. Previously these
operations required separate callWrapper invocations. Compared to callWrapper
invocations, actions require no extra IPC/RPC, reducing costs and eliminating
a potential source of errors.

Finalize lifetime memory can be used to support finalize actions: Sections with
finalize lifetime should be destroyed by memory managers immediately after
finalization actions have been run. Finalize memory can be used to support
finalize actions (e.g. with extra-metadata, or synthesized finalize actions)
without incurring permanent memory overhead.
The file was modifiedllvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderGDB.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/EPCIndirectionUtils.h
The file was modifiedllvm/include/llvm/Support/Memory.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/EPCGenericJITLinkMemoryManager.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/EPCDebugObjectRegistrar.h
The file was modifiedllvm/lib/ExecutionEngine/JITLink/ELFLinkGraphBuilder.h
The file was modifiedllvm/examples/OrcV2Examples/LLJITWithObjectLinkingLayerPlugin/LLJITWithObjectLinkingLayerPlugin.cpp
The file was modifiedllvm/lib/ExecutionEngine/JITLink/JITLinkGeneric.h
The file was addedllvm/lib/ExecutionEngine/JITLink/MemoryFlags.cpp
The file was modifiedllvm/unittests/ExecutionEngine/Orc/EPCGenericJITLinkMemoryManagerTest.cpp
The file was modifiedllvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/EPCIndirectionUtils.cpp
The file was modifiedllvm/lib/ExecutionEngine/JITLink/CMakeLists.txt
The file was modifiedllvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
The file was modifiedllvm/tools/llvm-jitlink/llvm-jitlink.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/DebugObjectManagerPlugin.cpp
The file was modifiedllvm/unittests/ExecutionEngine/Orc/ObjectLinkingLayerTest.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/ExecutorProcessControl.cpp
The file was modifiedllvm/examples/OrcV2Examples/LLJITWithCustomObjectLinkingLayer/LLJITWithCustomObjectLinkingLayer.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/EPCGenericJITLinkMemoryManager.h
The file was modifiedllvm/lib/ExecutionEngine/JITLink/JITLinkGeneric.cpp
The file was modifiedllvm/unittests/ExecutionEngine/JITLink/LinkGraphTests.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/ObjectLinkingLayer.cpp
The file was modifiedllvm/lib/ExecutionEngine/JITLink/MachOLinkGraphBuilder.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/EPCDebugObjectRegistrar.cpp
The file was modifiedllvm/lib/ExecutionEngine/JITLink/JITLinkMemoryManager.cpp
The file was modifiedllvm/lib/ExecutionEngine/JITLink/MachO_x86_64.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/JITLink/JITLinkMemoryManager.h
The file was modifiedllvm/lib/ExecutionEngine/JITLink/MachO_arm64.cpp
The file was addedllvm/include/llvm/ExecutionEngine/JITLink/MemoryFlags.h
The file was modifiedllvm/include/llvm/ExecutionEngine/JITLink/JITLink.h
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/ObjectLinkingLayer.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/ELFNixPlatform.cpp
Commit 6641d29b70993bce6dbd7e0e0f1040753d38842f by Lang Hames
Revert "[JITLink][ORC] Major JITLinkMemoryManager refactor."

This reverts commit e50aea58d59c8cfae807a7fee21c4227472c0678 while I
investigate bot failures.
The file was modifiedllvm/lib/ExecutionEngine/Orc/EPCDebugObjectRegistrar.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/EPCGenericJITLinkMemoryManager.h
The file was modifiedllvm/lib/ExecutionEngine/JITLink/MachO_x86_64.cpp
The file was modifiedllvm/examples/OrcV2Examples/LLJITWithCustomObjectLinkingLayer/LLJITWithCustomObjectLinkingLayer.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/ObjectLinkingLayer.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/ExecutorProcessControl.cpp
The file was modifiedllvm/lib/ExecutionEngine/JITLink/CMakeLists.txt
The file was modifiedllvm/lib/ExecutionEngine/JITLink/JITLinkGeneric.h
The file was modifiedllvm/lib/ExecutionEngine/JITLink/MachO_arm64.cpp
The file was modifiedllvm/unittests/ExecutionEngine/Orc/EPCGenericJITLinkMemoryManagerTest.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
The file was modifiedllvm/lib/ExecutionEngine/JITLink/MachOLinkGraphBuilder.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/ELFNixPlatform.cpp
The file was modifiedllvm/lib/ExecutionEngine/JITLink/JITLinkGeneric.cpp
The file was removedllvm/lib/ExecutionEngine/JITLink/MemoryFlags.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/ObjectLinkingLayer.cpp
The file was modifiedllvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/DebugObjectManagerPlugin.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/EPCIndirectionUtils.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderGDB.cpp
The file was modifiedllvm/lib/ExecutionEngine/JITLink/ELFLinkGraphBuilder.h
The file was modifiedllvm/lib/ExecutionEngine/JITLink/JITLinkMemoryManager.cpp
The file was removedllvm/include/llvm/ExecutionEngine/JITLink/MemoryFlags.h
The file was modifiedllvm/tools/llvm-jitlink/llvm-jitlink.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/EPCGenericJITLinkMemoryManager.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/JITLink/JITLinkMemoryManager.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/EPCIndirectionUtils.cpp
The file was modifiedllvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/JITLink/JITLink.h
The file was modifiedllvm/examples/OrcV2Examples/LLJITWithObjectLinkingLayerPlugin/LLJITWithObjectLinkingLayerPlugin.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/EPCDebugObjectRegistrar.h
The file was modifiedllvm/unittests/ExecutionEngine/JITLink/LinkGraphTests.cpp
The file was modifiedllvm/unittests/ExecutionEngine/Orc/ObjectLinkingLayerTest.cpp
The file was modifiedllvm/include/llvm/Support/Memory.h
Commit 97f0c63783f52389bd8842df205379ceade7a89d by kai.wang
[RISCV] Define _m intrinsics as builtins, instead of macros.

In the original design, we levarage _mt intrinsics to define macros for
_m intrinsics. Such as,

```
__builtin_rvv_vadd_vv_i8m1_mt((vbool8_t)(op0), (vint8m1_t)(op1), (vint8m1_t)(op2), (vint8m1_t)(op3), (size_t)(op4), (size_t)VE_TAIL_AGNOSTIC)
```

However, we could not define generic interface for mask intrinsics any
more due to clang_builtin_alias only accepts clang builtins as its
argument.

In the example,

```
__rvv_overloaded
__attribute__((clang_builtin_alias(__builtin_rvv_vadd_vv_i8m1_mt)))
  vint8m1_t vadd(vbool8_t op0, vint8m1_t op1, vint8m1_t op2, vint8m1_t
  op3, size_t op4, size_t op5);
```

op5 is the tail policy argument. When users want to use vadd generic
interface for masked vector add, they need to specify tail policy in the
previous design. In this patch, we define _m intrinsics as clang
builtins to solve the problem.

Differential Revision: https://reviews.llvm.org/D110684
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmseq.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmin.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmor.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vpopc.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfslide1up.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoand.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoxor.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsuxei.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vzext.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfwsub.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vaadd.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vasub.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfmax.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamomax.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vlseg.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsext.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vnot.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfrsub.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsuxseg.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmfeq.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfwadd.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmsge.c
The file was modifiedclang/utils/TableGen/RISCVVEmitter.cpp
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoadd.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vxor.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics/vadd-policy.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vcompress.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsoxei.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmsle.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vrgather.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vreinterpret.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vluxei.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfadd.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmxor.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vrsub.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfsgnj.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfslide1down.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfsub.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmfge.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vslide1down.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vnclip.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vssseg.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vloxei.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsrl.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vdiv.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsmul.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vse.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsoxseg.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfabs.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmnand.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsse.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vlmul.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfrsqrt7.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmslt.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfwmul.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vlse.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfrdiv.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsseg.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfwcvt.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vle.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmand.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vluxseg.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsra.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfsqrt.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfcvt.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmnor.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamomin.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmfne.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoswap.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vwadd.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmmv.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfirst.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vwcvt.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmsbc.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vor.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmul.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vssra.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vslide1up.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vssub.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmsgt.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfrec7.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vnsra.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vwsub.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfmul.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmfgt.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vset.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vneg.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vssrl.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsub.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfdiv.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmxnor.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmsif.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfneg.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmsne.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vand.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoor.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmnot.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmsof.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vadd.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmsbf.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfncvt.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmflt.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsll.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vncvt.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vwmul.c
The file was modifiedclang/include/clang/Basic/riscv_vector.td
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vloxseg.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vlsseg.c
The file was modifiedclang/include/clang/Basic/IdentifierTable.h
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmax.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vnsrl.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vget.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vrem.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfclass.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfmin.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsadd.c
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmfle.c
The file was modifiedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfmv.c
Commit d57a87ea89c750b6d1cf359b619eea4eda806e1a by freddy.ye
[X86][ISel] Lowering llvm.thread.pointer

Reviewed By: pengfei

Differential Revision: https://reviews.llvm.org/D110681
The file was addedllvm/test/CodeGen/X86/thread_pointer-error.ll
The file was addedllvm/test/CodeGen/X86/thread_pointer.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit b7c1ccd4229c0e4ea9da60a4853ac8759ba804c0 by Lang Hames
[llvm-jitlink] Fix a broken warning.

This warning should only be issued if -slab-page-size has not been used.
The file was modifiedllvm/tools/llvm-jitlink/llvm-jitlink.cpp
Commit 325d000765eaaf547e775d4018ec8c92cb65a768 by yhs
[NFC][Attr] rename attribute btf_tag to btf_decl_tag

Per discussion in https://reviews.llvm.org/D111199,
the existing btf_tag attribute will be renamed to
btf_decl_tag. This patch mostly updated the Bitcode and
DebugInfo test cases with new attribute name.

Differential Revision: https://reviews.llvm.org/D111591
The file was modifiedllvm/test/Bitcode/attr-btf_tag-field.ll
The file was modifiedllvm/test/Bitcode/attr-btf_tag-disubprogram.ll
The file was modifiedllvm/test/Bitcode/attr-btf_tag-dicomposite.ll
The file was modifiedllvm/test/Bitcode/attr-btf_tag-parameter.ll
The file was modifiedllvm/test/Bitcode/attr-btf_tag-diglobalvariable.ll
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
The file was modifiedllvm/test/DebugInfo/attr-btf_tag.ll
Commit 52cb3af08c2ac917557d67bbbf8a91cb80bed6fc by mahesha.comp
[AMDGPU] Remove dead frame indices after sgpr spill.

All those frame indices which are dead after sgpr spill should be removed from
the function frame. Othewise, there is a side effect such as re-mapping of free
frame index ids by the later pass(es) like "stack slot coloring" which in turn
could mess-up with the book keeping of "frame index to VGPR lane".

Reviewed By: cdevadas

Differential Revision: https://reviews.llvm.org/D111150
The file was modifiedllvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
The file was addedllvm/test/CodeGen/AMDGPU/sgpr-spill-incorrect-fi-bookkeeping-bug.ll
The file was modifiedllvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
Commit f7de6962c85b037ba030e4bd58ea1216c9031c17 by mahesha.comp
[CFE][Codegen][In-progress] Remove CodeGenFunction::InitTempAlloca()

Sequel patch to https://reviews.llvm.org/D111293.

Remove call to CodeGenFunction::InitTempAlloca() from OpenMP related
codegen part.

Also remove the metadata `!llvm.access.group` from the updated lit
tests.

Reviewed By: rjmccall

Differential Revision: https://reviews.llvm.org/D111316
The file was modifiedclang/test/OpenMP/nvptx_teams_reduction_codegen.cpp
The file was modifiedclang/test/OpenMP/distribute_parallel_for_simd_if_codegen.cpp
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntime.cpp
The file was modifiedclang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_simd_codegen.cpp
The file was modifiedclang/test/OpenMP/parallel_master_taskloop_simd_codegen.cpp
The file was modifiedclang/test/OpenMP/task_codegen.c
The file was modifiedclang/test/OpenMP/target_codegen_global_capture.cpp
The file was modifiedclang/test/OpenMP/teams_distribute_parallel_for_if_codegen.cpp
The file was modifiedclang/test/OpenMP/nvptx_distribute_parallel_generic_mode_codegen.cpp
The file was modifiedclang/test/OpenMP/nvptx_data_sharing.cpp
The file was modifiedclang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_generic_mode_codegen.cpp
The file was modifiedclang/test/OpenMP/parallel_if_codegen.cpp
The file was modifiedclang/test/OpenMP/nvptx_allocate_codegen.cpp
The file was modifiedclang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_codegen.cpp
The file was modifiedclang/test/OpenMP/target_teams_distribute_parallel_for_if_codegen.cpp
The file was modifiedclang/test/OpenMP/nvptx_target_teams_codegen.cpp
The file was modifiedclang/test/OpenMP/nvptx_target_teams_distribute_codegen.cpp
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
The file was modifiedclang/test/OpenMP/nvptx_target_parallel_reduction_codegen_tbaa_PR46146.cpp
The file was modifiedclang/test/OpenMP/parallel_master_taskloop_codegen.cpp
The file was modifiedclang/test/OpenMP/target_parallel_if_codegen.cpp
The file was modifiedclang/test/OpenMP/vla_crash.c
The file was modifiedclang/test/OpenMP/nvptx_target_codegen.cpp
The file was modifiedclang/test/OpenMP/nvptx_parallel_codegen.cpp
The file was modifiedclang/test/OpenMP/target_parallel_for_simd_codegen.cpp
The file was modifiedclang/test/OpenMP/parallel_if_codegen_PR51349.cpp
The file was modifiedclang/test/OpenMP/target_teams_distribute_parallel_for_simd_if_codegen.cpp
The file was modifiedclang/test/OpenMP/nvptx_nested_parallel_codegen.cpp
The file was modifiedclang/test/OpenMP/nvptx_teams_codegen.cpp
The file was modifiedclang/test/OpenMP/nvptx_parallel_for_codegen.cpp
The file was modifiedclang/test/OpenMP/teams_distribute_parallel_for_simd_if_codegen.cpp
The file was modifiedclang/test/OpenMP/distribute_parallel_for_if_codegen.cpp
The file was modifiedclang/test/OpenMP/nvptx_multi_target_parallel_codegen.cpp
Commit 1321e47298c722de9d2afe0e28d7122fa20e61bf by yhs
BPF: rename BTF_KIND_TAG to BTF_KIND_DECL_TAG

Per discussion in https://reviews.llvm.org/D111199,
the existing btf_tag attribute will be renamed to
btf_decl_tag. This patch updated BTF backend to
use btf_decl_tag attribute name and also
renamed BTF_KIND_TAG to BTF_KIND_DECL_TAG.

Differential Revision: https://reviews.llvm.org/D111592
The file was modifiedllvm/lib/Target/BPF/BTFDebug.h
The file was modifiedllvm/test/CodeGen/BPF/BTF/tag-1.ll
The file was modifiedllvm/lib/Target/BPF/BTF.def
The file was modifiedllvm/lib/Target/BPF/BTFDebug.cpp
The file was modifiedllvm/test/CodeGen/BPF/BTF/tag-2.ll
The file was modifiedllvm/lib/Target/BPF/BTF.h
Commit db9c2d775130a110ada89decff7002c64cdd3364 by mahesha.comp
[CFE][Codegen] Remove CodeGenFunction::InitTempAlloca()

Sequel patch to https://reviews.llvm.org/D111316

Finally, remove the defintion of CodeGenFunction::InitTempAlloca().

Reviewed By: rjmccall

Differential Revision: https://reviews.llvm.org/D111324
The file was modifiedclang/lib/CodeGen/CGExpr.cpp
The file was modifiedclang/lib/CodeGen/CodeGenFunction.h
Commit 962a2479b57f5e0454b472f9c233cda3f89415b1 by Lang Hames
Re-apply e50aea58d59, "Major JITLinkMemoryManager refactor". with fixes.

Adds explicit narrowing casts to JITLinkMemoryManager.cpp.

Honors -slab-address option in llvm-jitlink.cpp, which was accidentally
dropped in the refactor.

This effectively reverts commit 6641d29b70993bce6dbd7e0e0f1040753d38842f.
The file was addedllvm/include/llvm/ExecutionEngine/JITLink/MemoryFlags.h
The file was modifiedllvm/include/llvm/Support/Memory.h
The file was modifiedllvm/lib/ExecutionEngine/JITLink/MachO_x86_64.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/ExecutorProcessControl.cpp
The file was modifiedllvm/lib/ExecutionEngine/JITLink/JITLinkMemoryManager.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/JITLink/JITLinkMemoryManager.h
The file was modifiedllvm/examples/OrcV2Examples/LLJITWithObjectLinkingLayerPlugin/LLJITWithObjectLinkingLayerPlugin.cpp
The file was modifiedllvm/lib/ExecutionEngine/JITLink/MachOLinkGraphBuilder.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/EPCDebugObjectRegistrar.cpp
The file was addedllvm/lib/ExecutionEngine/JITLink/MemoryFlags.cpp
The file was modifiedllvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/EPCGenericJITLinkMemoryManager.h
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/ObjectLinkingLayer.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/EPCGenericJITLinkMemoryManager.cpp
The file was modifiedllvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp
The file was modifiedllvm/lib/ExecutionEngine/JITLink/MachO_arm64.cpp
The file was modifiedllvm/unittests/ExecutionEngine/JITLink/LinkGraphTests.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/JITLink/JITLink.h
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/EPCDebugObjectRegistrar.h
The file was modifiedllvm/lib/ExecutionEngine/JITLink/CMakeLists.txt
The file was modifiedllvm/lib/ExecutionEngine/JITLink/JITLinkGeneric.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/ObjectLinkingLayer.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/ELFNixPlatform.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/EPCIndirectionUtils.cpp
The file was modifiedllvm/tools/llvm-jitlink/llvm-jitlink.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/EPCIndirectionUtils.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderGDB.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/DebugObjectManagerPlugin.cpp
The file was modifiedllvm/lib/ExecutionEngine/JITLink/JITLinkGeneric.cpp
The file was modifiedllvm/unittests/ExecutionEngine/Orc/EPCGenericJITLinkMemoryManagerTest.cpp
The file was modifiedllvm/lib/ExecutionEngine/JITLink/ELFLinkGraphBuilder.h
The file was modifiedllvm/examples/OrcV2Examples/LLJITWithCustomObjectLinkingLayer/LLJITWithCustomObjectLinkingLayer.cpp
The file was modifiedllvm/unittests/ExecutionEngine/Orc/ObjectLinkingLayerTest.cpp
Commit 9ca50641531789b1d8a3a20b227799db20ebc5d7 by Lang Hames
[ORC] Fix a typo in a variable name.
The file was modifiedllvm/lib/ExecutionEngine/JITLink/JITLinkMemoryManager.cpp
Commit db832d46188e3b1e25af3ba3b93eb659e62100bd by llvmgnsyncbot
[gn build] Port 962a2479b57f
The file was modifiedllvm/utils/gn/secondary/llvm/lib/ExecutionEngine/JITLink/BUILD.gn
Commit 3a52a639b18e91831cec1b1983d08e621d22d10a by Lang Hames
[ORC] Add more explicit narrowing casts.

This should fix the buildbot failure at
https://lab.llvm.org/buildbot/#/builders/187/builds/2140
The file was modifiedllvm/lib/ExecutionEngine/Orc/EPCIndirectionUtils.cpp

Summary

  1. clang-ve-ninja: build and install compiler-rt (details)
  2. clang-ve-ninja: check compiler-rt (details)
  3. mlir-s390x-linux: collapse requests (details)
Commit 74ca6968913aa5e26828e51e0e6a7e6d7db25386 by simon.moll
clang-ve-ninja: build and install compiler-rt
The file was modifiedzorg/buildbot/builders/annotated/ve-linux-steps.make
Commit f3145e433344ed18f056a2a68d82b6e70813d188 by simon.moll
clang-ve-ninja: check compiler-rt
The file was modifiedzorg/buildbot/builders/annotated/ve-linux-steps.make
Commit dfd41aa8267c78dd71b8dd01187bbb3c87ae25e3 by ulrich.weigand
mlir-s390x-linux: collapse requests
The file was modifiedbuildbot/osuosl/master/config/builders.py