Commit
a6f1d046655c6850a355bb4557cb0dd463c9de0a
by davelee.com[lldb][docs] Update references to SVN
|
 | lldb/docs/use/symbolication.rst |
| lldb/docs/use/variable.rst |
Commit
2bcff220bf1e372e91491911fe0bb76c4c4bbef8
by davelee.com[lldb] Set result error state in 'frame variable'
Ensure that errors in `frame variable` are reflected in result object.
The statistics for `frame variable` show invocations as being successful, even
when executing one of the error paths.
This change replaces `result.GetErrorStream()` with `result.AppendError()`,
which also sets the status to `eReturnStatusFailed`.
Differential Revision: https://reviews.llvm.org/D116788
(cherry picked from commit 2c7d10c41278181e3e45c68f28b501cd95193a8a)
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| lldb/test/API/lang/cpp/frame-var-anon-unions/TestFrameVariableAnonymousUnions.py |
| lldb/source/Commands/CommandObjectFrame.cpp |
Commit
5d3bd7f36092c88265dc698a970078184425f67c
by i[ELF] Move gotIndex/pltIndex/globalDynIndex to SymbolAux
to decrease sizeof(SymbolUnion) by 8 on ELF64 platforms.
Symbols needing such information are typically 1% or fewer (5134 out of 560520
when linking clang, 19898 out of 5550705 when linking chrome). Storing them
elsewhere can decrease memory usage and symbol initialization time.
There is a ~0.8% saving on max RSS when linking a large program.
Future direction:
* Move some of dynsymIndex/verdefIndex/versionId to SymbolAux
* Support mixed TLSDESC and TLS GD without increasing sizeof(SymbolUnion)
Reviewed By: peter.smith
Differential Revision: https://reviews.llvm.org/D116281
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| lld/ELF/Arch/X86.cpp |
| lld/ELF/Arch/PPC64.cpp |
| lld/ELF/Symbols.h |
| lld/ELF/Symbols.cpp |
| lld/ELF/Arch/PPC.cpp |
| lld/ELF/Relocations.cpp |
| lld/ELF/SyntheticSections.cpp |
| lld/ELF/Arch/X86_64.cpp |
| lld/ELF/Driver.cpp |
Commit
08f70adedb775ce6d41a1f8ad75c4bac225efb5b
by davelee.comRevert "[lldb] Set result error state in 'frame variable'"
This reverts commit 2bcff220bf1e372e91491911fe0bb76c4c4bbef8.
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| lldb/source/Commands/CommandObjectFrame.cpp |
| lldb/test/API/lang/cpp/frame-var-anon-unions/TestFrameVariableAnonymousUnions.py |
Commit
6a38cbfb53d4480d66b8ac885ad098cb92c8e492
by joker.ephApply clang-tidy fixes for modernize-use-equals-default in IRCore.cpp (NFC)
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| mlir/lib/Bindings/Python/IRCore.cpp |
Commit
0c9d59e56ad7018fc7f79f4f3de648f0bf227700
by joker.ephApply clang-tidy fixes for performance-for-range-copy in ModuleBufferization.cpp (NFC)
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| mlir/lib/Dialect/Linalg/ComprehensiveBufferize/ModuleBufferization.cpp |
Commit
ba19fa5779f309db9f39629e35c1674589e75419
by joker.ephApply clang-tidy fixes for performance-for-range-copy in ElementwiseOpFusion.cpp (NFC)
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| mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp |
Commit
60d13b85ca13c7766eb7d65614b15996f19ed710
by joker.ephApply clang-tidy fixes for performance-move-const-arg in ReductionNode.cpp (NFC)
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| mlir/lib/Reducer/ReductionNode.cpp |
Commit
22430ede7e497d67c87fe900cc685690c5c3ec0c
by ashaposhnikov[CodeGen] Rename emitCalleeSavedFrameMoves
This diff renames emitCalleeSavedFrameMoves to avoid conflicts with
non-virtual methods of derived classes having the same name but different semantics.
E.g. the class AArch64FrameLowering used to have (non-virtual) "emitCalleeSavedFrameMoves"
but it started to override TargetFrameLowering::emitCalleeSavedFrameMoves after
https://github.com/llvm/llvm-project/commit/c3e6555616 though its usage and semantics didn't change.
P.S. for x86 there was no conflict because the signature of
non-virtual X86FrameLowering::emitCalleeSavedFrameMoves is different
Test plan: make check-all
Differential revision: https://reviews.llvm.org/D114140
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| llvm/lib/CodeGen/CFIInstrInserter.cpp |
| llvm/include/llvm/CodeGen/TargetFrameLowering.h |
| llvm/lib/Target/X86/X86FrameLowering.cpp |
| llvm/lib/Target/X86/X86FrameLowering.h |
| llvm/lib/Target/AArch64/AArch64FrameLowering.h |
Commit
a500f7f48fdb64def09cb3b7487759b0972f2347
by craig.topper[SelectionDAG] Add FP_TO_UINT_SAT/FP_TO_SINT_SAT to computeKnownBits/computeNumSignBits.
These nodes should saturate to their saturating VT. We can use this
information to know the bits past the VT are all zeros or all sign bits.
I think we might only have test coverage for the unsigned case. I'll
verify and add tests.
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D116870
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| llvm/test/CodeGen/RISCV/float-convert.ll |
| llvm/test/CodeGen/RISCV/half-convert.ll |
| llvm/test/CodeGen/AArch64/fcvt_combine.ll |
| llvm/test/CodeGen/Thumb2/mve-vcvt-float-to-fixed.ll |
| llvm/test/CodeGen/Thumb2/mve-fptoui-sat-vector.ll |
| llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp |
| llvm/test/CodeGen/RISCV/double-convert.ll |
| llvm/test/CodeGen/AArch64/fptoui-sat-scalar.ll |
Commit
2c46ca96e2421ad460de23476f92061e76ca296b
by czhengsz[PowerPC] fast isel can lower intrinsics call on AIX.
Reviewed By: qiucf
Differential Revision: https://reviews.llvm.org/D114778
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| llvm/lib/CodeGen/SelectionDAG/FastISel.cpp |
| llvm/lib/Target/PowerPC/PPCFastISel.cpp |
 | llvm/test/CodeGen/PowerPC/debug-label-fast-isel.ll |
Commit
817936408badc5d29cbd99cda90ac7896c4bdc00
by esme.yi[yaml2obj][XCOFF] parsing auxiliary symbols.
Summary: The patch adds support for yaml2obj parsing auxiliary
symbols for XCOFF. Since the test cases of this patch are
interdependent with D113825 ([llvm-readobj][XCOFF] dump
auxiliary symbols), test cases of this patch will be committed
after D113825 is committed.
Reviewed By: jhenderson, DiggerLin
Differential Revision: https://reviews.llvm.org/D113552
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| llvm/lib/ObjectYAML/XCOFFEmitter.cpp |
| llvm/tools/obj2yaml/xcoff2yaml.cpp |
| llvm/include/llvm/ObjectYAML/XCOFFYAML.h |
| llvm/lib/ObjectYAML/XCOFFYAML.cpp |
Commit
2dd52f840b9b9b66e06c32f706d6b31134435efe
by craig.topper[RISCV] Fold (srl (and X, 0xffff), C)->(srli (slli X, (XLen-16), (XLen-16) + C) even with Zbb/Zbp.
We can use zext.h with Zbb, but srli/slli may offer more opportunities
for compression.
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| llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp |
| llvm/test/CodeGen/RISCV/rv32zbb-zbp.ll |
| llvm/test/CodeGen/RISCV/div-by-constant.ll |
| llvm/test/CodeGen/RISCV/rv64zbb-zbp.ll |
Commit
9b70ddaff6e1d1ffc538ac74aa43b4fd6f73bb02
by jim[Builtins] Add missing the macro 'y' description in comments
New type str 'y' added from D76077. But missed its description in
comments.
Reviewed By: stuij
Differential Revision: https://reviews.llvm.org/D116509
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| clang/include/clang/Basic/Builtins.def |
Commit
6fab2742758197949d7bc624f453e544129709a3
by ge.jinControl-flow Enforcement Technology (CET), published by Intel, introduces
indirect branch tracking(IBT) feature aiming to ensure the target address
of an indirect jump/call is not tampered.
When IBT is enabled, each function or target of any indirect jump/call will start
with an 'endbr32/64' instruction otherwise the program will crash during execution.
To build an application with CET enabled. we need to ensure:
1. build the source code with "-fcf-protection=full"
2. all the libraries linked with .o files must be CET enabled too
This patch aims to enable CET for compiler-rt builtins library, we add an option
"COMPILER_RT_ENABLE_CET" whose default value is OFF to enable CET for compiler-rt
in building time and when this option is "ON", "-fcf-protection=full" is added to
BUILTINS_CFLAG and the "endbr32/64" will be placed in the beginning of each assembly
function. We also enabled CET for crtbegin, crtend object files in this patch.
Reviewed by: MaskRay, compnerd, manojgupta, efriedma
Differential Revision: https://reviews.llvm.org/D109811
Signed-off-by: jinge90 <ge.jin@intel.com>
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| compiler-rt/lib/builtins/assembly.h |
| compiler-rt/test/crt/CMakeLists.txt |
| compiler-rt/CMakeLists.txt |
| compiler-rt/test/builtins/CMakeLists.txt |
| compiler-rt/lib/builtins/CMakeLists.txt |
| compiler-rt/cmake/config-ix.cmake |
| compiler-rt/lib/crt/CMakeLists.txt |
Commit
6b8362eb8dc87be8977e3c1d3a7b2ff35a15898c
by jacquesguan[RISCV] Disable EEW=64 for index values when XLEN=32.
Disable EEW=64 for vector index load/store when XLEN=32.
Differential Revision: https://reviews.llvm.org/D106518
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| llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp |
| llvm/test/CodeGen/RISCV/rvv/vpscatter-sdnode.ll |
| llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpscatter.ll |
| llvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll |
| clang/utils/TableGen/RISCVVEmitter.cpp |
| llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll |
| llvm/lib/Target/RISCV/RISCVISelLowering.cpp |
| llvm/test/CodeGen/RISCV/rvv/vluxei-rv32.ll |
| llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpgather.ll |
| llvm/test/CodeGen/RISCV/rvv/vsoxei-rv32.ll |
| llvm/test/MC/RISCV/rvv/invalid-eew.s |
| llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll |
| llvm/test/CodeGen/RISCV/rvv/vloxei-rv32.ll |
| clang/include/clang/Basic/riscv_vector.td |
| llvm/test/CodeGen/RISCV/rvv/mgather-sdnode.ll |
| llvm/lib/Target/RISCV/RISCVInstrInfoV.td |
| llvm/test/CodeGen/RISCV/rvv/vpgather-sdnode.ll |
| llvm/test/CodeGen/RISCV/rvv/vsuxei-rv32.ll |
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