Changes

Update LLVM_LIT_ARGS for LLDB Arm Linux bots

[X86] Add more add/sub carry tests
Preparation for: https://reviews.llvm.org/D70079
https://reviews.llvm.org/D70077

DWARFDebugLoclists: add location list "interpretation" logic
Summary: This patch extracts the logic for computing the "absolute"
locations, which was partially present in the debug_loclists dumper,
completes it, and moves it into a separate function. This makes it
possible to later reuse the same logic for uses other than dumping.
The dumper is changed to reuse the location list interpreter, and its 
format is changed somewhat. In "verbose" mode it prints the "raw" value 
of a location list, the interpreted location (if available) and the 
expression itself. In non-verbose mode it prints only one of the 
location forms: it prefers the interpreted form, but falls back to the
"raw" format if interpretation is not possible (for instance, because we 
were not given a base address, or the resolution of indirect addresses 
failed).
This patch also undos some of the changes made in D69672, namely the 
part about making all functions static. The main reason for this is that 
I learned that the original approach (dumping only fully resolved 
locations) meant that it was impossible to rewrite one of the existing 
tests. To make that possible (and make the "inline location" dump work 
in more cases), I now reuse the same dumping mechanism as is used for 
section-based dumping. As this required having more objects know about 
the various location lists classes, it seemed like a good idea to create 
an interface abstracting the difference between them.
Therefore, I now create a DWARFLocationTable class, which will serve as 
a base class for the location list classes. DWARFDebugLoclists is made 
to inherit from that. DWARFDebugLoc will follow.
Another positive effect of this change is that section-based dumping 
code will not need to use templates (as originally) envisioned, and that 
the argument lists of the dumping functions become shorter.
Reviewers: dblaikie, probinson, JDevlieghere, aprantl, SouraVX
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70081

[lldb][NFC] Simplify a return in
ThreadPlanStepInRange::DefaultShouldStopHereCallback
We know should_stop_here is false here, so we might as well return false
directly.

[LoopInterchange] Only skip PHIs with incoming values from the inner
loop.
Currently we have limited support for outer loops with multiple basic 
blocks after the inner loop exit. But the current checks for creating 
PHIs for loop exit values only assumes the header and latches of the 
outer loop. It is better to just skip incoming values defined in the 
original inner loops. Those are handled earlier.
Reviewers: efriedma, mcrosier
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D70059

[lldb][test] Macros in expressions require DWARF 5

[X86] Add PR39464 addcarry/subborrow test cases
Additional coverage for D70079

FileCheckPattern::FindRegexVarEnd - make helper function static. NFC
Fixes cppcheck warning.

[X86] Cleanup prefixes + regenerate for fp-intrinsics-fma.ll

[InstCombine] Skip scalable vectors in combineLoadToOperationType
Don't try to canonicalize loads to scalable vector types to loads of
integers.
This removes one assertion when trying to use a TypeSize as a parameter 
to DataLayout::isLegalInteger. It does not handle the second part of the 
function (which looks at bitcasts).
This patch also contains a NFC fix for Load Analysis, where a variable 
initialization that would cause the same assertion is moved closer to 
its use. This allows us to run the new test for InstCombine without 
having to teach LocationSize to play nicely with scalable vectors.
Differential Revision: https://reviews.llvm.org/D70075

[AArch64ExpandPseudos] Preserve renamable state when expanding MOVi64 &
co.
If the MOVi operand was renamable, the operands of the expanded 
instructions are also renamable.
Reviewers: thegameg, samparker, zatrazz
Reviewed By: thegameg
Differential Revision: https://reviews.llvm.org/D70061

[lldb] [Process/NetBSD] Use PT_STOP to stop the process [NFCI]
Differential Revision: https://reviews.llvm.org/D70060

AArch64: add arm64_32 support to Clang.

Mark llvm::ConstantExpr::getAsInstruction as const
Summary: getAsInstruction is the only non-const member method. It is
impossible to enforce const-correctness because of it.
Reviewers: jmolloy, majnemer
Reviewed By: jmolloy
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70113

[lldb] Fix some warnings in the python plugin

[lldb] Fix more -Wdeprecated-copy warnings
This warning triggers when a class defines a copy constructor but not a 
copy-assignment operator (which then gets auto-generated by the 
compiler). Fix the warning by deleting the other operator too, as the 
default implementation works just fine.

Revert "Fix lookup of symbols at the same address with no size vs. size"
This reverts commit 3f594ed1686b44138bee245c708773e526643aaf.
This change has cause LLDB expression evaluation to fail on Arm Linux.
Differential Revision: https://reviews.llvm.org/D63540

[Examples] Add IRTransformations directory to examples.
This patch adds a new IRTransformations directory to llvm/examples/.
This is intended to serve as a new home for example
transformations/analysis code used by various tutorials.
If LLVM_BUILD_EXAMPLES is enabled, the ExamplesIRTransforms library is 
linked into the opt binary and the example passes become available.
To start off with, it contains the CFG simplifications used in the IR 
part of the 'Getting Started With LLVM: Basics' tutorial at the US LLVM 
Developers Meeting 2019.
Reviewers: paquette, jfb, meikeb, lhames, kbarton
Reviewed By: paquette
Differential Revision: https://reviews.llvm.org/D69416

[PowerPC][NFC]Fix typo in desc for enable-ppc-prefetching

[DBG][OPT] Attempt to salvage or undef debug info when removing
trivially deletable instructions in the Reassociate Expression pass.
Reviewed By: aprantl, vsk
Differential revision: https://reviews.llvm.org/D69943

[PowerPC] Remove allow-deprecated-dag-overlap and fix broken tests
Summary: This is found during review of https://reviews.llvm.org/D67088.
CHECK-DAG is non-overlapping after https://reviews.llvm.org/D47106.
-allow-deprecated-dag-overlap was introduced to temporary accept old 
behavior.
But it actually hide some broken tests, eg:
`test/CodeGen/PowerPC/swaps-le-1.ll` The codegen has changed, but the
CHECK-DAG still PASS due to allowing `overlap`.
This patch remove the deprecated options, and fix the broken tests.
Reviewers: #powerpc, hfinkel, nemanjai, steven.zhang, shchenz
Reviewed By: shchenz
Subscribers: shchenz, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69733

[Hexagon] Require PS_aligna whenever variable-sized objects are present

[Hexagon] Handle stack realignment in hexagon-vextract

[Hexagon] Convert stack object offsets to int64, NFC
This will print [SP-56] instead of [SP+4294967240].

[Hexagon] Fix vector spill expansion to use proper alignment
1. Add pseudos PS_vloadrv_ai and PS_vstorerv_ai: those are now used
  for single vector registers in loadRegFromStackSlot (and store...). 2.
Remove pseudos PS_vloadrwu_ai and PS_vstorerwu_ai. The alignment is
  now checked when expanding spill pseudos (both in frame lowering
  and in expand-post-ra-pseudos), and a proper instruction is generated. 
3. Update MachineMemOperands when dealigning vector spill slots. 4.
Return vector predicate registers in getCallerSavedRegs.

Update LLVM_LIT_ARGS for LLDB Arm Linux bots