Changes

Summary

  1. [GVN] add GVN parameters parsing to new pass manager (details)
  2. [Hexagon] Add ELF flags for Hexagon v66 to ELFYAML.cpp (details)
  3. [clangd] Add workaround for GCC5 host compilers. NFC. (details)
  4. [NFC] Remove unnecessary link components. (details)
  5. scudo: Add initial memory tagging support. (details)
  6. Factor out renaming logic from readability-identifier-naming (details)
  7. [gn build] Port d5c6b8407c1 (details)
  8. [OPENMP]Avoid string concat where possible and use standard name (details)
  9. [IR] fix crash in Constant::isElementWiseEqual() with FP types (details)
  10. [WebAssembly] Track frame registers through VReg and local allocation (details)
  11. Add BuiltinsHexagonDep.def to clang module map (details)
  12. [llvm-nm] Use `StringRef` over `const std::string &` params (details)
  13. AMDGPU: Move permlane discard vdst_in optimization (details)
  14. AMDGPU: Do permlane16 vdst_in discard optimization in InstCombine (details)
Commit 1f2dad1fd575ff24cfb2c5323c10e1014b516df0 by fedor.sergeev
[GVN] add GVN parameters parsing to new pass manager
Introduce parsing, add a few instances of parameter use into GVN-PRE
tests.
Reviewers: skatkov, asbirlea Reviewed By: skatkov
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72752
The file was modifiedllvm/test/Transforms/GVN/PRE/pre-load.ll
The file was modifiedllvm/test/Transforms/GVN/PRE/pre-gep-load.ll
The file was modifiedllvm/test/Transforms/GVN/PRE/load-pre-align.ll
The file was modifiedllvm/test/Transforms/GVN/PRE/pre-basic-add.ll
The file was modifiedllvm/lib/Passes/PassBuilder.cpp
The file was modifiedllvm/test/Transforms/GVN/PRE/local-pre.ll
The file was modifiedllvm/test/Transforms/GVN/PRE/pre-single-pred.ll
The file was modifiedllvm/lib/Passes/PassRegistry.def
Commit ecf0766cf14191fb44386a097e78325c7f555d81 by kparzysz
[Hexagon] Add ELF flags for Hexagon v66 to ELFYAML.cpp
The file was modifiedllvm/lib/ObjectYAML/ELFYAML.cpp
Commit 40514a7d7a3b745ba43c2d014e54a0d78d65d957 by michael.hliao
[clangd] Add workaround for GCC5 host compilers. NFC.
The file was modifiedclang-tools-extra/clangd/Hover.cpp
Commit fc4e43ad618b6a00840f0fd0c84d32922dfd3cd2 by wanyu9511
[NFC] Remove unnecessary link components.
Remove unused link components in unittest according to post commit
comments.
The file was modifiedllvm/unittests/Target/PowerPC/CMakeLists.txt
Commit c299d1981deaf822dfaa06c791f3158bd6801e20 by peter
scudo: Add initial memory tagging support.
When the hardware and operating system support the ARM Memory Tagging
Extension, tag primary allocation granules with a random tag. The
granules either side of the allocation are tagged with tag 0, which is
normally excluded from the set of tags that may be selected randomly.
Memory is also retagged with a random tag when it is freed, and we
opportunistically reuse the new tag when the block is reused to reduce
overhead. This causes linear buffer overflows to be caught
deterministically and non-linear buffer overflows and use-after-free to
be caught probabilistically.
This feature is currently only enabled for the Android allocator and
depends on an experimental Linux kernel branch available here:
https://github.com/pcc/linux/tree/android-experimental-mte
All code that depends on the kernel branch is hidden behind a macro,
ANDROID_EXPERIMENTAL_MTE. This is the same macro that is used by the
Android platform and may only be defined in non-production
configurations. When the userspace interface is finalized the code will
be updated to use the stable interface and all #ifdef
ANDROID_EXPERIMENTAL_MTE will be removed.
Differential Revision: https://reviews.llvm.org/D70762
The file was modifiedcompiler-rt/lib/scudo/standalone/linux.cpp
The file was modifiedcompiler-rt/lib/scudo/standalone/tests/primary_test.cpp
The file was modifiedcompiler-rt/lib/scudo/standalone/wrappers_c.inc
The file was modifiedcompiler-rt/lib/scudo/standalone/allocator_config.h
The file was modifiedcompiler-rt/lib/scudo/standalone/combined.h
The file was modifiedcompiler-rt/lib/scudo/standalone/primary32.h
The file was modifiedcompiler-rt/lib/scudo/standalone/primary64.h
The file was addedcompiler-rt/lib/scudo/standalone/memtag.h
The file was modifiedcompiler-rt/lib/scudo/standalone/tests/combined_test.cpp
The file was modifiedcompiler-rt/lib/scudo/standalone/common.h
Commit d5c6b8407c12d39a78f42a216369407cb2d7b511 by aaron
Factor out renaming logic from readability-identifier-naming
Before this patch, readability-identifier-naming contained a significant
amount of logic for (a) checking the style of identifiers, followed by
(b) renaming/ applying fix-its. This patch factors out (b) into a
separate base class so that it can be reused by other checks that want
to do renaming. This also cleans up readability-identifier-naming
significantly, since now it only needs to be concerned with the
interesting details of (a).
The file was addedclang-tools-extra/clang-tidy/utils/RenamerClangTidyCheck.h
The file was modifiedclang-tools-extra/clang-tidy/utils/CMakeLists.txt
The file was modifiedclang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.h
The file was addedclang-tools-extra/clang-tidy/utils/RenamerClangTidyCheck.cpp
Commit cbc63fbdc43b01387b9a604d953cd7627a0a15e2 by llvmgnsyncbot
[gn build] Port d5c6b8407c1
The file was modifiedllvm/utils/gn/secondary/clang-tools-extra/clang-tidy/utils/BUILD.gn
Commit 8b321929483ee3c4070a10c457733c1bddd10b51 by a.bataev
[OPENMP]Avoid string concat where possible and use standard name
generation function, NFC.
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntime.cpp
Commit 52b44902d059e68c6b5553c1d043f768c516064a by spatel
[IR] fix crash in Constant::isElementWiseEqual() with FP types
We lifted this code from InstCombine for general usage in: rL369842
...but it's not safe as-is. There are no existing users that can trigger
this bug, but I discovered it via crashing several regression tests when
trying to use it for select folding in InstSimplify.
ICmp requires (vector) integer types, so give up on anything that's not
integer or FP (pointers and ?) then bitcast the constants before trying
the match. That matches the definition of "equal or undef" that I was
looking for. If someone wants an FP-aware version of equality (deal with
NaN, -0.0), that could be a different mode or different function.
Differential Revision: https://reviews.llvm.org/D72784
The file was modifiedllvm/lib/IR/Constants.cpp
The file was modifiedllvm/unittests/IR/ConstantsTest.cpp
Commit 3a05c3969c18b5520e360b78fc63cda39a6be98f by dschuff
[WebAssembly] Track frame registers through VReg and local allocation
This change has 2 components:
Target-independent: add a method getDwarfFrameBase to
TargetFrameLowering. It describes how the Dwarf frame base will be
encoded.  That can be a register (the default), the CFA (which replaces
NVPTX-specific logic in DwarfCompileUnit), or a DW_OP_WASM_location
descriptr.
WebAssembly: Allow WebAssemblyFunctionInfo::getFrameRegister to return
the correct virtual register instead of FP32/SP32 after
WebAssemblyReplacePhysRegs has run.  Make WebAssemblyExplicitLocals
store the local it allocates for the frame register. Use this local
information to implement getDwarfFrameBase
The result is that the DW_AT_frame_base attribute is correctly encoded
for each subprogram, and each param and local variable has a correct
DW_AT_location that uses DW_OP_fbreg to refer to the frame base.
Differential Revision: https://reviews.llvm.org/D71681
The file was modifiedlld/test/wasm/debuginfo.test
The file was modifiedllvm/lib/CodeGen/TargetFrameLoweringImpl.cpp
The file was modifiedllvm/include/llvm/CodeGen/TargetFrameLowering.h
The file was modifiedllvm/lib/Target/NVPTX/NVPTXFrameLowering.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.h
The file was modifiedllvm/test/MC/WebAssembly/debug-info.ll
The file was addedllvm/test/MC/WebAssembly/debug-localvar.ll
The file was modifiedllvm/test/CodeGen/WebAssembly/multi-return.ll
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
The file was modifiedllvm/test/MC/WebAssembly/dwarfdump.ll
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyReplacePhysRegs.cpp
The file was modifiedllvm/lib/Target/NVPTX/NVPTXFrameLowering.h
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyOptimizeLiveIntervals.cpp
Commit 202446c639fdd27a54c3be268154a7c66af4f36d by kparzysz
Add BuiltinsHexagonDep.def to clang module map
The file was modifiedclang/include/clang/module.modulemap
Commit fa4112fffc6bd81ba44a9e6ffb19f4314f6e37b0 by sbc
[llvm-nm] Use `StringRef` over `const std::string &` params
Differential Revision: https://reviews.llvm.org/D72718
The file was modifiedllvm/tools/llvm-nm/llvm-nm.cpp
Commit 91e758b7329b4ff134684e661af93a85c436a460 by arsenm2
AMDGPU: Move permlane discard vdst_in optimization
This case can be handled as a regular selection pattern, so move it out
of the weird post-isel folding code which doesn't have an exactly
equivalent place in GlobalISel.
I think it doesn't make much sense to do this optimization here though,
and it would be more useful in instcombine. There's not really any new
information that will be gained during lowering since these inputs were
known from the beginning.
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/VOP3Instructions.td
Commit 3ef8cdf6660fc20baeb09eae5008b741f178b624 by arsenm2
AMDGPU: Do permlane16 vdst_in discard optimization in InstCombine
There's more potential value to discarding the source value earlier,
since we always know the value of the fi/bc bits.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
The file was modifiedllvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll