Commit
ea91758a3c4507af18cc711f6c0695e9e7137693
by Milos.Stojanovic[llvm-exegesis][mips] Add support for memory instructions Implementing functions used to enable testing of memory instructions. Differential Revision: https://reviews.llvm.org/D72858
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 | llvm/tools/llvm-exegesis/lib/Mips/Target.cpp |
 | llvm/unittests/tools/llvm-exegesis/Mips/SnippetGeneratorTest.cpp |
Commit
33463cfba2be7c8d6c08e666123cc34f114a1f3e
by krasimirclang-format: fix spacing in `operator const char*()` Summary: Revision a75f8d98d7ac9e557b238a229a9a2647c71feed1 fixed spacing for operators, but caused the const and non-const versions to diverge: ``` // With Style.PointerAlignment = FormatStyle::PAS_Left: struct A { operator char*() { return ""; } operator const char *() const { return ""; } }; ``` The code was checking if the type specifier was directly preceded by `operator`. However there could be comments and `const/volatile` in between. Reviewers: mprobst Reviewed By: mprobst Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D72911
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 | clang/unittests/Format/FormatTest.cpp |
 | clang/lib/Format/TokenAnnotator.cpp |
Commit
9835cf159014f40e8ea655d0bb3a341ef7ec34f7
by martinclang-format: [JS] pragmas for tslint, tsc. Summary: tslint and tsc (the TypeScript compiler itself) use comment pragmas of the style: // tslint:disable-next-line:foo // @ts-ignore These must not be wrapped and must stay on their own line, in isolation. For tslint, this required adding it to the pragma regexp. The comments starting with `@` are already left alone, but this change adds test coverage for them. Reviewers: krasimir Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D72907
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 | clang/lib/Format/Format.cpp |
 | clang/unittests/Format/FormatTestJS.cpp |
Commit
cc7cb05e9d7f3c6eac48055069c83b1426e3c6b7
by fedor.sergeev[BasicBlock] fix looping in getPostdominatingDeoptimizeCall Blindly following unique-successors chain appeared to be a bad idea. In a degenerate case when block jumps to itself that goes into endless loop. Discovered this problem when playing with additional changes, managed to reproduce it on existing LoopPredication code. Fix by checking a "visited" set while iterating through unique successors. Reviewed By: skatkov Tags: #llvm Differential Revision: https://reviews.llvm.org/D72908
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 | llvm/test/Transforms/LoopPredication/unswitch-exit-loop.ll |
 | llvm/lib/IR/BasicBlock.cpp |
Commit
37dfc64687a01db1d6e7b362231b0c698d26e257
by antiagainstRevert "[mlir][ods] Support dialect specific content emission via hooks" This reverts commit 397215cc309df1171a198b11cab3b241db9441db because this feature needs more discussion.
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 | mlir/include/mlir/TableGen/ODSDialectHook.h |
 | mlir/include/mlir/TableGen/Operator.h |
 | mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp |
Commit
267483ac709b85906e223c3cac447538a115b4c4
by antiagainst[mlir][spirv] Support implied extensions and capabilities In SPIR-V, when a new version is introduced, it is possible some existing extensions will be incorporated into it so that it becomes implicitly declared if targeting the new version. This affects conversion target specification because we need to take this into account when allowing what extensions to use. For a capability, it may also implies some other capabilities, for example, the `Shader` capability implies `Matrix` the capability. This should also be taken into consideration when preparing the conversion target: when we specify an capability is allowed, all its recursively implied capabilities are also allowed. This commit adds utility functions to query implied extensions for a given version and implied capabilities for a given capability and updated SPIRVConversionTarget to use them. This commit also fixes a bug in availability spec. When a symbol (op or enum case) can be enabled by an extension, we should drop it's minimal version requirement. Being enabled by an extension naturally means the symbol can be used by *any* SPIR-V version as long as the extension is supported. The grammar still encodes the 'version' field for such cases, but it should be interpreted as a different way: rather than meaning a minimal version requirement, it says the symbol becomes core at that specific version. Differential Revision: https://reviews.llvm.org/D72765
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 | mlir/lib/Dialect/SPIRV/SPIRVLowering.cpp |
 | mlir/include/mlir/Dialect/SPIRV/CMakeLists.txt |
 | mlir/test/Dialect/SPIRV/target-env.mlir |
 | mlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp |
 | mlir/include/mlir/Dialect/SPIRV/SPIRVTypes.h |
 | mlir/lib/TableGen/Attribute.cpp |
 | mlir/lib/Dialect/SPIRV/SPIRVTypes.cpp |
 | mlir/include/mlir/Dialect/SPIRV/SPIRVBase.td |
 | mlir/test/Dialect/SPIRV/availability.mlir |
 | mlir/test/Dialect/SPIRV/TestAvailability.cpp |
 | mlir/utils/spirv/gen_spirv_dialect.py |
 | mlir/include/mlir/TableGen/Attribute.h |
Commit
42350cd893a9cf6c199b17441dc2ba526c7cca71
by sam.parker[ARM][MVE] Tail Predicate IsSafeToRemove Introduce a method to walk through use-def chains to decide whether it's possible to remove a given instruction and its users. These instructions are then stored in a set until the end of the transform when they're erased. This is now used to perform checks on the iteration count (LoopDec chain), element count (VCTP chain) and the possibly redundant iteration count. As well as being able to remove chains of instructions, we know also check that the sub feeding the vctp is producing the expected value. Differential Revision: https://reviews.llvm.org/D71837
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 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-in-vpt.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/wlstp.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/unsafe-use-after.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-subri.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/vmaxmin_vpred_r.mir |
 | llvm/lib/Target/ARM/Utils/ARMBaseInfo.h |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-subi3.mir |
 | llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/incorrect-sub-16.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/mve-tail-data-types.ll |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/dont-remove-loop-update3.mir |
 | llvm/lib/CodeGen/ReachingDefAnalysis.cpp |
 | llvm/lib/Target/ARM/ARMInstrThumb2.td |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/move-def-before-start.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/dont-remove-loop-update2.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-in-vpt-2.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/dont-remove-loop-update.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/remove-elem-moves.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/vmldava_in_vpt.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/mov-lr-terminator.mir |
 | llvm/include/llvm/CodeGen/ReachingDefAnalysis.h |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/fast-fp-loops.ll |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/move-start-after-def.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-subri12.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/incorrect-sub-8.mir |
 | llvm/lib/Target/ARM/ARMBaseInstrInfo.h |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/incorrect-sub-32.mir |
Commit
ffd3e1607db232c362fa5ad40e5cf2afa400b304
by spatel[IR] add unit test for Constant::isElementWiseEqual() for undef corner case; NFC
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 | llvm/unittests/IR/ConstantsTest.cpp |
Commit
c1e159ef6eb0095b78d08594f02f511c69d9a64b
by spatel[IR] fix Constant::isElementWiseEqual() to allow for all undef elements compare We could argue that match() should be more flexible here, but I'm not sure what impact that would have on existing code.
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 | llvm/lib/IR/Constants.cpp |
 | llvm/unittests/IR/ConstantsTest.cpp |
Commit
42a0355816d3bc125d59cbd07052c8886e78ca86
by aaronAdd `bugprone-reserved-identifier` This patch adds bugprone-reserved-identifier, which flags uses of __names _Like ::_this, which are reserved for the implementation. The check can optionally be inverted, i.e. configured to flag any names that are _not_ reserved, which may be useful for e.g. standard library implementors.
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 | clang-tools-extra/docs/clang-tidy/checks/cert-dcl51-cpp.rst |
 | clang-tools-extra/clang-tidy/cert/CERTTidyModule.cpp |
 | clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp |
 | clang-tools-extra/docs/clang-tidy/checks/bugprone-reserved-identifier.rst |
 | clang-tools-extra/test/clang-tidy/checkers/bugprone-reserved-identifier.cpp |
 | clang-tools-extra/clang-tidy/bugprone/ReservedIdentifierCheck.cpp |
 | clang-tools-extra/clang-tidy/bugprone/ReservedIdentifierCheck.h |
 | clang-tools-extra/test/clang-tidy/checkers/bugprone-reserved-identifier-invert.cpp |
 | clang-tools-extra/test/clang-tidy/checkers/Inputs/bugprone-reserved-identifier/system/system-header.h |
 | clang-tools-extra/test/clang-tidy/checkers/Inputs/bugprone-reserved-identifier/user-header.h |
 | clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt |
 | clang-tools-extra/docs/clang-tidy/checks/cert-dcl37-c.rst |
 | clang-tools-extra/test/clang-tidy/checkers/bugprone-reserved-identifier-c.c |
 | clang-tools-extra/docs/ReleaseNotes.rst |
Commit
73db4f6f11f0012a6bca0431b84eaa3afb9364c9
by llvmgnsyncbot[gn build] Port 42a0355816d
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 | llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/bugprone/BUILD.gn |
Commit
1dc2f257903d3fcb323425eefb5d9b57a0cbdd96
by llvm-dev[SelectionDAG] ComputeKnownBits - assert we're computing the 0'th (difference) result for the SUB/SUBC cases Matches what we already do for the ADD/ADDC/ADDE case.
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 | llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp |
Commit
8eb4d25a0943bce6e8a4859825dce4f67a4f6384
by llvm-dev[X86] Split X87/SSE compare classes into WriteFCom + WriteFComX Most X87 compare instructions write to the X87 status word, while the SSE (U)COMI compares write to rFLAGS. These are often handled very differently on CPUs (e.g. rFLAGS outputs typically involve a fpu2gpr transfer), and we shouldn't be grouping all these instructions behind a single class - so this patch splits off the SSE compares into a new WriteFComX class (and currently keeps the same behaviours). If there's a need to distinguish between X87 instructions more closely we can investigate that in the future, but as we don't handle any of the X87 side effects at the moment its unlikely to have any notable effect.
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 | llvm/lib/Target/X86/X86InstrSSE.td |
 | llvm/lib/Target/X86/X86ScheduleZnver1.td |
 | llvm/lib/Target/X86/X86SchedSkylakeClient.td |
 | llvm/lib/Target/X86/X86SchedSandyBridge.td |
 | llvm/lib/Target/X86/X86InstrAVX512.td |
 | llvm/lib/Target/X86/X86SchedSkylakeServer.td |
 | llvm/lib/Target/X86/X86ScheduleBtVer2.td |
 | llvm/lib/Target/X86/X86ScheduleBdVer2.td |
 | llvm/lib/Target/X86/X86ScheduleZnver2.td |
 | llvm/lib/Target/X86/X86SchedHaswell.td |
 | llvm/lib/Target/X86/X86ScheduleAtom.td |
 | llvm/lib/Target/X86/X86ScheduleSLM.td |
 | llvm/lib/Target/X86/X86Schedule.td |
 | llvm/lib/Target/X86/X86SchedBroadwell.td |
Commit
f9c46229e4ac29053747c96e08c574c6c48d544b
by nathan[clang-tidy] Disable Checks on If constexpr statements in template Instantiations for BugproneBranchClone and ReadabilityBracesAroundStatements Summary: fixes [[ https://bugs.llvm.org/show_bug.cgi?id=32203 | readability-braces-around-statements broken for if constexpr]] and [[ https://bugs.llvm.org/show_bug.cgi?id=44229 | bugprone-branch-clone false positive with template functions and constexpr ]] by disabling the relevant checks on if constexpr statements while inside an instantiated template. This is due to how the else branch of an if constexpr statement is folded away to a null statement if the condition evaluates to false Reviewers: alexfh, hokein, aaron.ballman, xazax.hun Reviewed By: aaron.ballman, xazax.hun Subscribers: rnkovacs, JonasToth, Jim, lebedev.ri, xazax.hun, cfe-commits Tags: #clang-tools-extra, #clang Differential Revision: https://reviews.llvm.org/D71980
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 | clang-tools-extra/clang-tidy/bugprone/BranchCloneCheck.cpp |
 | clang-tools-extra/clang-tidy/readability/BracesAroundStatementsCheck.cpp |
 | clang-tools-extra/test/clang-tidy/checkers/bugprone-branch-clone-if-constexpr-template.cpp |
 | clang-tools-extra/test/clang-tidy/checkers/readability-braces-around-statements-constexpr-if-templates.cpp |
Commit
bcda877b43093459dc52747d35abe0019f8e22e0
by aaronFix a compile error to get bots back to green. Fixes http://lab.llvm.org:8011/builders/clang-x64-windows-msvc/builds/13716
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 | clang-tools-extra/clang-tidy/bugprone/ReservedIdentifierCheck.cpp |
Commit
7f4e744b90ec7a5cd8067cac7032ef36607aa4b8
by aaronAnother speculative fix for the Windows bots. Hopefully fixes: http://45.33.8.238/win/6040/step_4.txt
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 | clang-tools-extra/clang-tidy/bugprone/ReservedIdentifierCheck.cpp |
Commit
60aed6a4e5d936b87f5bed0c983be0bab55b1355
by kparzysz[Hexagon] Add prev65 subtarget feature There was a change to trap1 instruction between v62 and v65. This feature will allow the assembler/disassembler to handle different variants depending on the CPU version.
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 | llvm/lib/Target/Hexagon/Hexagon.td |
 | llvm/lib/Target/Hexagon/HexagonSubtarget.h |
 | llvm/test/MC/Hexagon/J2_trap1_dep.s |
 | llvm/lib/Target/Hexagon/HexagonDepInstrInfo.td |
Commit
2d5bfc6eb15f28d87347aca95f05dfb25318d013
by kparzysz[Hexagon] Improve HVX version checks
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 | llvm/lib/Target/Hexagon/Hexagon.td |
 | llvm/lib/Target/Hexagon/HexagonSubtarget.h |
Commit
43f60e614a3d30e1ae805996d93b1b433a39cf9d
by spatel[x86] try harder to form 256-bit unpck* This is another part of a problem noted in PR42024: https://bugs.llvm.org/show_bug.cgi?id=42024 The AVX2 code may use awkward 256-bit shuffles vs. the AVX code that gets split into the expected 128-bit unpack instructions. We have to be selective in matching the types where we try to do this though. Otherwise, we can end up with more instructions (in the case of v8x32/v4x64). Differential Revision: https://reviews.llvm.org/D72575
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 | llvm/lib/Target/X86/X86ISelLowering.cpp |
 | llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll |
 | llvm/lib/Target/X86/X86ISelLowering.h |
 | llvm/test/CodeGen/X86/vector-interleave.ll |
Commit
b6437b352db9d96ceb5bd7243e1cf0200e4bae6d
by llvm-devFix gcc9 "moving a local object in a return statement prevents copy elision" Wpessimizing-move warnings.
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 | llvm/include/llvm/ExecutionEngine/Orc/RPC/RPCUtils.h |
Commit
ff3fe145fe48646d24371d3fe438fd03b0a6413f
by llvm-devFix gcc9 "moving a local object in a return statement prevents copy elision" Wpessimizing-move warning.
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 | llvm/include/llvm/ExecutionEngine/Orc/CompileOnDemandLayer.h |
Commit
88cdeaa5313a399f13e7cb5bd8e2a9505436ef8b
by llvm-devRevert rGff3fe145fe48 "Fix gcc9 "moving a local object in a return statement prevents copy elision" Wpessimizing-move warning." Fix buildbots
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 | llvm/include/llvm/ExecutionEngine/Orc/CompileOnDemandLayer.h |
Commit
d1b32f328e4a363a0883cdc9ca92d0df3ce3fbf3
by llvm-devRevert rGb6437b352db9 - "Fix gcc9 "moving a local object in a return statement prevents copy elision" Wpessimizing-move warnings." Fix buildbots
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 | llvm/include/llvm/ExecutionEngine/Orc/RPC/RPCUtils.h |
Commit
886f9071c63848e90fe0c2f3ad98a0a71aeffcd4
by arsenm2AMDGPU: Don't assert on a16 images on targets without FeatureR128A16 Currently the lowering for i16 image coordinates asserts on gfx10. I'm somewhat confused by this though. The feature is missing from the gfx10 feature lists, but the a16 bit appears to be present in the manual for MIMG instructions.
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 | llvm/test/CodeGen/AMDGPU/unsupported-image-a16.ll |
 | llvm/lib/Target/AMDGPU/SIISelLowering.cpp |
Commit
05c7dc66480999574a599ac34d99a4c192d51ba7
by xazax[DataFlow] Factor two worklist implementations out Right now every dataflow algorithm uses its own worklist implementation. This is a first step to reduce this duplication. Some upcoming algorithms such as the lifetime analysis is going to use the factored out implementations. Differential Revision: https://reviews.llvm.org/D72380
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 | clang/unittests/Analysis/CFGBuildResult.h |
 | clang/include/clang/Analysis/FlowSensitive/DataflowWorklist.h |
 | clang/lib/Analysis/LiveVariables.cpp |
 | clang/include/clang/Analysis/FlowSensitive/DataflowValues.h |
 | clang/lib/Analysis/UninitializedValues.cpp |
 | clang/unittests/Analysis/CFGTest.cpp |
Commit
0406b4fab94658381ea58db890b07c1a30ff0ae4
by gribozavrRenamed traverseDecl to TraverseDecl in a test RecursiveASTVisitor expects TraverseDecl to be implemented by subclasses.
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 | clang/unittests/Tooling/QualTypeNamesTest.cpp |
Commit
398dc06ad015627465be434fcd5ee2d55399f2bd
by david.spickett[AArch64] Make AArch64 specific assembly directives case insensitive Differential Revision: https://reviews.llvm.org/D72923
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 | llvm/test/MC/AArch64/directives-case_insensitive.s |
 | llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp |
Commit
d035c832c3f9d29eb1d29b6d22cd8d018a6462c6
by sam.mccall[lldb] Try to fix writing outside temp dir from 4bafceced6a7641be7b090229c6ccef22cf55bff
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 | lldb/test/Shell/ObjectFile/wasm/unified-debug-sections.yaml |
Commit
8bcf976841f563514d4174f494cd682da50279f2
by antiagainst[mlir][spirv] Add `const` qualifier for static arrays This makes the local variable `implies` to have the correct type to satisfy ArrayRef's constructor: /*implicit*/ constexpr ArrayRef(const T (&Arr)[N]) Hopefully this should please GCC 5. Differential Revision: https://reviews.llvm.org/D72924
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 | mlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp |
 | mlir/lib/Dialect/SPIRV/SPIRVLowering.cpp |
Commit
2d0d4235a282e0f900d31ac1054aafc0c526245c
by nikita.ppv[InstCombine] Add test for -expensive-combines option; NFC This shows that -expensive-combines=0 is ignored.
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 | llvm/test/Transforms/InstCombine/expensive-combines.ll |
Commit
2ca092f3209579fde7a38ade511c1bbcef213c36
by nikita.ppv[InstCombine] Support disabling expensive combines in opt Currently, there is no way to disable ExpensiveCombines when doing a standalone opt -instcombine run, as that's the default, and the opt option can currently only be used to force enable, not to force disable. The only way to disable expensive combines is via -O1 or -O2, but that of course also runs the rest of the kitchen sink... This patch allows using opt -instcombine -expensive-combines=0 to run InstCombine without ExpensiveCombines. Differential Revision: https://reviews.llvm.org/D72861
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 | llvm/lib/Transforms/InstCombine/InstructionCombining.cpp |
 | llvm/test/Transforms/InstCombine/expensive-combines.ll |
Commit
10d0e2882bbed5865e9716f6a091dd39facb02d9
by nikita.ppv[InstCombine] Split assume test in expensive and not; NFC The IR difference in @icmp1 serves as a test for D72864.
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 | llvm/test/Transforms/InstCombine/assume.ll |
Commit
77befe54f7d72e79f94a3255ae10d529d3b19733
by nikita.ppv[InstCombine] Fix worklist management in return combine There are two related bugs here: First, we don't add the operand we're replacing to the worklist, which means it may not get DCEd (see test change). Second, usually this would just get picked up in the next iteration, but we also do not report the instruction as changed. This means that we do not get that extra instcombine iteration, and more importantly, may break the pass pipeline, as the function is not marked as changed. Differential Revision: https://reviews.llvm.org/D72864
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 | llvm/lib/Transforms/InstCombine/InstructionCombining.cpp |
 | llvm/test/Transforms/InstCombine/assume.ll |
Commit
a922e23101b882e22fc14ffb78b5857954dc86f3
by zinenko[mlir] Improve documentation in ModuleTranslation MLIR to LLVM IR Several functions were missing documentation.
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 | mlir/lib/Target/LLVMIR/ModuleTranslation.cpp |
Commit
29779894af42649044df61a8d8b3ff04b59b7b70
by antiagainst[mlir][spirv] Add lowering from `loop.if` to `spv.selection` When lowering `loop.if` to `spv.selection` we explicitly create a selection header block before the control flow diverges and a merge block where control flow subsequently converges. Differential Revision: https://reviews.llvm.org/D72836
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 | mlir/lib/Conversion/GPUToSPIRV/ConvertGPUToSPIRV.cpp |
 | mlir/test/Conversion/GPUToSPIRV/if.mlir |
Commit
78f82e162ec0d916b5d45943d2b28376b0224dee
by ntv[VectorOps] Update vector transfer read op comments. Summary: Update vector transfer read op comments. Reviewers: nicolasvasilache, aartbik Reviewed By: nicolasvasilache, aartbik Subscribers: merge_guards_bot, mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst, arpith-jacob, mgester, lucyrfox, liufengdb, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72731
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 | mlir/include/mlir/Dialect/VectorOps/VectorOps.td |
Commit
522c030aa9b1dd1881feb5a0d0fa2639b4a5feb7
by nikita.ppv[InstCombine] Fix worklist management in DSE (PR44552) Fixes https://bugs.llvm.org/show_bug.cgi?id=44552. We need to make sure that the store is reprocessed, because performing DSE may expose more DSE opportunities. There is a slight caveat here though: We need to make sure that we add back the store the worklist first, because that means it will be processed after the operands of the removed store have been processed. This is a general bug in InstCombine worklist management that I hope to address at some point, but for now it means we need to do this manually rather than just returning the instruction as changed. Differential Revision: https://reviews.llvm.org/D72807
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 | llvm/test/Transforms/InstCombine/pr44552.ll |
 | llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp |
Commit
b9d2bf38e86e6dd8a2f188d9a24f546aa67de8af
by yitzhakm[libTooling] Fix bug in Stencil handling of macro ranges Summary: Currently, an attempt to rewrite source code inside a macro expansion succeeds, but results in empty text, rather than failing with an error. This patch restructures to the code to explicitly validate ranges before attempting to edit them. Reviewers: gribozavr Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D72274
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 | clang/unittests/Tooling/SourceCodeTest.cpp |
 | clang/include/clang/Tooling/Transformer/SourceCode.h |
 | clang/lib/Tooling/Transformer/SourceCode.cpp |
 | clang/lib/Tooling/Transformer/Stencil.cpp |
 | clang/unittests/Tooling/StencilTest.cpp |
Commit
f343544b813891387add8ef01406d36b82ed0a7e
by zinenko[mlir] Generator converting LLVM intrinsics defs to MLIR ODS Introduce a new generator for MLIR tablegen driver that consumes LLVM IR intrinsic definitions and produces MLIR ODS definitions. This is useful to bulk-generate MLIR operations equivalent to existing LLVM IR intrinsics, such as additional arithmetic instructions or NVVM. A test exercising the generation is also added. It reads the main LLVM intrinsics file and produces ODS to make sure the TableGen model remains in sync with what is used in LLVM. Differential Revision: https://reviews.llvm.org/D72926
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 | mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td |
 | mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td |
 | mlir/test/mlir-tblgen/llvm-intrinsics.td |
 | mlir/tools/mlir-tblgen/LLVMIRIntrinsicGen.cpp |
 | mlir/tools/mlir-tblgen/CMakeLists.txt |
Commit
0bcfafc5e71d4f636d456317a3a2e6fd903d4755
by kevin.neal[SeparateConstOffsetFromGEP] Fix: sext(a) + sext(b) -> sext(a + b) matches add and sub instructions with one another During the SeparateConstOffsetFromGEP pass, signed extensions are distributed to the values that feed into them and then later recombined. The recombination stage is somewhat problematic- it doesn't differ add and sub instructions from another when matching the sext(a) +/- sext(b) -> sext(a +/- b) pattern in some instances. An example- the IR contains: %unextendedA %unextendedB %subuAuB = unextendedA - unextendedB %extA = extend A %extB = extend B %addeAeB = extA + extB The problematic optimization will transform that into: %unextendedA %unextendedB %subuAuB = unextendedA - unextendedB %extA = extend A %extB = extend B %addeAeB = extend subuAuB ; Obviously not semantically equivalent to the IR input. This patch fixes that. Patch by Drew Wock <drew.wock@sas.com> Differential Revision: https://reviews.llvm.org/D65967
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 | llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp |
 | llvm/test/Transforms/SeparateConstOffsetFromGEP/test-add-sub-separation.ll |
Commit
ab974161ba699534f3e30b1f4b036eec9c33053c
by sbc[llvm-nm] Don't report "no symbols" error for files that contain symbols Previously we were reporting this error if we were list no symbols which is not the same thing as the file containing no symbols. Also, always report the filename when printing errors. This matches the GNU nm behaviour. This a followup to https://reviews.llvm.org/D52810 Differential Revision: https://reviews.llvm.org/D72658
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 | llvm/test/ThinLTO/X86/empty-module.ll |
 | llvm/test/tools/llvm-nm/X86/nm-no-symbols.test |
 | llvm/test/tools/llvm-nm/X86/nm-no-symbols-local-only.yaml |
 | llvm/test/ThinLTO/X86/strong_non_prevailing.ll |
 | llvm/tools/llvm-nm/llvm-nm.cpp |
Commit
859e379ffbbb40302926940b8c87fb7a99931612
by antiagainst[mlir][spirv] Explicitly set the size of static arrays
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 | mlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp |
Commit
12e479475a896f664fb721f98c2d6805185ac352
by Adrian PrantlRename DW_AT_LLVM_isysroot to DW_AT_LLVM_sysroot This is a purely cosmetic change that is NFC in terms of the binary output. I bugs me that I called the attribute DW_AT_LLVM_isysroot since the "i" is an artifact of GCC command line option syntax (-isysroot is in the category of -i options) and doesn't carry any useful information otherwise. This attribute only appears in Clang module debug info. Differential Revision: https://reviews.llvm.org/D71722
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 | llvm/test/DebugInfo/X86/DIModule.ll |
 | llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp |
 | llvm/lib/IR/DebugInfo.cpp |
 | llvm/test/DebugInfo/X86/split-dwarf-sysroot.ll |
 | llvm/lib/AsmParser/LLParser.cpp |
 | llvm/include/llvm-c/DebugInfo.h |
 | lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp |
 | llvm/lib/Bitcode/Writer/BitcodeWriter.cpp |
 | llvm/lib/IR/DebugInfoMetadata.cpp |
 | llvm/lib/IR/AsmWriter.cpp |
 | llvm/test/Assembler/dimodule.ll |
 | llvm/tools/llvm-c-test/debuginfo.c |
 | llvm/lib/IR/LLVMContextImpl.h |
 | llvm/test/CodeGen/X86/load-combine-dbg.ll |
 | llvm/include/llvm/IR/DebugInfoMetadata.h |
 | llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp |
 | llvm/test/DebugInfo/X86/clang-module.ll |
 | clang/test/CodeGen/debug-nvptx.c |
 | llvm/include/llvm/IR/DIBuilder.h |
 | llvm/test/Assembler/dicompileunit.ll |
 | clang/test/CodeGen/debug-info-sysroot.c |
 | clang/test/Modules/debug-info-moduleimport.m |
 | llvm/test/DebugInfo/X86/DIModuleContext.ll |
 | llvm/unittests/IR/MetadataTest.cpp |
 | llvm/lib/IR/DIBuilder.cpp |
 | clang/lib/CodeGen/CGDebugInfo.cpp |
 | llvm/bindings/go/llvm/dibuilder.go |
 | llvm/test/Bindings/llvm-c/debug_info.ll |
 | llvm/lib/Bitcode/Reader/MetadataLoader.cpp |
Commit
03689fe97f2377a3b19864de98b5c14b7fbd85ab
by francisvm[perf-training] Ignore ' (in-process)' prefix from -### After D69825, the output of clang -### when running in process can be prefixed by ' (in-process)'. Skip it.
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 | clang/utils/perf-training/perf-helper.py |
Commit
2754a67ba9e9e3fecd4c8f01a5a2c4ef286d206d
by sbcRevert "[llvm-nm] Don't report "no symbols" error for files that contain symbols" This reverts commit ab974161ba699534f3e30b1f4b036eec9c33053c. This change broke several tests, and the pre-commit bot even warning me that it would. Doh!
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 | llvm/test/tools/llvm-nm/X86/nm-no-symbols-local-only.yaml |
 | llvm/test/ThinLTO/X86/empty-module.ll |
 | llvm/test/tools/llvm-nm/X86/nm-no-symbols.test |
 | llvm/test/ThinLTO/X86/strong_non_prevailing.ll |
 | llvm/tools/llvm-nm/llvm-nm.cpp |
Commit
932b5d6fcad183a5b1584dffc77c340bf0796efa
by maskray[test] Fix tests after D52810
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 | clang/test/CodeGen/thinlto_backend.ll |
 | clang/test/InterfaceStubs/inline.c |
 | clang/test/InterfaceStubs/externstatic.c |
Commit
a9f0025acd2235dccec51cf42d1e604675639343
by maskrayReland "[llvm-nm] Don't report "no symbols" error for files that contain symbols"
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 | llvm/test/ThinLTO/X86/strong_non_prevailing.ll |
 | llvm/test/tools/llvm-nm/X86/nm-no-symbols-local-only.yaml |
 | llvm/tools/llvm-nm/llvm-nm.cpp |
 | clang/test/InterfaceStubs/function-template-specialization.cpp |
 | llvm/test/ThinLTO/X86/empty-module.ll |
 | llvm/test/tools/llvm-nm/X86/nm-no-symbols.test |
Commit
ecfd6d3e84185127fb836d6fe62564456be3a9cd
by Sanne.Wouda[clang] Set function attributes on SEH filter functions correctly. Summary: When compiling with -munwind-tables, the SEH filter funclet needs the uwtable function attribute, which gets automatically added if we use SetInternalFunctionAttributes. The filter funclet is internal so this seems appropriate. Reviewers: rnk Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D72786
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 | clang/test/CodeGenCXX/exceptions-seh-filter-uwtable.cpp |
 | clang/lib/CodeGen/CGException.cpp |
 | clang/test/CodeGen/exceptions-seh-finally.c |
Commit
08f2b67d03ba8612c6ee384d0a69a34a55076903
by maskray[test] Fix test/ELF/lto/thinlto-obj-path.ll after D52810
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 | lld/test/ELF/lto/thinlto-obj-path.ll |
Commit
8fb29d4a507371224ee06a039f1c01e242099967
by riverriddle[mlir] Replace AbstractOperation::classof with a ClassID instance. Summary: This field is currently not used by anything, and using a ClassID instance provides better support for more efficient classof. Reviewers: mehdi_amini, nicolasvasilache Reviewed By: mehdi_amini Subscribers: merge_guards_bot, jpienaar, burmako, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, liufengdb, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72822
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 | mlir/include/mlir/IR/OperationSupport.h |
 | mlir/include/mlir/IR/OpDefinition.h |
Commit
c1873631d0a8f2acca4ab428a1e9abea844d97ff
by kparzysz[Hexagon] Refactor HexagonShuffle The check() in HexagonShuffle has been decomposed into smaller steps. No functionality change is intended with this commit.
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 | test/MC/Hexagon/PacketRules/restrict_slot1_aok.s |
 | llvm/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.h |
 | llvm/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp |