Changes

Summary

  1. [llvm-exegesis][mips] Add support for memory instructions (details)
  2. clang-format: fix spacing in `operator const char*()` (details)
  3. clang-format: [JS] pragmas for tslint, tsc. (details)
  4. [BasicBlock] fix looping in getPostdominatingDeoptimizeCall (details)
  5. Revert "[mlir][ods] Support dialect specific content emission via hooks" (details)
  6. [mlir][spirv] Support implied extensions and capabilities (details)
  7. [ARM][MVE] Tail Predicate IsSafeToRemove (details)
  8. [IR] add unit test for Constant::isElementWiseEqual() for undef corner (details)
  9. [IR] fix Constant::isElementWiseEqual() to allow for all undef elements (details)
  10. Add `bugprone-reserved-identifier` (details)
  11. [gn build] Port 42a0355816d (details)
  12. [SelectionDAG] ComputeKnownBits - assert we're computing the 0'th (details)
  13. [X86] Split X87/SSE compare classes into WriteFCom + WriteFComX (details)
  14. [clang-tidy] Disable Checks on If constexpr statements in template (details)
  15. Fix a compile error to get bots back to green. (details)
  16. Another speculative fix for the Windows bots. (details)
  17. [Hexagon] Add prev65 subtarget feature (details)
  18. [Hexagon] Improve HVX version checks (details)
  19. [x86] try harder to form 256-bit unpck* (details)
  20. Fix gcc9 "moving a local object in a return statement prevents copy (details)
  21. Fix gcc9 "moving a local object in a return statement prevents copy (details)
  22. Revert rGff3fe145fe48 "Fix gcc9 "moving a local object in a return (details)
  23. Revert rGb6437b352db9 - "Fix gcc9 "moving a local object in a return (details)
  24. AMDGPU: Don't assert on a16 images on targets without FeatureR128A16 (details)
  25. [DataFlow] Factor two worklist implementations out (details)
  26. Renamed traverseDecl to TraverseDecl in a test (details)
  27. [AArch64] Make AArch64 specific assembly directives case insensitive (details)
  28. [lldb] Try to fix writing outside temp dir from (details)
  29. [mlir][spirv] Add `const` qualifier for static arrays (details)
  30. [InstCombine] Add test for -expensive-combines option; NFC (details)
  31. [InstCombine] Support disabling expensive combines in opt (details)
  32. [InstCombine] Split assume test in expensive and not; NFC (details)
  33. [InstCombine] Fix worklist management in return combine (details)
  34. [mlir] Improve documentation in ModuleTranslation MLIR to LLVM IR (details)
  35. [mlir][spirv] Add lowering from `loop.if` to `spv.selection` (details)
  36. [VectorOps] Update vector transfer read op comments. (details)
  37. [InstCombine] Fix worklist management in DSE (PR44552) (details)
  38. [libTooling] Fix bug in Stencil handling of macro ranges (details)
  39. [mlir] Generator converting LLVM intrinsics defs to MLIR ODS (details)
  40. [SeparateConstOffsetFromGEP] Fix: sext(a) + sext(b) -> sext(a + b) (details)
  41. [llvm-nm] Don't report "no symbols" error for files that contain symbols (details)
  42. [mlir][spirv] Explicitly set the size of static arrays (details)
  43. Rename DW_AT_LLVM_isysroot to DW_AT_LLVM_sysroot (details)
  44. [perf-training] Ignore ' (in-process)' prefix from -### (details)
  45. Revert "[llvm-nm] Don't report "no symbols" error for files that contain (details)
  46. [test] Fix tests after D52810 (details)
  47. Reland "[llvm-nm] Don't report "no symbols" error for files that contain (details)
  48. [clang] Set function attributes on SEH filter functions correctly. (details)
  49. [test] Fix test/ELF/lto/thinlto-obj-path.ll after D52810 (details)
  50. [mlir] Replace AbstractOperation::classof with a ClassID instance. (details)
  51. [Hexagon] Refactor HexagonShuffle (details)
Commit ea91758a3c4507af18cc711f6c0695e9e7137693 by Milos.Stojanovic
[llvm-exegesis][mips] Add support for memory instructions
Implementing functions used to enable testing of memory instructions.
Differential Revision: https://reviews.llvm.org/D72858
The file was modifiedllvm/unittests/tools/llvm-exegesis/Mips/SnippetGeneratorTest.cpp
The file was modifiedllvm/tools/llvm-exegesis/lib/Mips/Target.cpp
Commit 33463cfba2be7c8d6c08e666123cc34f114a1f3e by krasimir
clang-format: fix spacing in `operator const char*()`
Summary: Revision a75f8d98d7ac9e557b238a229a9a2647c71feed1 fixed spacing
for operators, but caused the const and non-const versions to diverge:
```
// With Style.PointerAlignment = FormatStyle::PAS_Left:
struct A {
operator char*() { return ""; }
operator const char *() const { return ""; }
};
``` The code was checking if the type specifier was directly preceded by
`operator`. However there could be comments and `const/volatile` in
between.
Reviewers: mprobst
Reviewed By: mprobst
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72911
The file was modifiedclang/lib/Format/TokenAnnotator.cpp
The file was modifiedclang/unittests/Format/FormatTest.cpp
Commit 9835cf159014f40e8ea655d0bb3a341ef7ec34f7 by martin
clang-format: [JS] pragmas for tslint, tsc.
Summary: tslint and tsc (the TypeScript compiler itself) use comment
pragmas of the style:
  // tslint:disable-next-line:foo
// @ts-ignore
These must not be wrapped and must stay on their own line, in isolation.
For tslint, this required adding it to the pragma regexp. The comments
starting with `@` are already left alone, but this change adds test
coverage for them.
Reviewers: krasimir
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72907
The file was modifiedclang/lib/Format/Format.cpp
The file was modifiedclang/unittests/Format/FormatTestJS.cpp
Commit cc7cb05e9d7f3c6eac48055069c83b1426e3c6b7 by fedor.sergeev
[BasicBlock] fix looping in getPostdominatingDeoptimizeCall
Blindly following unique-successors chain appeared to be a bad idea. In
a degenerate case when block jumps to itself that goes into endless
loop.
Discovered this problem when playing with additional changes, managed to
reproduce it on existing LoopPredication code.
Fix by checking a "visited" set while iterating through unique
successors.
Reviewed By: skatkov
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72908
The file was addedllvm/test/Transforms/LoopPredication/unswitch-exit-loop.ll
The file was modifiedllvm/lib/IR/BasicBlock.cpp
Commit 37dfc64687a01db1d6e7b362231b0c698d26e257 by antiagainst
Revert "[mlir][ods] Support dialect specific content emission via hooks"
This reverts commit 397215cc309df1171a198b11cab3b241db9441db because
this feature needs more discussion.
The file was modifiedmlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
The file was modifiedmlir/include/mlir/TableGen/Operator.h
The file was removedmlir/include/mlir/TableGen/ODSDialectHook.h
Commit 267483ac709b85906e223c3cac447538a115b4c4 by antiagainst
[mlir][spirv] Support implied extensions and capabilities
In SPIR-V, when a new version is introduced, it is possible some
existing extensions will be incorporated into it so that it becomes
implicitly declared if targeting the new version. This affects
conversion target specification because we need to take this into
account when allowing what extensions to use.
For a capability, it may also implies some other capabilities, for
example, the `Shader` capability implies `Matrix` the capability. This
should also be taken into consideration when preparing the conversion
target: when we specify an capability is allowed, all its recursively
implied capabilities are also allowed.
This commit adds utility functions to query implied extensions for a
given version and implied capabilities for a given capability and
updated SPIRVConversionTarget to use them.
This commit also fixes a bug in availability spec. When a symbol
(op or enum case) can be enabled by an extension, we should drop it's
minimal version requirement. Being enabled by an extension naturally
means the symbol can be used by *any* SPIR-V version as long as the
extension is supported. The grammar still encodes the 'version' field
for such cases, but it should be interpreted as a different way: rather
than meaning a minimal version requirement, it says the symbol becomes
core at that specific version.
Differential Revision: https://reviews.llvm.org/D72765
The file was modifiedmlir/lib/TableGen/Attribute.cpp
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVBase.td
The file was modifiedmlir/test/Dialect/SPIRV/availability.mlir
The file was modifiedmlir/lib/Dialect/SPIRV/SPIRVLowering.cpp
The file was modifiedmlir/include/mlir/Dialect/SPIRV/CMakeLists.txt
The file was modifiedmlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp
The file was modifiedmlir/test/Dialect/SPIRV/TestAvailability.cpp
The file was modifiedmlir/lib/Dialect/SPIRV/SPIRVTypes.cpp
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVTypes.h
The file was modifiedmlir/test/Dialect/SPIRV/target-env.mlir
The file was modifiedmlir/include/mlir/TableGen/Attribute.h
The file was modifiedmlir/utils/spirv/gen_spirv_dialect.py
Commit 42350cd893a9cf6c199b17441dc2ba526c7cca71 by sam.parker
[ARM][MVE] Tail Predicate IsSafeToRemove
Introduce a method to walk through use-def chains to decide whether it's
possible to remove a given instruction and its users. These instructions
are then stored in a set until the end of the transform when they're
erased. This is now used to perform checks on the iteration count
(LoopDec chain), element count (VCTP chain) and the possibly redundant
iteration count.
As well as being able to remove chains of instructions, we know also
check that the sub feeding the vctp is producing the expected value.
Differential Revision: https://reviews.llvm.org/D71837
The file was modifiedllvm/lib/Target/ARM/Utils/ARMBaseInfo.h
The file was addedllvm/test/CodeGen/Thumb2/LowOverheadLoops/incorrect-sub-32.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/vmldava_in_vpt.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/move-def-before-start.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/unsafe-use-after.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-in-vpt-2.mir
The file was modifiedllvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/mov-lr-terminator.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/fast-fp-loops.ll
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/wlstp.mir
The file was modifiedllvm/lib/Target/ARM/ARMBaseInstrInfo.h
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/mve-tail-data-types.ll
The file was addedllvm/test/CodeGen/Thumb2/LowOverheadLoops/remove-elem-moves.mir
The file was modifiedllvm/include/llvm/CodeGen/ReachingDefAnalysis.h
The file was modifiedllvm/lib/CodeGen/ReachingDefAnalysis.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/dont-remove-loop-update2.mir
The file was addedllvm/test/CodeGen/Thumb2/LowOverheadLoops/incorrect-sub-8.mir
The file was addedllvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-subri.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/dont-remove-loop-update.mir
The file was removedllvm/test/CodeGen/Thumb2/LowOverheadLoops/dont-remove-loop-update3.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-in-vpt.mir
The file was addedllvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-subri12.mir
The file was modifiedllvm/lib/Target/ARM/ARMInstrThumb2.td
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/move-start-after-def.mir
The file was addedllvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-subi3.mir
The file was addedllvm/test/CodeGen/Thumb2/LowOverheadLoops/incorrect-sub-16.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/vmaxmin_vpred_r.mir
Commit ffd3e1607db232c362fa5ad40e5cf2afa400b304 by spatel
[IR] add unit test for Constant::isElementWiseEqual() for undef corner
case; NFC
The file was modifiedllvm/unittests/IR/ConstantsTest.cpp
Commit c1e159ef6eb0095b78d08594f02f511c69d9a64b by spatel
[IR] fix Constant::isElementWiseEqual() to allow for all undef elements
compare
We could argue that match() should be more flexible here, but I'm not
sure what impact that would have on existing code.
The file was modifiedllvm/lib/IR/Constants.cpp
The file was modifiedllvm/unittests/IR/ConstantsTest.cpp
Commit 42a0355816d3bc125d59cbd07052c8886e78ca86 by aaron
Add `bugprone-reserved-identifier`
This patch adds bugprone-reserved-identifier, which flags uses of
__names _Like
::_this, which are reserved for the implementation. The check can
optionally be inverted, i.e. configured to flag any names that are _not_
reserved, which may be useful for e.g. standard library implementors.
The file was addedclang-tools-extra/test/clang-tidy/checkers/Inputs/bugprone-reserved-identifier/user-header.h
The file was addedclang-tools-extra/test/clang-tidy/checkers/bugprone-reserved-identifier-invert.cpp
The file was addedclang-tools-extra/test/clang-tidy/checkers/bugprone-reserved-identifier.cpp
The file was modifiedclang-tools-extra/clang-tidy/cert/CERTTidyModule.cpp
The file was modifiedclang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
The file was addedclang-tools-extra/test/clang-tidy/checkers/bugprone-reserved-identifier-c.c
The file was addedclang-tools-extra/docs/clang-tidy/checks/cert-dcl51-cpp.rst
The file was addedclang-tools-extra/clang-tidy/bugprone/ReservedIdentifierCheck.h
The file was modifiedclang-tools-extra/docs/ReleaseNotes.rst
The file was addedclang-tools-extra/test/clang-tidy/checkers/Inputs/bugprone-reserved-identifier/system/system-header.h
The file was modifiedclang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
The file was addedclang-tools-extra/clang-tidy/bugprone/ReservedIdentifierCheck.cpp
The file was addedclang-tools-extra/docs/clang-tidy/checks/cert-dcl37-c.rst
The file was addedclang-tools-extra/docs/clang-tidy/checks/bugprone-reserved-identifier.rst
Commit 73db4f6f11f0012a6bca0431b84eaa3afb9364c9 by llvmgnsyncbot
[gn build] Port 42a0355816d
The file was modifiedllvm/utils/gn/secondary/clang-tools-extra/clang-tidy/bugprone/BUILD.gn
Commit 1dc2f257903d3fcb323425eefb5d9b57a0cbdd96 by llvm-dev
[SelectionDAG] ComputeKnownBits - assert we're computing the 0'th
(difference) result for the SUB/SUBC cases
Matches what we already do for the ADD/ADDC/ADDE case.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Commit 8eb4d25a0943bce6e8a4859825dce4f67a4f6384 by llvm-dev
[X86] Split X87/SSE compare classes into WriteFCom + WriteFComX
Most X87 compare instructions write to the X87 status word, while the
SSE (U)COMI compares write to rFLAGS. These are often handled very
differently on CPUs (e.g. rFLAGS outputs typically involve a fpu2gpr
transfer), and we shouldn't be grouping all these instructions behind a
single class - so this patch splits off the SSE compares into a new
WriteFComX class (and currently keeps the same behaviours). If there's a
need to distinguish between X87 instructions more closely we can
investigate that in the future, but as we don't handle any of the X87
side effects at the moment its unlikely to have any notable effect.
The file was modifiedllvm/lib/Target/X86/X86ScheduleZnver2.td
The file was modifiedllvm/lib/Target/X86/X86SchedBroadwell.td
The file was modifiedllvm/lib/Target/X86/X86ScheduleBtVer2.td
The file was modifiedllvm/lib/Target/X86/X86ScheduleBdVer2.td
The file was modifiedllvm/lib/Target/X86/X86SchedSkylakeServer.td
The file was modifiedllvm/lib/Target/X86/X86InstrSSE.td
The file was modifiedllvm/lib/Target/X86/X86SchedSkylakeClient.td
The file was modifiedllvm/lib/Target/X86/X86ScheduleSLM.td
The file was modifiedllvm/lib/Target/X86/X86SchedSandyBridge.td
The file was modifiedllvm/lib/Target/X86/X86ScheduleZnver1.td
The file was modifiedllvm/lib/Target/X86/X86ScheduleAtom.td
The file was modifiedllvm/lib/Target/X86/X86SchedHaswell.td
The file was modifiedllvm/lib/Target/X86/X86InstrAVX512.td
The file was modifiedllvm/lib/Target/X86/X86Schedule.td
Commit f9c46229e4ac29053747c96e08c574c6c48d544b by nathan
[clang-tidy] Disable Checks on If constexpr statements in template
Instantiations for BugproneBranchClone and
ReadabilityBracesAroundStatements
Summary: fixes [[ https://bugs.llvm.org/show_bug.cgi?id=32203 |
readability-braces-around-statements broken for if constexpr]] and [[
https://bugs.llvm.org/show_bug.cgi?id=44229 | bugprone-branch-clone
false positive with template functions and constexpr ]] by disabling the
relevant checks on if constexpr statements while inside an instantiated
template. This is due to how the else branch of an if constexpr
statement is folded away to a null statement if the condition evaluates
to false
Reviewers: alexfh, hokein, aaron.ballman, xazax.hun
Reviewed By: aaron.ballman, xazax.hun
Subscribers: rnkovacs, JonasToth, Jim, lebedev.ri, xazax.hun,
cfe-commits
Tags: #clang-tools-extra, #clang
Differential Revision: https://reviews.llvm.org/D71980
The file was modifiedclang-tools-extra/clang-tidy/bugprone/BranchCloneCheck.cpp
The file was addedclang-tools-extra/test/clang-tidy/checkers/bugprone-branch-clone-if-constexpr-template.cpp
The file was addedclang-tools-extra/test/clang-tidy/checkers/readability-braces-around-statements-constexpr-if-templates.cpp
The file was modifiedclang-tools-extra/clang-tidy/readability/BracesAroundStatementsCheck.cpp
Commit bcda877b43093459dc52747d35abe0019f8e22e0 by aaron
Fix a compile error to get bots back to green.
Fixes
http://lab.llvm.org:8011/builders/clang-x64-windows-msvc/builds/13716
The file was modifiedclang-tools-extra/clang-tidy/bugprone/ReservedIdentifierCheck.cpp
Commit 7f4e744b90ec7a5cd8067cac7032ef36607aa4b8 by aaron
Another speculative fix for the Windows bots.
Hopefully fixes: http://45.33.8.238/win/6040/step_4.txt
The file was modifiedclang-tools-extra/clang-tidy/bugprone/ReservedIdentifierCheck.cpp
Commit 60aed6a4e5d936b87f5bed0c983be0bab55b1355 by kparzysz
[Hexagon] Add prev65 subtarget feature
There was a change to trap1 instruction between v62 and v65. This
feature will allow the assembler/disassembler to handle different
variants depending on the CPU version.
The file was modifiedllvm/lib/Target/Hexagon/Hexagon.td
The file was modifiedllvm/test/MC/Hexagon/J2_trap1_dep.s
The file was modifiedllvm/lib/Target/Hexagon/HexagonDepInstrInfo.td
The file was modifiedllvm/lib/Target/Hexagon/HexagonSubtarget.h
Commit 2d5bfc6eb15f28d87347aca95f05dfb25318d013 by kparzysz
[Hexagon] Improve HVX version checks
The file was modifiedllvm/lib/Target/Hexagon/Hexagon.td
The file was modifiedllvm/lib/Target/Hexagon/HexagonSubtarget.h
Commit 43f60e614a3d30e1ae805996d93b1b433a39cf9d by spatel
[x86] try harder to form 256-bit unpck*
This is another part of a problem noted in PR42024:
https://bugs.llvm.org/show_bug.cgi?id=42024
The AVX2 code may use awkward 256-bit shuffles vs. the AVX code that
gets split into the expected 128-bit unpack instructions. We have to be
selective in matching the types where we try to do this though.
Otherwise, we can end up with more instructions (in the case of
v8x32/v4x64).
Differential Revision: https://reviews.llvm.org/D72575
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-256-v8.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.h
The file was modifiedllvm/test/CodeGen/X86/vector-interleave.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit b6437b352db9d96ceb5bd7243e1cf0200e4bae6d by llvm-dev
Fix gcc9 "moving a local object in a return statement prevents copy
elision" Wpessimizing-move warnings.
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/RPC/RPCUtils.h
Commit ff3fe145fe48646d24371d3fe438fd03b0a6413f by llvm-dev
Fix gcc9 "moving a local object in a return statement prevents copy
elision" Wpessimizing-move warning.
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/CompileOnDemandLayer.h
Commit 88cdeaa5313a399f13e7cb5bd8e2a9505436ef8b by llvm-dev
Revert rGff3fe145fe48 "Fix gcc9 "moving a local object in a return
statement prevents copy elision" Wpessimizing-move warning."
Fix buildbots
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/CompileOnDemandLayer.h
Commit d1b32f328e4a363a0883cdc9ca92d0df3ce3fbf3 by llvm-dev
Revert rGb6437b352db9 - "Fix gcc9 "moving a local object in a return
statement prevents copy elision" Wpessimizing-move warnings."
Fix buildbots
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/RPC/RPCUtils.h
Commit 886f9071c63848e90fe0c2f3ad98a0a71aeffcd4 by arsenm2
AMDGPU: Don't assert on a16 images on targets without FeatureR128A16
Currently the lowering for i16 image coordinates asserts on gfx10. I'm
somewhat confused by this though. The feature is missing from the gfx10
feature lists, but the a16 bit appears to be present in the manual for
MIMG instructions.
The file was addedllvm/test/CodeGen/AMDGPU/unsupported-image-a16.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
Commit 05c7dc66480999574a599ac34d99a4c192d51ba7 by xazax
[DataFlow] Factor two worklist implementations out
Right now every dataflow algorithm uses its own worklist implementation.
This is a first step to reduce this duplication. Some upcoming
algorithms such as the lifetime analysis is going to use the factored
out implementations.
Differential Revision: https://reviews.llvm.org/D72380
The file was modifiedclang/lib/Analysis/UninitializedValues.cpp
The file was modifiedclang/unittests/Analysis/CFGTest.cpp
The file was modifiedclang/include/clang/Analysis/FlowSensitive/DataflowValues.h
The file was modifiedclang/unittests/Analysis/CFGBuildResult.h
The file was modifiedclang/lib/Analysis/LiveVariables.cpp
The file was addedclang/include/clang/Analysis/FlowSensitive/DataflowWorklist.h
Commit 0406b4fab94658381ea58db890b07c1a30ff0ae4 by gribozavr
Renamed traverseDecl to TraverseDecl in a test
RecursiveASTVisitor expects TraverseDecl to be implemented by
subclasses.
The file was modifiedclang/unittests/Tooling/QualTypeNamesTest.cpp
Commit 398dc06ad015627465be434fcd5ee2d55399f2bd by david.spickett
[AArch64] Make AArch64 specific assembly directives case insensitive
Differential Revision: https://reviews.llvm.org/D72923
The file was addedllvm/test/MC/AArch64/directives-case_insensitive.s
The file was modifiedllvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
Commit d035c832c3f9d29eb1d29b6d22cd8d018a6462c6 by sam.mccall
[lldb] Try to fix writing outside temp dir from
4bafceced6a7641be7b090229c6ccef22cf55bff
The file was modifiedlldb/test/Shell/ObjectFile/wasm/unified-debug-sections.yaml
Commit 8bcf976841f563514d4174f494cd682da50279f2 by antiagainst
[mlir][spirv] Add `const` qualifier for static arrays
This makes the local variable `implies` to have the correct type to
satisfy ArrayRef's constructor:
  /*implicit*/ constexpr ArrayRef(const T (&Arr)[N])
Hopefully this should please GCC 5.
Differential Revision: https://reviews.llvm.org/D72924
The file was modifiedmlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp
The file was modifiedmlir/lib/Dialect/SPIRV/SPIRVLowering.cpp
Commit 2d0d4235a282e0f900d31ac1054aafc0c526245c by nikita.ppv
[InstCombine] Add test for -expensive-combines option; NFC
This shows that -expensive-combines=0 is ignored.
The file was addedllvm/test/Transforms/InstCombine/expensive-combines.ll
Commit 2ca092f3209579fde7a38ade511c1bbcef213c36 by nikita.ppv
[InstCombine] Support disabling expensive combines in opt
Currently, there is no way to disable ExpensiveCombines when doing a
standalone opt -instcombine run, as that's the default, and the opt
option can currently only be used to force enable, not to force disable.
The only way to disable expensive combines is via -O1 or -O2, but that
of course also runs the rest of the kitchen sink...
This patch allows using opt -instcombine -expensive-combines=0 to run
InstCombine without ExpensiveCombines.
Differential Revision: https://reviews.llvm.org/D72861
The file was modifiedllvm/lib/Transforms/InstCombine/InstructionCombining.cpp
The file was modifiedllvm/test/Transforms/InstCombine/expensive-combines.ll
Commit 10d0e2882bbed5865e9716f6a091dd39facb02d9 by nikita.ppv
[InstCombine] Split assume test in expensive and not; NFC
The IR difference in @icmp1 serves as a test for D72864.
The file was modifiedllvm/test/Transforms/InstCombine/assume.ll
Commit 77befe54f7d72e79f94a3255ae10d529d3b19733 by nikita.ppv
[InstCombine] Fix worklist management in return combine
There are two related bugs here: First, we don't add the operand we're
replacing to the worklist, which means it may not get DCEd
(see test change). Second, usually this would just get picked up in the
next iteration, but we also do not report the instruction as changed.
This means that we do not get that extra instcombine iteration, and more
importantly, may break the pass pipeline, as the function is not marked
as changed.
Differential Revision: https://reviews.llvm.org/D72864
The file was modifiedllvm/lib/Transforms/InstCombine/InstructionCombining.cpp
The file was modifiedllvm/test/Transforms/InstCombine/assume.ll
Commit a922e23101b882e22fc14ffb78b5857954dc86f3 by zinenko
[mlir] Improve documentation in ModuleTranslation MLIR to LLVM IR
Several functions were missing documentation.
The file was modifiedmlir/lib/Target/LLVMIR/ModuleTranslation.cpp
Commit 29779894af42649044df61a8d8b3ff04b59b7b70 by antiagainst
[mlir][spirv] Add lowering from `loop.if` to `spv.selection`
When lowering `loop.if` to `spv.selection` we explicitly create a
selection header block before the control flow diverges and a merge
block where control flow subsequently converges.
Differential Revision: https://reviews.llvm.org/D72836
The file was addedmlir/test/Conversion/GPUToSPIRV/if.mlir
The file was modifiedmlir/lib/Conversion/GPUToSPIRV/ConvertGPUToSPIRV.cpp
Commit 78f82e162ec0d916b5d45943d2b28376b0224dee by ntv
[VectorOps] Update vector transfer read op comments.
Summary: Update vector transfer read op comments.
Reviewers: nicolasvasilache, aartbik
Reviewed By: nicolasvasilache, aartbik
Subscribers: merge_guards_bot, mehdi_amini, rriddle, jpienaar, burmako,
shauheen, antiagainst, arpith-jacob, mgester, lucyrfox, liufengdb,
llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72731
The file was modifiedmlir/include/mlir/Dialect/VectorOps/VectorOps.td
Commit 522c030aa9b1dd1881feb5a0d0fa2639b4a5feb7 by nikita.ppv
[InstCombine] Fix worklist management in DSE (PR44552)
Fixes https://bugs.llvm.org/show_bug.cgi?id=44552. We need to make sure
that the store is reprocessed, because performing DSE may expose more
DSE opportunities.
There is a slight caveat here though: We need to make sure that we add
back the store the worklist first, because that means it will be
processed after the operands of the removed store have been processed.
This is a general bug in InstCombine worklist management that I hope to
address at some point, but for now it means we need to do this manually
rather than just returning the instruction as changed.
Differential Revision: https://reviews.llvm.org/D72807
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
The file was addedllvm/test/Transforms/InstCombine/pr44552.ll
Commit b9d2bf38e86e6dd8a2f188d9a24f546aa67de8af by yitzhakm
[libTooling] Fix bug in Stencil handling of macro ranges
Summary: Currently, an attempt to rewrite source code inside a macro
expansion succeeds, but results in empty text, rather than failing with
an error.  This patch restructures to the code to explicitly validate
ranges before attempting to edit them.
Reviewers: gribozavr
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72274
The file was modifiedclang/lib/Tooling/Transformer/Stencil.cpp
The file was modifiedclang/include/clang/Tooling/Transformer/SourceCode.h
The file was modifiedclang/lib/Tooling/Transformer/SourceCode.cpp
The file was modifiedclang/unittests/Tooling/StencilTest.cpp
The file was modifiedclang/unittests/Tooling/SourceCodeTest.cpp
Commit f343544b813891387add8ef01406d36b82ed0a7e by zinenko
[mlir] Generator converting LLVM intrinsics defs to MLIR ODS
Introduce a new generator for MLIR tablegen driver that consumes LLVM IR
intrinsic definitions and produces MLIR ODS definitions. This is useful
to bulk-generate MLIR operations equivalent to existing LLVM IR
intrinsics, such as additional arithmetic instructions or NVVM.
A test exercising the generation is also added. It reads the main LLVM
intrinsics file and produces ODS to make sure the TableGen model remains
in sync with what is used in LLVM.
Differential Revision: https://reviews.llvm.org/D72926
The file was modifiedmlir/tools/mlir-tblgen/CMakeLists.txt
The file was addedmlir/tools/mlir-tblgen/LLVMIRIntrinsicGen.cpp
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
The file was addedmlir/test/mlir-tblgen/llvm-intrinsics.td
Commit 0bcfafc5e71d4f636d456317a3a2e6fd903d4755 by kevin.neal
[SeparateConstOffsetFromGEP] Fix: sext(a) + sext(b) -> sext(a + b)
matches add and sub instructions with one another
During the SeparateConstOffsetFromGEP pass, signed extensions are
distributed to the values that feed into them and then later recombined.
The recombination stage is somewhat problematic- it doesn't differ add
and sub instructions from another when matching the sext(a) +/- sext(b)
-> sext(a +/- b) pattern in some instances.
An example- the IR contains:
%unextendedA
%unextendedB
%subuAuB = unextendedA - unextendedB
%extA = extend A
%extB = extend B
%addeAeB = extA + extB
The problematic optimization will transform that into:
%unextendedA
%unextendedB
%subuAuB = unextendedA - unextendedB
%extA = extend A
%extB = extend B
%addeAeB = extend subuAuB ; Obviously not semantically equivalent to the
IR input.
This patch fixes that.
Patch by Drew Wock <drew.wock@sas.com> Differential Revision:
https://reviews.llvm.org/D65967
The file was addedllvm/test/Transforms/SeparateConstOffsetFromGEP/test-add-sub-separation.ll
The file was modifiedllvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
Commit ab974161ba699534f3e30b1f4b036eec9c33053c by sbc
[llvm-nm] Don't report "no symbols" error for files that contain symbols
Previously we were reporting this error if we were list no symbols which
is not the same thing as the file containing no symbols.
Also, always report the filename when printing errors.
This matches the GNU nm behaviour.
This a followup to https://reviews.llvm.org/D52810
Differential Revision: https://reviews.llvm.org/D72658
The file was addedllvm/test/tools/llvm-nm/X86/nm-no-symbols-local-only.yaml
The file was modifiedllvm/tools/llvm-nm/llvm-nm.cpp
The file was modifiedllvm/test/ThinLTO/X86/strong_non_prevailing.ll
The file was modifiedllvm/test/tools/llvm-nm/X86/nm-no-symbols.test
The file was modifiedllvm/test/ThinLTO/X86/empty-module.ll
Commit 859e379ffbbb40302926940b8c87fb7a99931612 by antiagainst
[mlir][spirv] Explicitly set the size of static arrays
The file was modifiedmlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp
Commit 12e479475a896f664fb721f98c2d6805185ac352 by Adrian Prantl
Rename DW_AT_LLVM_isysroot to DW_AT_LLVM_sysroot
This is a purely cosmetic change that is NFC in terms of the binary
output. I bugs me that I called the attribute DW_AT_LLVM_isysroot since
the "i" is an artifact of GCC command line option syntax
(-isysroot is in the category of -i options) and doesn't carry any
useful information otherwise.
This attribute only appears in Clang module debug info.
Differential Revision: https://reviews.llvm.org/D71722
The file was addedllvm/test/DebugInfo/X86/split-dwarf-sysroot.ll
The file was modifiedllvm/lib/IR/DebugInfoMetadata.cpp
The file was modifiedllvm/test/Bindings/llvm-c/debug_info.ll
The file was modifiedllvm/bindings/go/llvm/dibuilder.go
The file was modifiedclang/test/Modules/debug-info-moduleimport.m
The file was modifiedllvm/tools/llvm-c-test/debuginfo.c
The file was modifiedllvm/test/DebugInfo/X86/clang-module.ll
The file was modifiedllvm/include/llvm-c/DebugInfo.h
The file was modifiedllvm/lib/AsmParser/LLParser.cpp
The file was modifiedllvm/test/DebugInfo/X86/DIModule.ll
The file was modifiedclang/test/CodeGen/debug-nvptx.c
The file was modifiedllvm/test/CodeGen/X86/load-combine-dbg.ll
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
The file was modifiedllvm/include/llvm/IR/DIBuilder.h
The file was modifiedllvm/include/llvm/IR/DebugInfoMetadata.h
The file was modifiedllvm/test/Assembler/dicompileunit.ll
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
The file was modifiedllvm/lib/IR/DIBuilder.cpp
The file was modifiedllvm/lib/IR/LLVMContextImpl.h
The file was modifiedllvm/lib/IR/AsmWriter.cpp
The file was modifiedllvm/lib/IR/DebugInfo.cpp
The file was modifiedllvm/lib/Bitcode/Reader/MetadataLoader.cpp
The file was modifiedllvm/test/DebugInfo/X86/DIModuleContext.ll
The file was modifiedllvm/lib/Bitcode/Writer/BitcodeWriter.cpp
The file was addedclang/test/CodeGen/debug-info-sysroot.c
The file was modifiedllvm/test/Assembler/dimodule.ll
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
The file was modifiedllvm/unittests/IR/MetadataTest.cpp
The file was modifiedclang/lib/CodeGen/CGDebugInfo.cpp
Commit 03689fe97f2377a3b19864de98b5c14b7fbd85ab by francisvm
[perf-training] Ignore ' (in-process)' prefix from -###
After D69825, the output of clang -### when running in process can be
prefixed by ' (in-process)'. Skip it.
The file was modifiedclang/utils/perf-training/perf-helper.py
Commit 2754a67ba9e9e3fecd4c8f01a5a2c4ef286d206d by sbc
Revert "[llvm-nm] Don't report "no symbols" error for files that contain
symbols"
This reverts commit ab974161ba699534f3e30b1f4b036eec9c33053c.
This change broke several tests, and the pre-commit bot even warning me
that it would. Doh!
The file was removedllvm/test/tools/llvm-nm/X86/nm-no-symbols-local-only.yaml
The file was modifiedllvm/tools/llvm-nm/llvm-nm.cpp
The file was modifiedllvm/test/ThinLTO/X86/strong_non_prevailing.ll
The file was modifiedllvm/test/tools/llvm-nm/X86/nm-no-symbols.test
The file was modifiedllvm/test/ThinLTO/X86/empty-module.ll
Commit 932b5d6fcad183a5b1584dffc77c340bf0796efa by maskray
[test] Fix tests after D52810
The file was modifiedclang/test/CodeGen/thinlto_backend.ll
The file was modifiedclang/test/InterfaceStubs/inline.c
The file was modifiedclang/test/InterfaceStubs/externstatic.c
Commit a9f0025acd2235dccec51cf42d1e604675639343 by maskray
Reland "[llvm-nm] Don't report "no symbols" error for files that contain
symbols"
The file was modifiedllvm/test/ThinLTO/X86/strong_non_prevailing.ll
The file was addedllvm/test/tools/llvm-nm/X86/nm-no-symbols-local-only.yaml
The file was modifiedllvm/test/tools/llvm-nm/X86/nm-no-symbols.test
The file was modifiedclang/test/InterfaceStubs/function-template-specialization.cpp
The file was modifiedllvm/tools/llvm-nm/llvm-nm.cpp
The file was modifiedllvm/test/ThinLTO/X86/empty-module.ll
Commit ecfd6d3e84185127fb836d6fe62564456be3a9cd by Sanne.Wouda
[clang] Set function attributes on SEH filter functions correctly.
Summary: When compiling with -munwind-tables, the SEH filter funclet
needs the uwtable function attribute, which gets automatically added if
we use SetInternalFunctionAttributes.  The filter funclet is internal so
this seems appropriate.
Reviewers: rnk
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72786
The file was modifiedclang/test/CodeGen/exceptions-seh-finally.c
The file was modifiedclang/lib/CodeGen/CGException.cpp
The file was addedclang/test/CodeGenCXX/exceptions-seh-filter-uwtable.cpp
Commit 08f2b67d03ba8612c6ee384d0a69a34a55076903 by maskray
[test] Fix test/ELF/lto/thinlto-obj-path.ll after D52810
The file was modifiedlld/test/ELF/lto/thinlto-obj-path.ll
Commit 8fb29d4a507371224ee06a039f1c01e242099967 by riverriddle
[mlir] Replace AbstractOperation::classof with a ClassID instance.
Summary: This field is currently not used by anything, and using a
ClassID instance provides better support for more efficient classof.
Reviewers: mehdi_amini, nicolasvasilache
Reviewed By: mehdi_amini
Subscribers: merge_guards_bot, jpienaar, burmako, shauheen, antiagainst,
nicolasvasilache, arpith-jacob, mgester, lucyrfox, liufengdb,
llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72822
The file was modifiedmlir/include/mlir/IR/OpDefinition.h
The file was modifiedmlir/include/mlir/IR/OperationSupport.h
Commit c1873631d0a8f2acca4ab428a1e9abea844d97ff by kparzysz
[Hexagon] Refactor HexagonShuffle
The check() in HexagonShuffle has been decomposed into smaller steps. No
functionality change is intended with this commit.
The file was modifiedllvm/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp
The file was modifiedllvm/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.h
The file was addedtest/MC/Hexagon/PacketRules/restrict_slot1_aok.s