Commit
0ee1db2d1d7aab9e2736c664ebd27fa23919964e
by flo[X86] Try to avoid casts around logical vector ops recursively. Currently PromoteMaskArithemtic only looks at a single operation to skip casts. This means we miss cases where we combine multiple masks. This patch updates PromoteMaskArithemtic to try to recursively promote AND/XOR/AND nodes that terminate in truncates of the right size or constant vectors. Reviewers: craig.topper, RKSimon, spatel Reviewed By: RKSimon Differential Revision: https://reviews.llvm.org/D72524
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 | llvm/lib/Target/X86/X86ISelLowering.cpp |
 | llvm/test/CodeGen/X86/v8i1-masks.ll |
Commit
819421745c5c32c62ec8d632b66eae34f711e192
by michael.hliaoReorder targets in alphabetical order. NFC.
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 | llvm/lib/Target/LLVMBuild.txt |
Commit
13fa4e2e5ae6ab5403be19e24415e0c7a5569681
by richardPR42108 Consistently diagnose binding a reference template parameter to a temporary. We previously failed to materialize a temporary when performing an implicit conversion to a reference type, resulting in our thinking the argument was a value rather than a reference in some cases.
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 | clang/lib/Sema/SemaExprCXX.cpp |
 | clang/lib/Sema/SemaTemplate.cpp |
 | clang/test/SemaTemplate/temp_arg_nontype_cxx1z.cpp |
Commit
add2b7e44ada46f30715b5c48823a9e9e317e0c3
by richardList implicit operator== after implicit destructors in a vtable. Summary: We previously listed first declared members, then implicit operator=, then implicit operator==, then implicit destructors. Per discussion on https://github.com/itanium-cxx-abi/cxx-abi/issues/88, put the implicit equality comparison operators at the very end, after all special member functions. Reviewers: rjmccall Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D72897
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 | clang/lib/AST/VTableBuilder.cpp |
 | clang/test/CodeGenCXX/virtual-compare.cpp |
Commit
7a9fa76be7425b5a6fb3dfe7fc4f9e16892628cb
by richardUndo changes to release notes intended for the Clang 10 branch, not master.
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 | clang/docs/ReleaseNotes.rst |
Commit
d15fad2653d429efbf1a7c63c375530f8a1a1fa3
by eric[libc++][libc++abi] Fix or suppress failing tests in single-threaded builds. Fix a libc++abi test that was incorrectly checking for threading primitives even when threading was disabled. Additionally, temporarily XFAIL some module tests that fail because the <atomic> header is unsupported but still built as a part of the std module. To properly address this libc++ would either need to produce a different module.modulemap for single-threaded configurations, or it would need to make the <atomic> header not hard-error and instead be empty for single-threaded configurations
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 | libcxx/test/libcxx/modules/inttypes_h_exports.sh.cpp |
 | libcxx/test/libcxx/modules/cinttypes_exports.sh.cpp |
 | libcxx/test/libcxx/modules/cstdint_exports.sh.cpp |
 | libcxx/test/libcxx/modules/clocale_exports.sh.cpp |
 | libcxx/test/libcxx/modules/stdint_h_exports.sh.cpp |
 | libcxxabi/test/guard_test_basic.pass.cpp |
Commit
fc817b09e25d3b3e0a9cab77f59c5804ffcb6494
by aminim[mlir] NFC: Fix trivial typos in comments Differential Revision: https://reviews.llvm.org/D73012
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 | mlir/test/lib/TestDialect/TestPatterns.cpp |
 | mlir/docs/Dialects/Vector.md |
 | mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp |
 | mlir/include/mlir/IR/StandardTypes.h |
 | mlir/docs/ConversionToLLVMDialect.md |
 | mlir/lib/IR/AsmPrinter.cpp |
 | mlir/include/mlir/Dialect/SPIRV/SPIRVBase.td |
 | mlir/tools/mlir-tblgen/RewriterGen.cpp |
 | mlir/lib/Target/LLVMIR/ModuleTranslation.cpp |
 | mlir/lib/Dialect/VectorOps/VectorTransforms.cpp |
 | mlir/include/mlir/Dialect/LoopOps/LoopOps.td |
 | mlir/lib/IR/StandardTypes.cpp |
 | mlir/lib/Dialect/SPIRV/SPIRVLowering.cpp |
 | mlir/include/mlir/Support/STLExtras.h |
 | mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp |
 | mlir/lib/IR/Visitors.cpp |
 | mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td |
 | mlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp |
 | mlir/docs/ShapeInference.md |
 | mlir/test/Dialect/SPIRV/target-env.mlir |
 | mlir/lib/Transforms/LoopFusion.cpp |
 | mlir/tools/mlir-tblgen/LLVMIRIntrinsicGen.cpp |
Commit
eaab1bf21e1d6803fd217fe6052537fc33b06837
by i[StackColoring] Remap FixedStackPseudoSourceValue frame index referenced by MachineMemOperand StackColoring::remapInstructions() remaps MachineOperand frame index (e.g. %stack.1 -> %stack.0) but does not remap FixedStackPseudoSourceValue frame index (e.g. store 4 into %stack.1.ap2.i.i) referenced by MachineMemoryOperand. This can cause an assertion failure when LiveDebugValues references a dead stack object. It is difficult to craft a test case. -g, va_copy and stack-coloring are required. I can only reproduce it on ppc32.
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 | llvm/lib/CodeGen/StackColoring.cpp |
 | llvm/include/llvm/CodeGen/PseudoSourceValue.h |
 | llvm/test/CodeGen/PowerPC/stack-coloring-vararg.mir |
Commit
5e51f755421761b56453d756e5a89bbed784141a
by david.green[ARM] Favour post inc for MVE loops We were previously not necessarily favouring postinc for the MVE loads and stores, leading to extra code prior to the loop to set up the preinc. MVE in general can benefit from postinc (as we don't have unrolled loops), and certain instructions like the VLD2's only post-inc versions are available. Differential Revision: https://reviews.llvm.org/D70790
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 | llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp |
 | llvm/lib/Target/ARM/ARMTargetTransformInfo.h |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/mve-float-loops.ll |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/vector-arith-codegen.ll |
 | llvm/test/CodeGen/Thumb2/mve-gather-ptrs.ll |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/fast-fp-loops.ll |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/mve-tail-data-types.ll |
 | llvm/test/CodeGen/Thumb2/mve-vmla.ll |
 | llvm/test/CodeGen/Thumb2/mve-shifts-scalar.ll |
 | llvm/test/CodeGen/Thumb2/mve-vldst4.ll |
Commit
d6075726b90184c2f3ff111991e92b21ee6b1475
by david.green[ARM] MVE VLDn post inc tests. NFC
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 | llvm/test/CodeGen/Thumb2/mve-vld4-post.ll |
 | llvm/test/CodeGen/Thumb2/mve-vst4-post.ll |
 | llvm/test/CodeGen/Thumb2/mve-vst2-post.ll |
 | llvm/test/CodeGen/Thumb2/mve-intrinsics/vld24.ll |
 | llvm/test/CodeGen/Thumb2/mve-vld2-post.ll |
Commit
ff2e67a4f708e786b8c39f35756d843ed6a822e7
by david.green[ARM] MVE VLDn postinc This adds Post inc variants of the VLD2/4 and VST2/4 instructions in MVE. It uses the same mechanism/nodes as Neon, transforming the intrinsic+add pair into a ARMISD::VLD2_UPD, which gets selected to a post-inc instruction. The code to do that is mostly taken from the existing Neon code, but simplified as less variants are needed. It also fills in some getTgtMemIntrinsic for the arm.mve.vld2/4 instrinsics, which allow the nodes to have MMO's, calculated as the full length to the memory being loaded/stored. Differential Revision: https://reviews.llvm.org/D71194
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 | llvm/test/CodeGen/Thumb2/mve-vld2-post.ll |
 | llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp |
 | llvm/test/CodeGen/Thumb2/mve-vld4.ll |
 | llvm/include/llvm/IR/IntrinsicsARM.td |
 | llvm/test/CodeGen/Thumb2/mve-intrinsics/vld24.ll |
 | llvm/lib/Target/ARM/ARMISelLowering.cpp |
 | llvm/test/CodeGen/Thumb2/mve-multivec-spill.ll |
 | llvm/test/CodeGen/Thumb2/mve-vst4-post.ll |
 | llvm/test/CodeGen/Thumb2/mve-vld4-post.ll |
 | llvm/lib/Target/ARM/ARMInstrMVE.td |
 | llvm/test/CodeGen/Thumb2/mve-vst4.ll |
 | llvm/test/CodeGen/Thumb2/mve-vst2-post.ll |
 | llvm/test/CodeGen/Thumb2/mve-vld2.ll |
 | llvm/test/CodeGen/Thumb2/mve-vst2.ll |
Commit
345e8ed4fcfe5d0c8f457f0ff0096889aec3114f
by i[LLVMgold][test] Fix llvm-nm test after D72658 Differential Revision: https://reviews.llvm.org/D73014
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 | llvm/test/tools/gold/X86/thinlto.ll |
Commit
11e8e324441a875f1346972384be8b5609aa10c8
by grimar[llvm-mc] - Produce R_X86_64_PLT32 relocation for branches with JCC opcodes too. The idea is to produce R_X86_64_PLT32 instead of R_X86_64_PC32 for branches. It fixes https://bugs.llvm.org/show_bug.cgi?id=44397. This patch teaches MC to do that for JCC (jump if condition is met) instructions. The new behavior matches modern GNU as. It is similar to D43383, which did the same for "call/jmp foo", but missed JCC cases. Differential revision: https://reviews.llvm.org/D72831
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 | llvm/test/MC/ELF/basic-elf-64.s |
 | llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp |
Commit
854f7be20a0cb1a95671a16d6cc8200107ee25f4
by i[test] Simplify CodeGen/PowerPC/stack-coloring-vararg.mir
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 | llvm/test/CodeGen/PowerPC/stack-coloring-vararg.mir |
Commit
93175a5caa08360ca60b417cc04c094e1ed05c76
by sjoerd.meijer[IndVarSimplify][LoopUtils] rewriteLoopExitValues. NFCI This moves `rewriteLoopExitValues()` from IndVarSimplify to LoopUtils thus making it a generic loop utility function. This allows to rewrite loop exit values by just calling this function without running the whole IndVarSimplify pass. We use this in D72714 to rematerialise the iteration count in exit blocks, so that we can clean-up loop update expressions inside the hardware-loops later. Differential Revision: https://reviews.llvm.org/D72602
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 | llvm/lib/Transforms/Utils/LoopUtils.cpp |
 | llvm/include/llvm/Transforms/Utils/LoopUtils.h |
 | llvm/lib/Transforms/Scalar/IndVarSimplify.cpp |
Commit
547530cc6a82879c9f777d9c1035a8f0ebcb3cfe
by grimar[llvm-objdump] - Fix the indentation when printing dynamic tags. We have a bug currently: printed tag names might overlap the value column. It happens for MIPS now. This patch adds a logic to calculate the size of indentation on fly to fix such issues. Differential revision: https://reviews.llvm.org/D72838
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 | llvm/test/tools/llvm-objdump/elf-dynamic-section-machine-specific.test |
 | llvm/tools/llvm-objdump/ELFDump.cpp |
 | llvm/test/tools/llvm-objdump/elf-dynamic-section.test |
Commit
84c4c87e04a48628259e920780623f427a9fd9b1
by SourabhSingh.TomarRecommit "[DWARF5][DebugInfo]: Added support for DebugInfo generation for auto return type for C++ member functions." Summary: This was reverted in 328e0f3dcac52171b8cdedeaba22c98e7fbb75ea due to chromium bot failure. This revision addresses that case. Original commit message: Summary: This patch will provide support for auto return type for the C++ member functions. Before this return type of the member function is deduced and stored in the DIE. This patch includes llvm side implementation of this feature. Patch by: Awanish Pandey <Awanish.Pandey@amd.com> Reviewers: dblaikie, aprantl, shafik, alok, SouraVX, jini.susan.george Reviewed by: dblaikie Differential Revision: https://reviews.llvm.org/D70524
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 | llvm/test/DebugInfo/X86/debug-info-auto-return.ll |
 | llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp |
Commit
10357e1c89b370a18500a8a8d69a68ab72db979e
by evgueni.brevnov[LoopUtils] Better accuracy for getLoopEstimatedTripCount. Summary: Current implementation of getLoopEstimatedTripCount returns 1 iteration less than it should. The reason is that in bottom tested loop first iteration is executed before first back branch is taken. For example for loop with !{!"branch_weights", i32 1 // taken, i32 1 // exit} metadata getLoopEstimatedTripCount gives 1 while actual number of iterations is 2. Reviewers: Ayal, fhahn Reviewed By: Ayal Subscribers: mgorny, hiraditya, zzheng, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D71990
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 | llvm/test/Transforms/LoopUnroll/peel-loop-pgo.ll |
 | llvm/test/Transforms/LoopUnroll/peel-loop-conditions-pgo-1.ll |
 | llvm/test/Transforms/LoopUnroll/peel-loop-pgo-deopt-idom.ll |
 | llvm/test/Transforms/LoopUnroll/peel-loop-pgo-deopt-idom-2.ll |
 | llvm/lib/Transforms/Utils/LoopUtils.cpp |
 | llvm/test/Transforms/LoopUnroll/peel-loop-pgo-deopt.ll |
Commit
952a540b21993e44088ff2c345df884caabbb8c0
by david.spickett[test] On Mac, don't try to use result of sysctl command if calling it failed. If sysctl is not found at all, let the usual exception propogate so that the user can fix their env. If it fails because of the permissions required to read the property then print a warning and continue. Differential Revision: https://reviews.llvm.org/D72278
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 | llvm/test/lit.cfg.py |
Commit
cfe97681cdbf8c8c23caad80adeb6551911ccd6e
by evgueni.brevnov[NFC][LoopUtils] Minor change in comment according to review D71990.
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 | llvm/lib/Transforms/Utils/LoopUtils.cpp |
Commit
8cba99e2aa937b8459e74e2d22d4e2c9d4bdc5d5
by sjoerd.meijer[ARM][MVE] Tail-Predication: rematerialise iteration count in exit blocks This patch uses helper function rewriteLoopExitValues that is refactored in D72602 to rematerialise the iteration count in exit blocks, so that we can clean-up loop update expressions inside the hardware-loops later in ARMLowOverheadLoops, which is necessary to get actual performance gains for tail-predicated loops. Differential Revision: https://reviews.llvm.org/D72714
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 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/mve-tail-data-types.ll |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/vector-arith-codegen.ll |
 | llvm/lib/Target/ARM/MVETailPredication.cpp |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/cond-vector-reduce-mve-codegen.ll |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/fast-fp-loops.ll |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/vector-reduce-mve-tail.ll |
Commit
06e73f071ae12dc83c102ddecdb939dea880e588
by pavel[lldb/DWARF] Change how we construct a llvm::DWARFContext Summary: The goal of this patch is two-fold. First, it fixes a use-after-free in the construction of the llvm DWARFContext. This happened because the construction code was throwing away the lldb DataExtractors it got while reading the sections (unlike their llvm counterparts, these are also responsible for memory ownership). In most cases this did not matter, because the sections are just slices of the mmapped file data. But this isn't the case for compressed elf sections, in which case the section is decompressed into a heap buffer. A similar thing also happen with object files which are loaded from process memory. The second goal is to make it explicit which sections go into the llvm DWARFContext -- any access to the sections through both DWARF parsers carries a risk of parsing things twice, so it's better if this is a conscious decision. Also, this avoids loading completely irrelevant sections (e.g. .text). At present, the only section that needs to be present in the llvm DWARFContext is the debug_line_str. Using it through both APIs is not a problem, as there is no parsing involved. The first goal is achieved by loading the sections through the existing lldb DWARFContext APIs, which already do the caching. The second by explicitly enumerating the sections we wish to load. Reviewers: JDevlieghere, aprantl Subscribers: lldb-commits Tags: #lldb Differential Revision: https://reviews.llvm.org/D72917
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 | lldb/test/Shell/SymbolFile/DWARF/debug-names-compressed.cpp |
 | lldb/source/Plugins/SymbolFile/DWARF/DWARFContext.cpp |
Commit
eaa4548459026707c909884219b5a5ca56678560
by llvm-dev[X86][SSE] Add PACKSS SimplifyMultipleUseDemandedBits 'sign bit' handling. Attempt to use SimplifyMultipleUseDemandedBits to simplify PACKSS if we're only after the sign bit.
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 | llvm/test/CodeGen/X86/vec-strict-inttofp-256.ll |
 | llvm/test/CodeGen/X86/vec_int_to_fp.ll |
 | llvm/lib/Target/X86/X86ISelLowering.cpp |
 | llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll |
Commit
61b563408012d17e7e619dedfefac5f38dc2d1d9
by hokein.wu[clangd] Remove a stale FIXME, NFC.
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 | clang-tools-extra/clangd/refactor/Rename.cpp |
Commit
514e3c3694a3457ea5c1b89420246fd845791afd
by steveireAdd missing tests for parent traversal
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 | clang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp |
Commit
122443a950521c5d99a0d0479daf57fbd1de2ac2
by steveireCompare traversal for memoization before bound nodes container
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 | clang/lib/ASTMatchers/ASTMatchFinder.cpp |
Commit
1f946ee2faba5395a04a081fbe561e3d91aa2b3d
by kadircet[clang][CodeComplete] Propogate printing policy to FunctionDecl Summary: Printing policy was not propogated to functiondecls when creating a completion string which resulted in canonical template parameters like `foo<type-parameter-0-0>`. This patch propogates printing policy to those as well. Fixes https://github.com/clangd/clangd/issues/76 Reviewers: ilya-biryukov Subscribers: jkorous, arphaman, usaxena95, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D72715
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 | clang/test/CodeCompletion/ctor-signature.cpp |
 | clang/lib/Sema/SemaCodeComplete.cpp |
 | clang-tools-extra/clangd/unittests/CodeCompleteTests.cpp |
Commit
af7e1588727c691ae07e286c94dbcbf31060e876
by evgueni.brevnov[LV] Vectorizer should adjust trip count in profile information Summary: Vectorized loop processes VFxUF number of elements in one iteration thus total number of iterations decreases proportionally. In addition epilog loop may not have more than VFxUF - 1 iterations. This patch updates profile information accordingly. Reviewers: hsaito, Ayal, fhahn, reames, silvas, dcaballe, SjoerdMeijer, mkuper, DaniilSuchkov Reviewed By: Ayal, DaniilSuchkov Subscribers: fedor.sergeev, hiraditya, rkruppe, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D67905
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 | llvm/include/llvm/Transforms/Utils/LoopUtils.h |
 | llvm/lib/Transforms/Vectorize/LoopVectorize.cpp |
 | llvm/test/Transforms/LoopVectorize/tripcount.ll |
 | llvm/test/Transforms/LoopVectorize/check-prof-info.ll |
 | llvm/lib/Transforms/Utils/LoopUtils.cpp |
Commit
8248190a730cd62850afe9bef731ce6726778b4b
by steveireFix clang-formatting for recent commits
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 | clang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp |
 | clang/lib/ASTMatchers/ASTMatchFinder.cpp |
Commit
b7af1bfa6e31a2a896e8a94a7f086914719e7d5d
by pavel[lldb/DWARF] Simplify DWARFDebugInfoEntry::LookupAddress Summary: This method was doing a lot more than it's only caller needed (DWARFDIE::LookupDeepestBlock) needed, so I inline it into the caller, and remove any code which is not actually used. This includes code for searching for the deepest function, and the code for working around incomplete DW_AT_low_pc/high_pc attributes on a compile unit DIE (modern compiler get this right, and this method is called on function DIEs anyway). This also improves our llvm consistency, as llvm::DWARFDebugInfoEntry is just a very simple struct with no nontrivial logic. Reviewers: JDevlieghere, aprantl Subscribers: lldb-commits Tags: #lldb Differential Revision: https://reviews.llvm.org/D72920
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 | lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.h |
 | lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.cpp |
 | lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.cpp |
Commit
39f1335486eae355b2259d59549382e5cee9e38f
by pavelMake SymbolFileDWARF::ParseLineTable use std::sort instead of insertion sort Summary: Motivation: When setting breakpoints in certain projects line sequences are frequently being inserted out of order. Rather than inserting sequences one at a time into a sorted line table, store all the line sequences as we're building them up and sort and flatten afterwards. Reviewers: jdoerfert, labath Reviewed By: labath Subscribers: teemperor, labath, mgrang, JDevlieghere, lldb-commits Tags: #lldb Differential Revision: https://reviews.llvm.org/D72909
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 | lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp |
 | lldb/include/lldb/Symbol/LineTable.h |
 | lldb/source/Symbol/LineTable.cpp |
Commit
9a3ff478235ccbda23df01a99c5a86eedba54cac
by steveireFix the invisible-traversal to ignore more nodes
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 | clang/unittests/AST/ASTTraverserTest.cpp |
 | clang/lib/AST/Expr.cpp |
Commit
27df2d9f556c3199601ecd1f15c1b37cd49ed9df
by pavel[lldb] Don't process symlinks deep inside DWARFUnit Summary: This code is handling debug info paths starting with /proc/self/cwd, which is one of the mechanisms people use to obtain "relocatable" debug info (the idea being that one starts the debugger with an appropriate cwd and things "just work"). Instead of resolving the symlinks inside DWARFUnit, we can do the same thing more elegantly by hooking into the existing Module path remapping code. Since llvm::DWARFUnit does not support any similar functionality, doing things this way is also a step towards unifying llvm and lldb dwarf parsers. Reviewers: JDevlieghere, aprantl, clayborg, jdoerfert Subscribers: lldb-commits Tags: #lldb Differential Revision: https://reviews.llvm.org/D71770
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 | lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp |
 | lldb/include/lldb/Core/Module.h |
 | lldb/packages/Python/lldbsuite/test/functionalities/breakpoint/comp_dir_symlink/TestCompDirSymLink.py |
 | lldb/source/Core/CoreProperties.td |
 | lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp |
 | lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp |
 | lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFProperties.td |
 | lldb/include/lldb/Core/ModuleList.h |
 | lldb/source/Core/ModuleList.cpp |
 | lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp |
 | lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.h |
Commit
468ca490c6030462066f8e731902d81bab11c356
by pavel[lldb] Allow loading of minidumps with no process id Summary: Normally, on linux we retrieve the process ID from the LinuxProcStatus stream (which is just the contents of /proc/%d/status pseudo-file). However, this stream is not strictly required (it's a breakpad extension), and we are encountering a fair amount of minidumps which do not have it present. It's not clear whether this is the case with all these minidumps, but the two known situations where this stream can be missing are: - /proc filesystem not mounted (or something to that effect) - process crashing after exhausting (almost) all file descriptors (so the minidump writer may not be able to open the /proc file) Since this is a corner case which will become less and less relevant (crashpad-generated minidumps should not suffer from this problem), I work around this problem by hardcoding the PID to 1 in these cases. The same thing is done by the gdb plugin when talking to a stub which does not report a process id (e.g. a hardware probe). Reviewers: jingham, clayborg Subscribers: markmentovai, lldb-commits Tags: #lldb Differential Revision: https://reviews.llvm.org/D70238
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 | lldb/source/Plugins/Process/minidump/ProcessMinidump.cpp |
 | lldb/test/Shell/Minidump/no-process-id.yaml |
Commit
7e717b3990554f0fde43e3747529477a70072cfe
by andrzej.warzynski[AArch64][SVE] Extend int_aarch64_sve_ld1_gather_imm The ACLE distinguishes between the following addressing modes for gather loads: * "scalar base, vector offset", and * "vector base, scalar offset". For the "vector base, scalar offset" case, the `int_aarch64_sve_ld1_gather_imm` intrinsic was added in 79f2422d. Currently, that intrinsic assumes that the scalar offset is passed as an immediate. As a result, it does not cater for cases where scalar offset is stored in a register. In this patch `int_aarch64_sve_ld1_gather_imm` is extended so that all cases are covered: * `int_aarch64_sve_ld1_gather_imm` is renamed as `int_aarch64_sve_ld1_gather_scalar_offset` * new DAG combine rules are added for GLD1_IMM for scenarios where the offset is a non-immediate scalar or an out-of-range immediate * sve-intrinsics-gather-loads-vector-base.ll is renamed as sve-intrinsics-gather-loads-vector-base-imm-offset.ll * sve-intrinsics-gather-loads-vector-base-scalar-offset.ll is added to test file for non-immediate offsets Similar changes are made for scatter store intrinsics. Reviewed By: sdesmalen, efriedma Differential Revision: https://reviews.llvm.org/D71773
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 | llvm/test/CodeGen/AArch64/sve-intrinsics-scatter-stores-vector-base-scalar-offset.ll |
 | llvm/test/CodeGen/AArch64/sve-gather-scatter-dag-combine.ll |
 | llvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-vector-base-imm-offset.ll |
 | llvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-vector-base.ll |
 | llvm/lib/Target/AArch64/AArch64ISelLowering.cpp |
 | llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td |
 | llvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-vector-base-scalar-offset.ll |
 | llvm/test/CodeGen/AArch64/sve-intrinsics-scatter-stores-vector-base-imm-offset.ll |
 | llvm/include/llvm/IR/IntrinsicsAArch64.td |
 | llvm/test/CodeGen/AArch64/sve-intrinsics-scatter-stores-vector-base.ll |
Commit
8b2eb7c494b296deb1792eed75bb56024bbf1e2b
by csigg[mlir] Add in-dialect lowering of gpu.all_reduce. Reviewers: ftynse, nicolasvasilache, herhut Reviewed By: ftynse, herhut Subscribers: liufengdb, aartbik, herhut, merge_guards_bot, mgorny, mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72129
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 | mlir/include/mlir/Dialect/GPU/GPUOps.td |
 | mlir/lib/Dialect/GPU/CMakeLists.txt |
 | mlir/test/lib/Transforms/TestAllReduceLowering.cpp |
 | mlir/include/mlir/IR/Block.h |
 | mlir/lib/IR/Block.cpp |
 | mlir/test/Dialect/GPU/all-reduce.mlir |
 | mlir/lib/Dialect/GPU/Transforms/AllReduceLowering.cpp |
 | mlir/include/mlir/Dialect/GPU/Passes.h |
 | mlir/test/lib/Transforms/CMakeLists.txt |
Commit
01bfb366acf3650b91a80b922f2fc7b6e660f686
by yikong[llvm-profdata] Fix hint message since argument format has changed "-sample" option is now changed to "--sample".
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 | llvm/tools/llvm-profdata/llvm-profdata.cpp |
 | llvm/test/tools/llvm-profdata/text-format-errors.test |
Commit
f3e73e88fdd63e3342977873a5f2c3f870a2497a
by simon.tatham[ARM,MVE] Fix confusing MC names for MVE VMINA/VMAXA insns. Summary: A recent commit accidentally defined names like `MVE_VMAXAs8` as instances of the multiclass `MVE_VMINA`, and vice versa. This has no effect on the test suite, because nothing directly refers to those instruction names (the isel patterns are generated in Tablegen using `!cast<Instruction>(NAME)` inside a lower-level multiclass). But it means that `llvm-mc -show-inst` was listing VMAXA as VMINA, and it would also affect any further draft code gen patches that use those instruction ids. Reviewers: MarkMurrayARM, dmgreen, miyuki, ostannard Reviewed By: dmgreen Subscribers: kristof.beyls, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D73034
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 | llvm/lib/Target/ARM/ARMInstrMVE.td |
Commit
f63f5a228f30199ed04f9a862e6125ccb977e530
by zinenko[mlir] clarify LangRef wording around control flow in regions It was unclear what "exiting a region" meant in the existing formulation. Phrase it in terms of control flow transfer to the operation enclosing the region. Discussion: https://groups.google.com/a/tensorflow.org/d/msg/mlir/73d2O8gjTuA/xVj1KoCTBAAJ
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 | mlir/docs/LangRef.md |
Commit
22447a61d405a9e279c7dad72b342dcc6e8b1b4b
by Raphael Isemann[lldb] Mark the implicit copy constructor as deleted when a move constructor is provided. Summary: CXXRecordDecls that have a move constructor but no copy constructor need to have their implicit copy constructor marked as deleted (see C++11 [class.copy]p7, p18) Currently we don't do that when building an AST with ClangASTContext which causes Sema to realise that the AST is malformed and asserting when trying to create an implicit copy constructor for us in the expression: ``` Assertion failed: ((data().DefaultedCopyConstructorIsDeleted || needsOverloadResolutionForCopyConstructor()) && "Copy constructor should not be deleted"), function setImplicitCopyConstructorIsDeleted, file include/clang/AST/DeclCXX.h, line 828. ``` In the test case there is a class `NoCopyCstr` that should have its copy constructor marked as deleted (as it has a move constructor). When we end up trying to tab complete in the `IndirectlyDeletedCopyCstr` constructor, Sema realises that the `IndirectlyDeletedCopyCstr` has no implicit copy constructor and tries to create one for us. It then realises that `NoCopyCstr` also has no copy constructor it could find via lookup. However because we haven't marked the FieldDecl as having a deleted copy constructor the `needsOverloadResolutionForCopyConstructor()` returns false and the assert fails. `needsOverloadResolutionForCopyConstructor()` would return true if during the time we added the `NoCopyCstr` FieldDecl to `IndirectlyDeletedCopyCstr` we would have actually marked it as having a deleted copy constructor (which would then mark the copy constructor of `IndirectlyDeletedCopyCstr ` as needing overload resolution and Sema is happy). This patch sets the correct mark when we complete our CXXRecordDecls (which is the time when we know whether a copy constructor has been declared). In theory we don't have to do this if we had a Sema around when building our debug info AST but at the moment we don't have this so this has to do the job for now. Reviewers: shafik Reviewed By: shafik Subscribers: aprantl, JDevlieghere, lldb-commits Tags: #lldb Differential Revision: https://reviews.llvm.org/D72694
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 | lldb/packages/Python/lldbsuite/test/commands/expression/deleting-implicit-copy-constructor/TestDeletingImplicitCopyConstructor.py |
 | lldb/source/Symbol/ClangASTContext.cpp |
 | lldb/packages/Python/lldbsuite/test/commands/expression/deleting-implicit-copy-constructor/main.cpp |
 | lldb/packages/Python/lldbsuite/test/commands/expression/completion-crash1/TestCompletionCrash1.py |
 | lldb/packages/Python/lldbsuite/test/commands/expression/completion-crash1/main.cpp |
 | lldb/unittests/Symbol/TestClangASTContext.cpp |
Commit
de34b54edce4b7b4e4a68a02fae10283b3e2d7ea
by dfukalov[SCEV] Swap guards estimation sequence. NFC Summary: Loop unroll spends a lot of time in SCEVs processing in case when a function contains hundreds of simple 'for' loops with a quite complex arrays indexes like for (int i = 0; i < 8; ++i) { for (int j = 0; j < 32; ++j) { C[j*8+i] = B[j*32+i+128] + A[i*64+128]; } } for (int i = 0; i < 8; ++i) { for (int j = 0; j < 8; ++j) { for (int k = 0; k < 32; ++k) { D[k*64+i*8+j] = D[k*64+i*8+j] + E[i+16] * C[k*8+j+256]; } } } The patch improves loop unroll speed since isLoopBackedgeGuardedByCond takes much less time than isLoopEntryGuardedByCond in the edge case. Reviewers: skatkov, sanjoy, mkazantsev Reviewed By: sanjoy Subscribers: fhahn, hiraditya, javed.absar, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72929
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 | llvm/lib/Analysis/ScalarEvolution.cpp |
Commit
da9c93f330e0e4bb12972ee7c67229c36943a0c1
by spatel[InstSimplify] fold select of vector constants that include undef elements As mentioned in D72643, we'd like to be able to assert that any select of equivalent constants has been removed before we're deep into InstCombine. But there's a loophole in that assertion for vectors with undef elements that don't match exactly. This patch should close that gap. If we have undefs, we can't safely propagate those unless both constants elements for that lane are undef. Differential Revision: https://reviews.llvm.org/D72958
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 | llvm/lib/Analysis/InstructionSimplify.cpp |
 | llvm/test/Transforms/InstSimplify/select.ll |
Commit
65bab53afb8be61cddae4d8a08dd3d9572de1f66
by Raphael Isemann[lldb][NFC] Add test for iterator invalidation during code completion.
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 | lldb/packages/Python/lldbsuite/test/commands/expression/completion-crash-invalid-iterator/main.cpp |
 | lldb/packages/Python/lldbsuite/test/commands/expression/completion-crash-invalid-iterator/Makefile |
 | lldb/packages/Python/lldbsuite/test/commands/expression/completion-crash-invalid-iterator/TestInvalidIteratorCompletionCrash.py |
Commit
5f6dfa800e0b9c337921e188bd171b9765bfbe89
by epastor[ms] [llvm-ml] Add placeholder for llvm-ml, based on llvm-mc As discussed on the mailing list, I plan to introduce an ml-compatible MASM assembler as part of providing more of the Windows build tools. This will be similar to llvm-mc, but with different command-line parameters. This placeholder is purely a stripped-down version of llvm-mc; we'll eventually add support for the Microsoft-style command-line flags, and back it with a MASM parser. Relanding this revision after fixing ARM-compatibility issues. Reviewers: rnk, thakis, RKSimon Reviewed By: thakis, RKSimon Differential Revision: https://reviews.llvm.org/D72679
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 | llvm/tools/llvm-ml/llvm-ml.cpp |
 | llvm/tools/llvm-ml/CMakeLists.txt |
 | llvm/utils/gn/secondary/llvm/test/BUILD.gn |
 | llvm/tools/llvm-ml/Disassembler.h |
 | llvm/test/tools/llvm-ml/basic.test |
 | llvm/test/tools/llvm-ml/run.test |
 | llvm/tools/llvm-ml/Disassembler.cpp |
 | llvm/test/CMakeLists.txt |
 | llvm/utils/gn/secondary/llvm/tools/llvm-ml/BUILD.gn |
Commit
b10a0eb04adfc4186cc6198cf8231358b2b04d89
by mark.murray[ARM][MVE][Intrinsics] Take abs() of VMINNMAQ, VMAXNMAQ intrinsics' first arguments. Summary: Fix VMINNMAQ, VMAXNMAQ intrinsics; BOTH arguments have the absolute values taken. Reviewers: dmgreen, simon_tatham Subscribers: kristof.beyls, hiraditya, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D72830
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 | clang/test/CodeGen/arm-mve-intrinsics/vmaxnmaq.c |
 | llvm/test/CodeGen/Thumb2/mve-intrinsics/vminnmaq.ll |
 | llvm/lib/Target/ARM/ARMInstrMVE.td |
 | llvm/test/CodeGen/Thumb2/mve-intrinsics/vmaxnmaq.ll |
 | clang/test/CodeGen/arm-mve-intrinsics/vminnmaq.c |
 | clang/include/clang/Basic/arm_mve.td |
Commit
46b9563cf68a8a094276b471632fa15eec954d53
by gchatelet[Alignment][NFC] Use Align with CreateElementUnorderedAtomicMemCpy Summary: This is patch is part of a series to introduce an Alignment type. See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this patch for the introduction of the type: https://reviews.llvm.org/D64790 Reviewers: courbet, nicolasvasilache Subscribers: hiraditya, jfb, mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst, csigg, arpith-jacob, mgester, lucyrfox, herhut, liufengdb, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D73041
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 | llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp |
 | llvm/lib/IR/IRBuilder.cpp |
 | llvm/include/llvm/IR/IRBuilder.h |
Commit
03c2a59cd696135d79528d39e8e82ee59c1fcf97
by jonathanchesterfield[libomptarget] Implement smid for amdgcn Summary: [libomptarget] Implement smid for amdgcn Implementation is in a new file as it uses an intrinsic with complicated encoding that warranted substantial comments. Reviewers: jdoerfert, grokos, ABataev, ronlieb Reviewed By: jdoerfert Subscribers: jvesely, mgorny, openmp-commits Tags: #openmp Differential Revision: https://reviews.llvm.org/D72956
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 | openmp/libomptarget/deviceRTLs/amdgcn/src/amdgcn_smid.hip |
 | openmp/libomptarget/deviceRTLs/amdgcn/CMakeLists.txt |
Commit
6ccebe004446b2b7362f96dd5cf7cbc2ed3facde
by epastorFix build - removing legacy target reference.
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 | llvm/tools/llvm-ml/CMakeLists.txt |
 | llvm/utils/gn/secondary/llvm/tools/llvm-ml/BUILD.gn |
Commit
24b7b99b7d68e1a234078eff639ccfbb7661eee5
by Milos.Stojanovic[llvm-exegesis][NFC] Disassociate snippet generators from benchmark runners The addition of `inverse_throughput` mode highlighted the disjointedness of snippet generators and benchmark runners because it used the `UopsSnippetGenerator` with the `LatencyBenchmarkRunner`. To keep the code consistent tie the snippet generators to parallelization/serialization rather than their benchmark runners. Renaming `LatencySnippetGenerator` -> `SerialSnippetGenerator`. Renaming `UopsSnippetGenerator` -> `ParallelSnippetGenerator`. Differential Revision: https://reviews.llvm.org/D72928
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 | llvm/tools/llvm-exegesis/lib/Mips/Target.cpp |
 | llvm/unittests/tools/llvm-exegesis/Mips/SnippetGeneratorTest.cpp |
 | llvm/tools/llvm-exegesis/lib/Uops.h |
 | llvm/tools/llvm-exegesis/lib/Latency.cpp |
 | llvm/tools/llvm-exegesis/lib/Analysis.cpp |
 | llvm/unittests/tools/llvm-exegesis/X86/SnippetRepetitorTest.cpp |
 | llvm/tools/llvm-exegesis/lib/Target.h |
 | llvm/tools/llvm-exegesis/lib/LatencyBenchmarkRunner.cpp |
 | llvm/unittests/tools/llvm-exegesis/X86/SnippetGeneratorTest.cpp |
 | llvm/unittests/tools/llvm-exegesis/X86/TestBase.h |
 | llvm/tools/llvm-exegesis/lib/X86/Target.cpp |
 | llvm/tools/llvm-exegesis/lib/LatencyBenchmarkRunner.h |
 | llvm/tools/llvm-exegesis/lib/UopsBenchmarkRunner.h |
 | llvm/tools/llvm-exegesis/lib/CMakeLists.txt |
 | llvm/tools/llvm-exegesis/lib/ParallelSnippetGenerator.cpp |
 | llvm/tools/llvm-exegesis/lib/Uops.cpp |
 | llvm/tools/llvm-exegesis/lib/SerialSnippetGenerator.cpp |
 | llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp |
 | llvm/tools/llvm-exegesis/lib/PowerPC/Target.cpp |
 | llvm/tools/llvm-exegesis/lib/SerialSnippetGenerator.h |
 | llvm/tools/llvm-exegesis/lib/Latency.h |
 | llvm/tools/llvm-exegesis/lib/ParallelSnippetGenerator.h |
 | llvm/tools/llvm-exegesis/lib/Target.cpp |
 | llvm/tools/llvm-exegesis/lib/UopsBenchmarkRunner.cpp |
Commit
9ecfaad7573bdc6725cc717cb79c9b0a32f9765a
by llvmgnsyncbot[gn build] Port 24b7b99b7d6
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 | llvm/utils/gn/secondary/llvm/tools/llvm-exegesis/lib/BUILD.gn |
Commit
7bee94410ce265833695128dfad7fbd7a8eef6ba
by spatel[InstCombine] form copysign from select of FP constants (PR44153) This should be the last step needed to solve the problem in the description of PR44153: https://bugs.llvm.org/show_bug.cgi?id=44153 If we're casting an FP value to int, testing its signbit, and then choosing between a value and its negated value, that's a complicated way of saying "copysign": (bitcast X) < 0 ? -TC : TC --> copysign(TC, X) Differential Revision: https://reviews.llvm.org/D72643
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 | llvm/test/Transforms/InstCombine/select.ll |
 | llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp |
Commit
abd0ab389ee3351dc577a08f939493b67ce39f32
by thomasp[FileCheck] Clean and improve unit tests Summary: Clean redundant unit test checks (codepath already tested elsewhere) and add a few missing checks for existing numeric substitution and match logic. Reviewers: jhenderson, jdenny, probinson, grimar, arichardson, rnk Reviewed By: jhenderson Subscribers: llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72912
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 | llvm/unittests/Support/FileCheckTest.cpp |
Commit
7fee4fed4c75c13d0cec7ff3a043e0313a3abc55
by sidneymAdd support for Linux/Musl ABI Differential revision: https://reviews.llvm.org/D72701 The patch adds a new option ABI for Hexagon. It primary deals with the way variable arguments are passed and is use in the Hexagon Linux Musl environment. If a callee function has a variable argument list, it must perform the following operations to set up its function prologue: 1. Determine the number of registers which could have been used for passing unnamed arguments. This can be calculated by counting the number of registers used for passing named arguments. For example, if the callee function is as follows: int foo(int a, ...){ ... } ... then register R0 is used to access the argument ' a '. The registers available for passing unnamed arguments are R1, R2, R3, R4, and R5. 2. Determine the number and size of the named arguments on the stack. 3. If the callee has named arguments on the stack, it should copy all of these arguments to a location below the current position on the stack, and the difference should be the size of the register-saved area plus padding (if any is necessary). The register-saved area constitutes all the registers that could have been used to pass unnamed arguments. If the number of registers forming the register-saved area is odd, it requires 4 bytes of padding; if the number is even, no padding is required. This is done to ensure an 8-byte alignment on the stack. For example, if the callee is as follows: int foo(int a, ...){ ... } ... then the named arguments should be copied to the following location: current_position - 5 (for R1-R5) * 4 (bytes) - 4 (bytes of padding) If the callee is as follows: int foo(int a, int b, ...){ ... } ... then the named arguments should be copied to the following location: current_position - 4 (for R2-R5) * 4 (bytes) - 0 (bytes of padding) 4. After any named arguments have been copied, copy all the registers that could have been used to pass unnamed arguments on the stack. If the number of registers is odd, leave 4 bytes of padding and then start copying them on the stack; if the number is even, no padding is required. This constitutes the register-saved area. If padding is required, ensure that the start location of padding is 8-byte aligned. If no padding is required, ensure that the start location of the on-stack copy of the first register which might have a variable argument is 8-byte aligned. 5. Decrement the stack pointer by the size of register saved area plus the padding. For example, if the callee is as follows: int foo(int a, ...){ ... } ; ... then the decrement value should be the following: 5 (for R1-R5) * 4 (bytes) + 4 (bytes of padding) = 24 bytes The decrement should be performed before the allocframe instruction. Increment the stack-pointer back by the same amount before returning from the function.
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 | llvm/test/CodeGen/Hexagon/vacopy.ll |
 | llvm/test/CodeGen/Hexagon/vararg.ll |
 | llvm/lib/Target/Hexagon/HexagonISelLowering.cpp |
 | llvm/test/CodeGen/Hexagon/vararg-deallocate-sp.ll |
 | llvm/test/CodeGen/Hexagon/vararg_double_onstack.ll |
 | llvm/lib/Target/Hexagon/HexagonISelLowering.h |
 | llvm/lib/Target/Hexagon/HexagonSubtarget.h |
 | llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp |
 | llvm/lib/Target/Hexagon/HexagonMachineFunctionInfo.h |
 | llvm/lib/Target/Hexagon/HexagonFrameLowering.h |
 | llvm/test/CodeGen/Hexagon/vararg_align_check.ll |
 | llvm/lib/Target/Hexagon/HexagonSubtarget.cpp |
 | llvm/test/CodeGen/Hexagon/vararg-linux-abi.ll |
 | llvm/test/CodeGen/Hexagon/vararg_named.ll |
Commit
3de9a5db629ac9d633576513d025a8f038a3cdec
by hokein.wu[clangd] Avoid redundant testcases in rename unittest, NFC. Reviewers: kadircet Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D73035
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 | clang-tools-extra/clangd/refactor/Rename.cpp |
 | clang-tools-extra/clangd/unittests/RenameTests.cpp |
Commit
4c9d6914453d970b7b8202b7efd7524b2f0a72ac
by martinclang-format: [JS] fix `??` opreator wrapping. Summary: clang-format currently treats the nullish coalescing operator `??` like the ternary operator. That causes multiple nullish terms to be each indented relative to the last `??`, as they would in a ternary. The `??` operator is often used in chains though, and as such more similar to other binary operators, such as `||`. So to fix the indent, set its token type to `||`, so it inherits the same treatment. This opens up the question of operator precedence. However, `??` is required to be parenthesized when mixed with `||` and `&&`, so this is not a problem that can come up in syntactically legal code. Reviewers: krasimir Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D73026
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 | clang/unittests/Format/FormatTestJS.cpp |
 | clang/lib/Format/FormatTokenLexer.cpp |
Commit
366356361cf3abf97fbcfe9a0467b1ed1610401f
by a.bataev[OPENMP]Fix PR44578: crash in target construct with captured global. Target regions have implicit outer region which may erroneously capture some globals when it should not. It may lead to a compiler crash at the compile time.
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 | clang/test/OpenMP/target_parallel_for_simd_depend_codegen.cpp |
 | clang/test/OpenMP/target_parallel_for_depend_codegen.cpp |
 | clang/test/OpenMP/target_parallel_depend_codegen.cpp |
 | clang/test/OpenMP/target_teams_distribute_parallel_for_depend_codegen.cpp |
 | clang/test/OpenMP/target_depend_codegen.cpp |
 | clang/test/OpenMP/target_teams_distribute_depend_codegen.cpp |
 | clang/test/OpenMP/target_messages.cpp |
 | clang/lib/Sema/SemaExpr.cpp |
 | clang/lib/Sema/SemaOpenMP.cpp |
 | clang/test/OpenMP/target_teams_distribute_parallel_for_simd_depend_codegen.cpp |
 | clang/include/clang/Sema/Sema.h |
 | clang/test/OpenMP/target_teams_depend_codegen.cpp |
 | clang/test/OpenMP/target_simd_depend_codegen.cpp |
 | clang/test/OpenMP/target_teams_distribute_simd_depend_codegen.cpp |
Commit
a81e0442bdb1fafb9219b338176e00f4c9054377
by thomasp[FileCheck] Make Match unittest more flexible Summary: FileCheck's Match unittest needs updating whenever some call to initNextPattern() is inserted before its final block of checks. This commit change usage of LineNumber inside the Tester object so that the line number of the current pattern can be queries, thereby making the Match test more solid. Reviewers: jhenderson, jdenny, probinson, grimar, arichardson, rnk Reviewed By: jhenderson Subscribers: llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72913
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 | llvm/unittests/Support/FileCheckTest.cpp |
Commit
9c06c10fbae941feaf2738962d7ee58745b33725
by llvm-dev[SelectionDAG] GetDemandedBits - fallback to SimplifyMultipleUseDemandedBits by default. First step towards removing SelectionDAG::GetDemandedBits entirely since it so similar to SimplifyMultipleUseDemandedBits anyhow.
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 | llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp |
Commit
a42c3eb599cb3b83a07e6296d4ade213f1d74f0f
by nathan[clang-tidy] Add check for CERT-OOP57-CPP Summary: This is a very basic warning implementation of [[ https://wiki.sei.cmu.edu/confluence/display/cplusplus/OOP57-CPP.+Prefer+special+member+functions+and+overloaded+operators+to+C+Standard+Library+functions | Prefer special member functions and overloaded operators to C Standard Library functions ]] It absolutely needs some fine tuning though. Reviewers: alexfh, hokein, aaron.ballman, JonasToth Reviewed By: aaron.ballman Subscribers: merge_guards_bot, Eugene.Zelenko, mgorny, xazax.hun, cfe-commits Tags: #clang, #clang-tools-extra Differential Revision: https://reviews.llvm.org/D72488
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 | clang-tools-extra/clang-tidy/cert/NonTrivialTypesLibcMemoryCallsCheck.cpp |
 | clang-tools-extra/clang-tidy/cert/CERTTidyModule.cpp |
 | clang-tools-extra/clang-tidy/cert/NonTrivialTypesLibcMemoryCallsCheck.h |
 | clang-tools-extra/docs/clang-tidy/checks/list.rst |
 | clang-tools-extra/clang-tidy/cert/CMakeLists.txt |
 | clang-tools-extra/docs/clang-tidy/checks/cert-oop57-cpp.rst |
 | clang-tools-extra/test/clang-tidy/checkers/cert-oop57-cpp.cpp |
 | clang-tools-extra/docs/ReleaseNotes.rst |
Commit
0a71ac8494d7f7e387c8ceb54d427c039184b589
by llvmgnsyncbot[gn build] Port a42c3eb599c
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 | llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/cert/BUILD.gn |
Commit
b37f6d3af100dacf550888aef21787c2b2494ad0
by Milos.Stojanovic[llvm-exegesis] Remove unused variable after D72928
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 | llvm/tools/llvm-exegesis/lib/LatencyBenchmarkRunner.cpp |
Commit
67420f1b0e9c673ee638f2680fa83f468019004f
by Jonas Devlieghere[lldb/Util] Add a utility to run transparently capture and replay tests. This patch introduces a small new utility (lldb-repro) to transparently capture and replay debugger sessions through the command line driver. Its used to test the reproducers by running the test suite twice. During the first run, it captures a reproducer for every lldb invocation and saves it to a well-know location derived from the arguments and current working directory. During the second run, the test suite is run again but this time every invocation of lldb replays the previously recorded session. Differential revision: https://reviews.llvm.org/D72823
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 | lldb/test/Shell/helper/toolchain.py |
 | lldb/test/Shell/Reproducer/lit.local.cfg |
 | lldb/utils/lldb-repro/CMakeLists.txt |
 | lldb/utils/CMakeLists.txt |
 | lldb/utils/lldb-repro/lldb-repro.py |
 | lldb/test/Shell/lit.cfg.py |
Commit
a17ad3592ff8c69c683c17fa60910ce326a451b0
by Jonas Devlieghere[lldb/Test] Check that attribute exists before comparing its value
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 | lldb/test/Shell/Reproducer/lit.local.cfg |
 | lldb/utils/lldb-repro/lldb-repro.py |
Commit
ea99c09963488130ec0a61ef39df3fd0fcecad3c
by David CARLIER[OpenMP] affinity little fix for FreeBSD - pthread affinity np has different semantic than sched affinity counterpart. On success returns strictly 0. Reviewers: chandlerc, AndreyChurbanov, jdoerfert Reviewed By: jdoerfert Differential Revision: https://reviews.llvm.org/D72132
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 | openmp/runtime/src/kmp_affinity.h |
 | openmp/runtime/src/z_Linux_util.cpp |
Commit
04de24e690d3ff23bf63bc3901765cd8f07723f3
by Jonas Devlieghere[lldb/IOHandler] Improve synchronization between IO handlers. The way the IO handlers are currently managed by the debugger is wrong. The implementation lacks proper synchronization between RunIOHandlerSync and RunIOHandlers. The latter is meant to be run by the "main thread", while the former is meant to be run synchronously, potentially from a different thread. Imagine a scenario where RunIOHandlerSync is called from a different thread than RunIOHandlers. Both functions manipulate the debugger's IOHandlerStack. Although the push and pop operations are synchronized, the logic to activate, deactivate and run IO handlers is not. While investigating PR44352, I noticed some weird behavior in the Editline implementation. One of its members (m_editor_status) was modified from another thread. This happened because the main thread, while running RunIOHandlers ended up execution the IOHandlerEditline created by the breakpoint callback thread. Even worse, due to the lack of synchronization within the IO handler implementation, both threads ended up executing the same IO handler. Most of the time, the IO handlers don't need to run synchronously. The exception is sourcing commands from external files, like the .lldbinit file. I've added a (recursive) mutex to prevent another thread from messing with the IO handlers wile another thread is running one synchronously. It has to be recursive, because we might have to source another file when encountering a command source in the original file. Differential revision: https://reviews.llvm.org/D72748
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 | lldb/packages/Python/lldbsuite/test/functionalities/breakpoint/breakpoint_callback_command_source/Makefile |
 | lldb/packages/Python/lldbsuite/test/functionalities/breakpoint/breakpoint_callback_command_source/source.lldb |
 | lldb/include/lldb/Core/Debugger.h |
 | lldb/source/Core/Debugger.cpp |
 | lldb/packages/Python/lldbsuite/test/functionalities/breakpoint/breakpoint_callback_command_source/main.c |
 | lldb/packages/Python/lldbsuite/test/functionalities/breakpoint/breakpoint_callback_command_source/TestBreakpointCallbackCommandSource.py |
Commit
fb3d9153c01b9a560680465190d6ecd804e4c486
by kadircet[clangd] Fix DocumentOutline for concepts Summary: Fixes https://github.com/clangd/clangd/issues/256 Reviewers: kbobyrev Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D73056
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 | clang-tools-extra/clangd/FindSymbols.cpp |
 | clang-tools-extra/clangd/unittests/FindSymbolsTests.cpp |
Commit
d053b7a2978efe72c746fc65044a2dbba192bfe3
by Jonas Devlieghere[lldb/Docs] Add lldb-x86_64-fedora to the CI page
|
 | lldb/docs/resources/bots.rst |
Commit
f6418d72f572ced8e1f58fc18fb973da1c956162
by arsenm2AMDGPU/GlobalISel: Add documentation for RegisterBankInfo Document some high level strategies that should be used for register bank selection. The constant bus restriction section hasn't actually been implemented yet.
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 | llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp |
Commit
b70e4efb75bf1670fa335f3211c05b26b060ffde
by jpienaar[mlir] Generalize broadcastable trait operands Summary: Generalize broadcastable trait to variadic operands. Update the documentation that still talked about element type as part of broadcastable trait (that bug was already fixed). Also rename Broadcastable to ResultBroadcastableShape to be more explicit that the trait affects the result shape (it is possible for op to allow broadcastable operands but not have result shape that is broadcast compatible with operands). Doing some intermediate work to have getBroadcastedType take an optional elementType as input and use that if specified, instead of the common element type of type1 and type2 in this function. Differential Revision: https://reviews.llvm.org/D72559
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 | mlir/lib/Dialect/Traits.cpp |
 | mlir/include/mlir/IR/OpBase.td |
 | mlir/test/Dialect/traits.mlir |
 | mlir/docs/Traits.md |
 | mlir/include/mlir/Dialect/Traits.h |
 | mlir/test/lib/TestDialect/TestOps.td |
 | mlir/tools/mlir-tblgen/RewriterGen.cpp |
Commit
2e42cc7a50e867d939cac6ee3d375a85a30b984d
by mtrofin[NFC] small rename of private member in InlineCost.cpp Summary: Follow-up from https://reviews.llvm.org/D71733. Also moved an initialization to the base class, where it belonged in the first place. Reviewers: eraman, davidxl Reviewed By: davidxl Subscribers: hiraditya, haicheng, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72949
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 | llvm/lib/Analysis/InlineCost.cpp |
Commit
fdb9cc7dc560f6e56df55dd4be1c88b83636184d
by aminimFix printer for llvm.addressof symbol name that need escaping Differential Revision: https://reviews.llvm.org/D73065
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 | mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp |
 | mlir/test/Dialect/LLVMIR/global.mlir |
Commit
c12a5917d2f2ace092118e638913b1c45888363e
by kparzysz[Hexagon] Add support for Hexagon/HVX v67 ISA
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 | clang/test/Driver/hexagon-toolchain-elf.c |
 | llvm/test/CodeGen/Hexagon/swp-sigma.ll |
 | clang/include/clang/Basic/BuiltinsHexagon.def |
 | llvm/lib/Target/Hexagon/HexagonDepIICScalar.td |
 | llvm/lib/Target/Hexagon/HexagonInstrFormatsV5.td |
 | llvm/lib/Target/Hexagon/HexagonPatterns.td |
 | llvm/test/CodeGen/Hexagon/df-min-max.ll |
 | llvm/include/llvm/IR/IntrinsicsHexagonDep.td |
 | llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp |
 | llvm/lib/Target/Hexagon/HexagonSubtarget.cpp |
 | llvm/test/CodeGen/Hexagon/fminmax-v67.ll |
 | clang/test/CodeGen/builtins-hexagon-v67.c |
 | llvm/lib/Target/Hexagon/HexagonSubtarget.h |
 | llvm/lib/Target/Hexagon/HexagonISelLowering.cpp |
 | llvm/lib/Target/Hexagon/HexagonDepIICHVX.td |
 | llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp |
 | llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp |
 | clang/include/clang/Driver/Options.td |
 | clang/include/clang/Basic/BuiltinsHexagonDep.def |
 | clang/test/Preprocessor/hexagon-predefines.c |
 | llvm/test/MC/Hexagon/v67.s |
 | llvm/lib/Target/Hexagon/HexagonDepOperands.td |
 | llvm/lib/ObjectYAML/ELFYAML.cpp |
 | llvm/test/MC/Hexagon/v67_all.s |
 | llvm/lib/Target/Hexagon/HexagonDepMappings.td |
 | llvm/lib/Target/Hexagon/HexagonDepITypes.td |
 | llvm/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp |
 | llvm/test/CodeGen/Hexagon/fmul-v67.ll |
 | llvm/lib/Target/Hexagon/HexagonDepInstrInfo.td |
 | llvm/lib/Target/Hexagon/MCTargetDesc/HexagonBaseInfo.h |
 | clang/lib/Basic/Targets/Hexagon.cpp |
 | llvm/test/CodeGen/Hexagon/intrinsics-v67.ll |
 | llvm/lib/Target/Hexagon/Hexagon.td |
 | llvm/lib/Target/Hexagon/HexagonDepITypes.h |
 | llvm/lib/Target/Hexagon/HexagonArch.h |
 | llvm/lib/Target/Hexagon/HexagonDepDecoders.inc |
 | llvm/include/llvm/BinaryFormat/ELF.h |
 | clang/lib/Basic/Targets/Hexagon.h |
 | llvm/lib/Target/Hexagon/HexagonDepArch.h |
 | llvm/lib/Target/Hexagon/HexagonScheduleV67.td |
 | clang/test/CodeGen/builtins-hexagon-v67-audio.c |
 | llvm/lib/Target/Hexagon/HexagonDepInstrFormats.td |
 | llvm/lib/Target/Hexagon/HexagonDepTimingClasses.h |
 | llvm/lib/Target/Hexagon/HexagonPseudo.td |
 | llvm/lib/Target/Hexagon/HexagonDepMask.h |
 | llvm/lib/Target/Hexagon/HexagonDepMapAsm2Intrin.td |
 | llvm/lib/Target/Hexagon/HexagonInstrFormats.td |
 | llvm/test/MC/Hexagon/extensions/v67_hvx.s |
 | llvm/lib/Target/Hexagon/HexagonSchedule.td |
 | llvm/lib/Target/Hexagon/HexagonDepArch.td |
Commit
8615eeb455618fabe962f6951ccd8fe95b26bb15
by arsenm2AMDGPU: Partially merge indirect register write handling a785209bc2fb switched to using a pseudos instead of manually tying operands on the regular instruction. The VGPR indexing mode path should have the same problems that change attempted to avoid, so these should use the same strategy. Use a single pseudo for the VGPR indexing mode and movreld paths, and expand it based on the subtarget later. These have essentially the same constraints, reading the index from m0. Switch from using an offset to the subregister index directly, instead of computing an offset and re-adding it back. Also add missing pseudos for existing register class sizes.
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 | llvm/lib/Target/AMDGPU/SIInstrInfo.cpp |
 | llvm/lib/Target/AMDGPU/VOP1Instructions.td |
 | llvm/lib/Target/AMDGPU/SIISelLowering.cpp |
Commit
9b13b4a0e3a192a3b0d938bfaa71ce6dc0740ece
by arsenm2AMDGPU: Prepare to use scalar register indexing Define pseudos mirroring the the VGPR indexing ones, and adjust the operands in the s_movrel* instructions to avoid the result def.
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 | llvm/lib/Target/AMDGPU/SIInstructions.td |
 | llvm/lib/Target/AMDGPU/VOP1Instructions.td |
 | llvm/lib/Target/AMDGPU/SOPInstructions.td |
 | llvm/test/CodeGen/AMDGPU/inserted-wait-states.mir |
Commit
317fdcd09ae9df1eaf1da40443d59b8b2bf68b8b
by arsenm2AMDGPU: Cleanup and generate 64-bit div tests Split out r600 tests, and try to be more consistent with coverage. Cover a few more cases for 24-bit optimization and constants.
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 | llvm/test/CodeGen/AMDGPU/srem64.ll |
 | llvm/test/CodeGen/AMDGPU/sdiv64.ll |
 | llvm/test/CodeGen/AMDGPU/sdivrem64.r600.ll |
 | llvm/test/CodeGen/AMDGPU/sdivrem64.ll |
 | llvm/test/CodeGen/AMDGPU/udiv64.ll |
 | llvm/test/CodeGen/AMDGPU/urem64.ll |
 | llvm/test/CodeGen/AMDGPU/udivrem64.ll |
 | llvm/test/CodeGen/AMDGPU/udivrem64.r600.ll |
Commit
c81fe34718d7bc4088c849b507cc7038e043f1bc
by efriedma[lld][ELF] Don't apply --fix-cortex-a53-843419 to relocatable links. The code doesn't apply the fix correctly to relocatable links. I could try to fix the code that applies the fix, but it's pointless: we don't actually know what the offset will be in the final executable. So just ignore the flag for relocatable links. Issue discovered building Android. Differential Revision: https://reviews.llvm.org/D72968
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 | lld/test/ELF/aarch64-cortex-a53-843419-recognize.s |
 | lld/ELF/Driver.cpp |
Commit
d232c215669cb57f5eb4ead40a4a336220dbc429
by i[AsmPrinter] Don't emit __patchable_function_entries entry if "patchable-function-entry"="0" Add improve tests
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 | llvm/test/CodeGen/X86/patchable-function-entry.ll |
 | llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp |
 | llvm/test/CodeGen/AArch64/patchable-function-entry.ll |
 | llvm/test/CodeGen/AArch64/patchable-function-entry-bti.ll |
Commit
edd4398f4cd33a305afbca76ac4e6590e9337f4d
by 31459023+hctimRevert "PR17164: Change clang's default behavior from -flax-vector-conversions=all to -flax-vector-conversions=integer." This patch broke the Sanitizer buildbots. Please see the commit's differential revision for more information (https://reviews.llvm.org/D67678). This reverts commit b72a8c65e4e34779b6bc9e466203f553f5294486.
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 | clang/test/Headers/x86intrin-2.c |
 | clang/test/Sema/vector-ops.c |
 | clang/include/clang/Basic/LangOptions.def |
 | clang/test/Sema/vector-assign.c |
 | clang/docs/CommandGuide/clang.rst |
 | clang/test/Headers/x86intrin.c |
 | clang/test/Sema/vector-cast.c |
 | clang/test/Headers/altivec-header.c |
 | clang/test/Headers/arm-neon-header.c |
 | clang/test/Headers/x86-intrinsics-headers.c |
Commit
e5823bf806ca9fa6f87583065b3898a2edabce57
by arsenm2AMDGPU: Don't create weird sized integers There's no reason to introduce a new, unnaturally sized value here. This has a chance to produce worse code with legalization. Avoids regression in a future patch.
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 | llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp |
 | llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll |
Commit
385fb337de97d0b35ee295d16ceb26dfcf4de2ad
by arsenm2AMDGPU: Generate test checks These weren't much different than copied output anyway.
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 | llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-i16-to-i32.ll |
Commit
fa40b41168f68cb53cb1a7bb3dcb71ac3010e9d4
by ericRevert "[libc++] Optimize / partially inline basic_string copy constructor" This reverts commit a8a9c8e0a11abc9ed4ed78fed528334371fedf87. There are multiple reported failures caused by this change. Each failure is really weird, but it makes sense to revert while investigating.
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 | libcxx/include/string |
Commit
d1da63664f4e42191daf2e6a9fa682ca9f75ef5e
by jrtc27[lld][RISCV] Print error when encountering R_RISCV_ALIGN Summary: Unlike R_RISCV_RELAX, which is a linker hint, R_RISCV_ALIGN requires the support of the linker even when ignoring all R_RISCV_RELAX relocations. This is because the compiler emits as many NOPs as may be required for the requested alignment, more than may be required pre-relaxation, to allow for the target becoming more unaligned after relaxing earlier sequences. This means that the target is often not initially aligned in the object files, and so the R_RISCV_ALIGN relocations cannot just be ignored. Since we do not support linker relaxation, we must turn these into errors. Reviewers: ruiu, MaskRay, espindola Reviewed By: MaskRay Subscribers: grimar, Jim, emaste, arichardson, asb, rbar, johnrusso, simoncook, sabuasal, niosHD, kito-cheng, shiva0217, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, lenary, s.egerton, pzheng, sameer.abuasal, apazos, luismarques, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D71820
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 | lld/test/ELF/riscv-reloc-align.s |
 | lld/ELF/Arch/RISCV.cpp |
Commit
e446322f73fe6a6cb54057b5100880d5bc23bf2e
by serguei.n.dmitriev[llvm-objcopy][ELF] Allow setting SHF_EXCLUDE flag for ELF sections Summary: This patch adds support for setting SHF_EXCLUDE flag for ELF sections. Reviewers: jhenderson, grimar, MaskRay, mstorsjo, espindola, alexshap, rupprecht Reviewed By: jhenderson, MaskRay Subscribers: emaste, abrachet, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72128
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 | llvm/test/tools/llvm-objcopy/ELF/set-section-flags.test |
 | llvm/test/tools/llvm-objcopy/ELF/rename-section-flag-preserved.test |
 | llvm/tools/llvm-objcopy/CopyConfig.h |
 | llvm/test/tools/llvm-objcopy/ELF/rename-section-flag.test |
 | llvm/tools/llvm-objcopy/CopyConfig.cpp |
 | llvm/test/tools/llvm-objcopy/ELF/rename-section-flag-osproc-mask.test |
 | llvm/tools/llvm-objcopy/ELF/ELFObjcopy.cpp |
 | llvm/docs/CommandGuide/llvm-objcopy.rst |
Commit
c72aa27f917832af8a0d8d3a8aa9974411c30610
by arsenm2AMDDGPU/GlobalISel: Fix RegBankSelect for llvm.amdgcn.ps.live
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 | llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ps.live.mir |
Commit
38bdb94120b76f8f79cd27d721892673e573895a
by kbobyrev[clangd] Fix rename for explicit destructor calls When triggering rename of the class name in the code with explicit destructor calls, rename fails. Consider the following piece of code: ``` class Foo; ... Foo f; f.~/*...*/Foo(); ``` `findExplicitReferences` will report two `ReferenceLoc` for destructor call: one is comming from `MemberExpr` (i.e. destructor call itself) and would point to the tilde: ``` f.~/*...*/Foo(); ^ ``` And the second one is pointing to the typename and is coming from `TypeLoc`. ``` f.~/*...*/Foo(); ^ ``` This causes rename to produce incorrect textual replacements. This patch updates `MemberExpr` handler to detect destructor calls and prevents it from reporting a duplicate reference. Resolves: https://github.com/clangd/clangd/issues/236 Reviewers: kadircet, hokein Differential Revision: https://reviews.llvm.org/D72638
|
 | clang-tools-extra/clangd/unittests/FindTargetTests.cpp |
 | clang-tools-extra/clangd/unittests/RenameTests.cpp |
 | clang-tools-extra/clangd/FindTarget.cpp |
Commit
b16f82ad3b095070729cde2873bd3a2e8ab35c0e
by 31459023+hctimRevert "[MachO] Add a test for detecting reserved unit length." This change broke the UBSan buildbots. More information available in the original Phabricator review: https://reviews.llvm.org/D72695 This reverts commit fcc08aa835de1e0c1f3e7e479917575e55433b68.
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 | lld/unittests/MachOTests/MachONormalizedFileToAtomsTests.cpp |
Commit
5721483b64251faa115efa3dddd47f1b833d9a13
by i[AMDGPU] Fix -Wunused-variable after e5823bf806ca9fa6f87583065b3898a2edabce57
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 | llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp |
Commit
02c1321139d61a9e56a5319a07bb8f27570e7f77
by i[MC] Improve a report_fatal_error
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 | llvm/lib/MC/ELFObjectWriter.cpp |
Commit
e15fb06e2d0a068de549464d72081811e7fac612
by zakk.chen[RISCV] Pass target-abi via module flag metadata Reviewers: lenary, asb Reviewed By: lenary Tags: #clang Differential Revision: https://reviews.llvm.org/D72755
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 | clang/test/CodeGen/riscv-metadata.c |
 | clang/lib/CodeGen/CodeGenModule.cpp |
Commit
a80291ce10ba9667352adcc895f9668144f5f616
by nicolai.haehnleRevert "[AMDGPU] Invert the handling of skip insertion." This reverts commit 0dc6c249bffac9f23a605ce4e42a84341da3ddbd. The commit is reported to cause a regression in piglit/bin/glsl-vs-loop for Mesa.
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 | llvm/test/CodeGen/AMDGPU/insert-skips-gws.mir |
 | llvm/lib/Target/AMDGPU/AMDGPU.h |
 | llvm/test/CodeGen/AMDGPU/skip-branch-taildup-ret.mir |
 | llvm/test/CodeGen/AMDGPU/branch-condition-and.ll |
 | llvm/test/CodeGen/AMDGPU/else.ll |
 | llvm/lib/Target/AMDGPU/SIRemoveShortExecBranches.cpp |
 | llvm/test/CodeGen/AMDGPU/branch-relaxation.ll |
 | llvm/test/CodeGen/AMDGPU/insert-skips-flat-vmem.mir |
 | llvm/test/CodeGen/AMDGPU/si-lower-control-flow.mir |
 | llvm/test/CodeGen/AMDGPU/si-lower-control-flow-unreachable-block.ll |
 | llvm/test/CodeGen/AMDGPU/collapse-endcf.ll |
 | llvm/lib/Target/AMDGPU/SIInsertSkips.cpp |
 | llvm/test/CodeGen/AMDGPU/si-annotate-cf-noloop.ll |
 | llvm/test/CodeGen/AMDGPU/smrd_vmem_war.ll |
 | llvm/test/CodeGen/AMDGPU/wave32.ll |
 | llvm/test/CodeGen/AMDGPU/wqm.ll |
 | llvm/test/CodeGen/AMDGPU/insert-skips-kill-uncond.mir |
 | llvm/test/CodeGen/AMDGPU/skip-branch-trap.ll |
 | llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll |
 | llvm/test/CodeGen/AMDGPU/hoist-cond.ll |
 | llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp |
 | llvm/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll |
 | llvm/test/CodeGen/AMDGPU/subreg-coalescer-undef-use.ll |
 | llvm/test/CodeGen/AMDGPU/uniform-loop-inside-nonuniform.ll |
 | llvm/test/CodeGen/AMDGPU/convergent-inlineasm.ll |
 | llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll |
 | llvm/test/CodeGen/AMDGPU/cse-phi-incoming-val.ll |
 | llvm/test/CodeGen/AMDGPU/uniform-cfg.ll |
 | llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp |
 | llvm/test/CodeGen/AMDGPU/skip-if-dead.ll |
 | llvm/lib/Target/AMDGPU/CMakeLists.txt |
 | llvm/test/CodeGen/AMDGPU/call-skip.ll |
 | llvm/test/CodeGen/AMDGPU/insert-skips-ignored-insts.mir |
 | llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll |
 | llvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll |
 | llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll |
 | llvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll |
 | llvm/test/CodeGen/AMDGPU/ret_jump.ll |
 | llvm/test/CodeGen/AMDGPU/valu-i1.ll |
Commit
65f6ee618e729e2abcc9f7b6fff689c7b3d1aada
by llvmgnsyncbot[gn build] Port a80291ce10b
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 | llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn |
Commit
fffea2842d2807e6deabeb719774d83e3c490156
by frank.laub[MLIR] LLVM Dialect: add llvm.cmpxchg and improve llvm.atomicrmw custom parser Summary: Add a `llvm.cmpxchg` op as a counterpart to LLVM IR's `cmpxchg` instruction. Note that the `weak`, `volatile`, and `syncscope` attributes are not yet supported. This will be useful for upcoming parallel versions of affine.for and generally for reduction-like semantics (especially for reductions that can't make use of `atomicrmw`, e.g. `fmax`). Reviewers: ftynse, nicolasvasilache Reviewed By: ftynse Subscribers: merge_guards_bot, jfb, mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst, arpith-jacob, mgester, lucyrfox, liufengdb, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72995
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 | mlir/test/Dialect/LLVMIR/roundtrip.mlir |
 | mlir/test/Dialect/LLVMIR/invalid.mlir |
 | mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.h |
 | mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp |
 | mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td |
 | mlir/test/Target/llvmir.mlir |
Commit
ff9877ce34b86f8f63a773e0e8e383a7ef2bec95
by anna.welker[ARM][MVE] Enable masked scatter Extends the gather/scatter pass in MVEGatherScatterLowering.cpp to enable the transformation of masked scatters into calls to MVE's masked scatter intrinsic. Differential Revision: https://reviews.llvm.org/D72856
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 | llvm/test/CodeGen/Thumb2/mve-scatter-ind16-unscaled.ll |
 | llvm/test/CodeGen/Thumb2/mve-gather-scatter-opt.ll |
 | llvm/test/CodeGen/Thumb2/mve-scatter-ind8-unscaled.ll |
 | llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp |
 | llvm/test/CodeGen/Thumb2/mve-scatter-ind16-scaled.ll |
 | llvm/test/CodeGen/Thumb2/mve-scatter-ind32-unscaled.ll |
 | llvm/lib/Target/ARM/ARMTargetTransformInfo.h |
 | llvm/test/CodeGen/Thumb2/mve-scatter-ind32-scaled.ll |
 | llvm/test/CodeGen/Thumb2/mve-scatter-ptrs.ll |
Commit
6b4f86f65f165249cbea1d23611ac97aeec7a082
by ikudrinReapply: [MachO] Add a test for detecting reserved unit length. The test in the origin patch did not create a __debug_str section. An UBSan check triggered when the corresponding pointer was dereferenced. Differential Revision: https://reviews.llvm.org/D72695 This reapplies fcc08aa835de1e0c1f3e7e479917575e55433b68 which was reverted in b16f82ad3b095070729cde2873bd3a2e8ab35c0e.
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 | lld/unittests/MachOTests/MachONormalizedFileToAtomsTests.cpp |
Commit
dbd0ad33668ea7b6d5c2c5db1fa290cc08ab99d9
by peter.smith[LLD][ELF] Add support for INPUT_SECTION_FLAGS The INPUT_SECTION_FLAGS linker script command is used to constrain the section pattern matching to sections that match certain combinations of flags. There are two ways to express the constraint. withFlags: Section must have these flags. withoutFlags: Section must not have these flags. The syntax of the command is: INPUT_SECTION_FLAGS '(' sect_flag_list ')' sect_flag_list: NAME | sect_flag_list '&' NAME Where NAME matches a section flag name such as SHF_EXECINSTR, or the integer value of a section flag. If the first character of NAME is ! then it means must not contain flag. We do not support the rare case of { INPUT_SECTION_FLAGS(flags) filespec } where filespec has no input section description like (.text). As an example from the ld man page: SECTIONS { .text : { INPUT_SECTION_FLAGS (SHF_MERGE & SHF_STRINGS) *(.text) } .text2 : { INPUT_SECTION_FLAGS (!SHF_WRITE) *(.text) } } .text will match sections called .text that have both the SHF_MERGE and SHF_STRINGS flag. .text2 will match sections called .text that don't have the SHF_WRITE flag. The flag names accepted are the generic to all targets and SHF_ARM_PURECODE as it is very useful to filter all the pure code sections into a single program header that can be marked execute never. fixes PR44265 Differential Revision: https://reviews.llvm.org/D72756
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 | lld/ELF/LinkerScript.h |
 | lld/test/ELF/input-section-flags-diag2.test |
 | lld/ELF/LinkerScript.cpp |
 | lld/test/ELF/input-section-flags-diag1.test |
 | lld/test/ELF/input-section-flags-diag3.test |
 | lld/test/ELF/input-section-flags-keep.s |
 | lld/ELF/ScriptParser.cpp |
 | lld/test/ELF/input-section-flags.s |
Commit
a672f579a2f66dbfa72799dec8ac52858b9a0f99
by llvm-devRegenerate rotated uxt tests
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 | llvm/test/CodeGen/ARM/uxt_rot.ll |
Commit
8d2e6bdbe144b5855c4ae23d95c7e306075e4fdd
by llvm-dev[TargetLowering] SimplifyDemandedBits - Pull out InDemandedMask variable to ISD::SHL. NFCI. Matches ISD::SRA + ISD::SRL variants.
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 | llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp |
Commit
d6f4cfdbd7923bae74d4a45f276f3b7f3e053f39
by courbet[llvm-exegesis] Add support for AVX512 explicit rounding operands. Reviewers: gchatelet Subscribers: tschuett, mstojanovic, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D73083
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 | llvm/tools/llvm-exegesis/lib/X86/Target.cpp |
 | llvm/unittests/tools/llvm-exegesis/X86/SnippetGeneratorTest.cpp |
Commit
5f5f4785648959dfbb5c88d183816f85a0974561
by llvm-dev[DAG] Fold extract_vector_elt (scalar_to_vector), K to undef (K != 0) This was unconditionally folding this to the source operand, even if the access was out of bounds. Use undef instead of the extract is not the first element. This helps with some cases where 3-vectors are legalized and avoids processing the 4th component. Original Patch by: arsenm (Matt Arsenault) Differential Revision: https://reviews.llvm.org/D51589
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 | llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll |
 | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp |
 | llvm/test/CodeGen/AMDGPU/max.i16.ll |
Commit
89e6601fb152b39700977d70e5604309f05475e5
by grimar[llvm-readelf][llvm-readobj] - Fix the indentation when printing dynamic tags. This change is similar to one made for llvm-objdump in D72838. llvm-readelf/llvm-readobj tools do not align the "Name/Value" column properly. This patch adds a logic to calculate the size of indentation on fly to fix such issues. Differential revision: https://reviews.llvm.org/D72843
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 | llvm/test/tools/llvm-readobj/ELF/dynamic-tags.test |
 | llvm/test/tools/llvm-readobj/ELF/dynamic-tags-machine-specific.test |
 | llvm/tools/llvm-readobj/ELFDumper.cpp |
Commit
bc29069dc401572ba62f7dd692a3474c1ead76c9
by gabor.marton[analyzer] Enable PlacementNewChecker by default
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 | clang/test/Analysis/placement-new-user-defined.cpp |
 | clang/test/Analysis/placement-new.cpp |
 | clang/include/clang/StaticAnalyzer/Checkers/Checkers.td |
Commit
4e8116f4692e9b5787ba91c6b557b113aae7e244
by andrew.ng[ELF] Refactor uses of getInputSections to improve efficiency NFC Add new method getFirstInputSection and use instead of getInputSections where appropriate to avoid creation of an unneeded vector of input sections. Differential Revision: https://reviews.llvm.org/D73047
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 | lld/ELF/LinkerScript.cpp |
 | lld/ELF/OutputSections.h |
 | lld/ELF/OutputSections.cpp |
Commit
1f7b95d038e687fdaffdff55d32c16934f7bff60
by Raphael Isemann[lldb][NFC] Convert LLDB_LOGF to LLDB_LOG in ClangASTSource.cpp
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 | lldb/source/Plugins/ExpressionParser/Clang/ClangASTSource.cpp |
Commit
87632b9e061863b96edb124e66b4f9b526e00438
by courbet[llvm-exegesis] Fix support for LEA64_32r. Summary: Add unit test to show the issue: We must select an *aliasing* output register, not the exact register. Reviewers: gchatelet Subscribers: tschuett, mstojanovic, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D73095
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 | llvm/tools/llvm-exegesis/lib/X86/Target.cpp |
 | llvm/test/tools/llvm-exegesis/X86/latency-LEA64_32r.s |
Commit
9a52ea5cf9ca76d9e90297c9f307afb7f4aeec59
by tpoppCreate a gpu.module operation for the GPU Dialect. Summary: This is based on the use of code constantly checking for an attribute on a model and instead represents the distinct operaion with a different op. Instead, this op can be used to provide better filtering. Reverts "Revert "[mlir] Create a gpu.module operation for the GPU Dialect."" This reverts commit ac446302ca4145cdc89f377c0c364c29ee303be5 after fixing internal Google issues. This additionally updates ROCDL lowering to use the new gpu.module. Reviewers: herhut, mravishankar, antiagainst, nicolasvasilache Subscribers: jholewinski, mgorny, mehdi_amini, jpienaar, burmako, shauheen, csigg, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, llvm-commits, mravishankar, rriddle, antiagainst, bkramer Tags: #llvm Differential Revision: https://reviews.llvm.org/D72921
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 | mlir/lib/Dialect/GPU/Transforms/KernelOutlining.cpp |
 | mlir/include/mlir/Conversion/GPUToNVVM/GPUToNVVMPass.h |
 | mlir/test/Conversion/GPUToNVVM/memory-attrbution.mlir |
 | mlir/lib/Conversion/GPUToSPIRV/ConvertGPUToSPIRV.cpp |
 | mlir/test/Dialect/GPU/outlining.mlir |
 | mlir/test/Conversion/GPUToSPIRV/builtins.mlir |
 | mlir/test/Conversion/GPUToSPIRV/simple.mlir |
 | mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir |
 | mlir/test/Dialect/GPU/ops.mlir |
 | mlir/lib/Conversion/GPUToSPIRV/CMakeLists.txt |
 | mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp |
 | mlir/test/Conversion/GPUToSPIRV/load-store.mlir |
 | mlir/include/mlir/Dialect/GPU/GPUOps.td |
 | mlir/include/mlir/Conversion/GPUToCUDA/GPUToCUDAPass.h |
 | mlir/test/Conversion/GPUToCUDA/lower-launch-func-to-cuda.mlir |
 | mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir |
 | mlir/test/Conversion/GPUToSPIRV/if.mlir |
 | mlir/include/mlir/Conversion/GPUToROCDL/GPUToROCDLPass.h |
 | mlir/test/Conversion/GPUToCUDA/lower-nvvm-kernel-to-cubin.mlir |
 | mlir/lib/Conversion/GPUToCUDA/ConvertKernelFuncToCubin.cpp |
 | mlir/lib/Conversion/GPUToSPIRV/GPUToSPIRV.td |
 | mlir/lib/Conversion/GPUToSPIRV/ConvertGPUToSPIRVPass.cpp |
 | mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp |
 | mlir/lib/Conversion/GPUToCUDA/ConvertLaunchFuncToCudaCalls.cpp |
 | mlir/tools/mlir-cuda-runner/mlir-cuda-runner.cpp |
 | mlir/lib/Dialect/GPU/IR/GPUDialect.cpp |
 | mlir/test/Conversion/GPUToSPIRV/loop.mlir |
 | mlir/test/Dialect/GPU/invalid.mlir |
Commit
3f9b6b270f87430c28fb2ff811d3b58dbf8bfdde
by pavel[lldb] Use llvm::stable_sort in Line This addresses some post-commit feedback on D72909.
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 | lldb/source/Symbol/LineTable.cpp |
Commit
bc8a1ab26fba5d5635467b9d0fd7ad9a0fd5bc6e
by gchatelet[Alignment][NFC] Use Align with CreateMaskedLoad Summary: This is patch is part of a series to introduce an Alignment type. See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this patch for the introduction of the type: https://reviews.llvm.org/D64790 Reviewers: courbet Subscribers: hiraditya, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D73087
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 | llvm/lib/Transforms/Vectorize/LoopVectorize.cpp |
 | llvm/lib/IR/IRBuilder.cpp |
 | llvm/lib/IR/AutoUpgrade.cpp |
 | llvm/include/llvm/Analysis/VectorUtils.h |
 | llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp |
 | clang/lib/CodeGen/CGBuiltin.cpp |
 | llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp |
 | llvm/include/llvm/IR/IRBuilder.h |
Commit
295aea807892d087f0ff8e465b7ea9ebcdaed3fa
by grimar[llvm-readobj] - Remove rpath.test. rpath.test checks that DT_RPATH is dumped. We have dynamic-tags.test that tests all dynamic tags and it is better, because also checks llvm-readelf and does not use precompiled binaries. Differential revision: https://reviews.llvm.org/D73093
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 | llvm/test/tools/llvm-readobj/ELF/Inputs/rpath.exe.elf-x86_64 |
 | llvm/test/tools/llvm-readobj/ELF/rpath.test |
Commit
139771f8b02d4885c2ab50032e0c9356d60a2b05
by gchatelet[Alignment][NFC] Use Align with CreateElementUnorderedAtomicMemMove Summary: This is patch is part of a series to introduce an Alignment type. See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this patch for the introduction of the type: https://reviews.llvm.org/D64790 Reviewers: courbet Subscribers: hiraditya, jfb, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D73050
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 | llvm/lib/IR/IRBuilder.cpp |
 | llvm/include/llvm/IR/IRBuilder.h |
Commit
5181c67febc8d4c69559055fe2bee086aae61996
by arsenm2AMDGPU/GlobalISel: Add some baseline tests for unmerge legalization
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 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir |
Commit
fccd0da5ee6f4e337395f287edcf824a009e1b7e
by adam.balogh[clang-tidy] New check: bugprone-misplaced-pointer-arithmetic-in-alloc Finds cases where an integer expression is added to the result of a memory allocation function instead of its argument. Differential Revision: https://reviews.llvm.org/D71001
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 | clang-tools-extra/docs/clang-tidy/checks/bugprone-misplaced-pointer-arithmetic-in-alloc.rst |
 | clang-tools-extra/docs/ReleaseNotes.rst |
 | clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt |
 | clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp |
 | clang-tools-extra/clang-tidy/bugprone/MisplacedPointerArithmeticInAllocCheck.h |
 | clang-tools-extra/docs/clang-tidy/checks/list.rst |
 | clang-tools-extra/test/clang-tidy/checkers/bugprone-misplaced-pointer-arithmetic-in-alloc.c |
 | clang-tools-extra/test/clang-tidy/checkers/bugprone-misplaced-pointer-arithmetic-in-alloc.cpp |
 | clang-tools-extra/clang-tidy/bugprone/MisplacedPointerArithmeticInAllocCheck.cpp |
Commit
65a31a97b4595c0e75b63c670b1adf8de1c80f4b
by llvmgnsyncbot[gn build] Port fccd0da5ee6
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 | llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/bugprone/BUILD.gn |
Commit
18a96fd573b134fed7d8ea6b87930e7a059d6c90
by pavel[lldb/DWARF] Fix a leak in line table construction We were creating a bunch of LineSequence objects but never deleting them. This fixes the leak and changes the code to use std::unique_ptr, to make it harder to make the same mistake again.
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 | lldb/source/Plugins/SymbolFile/PDB/SymbolFilePDB.cpp |
 | lldb/source/Symbol/LineTable.cpp |
 | lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp |
 | lldb/include/lldb/Symbol/LineTable.h |
Commit
5e70f4bdc15960730d0ff2aa167399e36bc64278
by pavel[lldb/breakpad] Use new line table constructor The old construction method can be quadratic for some inputs. This approach guarantees a reasonable performance.
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 | lldb/source/Plugins/SymbolFile/Breakpad/SymbolFileBreakpad.cpp |
Commit
651fa669a237730324d484d4675987a921c7562c
by llvm-dev[TargetLowering] SimplifyDemandedBits ANY_EXTEND/ANY_EXTEND_VECTOR_INREG multi-use handling Call SimplifyMultipleUseDemandedBits to peek through extended source args with multiple uses
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 | llvm/test/CodeGen/X86/vector-sext.ll |
 | llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp |
Commit
f651c402a221a20f3bc6ea43f70b29326a357010
by hokein.wu[clangd] Capture the missing injected class names in findExplicitReferences. Summary: Fixes https://github.com/clangd/clangd/issues/237. Reviewers: kadircet, kbobyrev Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D73088
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 | clang-tools-extra/clangd/FindTarget.cpp |
 | clang-tools-extra/clangd/unittests/FindTargetTests.cpp |
 | clang-tools-extra/clangd/unittests/SemanticHighlightingTests.cpp |
 | clang-tools-extra/clangd/unittests/RenameTests.cpp |
Commit
b065902ed4587faec5358e8aaef4570d3da83d40
by llvm-dev[X86] combineBT - use SimplifyDemandedBits instead of GetDemandedBits Another step towards removing SelectionDAG::GetDemandedBits entirely
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 | llvm/lib/Target/X86/X86ISelLowering.cpp |
Commit
47f99d2ca8adbecb59d04dad550262363b513d6d
by llvm-dev[SelectionDAG] GetDemandedBits - remove ANY_EXTEND handling Rely on SimplifyMultipleUseDemandedBits fallback instead.
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 | llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp |
Commit
d7032bc3c009d3d2e7fdd6427fa629589fe93096
by Jinsong Ji[PowerPC][NFC] Reclaim TSFlags bit 6 We removed UseVSXReg flag in https://reviews.llvm.org/D58685 But we did not reclain the bit 6 it was assigned, this will become confusing and a hole later.. We should reclaim it as early as possible before new bits. Reviewed By: sfertile Differential Revision: https://reviews.llvm.org/D72649
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 | llvm/lib/Target/PowerPC/PPCInstrInfo.h |
 | llvm/lib/Target/PowerPC/PPCInstrFormats.td |
Commit
81f385b0c6ea37dd7195a65be162c75bbdef29d2
by benny.kraMake dropTriviallyDeadConstantArrays not quadratic Only look at the operands of dead constant arrays instead of all constant arrays again.
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 | llvm/lib/IR/LLVMContextImpl.cpp |
Commit
f04284cf1d491a5d9a1eebfd14ed2eb6342f5e47
by llvm-dev[TargetLowering] SimplifyDemandedBits ISD::SRA multi-use handling Call SimplifyMultipleUseDemandedBits to peek through extended source args with multiple uses
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 | llvm/test/CodeGen/X86/const-shift-of-constmasked.ll |
 | llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp |
Commit
6a24339a45246b66bd3de88cc9c6a5b5e77c0645
by diogo.sampaio[ARM] Follow AACPS standard for volatile bit-fields access width Summary: This patch resumes the work of D16586. According to the AAPCS, volatile bit-fields should be accessed using containers of the widht of their declarative type. In such case: ``` struct S1 { short a : 1; } ``` should be accessed using load and stores of the width (sizeof(short)), where now the compiler does only load the minimum required width (char in this case). However, as discussed in D16586, that could overwrite non-volatile bit-fields, which conflicted with C and C++ object models by creating data race conditions that are not part of the bit-field, e.g. ``` struct S2 { short a; int b : 16; } ``` Accessing `S2.b` would also access `S2.a`. The AAPCS Release 2019Q1.1 (https://static.docs.arm.com/ihi0042/g/aapcs32.pdf) section 8.1 Data Types, page 35, "Volatile bit-fields - preserving number and width of container accesses" has been updated to avoid conflict with the C++ Memory Model. Now it reads in the note: ``` This ABI does not place any restrictions on the access widths of bit-fields where the container overlaps with a non-bit-field member. This is because the C/C++ memory model defines these as being separate memory locations, which can be accessed by two threads simultaneously. For this reason, compilers must be permitted to use a narrower memory access width (including splitting the access into multiple instructions) to avoid writing to a different memory location. ``` I've updated the patch D16586 to follow such behavior by verifying that we only change volatile bit-field access when: - it won't overlap with any other non-bit-field member - we only access memory inside the bounds of the record Regarding the number of memory accesses, that should be preserved, that will be implemented by D67399. Reviewers: rsmith, rjmccall, eli.friedman, ostannard Subscribers: ostannard, kristof.beyls, cfe-commits, carwil, olista01 Tags: #clang Differential Revision: https://reviews.llvm.org/D72932
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 | clang/test/CodeGen/aapcs-bitfield.c |
 | clang/lib/CodeGen/CGExpr.cpp |
 | clang/lib/CodeGen/CGValue.h |
 | clang/lib/CodeGen/CodeGenFunction.h |
Commit
2147703bde1e1a7a1b89ccb66f55d36fd17620f1
by diogo.sampaioRevert "[ARM] Follow AACPS standard for volatile bit-fields access width" This reverts commit 6a24339a45246b66bd3de88cc9c6a5b5e77c0645. Submitted using ide button by mistake
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 | clang/lib/CodeGen/CodeGenFunction.h |
 | clang/lib/CodeGen/CGExpr.cpp |
 | clang/test/CodeGen/aapcs-bitfield.c |
 | clang/lib/CodeGen/CGValue.h |
Commit
1256d68093ac1696034e385bbb4cb6e516b66bea
by zakk.chen[RISCV] Check the target-abi module flag matches the option Reviewers: lenary, asb Reviewed By: lenary Tags: #llvm Differential Revision: https://reviews.llvm.org/D72768
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 | llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h |
 | llvm/lib/Target/RISCV/RISCVTargetMachine.cpp |
 | llvm/test/CodeGen/RISCV/module-target-abi2.ll |
 | llvm/test/CodeGen/RISCV/module-target-abi.ll |
 | llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.cpp |
Commit
1fbb1d6df0113ca341f6d257bc72e07343dd861a
by kadircet[clangd] Drop returntype/type when hovering over type-ish names Summary: Some names, e.g. constructor/destructor/conversions, already contain the type info, no need to duplicate them in the hoverinfo. Fixes https://github.com/clangd/clangd/issues/252 Reviewers: sammccall, ilya-biryukov Subscribers: MaskRay, jkorous, arphaman, usaxena95, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D73110
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 | clang-tools-extra/clangd/unittests/HoverTests.cpp |
 | clang-tools-extra/clangd/Hover.cpp |
Commit
020041d99b508ed5f207c0896a19b3e85c942ee7
by kparzyszUpdate spelling of {analyze,insert,remove}Branch in strings and comments These names have been changed from CamelCase to camelCase, but there were many places (comments mostly) that still used the old names. This change is NFC.
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 | llvm/test/CodeGen/SystemZ/int-cmp-02.ll |
 | llvm/lib/CodeGen/MachineVerifier.cpp |
 | llvm/lib/Target/XCore/XCoreInstrInfo.cpp |
 | llvm/lib/Target/Hexagon/HexagonInstrInfo.h |
 | llvm/include/llvm/CodeGen/MachineInstr.h |
 | llvm/lib/CodeGen/BranchFolding.cpp |
 | llvm/lib/Target/ARC/ARCInstrInfo.cpp |
 | llvm/lib/CodeGen/MachineBlockPlacement.cpp |
 | llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp |
 | llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp |
 | llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp |
 | llvm/lib/CodeGen/EarlyIfConversion.cpp |
 | llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h |
 | llvm/include/llvm/CodeGen/TargetInstrInfo.h |
 | llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp |
 | llvm/test/CodeGen/SystemZ/branch-08.ll |
 | llvm/lib/Target/WebAssembly/WebAssemblyCFGSort.cpp |
 | llvm/lib/Target/RISCV/RISCVInstrInfo.cpp |
 | llvm/docs/WritingAnLLVMBackend.rst |
 | llvm/lib/CodeGen/MachineBasicBlock.cpp |
 | llvm/lib/Target/Lanai/LanaiAsmPrinter.cpp |
 | llvm/include/llvm/MC/MCInstrDesc.h |
 | llvm/lib/Target/AArch64/AArch64ConditionOptimizer.cpp |
 | libcxxabi/test/test_demangle.pass.cpp |
 | llvm/lib/Target/AMDGPU/R600InstrInfo.cpp |
Commit
a6883017ea9af529e89d7f89af2477378b6eafca
by alexandre.ganea[Clang] Un-break scan-build after integrated-cc1 change Differential Revision: https://reviews.llvm.org/D72982
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 | clang/test/Driver/offloading-interoperability.c |
 | clang/test/Driver/cuda-simple.cu |
 | clang/test/Driver/option-aliases.c |
 | clang/lib/Driver/Job.cpp |
Commit
3023352a7d0991c2ed7c0ecca9b5fbf8501b6af2
by antiagainst[mlir][spirv] Simplify scalar type size calculation. Simplify scalar type size calculation and reject boolean memrefs. Differential Revision: https://reviews.llvm.org/D72999
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 | mlir/lib/Conversion/StandardToSPIRV/ConvertStandardToSPIRVPass.cpp |
 | mlir/test/Conversion/StandardToSPIRV/std-to-spirv.mlir |
 | mlir/lib/Dialect/SPIRV/SPIRVLowering.cpp |
Commit
7b8dc8c57697e95fd0b1248e4494ecc0f929aba1
by jaskiewiczs[libcxx] Support Python 3.8 in the test suite Summary: `platform.linux_distribution()` has been deprecated in Python 3.5 and removed in Python 3.8. Reviewers: bcain, bcraig, jroelofs, EricWF, mclow.lists, ldionne Reviewed By: jroelofs Subscribers: dexonsmith, christof, ldionne, libcxx-commits Tags: #libc Differential Revision: https://reviews.llvm.org/D72501
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 | libcxx/utils/libcxx/test/target_info.py |