Commit
bb9b964072eb42a09e76fe148b36eefcfff077b2
by saar[Concepts] Fix circular AST->Sema dependency in ASTConcept.cpp Remove inappropriate Sema include in ASTConcept.cpp introduced by D72552 for the finer-grained includes actually needed.
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 | clang/lib/AST/ASTConcept.cpp |
Commit
62e4b501ab3bc4c5815a179fdd2c4b49574506c1
by Jonas DevlieghereRevert "[Concepts] Placeholder constraints and abbreviated templates" This temporarily reverts commit e03ead6771fc97b11cb0c94b7f023142184ad25f because it breaks LLDB. http://lab.llvm.org:8011/builders/lldb-x86_64-debian/builds/3356 http://lab.llvm.org:8011/builders/lldb-x64-windows-ninja/builds/12872 http://green.lab.llvm.org/green/view/LLDB/job/lldb-cmake/6407/
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 | clang/lib/Sema/SemaDecl.cpp |
 | clang/test/Parser/cxx2a-placeholder-type-constraint.cpp |
 | clang/lib/Serialization/ASTReader.cpp |
 | clang/test/CXX/dcl/dcl.fct/p17.cpp |
 | clang/lib/Sema/SemaLambda.cpp |
 | clang/lib/Sema/TreeTransform.h |
 | clang/lib/Serialization/ASTReaderDecl.cpp |
 | clang/lib/Sema/SemaTemplate.cpp |
 | clang/include/clang/AST/TypeLoc.h |
 | clang/lib/AST/TypeLoc.cpp |
 | clang/lib/Sema/Sema.cpp |
 | clang/test/CXX/dcl/dcl.spec/dcl.type/dcl.spec.auto/p6.cpp |
 | clang/lib/AST/DeclTemplate.cpp |
 | clang/include/clang/AST/TypeProperties.td |
 | clang/lib/Parse/ParseDecl.cpp |
 | clang/lib/Serialization/ASTWriter.cpp |
 | clang/include/clang/Sema/ScopeInfo.h |
 | clang/include/clang/AST/DeclTemplate.h |
 | clang/lib/Parse/ParseTemplate.cpp |
 | clang/test/SemaCXX/cxx1y-generic-lambdas.cpp |
 | clang/include/clang/Sema/Scope.h |
 | clang/lib/AST/TypePrinter.cpp |
 | clang/lib/Sema/SemaType.cpp |
 | clang/include/clang/AST/TemplateBase.h |
 | clang/lib/Parse/ParseDeclCXX.cpp |
 | clang/include/clang/Sema/DeclSpec.h |
 | clang/lib/AST/TextNodeDumper.cpp |
 | clang/test/AST/ast-dump-record-definition-data-json.cpp |
 | clang/include/clang/AST/ASTContext.h |
 | clang/lib/Sema/SemaTemplateDeduction.cpp |
 | clang/lib/AST/ODRHash.cpp |
 | clang/lib/AST/Type.cpp |
 | clang/include/clang/Basic/DiagnosticSemaKinds.td |
 | clang/include/clang/AST/PropertiesBase.td |
 | clang/lib/Sema/DeclSpec.cpp |
 | clang/lib/AST/TemplateBase.cpp |
 | clang/lib/AST/ASTImporter.cpp |
 | clang/lib/Parse/Parser.cpp |
 | clang/lib/AST/ASTStructuralEquivalence.cpp |
 | clang/lib/Sema/SemaTemplateInstantiateDecl.cpp |
 | clang/lib/Serialization/ASTWriterDecl.cpp |
 | clang/test/SemaTemplate/ms-delayed-default-template-args.cpp |
 | clang/include/clang/AST/RecursiveASTVisitor.h |
 | clang/lib/Sema/SemaDeclCXX.cpp |
 | clang/test/CXX/expr/expr.prim/expr.prim.lambda/expr.prim.lambda.closure/p3.cpp |
 | clang/test/CXX/temp/temp.param/p10-2a.cpp |
 | clang/include/clang/AST/Type.h |
 | clang/lib/Parse/ParseTentative.cpp |
 | clang/include/clang/Sema/Sema.h |
 | clang/lib/AST/ASTContext.cpp |
 | clang/include/clang/AST/ASTNodeTraverser.h |
 | clang/include/clang/Basic/DiagnosticParseKinds.td |
 | clang/lib/Parse/ParseCXXInlineMethods.cpp |
Commit
f65d4aa96082778dc4af4657519d4d1aebbdf4da
by tclin914[llvm] NFC: fix trivial typos in documents Reviewers: hans, Jim Reviewed By: Jim Subscribers: jvesely, nhaehnle, mgorny, arphaman, bmahjour, kerbowa, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D73017
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 | llvm/docs/AMDGPU/AMDGPUAsmGFX9.rst |
 | llvm/docs/CommandGuide/tblgen.rst |
 | llvm/docs/LibFuzzer.rst |
 | llvm/docs/AMDGPU/AMDGPUAsmGFX906.rst |
 | llvm/docs/tutorial/BuildingAJIT1.rst |
 | llvm/docs/AMDGPU/AMDGPUAsmGFX7.rst |
 | llvm/docs/AMDGPU/AMDGPUAsmGFX904.rst |
 | llvm/docs/SourceLevelDebugging.rst |
 | llvm/docs/AMDGPU/AMDGPUAsmGFX900.rst |
 | llvm/docs/Extensions.rst |
 | llvm/docs/Frontend/PerformanceTips.rst |
 | llvm/docs/CodeGenerator.rst |
 | llvm/docs/GettingStarted.rst |
 | llvm/docs/BigEndianNEON.rst |
 | llvm/docs/AMDGPU/AMDGPUAsmGFX10.rst |
 | llvm/docs/YamlIO.rst |
 | llvm/docs/Bugpoint.rst |
 | llvm/docs/TableGen/LangRef.rst |
 | llvm/docs/Atomics.rst |
 | llvm/docs/HowToBuildOnARM.rst |
 | llvm/docs/Proposals/VariableNames.rst |
 | llvm/docs/TransformMetadata.rst |
 | llvm/docs/CodingStandards.rst |
 | llvm/docs/XRayFDRFormat.rst |
 | llvm/docs/HowToCrossCompileBuiltinsOnArm.rst |
 | llvm/docs/ReleaseProcess.rst |
 | llvm/docs/tutorial/OCamlLangImpl3.rst |
 | llvm/docs/BlockFrequencyTerminology.rst |
 | llvm/docs/AMDGPU/AMDGPUAsmGFX908.rst |
 | llvm/docs/DeveloperPolicy.rst |
 | llvm/docs/GwpAsan.rst |
 | llvm/docs/CMakePrimer.rst |
 | llvm/docs/AMDGPU/AMDGPUAsmGFX8.rst |
 | llvm/docs/LangRef.rst |
 | llvm/docs/CoverageMappingFormat.rst |
 | llvm/docs/ORCv2.rst |
 | llvm/docs/tutorial/BuildingAJIT2.rst |
 | llvm/docs/MarkedUpDisassembly.rst |
 | llvm/docs/ProgrammersManual.rst |
 | llvm/docs/Proposals/TestSuite.rst |
 | llvm/docs/FuzzingLLVM.rst |
 | llvm/docs/ReportingGuide.rst |
 | llvm/docs/CompileCudaWithLLVM.rst |
 | llvm/docs/Proposals/GitHubMove.rst |
 | llvm/docs/CommandGuide/lit.rst |
 | llvm/docs/GlobalISel/GenericOpcode.rst |
 | llvm/docs/DependenceGraphs/index.rst |
 | llvm/docs/MemTagSanitizer.rst |
Commit
dac7cda3a84e5405f7dd915f09c336d20dfdf00d
by tclin914[libcxxabi] NFC: Fix trivial typos in comments Reviewers: EricWF, mclow.lists, Jim Reviewed By: Jim Subscribers: mgorny, christof, ldionne, libcxx-commits Tags: #libc Differential Revision: https://reviews.llvm.org/D72151
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 | libcxxabi/src/CMakeLists.txt |
 | libcxxabi/test/test_demangle.pass.cpp |
Commit
ce2207abaf9a925b35f15ef92aaff6b301ba6d22
by Lang Hames[ORC] Add support for emulated TLS to ORCv2. This commit adds a ManglingOptions struct to IRMaterializationUnit, and replaces IRCompileLayer::CompileFunction with a new IRCompileLayer::IRCompiler class. The ManglingOptions struct defines the emulated-TLS state (via a bool member, EmulatedTLS, which is true if emulated-TLS is enabled and false otherwise). The IRCompileLayer::IRCompiler class wraps an IRCompiler (the same way that the CompileFunction typedef used to), but adds a method to return the IRCompileLayer::ManglingOptions that the compiler will use. These changes allow us to correctly determine the symbols that will be produced when a thread local global variable defined at the IR level is compiled with or without emulated TLS. This is required for ORCv2, where MaterializationUnits must declare their interface up-front. Most ORCv2 clients should not require any changes. Clients writing custom IR compilers will need to wrap their compiler in an IRCompileLayer::IRCompiler, rather than an IRCompileLayer::CompileFunction, however this should be a straightforward change (see modifications to CompileUtils.* in this patch for an example).
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 | llvm/test/ExecutionEngine/OrcLazy/emulated-tls.ll |
 | llvm/include/llvm/ExecutionEngine/Orc/IRCompileLayer.h |
 | llvm/include/llvm/ExecutionEngine/Orc/Speculation.h |
 | llvm/lib/ExecutionEngine/Orc/LLJIT.cpp |
 | llvm/lib/ExecutionEngine/Orc/IRCompileLayer.cpp |
 | llvm/lib/ExecutionEngine/Orc/IRTransformLayer.cpp |
 | llvm/lib/ExecutionEngine/Orc/CompileUtils.cpp |
 | llvm/include/llvm/ExecutionEngine/Orc/Layer.h |
 | llvm/unittests/ExecutionEngine/Orc/RTDyldObjectLinkingLayerTest.cpp |
 | llvm/unittests/ExecutionEngine/Orc/LegacyRTDyldObjectLinkingLayerTest.cpp |
 | llvm/lib/ExecutionEngine/Orc/CompileOnDemandLayer.cpp |
 | llvm/tools/lli/lli.cpp |
 | llvm/unittests/ExecutionEngine/Orc/RemoteObjectLayerTest.cpp |
 | llvm/include/llvm/ExecutionEngine/Orc/CompileUtils.h |
 | llvm/include/llvm/ExecutionEngine/Orc/LLJIT.h |
 | llvm/lib/ExecutionEngine/Orc/Layer.cpp |
 | llvm/unittests/ExecutionEngine/Orc/ObjectTransformLayerTest.cpp |
 | llvm/unittests/ExecutionEngine/Orc/OrcCAPITest.cpp |
Commit
c38e42527b21acee8d01a016d5bfa2fb83202e29
by puyan[clang][IFS][test] Temporary work around for in-process cc1 ASAN issues. When using in-process cc1, the Clang Interface Stubs pipeline setup exposes an ASAN bug. I am still investigating this issue but want to green the bots for now. I don't think this is a huge issue since the Clang Interface Stubs Driver setup code is the only code path that sets up such a pipeline (ie N cc1's for N c files followed by another N cc1's for to generate stub files for the same N c files). This issue is being discussed in https://reviews.llvm.org/D69825. If a resolution is not found soon, a bugzilla filling will be in order.
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 | clang/test/InterfaceStubs/driver-test2.c |
 | clang/test/InterfaceStubs/driver-test.c |
Commit
e0a6093a744d16c90eafa62d7143ce41806b2466
by Lang Hames[ORC] Fix a missing move in ce2207abaf9. This should fix the build failure at http://lab.llvm.org:8011/builders/clang-cmake-x86_64-sde-avx512-linux/builds/32524 and others.
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 | llvm/lib/ExecutionEngine/Orc/CompileUtils.cpp |
Commit
e53a9d96e6a074aa7f81ec104eb18e82997c7206
by carl.ritsonResubmit: [AMDGPU] Invert the handling of skip insertion. The current implementation of skip insertion (SIInsertSkip) makes it a mandatory pass required for correctness. Initially, the idea was to have an optional pass. This patch inserts the s_cbranch_execz upfront during SILowerControlFlow to skip over the sections of code when no lanes are active. Later, SIRemoveShortExecBranches removes the skips for short branches, unless there is a sideeffect and the skip branch is really necessary. This new pass will replace the handling of skip insertion in the existing SIInsertSkip Pass. Differential revision: https://reviews.llvm.org/D68092
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 | llvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll |
 | llvm/test/CodeGen/AMDGPU/smrd_vmem_war.ll |
 | llvm/test/CodeGen/AMDGPU/uniform-cfg.ll |
 | llvm/test/CodeGen/AMDGPU/branch-condition-and.ll |
 | llvm/test/CodeGen/AMDGPU/si-lower-control-flow.mir |
 | llvm/test/CodeGen/AMDGPU/insert-skips-kill-uncond.mir |
 | llvm/test/CodeGen/AMDGPU/valu-i1.ll |
 | llvm/lib/Target/AMDGPU/SIRemoveShortExecBranches.cpp |
 | llvm/lib/Target/AMDGPU/AMDGPU.h |
 | llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll |
 | llvm/test/CodeGen/AMDGPU/cse-phi-incoming-val.ll |
 | llvm/lib/Target/AMDGPU/CMakeLists.txt |
 | llvm/lib/Target/AMDGPU/SIInsertSkips.cpp |
 | llvm/test/CodeGen/AMDGPU/branch-relaxation.ll |
 | llvm/test/CodeGen/AMDGPU/si-annotate-cf-noloop.ll |
 | llvm/test/CodeGen/AMDGPU/convergent-inlineasm.ll |
 | llvm/test/CodeGen/AMDGPU/collapse-endcf.ll |
 | llvm/test/CodeGen/AMDGPU/insert-skips-gws.mir |
 | llvm/test/CodeGen/AMDGPU/si-lower-control-flow-unreachable-block.ll |
 | llvm/test/CodeGen/AMDGPU/skip-branch-taildup-ret.mir |
 | llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp |
 | llvm/test/CodeGen/AMDGPU/hoist-cond.ll |
 | llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp |
 | llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll |
 | llvm/test/CodeGen/AMDGPU/insert-skips-ignored-insts.mir |
 | llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll |
 | llvm/test/CodeGen/AMDGPU/uniform-loop-inside-nonuniform.ll |
 | llvm/test/CodeGen/AMDGPU/wqm.ll |
 | llvm/test/CodeGen/AMDGPU/else.ll |
 | llvm/test/CodeGen/AMDGPU/skip-if-dead.ll |
 | llvm/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll |
 | llvm/test/CodeGen/AMDGPU/skip-branch-trap.ll |
 | llvm/test/CodeGen/AMDGPU/ret_jump.ll |
 | llvm/test/CodeGen/AMDGPU/subreg-coalescer-undef-use.ll |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll |
 | llvm/test/CodeGen/AMDGPU/call-skip.ll |
 | llvm/test/CodeGen/AMDGPU/insert-skips-flat-vmem.mir |
 | llvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll |
 | llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll |
 | llvm/test/CodeGen/AMDGPU/wave32.ll |
Commit
6b4b3e2856dc6037ae79947a60a02a4d3e94e9e2
by carl.ritson[AMDGPU] SIRemoveShortExecBranches should not remove branches exiting loops Summary: Check that a s_cbranch_execz is not a loop exit before removing it. As the pass is generating infinite loops. Reviewers: cdevadas, arsenm, nhaehnle Reviewed By: nhaehnle Subscribers: kzhuravl, jvesely, wdng, yaxunl, tpr, t-tye, hiraditya, kerbowa, llvm-commits, dstuttard, foad Tags: #llvm Differential Revision: https://reviews.llvm.org/D72997
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 | llvm/test/CodeGen/AMDGPU/valu-i1.ll |
 | llvm/lib/Target/AMDGPU/SIRemoveShortExecBranches.cpp |
 | llvm/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll |
Commit
debd2dcd098a581fc0ef2c0de5e2b06439e105f4
by llvmgnsyncbot[gn build] Port e53a9d96e6a
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 | llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn |
Commit
98e55477558a823b1045b54d5a09681a3c0b819a
by Lang Hames[ORC] Update examples to incorporate changes in ce2207abaf9. This should fix the builders that were failing due to broken JIT examples after ce2207abaf9.
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 | llvm/examples/SpeculativeJIT/SpeculativeJIT.cpp |
 | llvm/examples/Kaleidoscope/BuildingAJIT/Chapter1/KaleidoscopeJIT.h |
 | llvm/examples/Kaleidoscope/BuildingAJIT/Chapter2/KaleidoscopeJIT.h |
Commit
a90a6502ab35d3c15c7d56772e409c5632ce6cfb
by Austin.Kerbow[DA][TTI][AMDGPU] Add option to select GPUDA with TTI Summary: Enable the new diveregence analysis by default for AMDGPU. Reviewers: rampitec, nhaehnle, arsenm Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D73049
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 | llvm/include/llvm/Analysis/LegacyDivergenceAnalysis.h |
 | llvm/lib/Analysis/TargetTransformInfo.cpp |
 | llvm/include/llvm/Analysis/TargetTransformInfoImpl.h |
 | llvm/include/llvm/CodeGen/BasicTTIImpl.h |
 | llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp |
 | llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h |
 | llvm/lib/Analysis/LegacyDivergenceAnalysis.cpp |
 | llvm/include/llvm/Analysis/TargetTransformInfo.h |
Commit
b54aa053d3aeeab0cdaecb6286419138b7da5ef4
by Lang HamesUpdate clang-interpreter example to incorporate changes in ce2207abaf9.
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 | clang/examples/clang-interpreter/main.cpp |
Commit
7bdc83f34016bb0288f7af6fffa244bfeb285d04
by suc-daniil[LICM] Don't cache AliasSetTrackers when run under legacy PM Summary: This is the first step towards complete removal of AST caching from LICM. Attempts to keep LICM's AST cache up to date across passes can lead to miscompiles like this one: https://bugs.llvm.org/show_bug.cgi?id=44320. LICM has already switched to using MemorySSA to do sinking and hoisting and only builds an AliasSetTracker on demand for the promoteToScalars step, without caching it from one LICM instance to the next. Given this, we don't have compile-time reasons to keep AST caching any more. The only scenario where the caching would be used currently is when using the LegacyPassManager and setting -enable-mssa-loop-dependency=false. This switch should help us to surface any possible issues that may arise along this way, also it turns subsequent removal of AST caching into NFC. Reviewers: asbirlea, fhahn, efriedma, reames Reviewed By: asbirlea Subscribers: hiraditya, george.burgess.iv, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D73081
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 | llvm/lib/Transforms/Scalar/LICM.cpp |
Commit
1d1ebb9e592bea931845296dd80a46fb46af2642
by Jonas Devlieghere[lldb/Initializers] Move all ObjC initializers into AppleObjCRuntime AppleObjCRuntime is the main entry point to the plugin with the same name. This is part of a greater refactoring to auto generate the initializers. NFC. Differential revision: https://reviews.llvm.org/D73121
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 | lldb/tools/lldb-test/SystemInitializerTest.cpp |
 | lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntime.h |
 | lldb/source/API/SystemInitializerFull.cpp |
 | lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntime.cpp |
Commit
97d000da2e6025600c4709d611e853eb1d5d407c
by Lang Hames[ORC] Fix the LLJITWithObjectCache example to address changes in ce2207abaf9.
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 | llvm/examples/LLJITExamples/LLJITWithObjectCache/LLJITWithObjectCache.cpp |
Commit
2e25d75aaa2280c3128c8dd6349f8b605207b94d
by Amara Emerson[AArch64][GlobalISel] Fix llvm.returnaddress(0) selection when LR is clobbered. The code was originally ported from SelectionDAG, which does CSE behind the scenes automatically. When copying the return address from LR live into the function, we need to make sure to use the single copy on function entry. Any later copy from LR could be using clobbered junk. Implement this by caching the copy in the per-MF state in the selector. Should hopefully fix the AArch64 sanitiser buildbot failure.
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 | llvm/test/CodeGen/AArch64/GlobalISel/select-returnaddr.ll |
 | llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp |
Commit
c9a39a896c95402ede07061380346c725556e308
by Raphael Isemann[lldb] Add a display name to ClangASTContext instances Summary: I often struggle to understand what exactly LLDB is doing by looking at our expression evaluation logging as our messages look like this: ``` CompleteTagDecl[2] on (ASTContext*)0x7ff31f01d240 Completing (TagDecl*)0x7ff31f01d568 named DeclName1 ``` From the log messages it's unclear what this ASTContext is. Is it the scratch context, the expression context, some decl vendor context or a context from a module? The pointer value isn't helpful for anyone unless I'm in a debugger where I could inspect the memory at the address. But even with a debugger it's not easy to figure out what this ASTContext is without having deeper understanding about all the different ASTContext instances in LLDB (e.g., valid SourceLocation from the file system usually means that this is the Objective-C decl vendor, a file name from multiple expressions is probably the scratch context, etc.). This patch adds a name field to ClangASTContext instances that we can use to store a name which can be used for logging and debugging. With this our log messages now look like this: ``` CompleteTagDecl[2] on scratch ASTContext. Completing (TagDecl*)0x7ff31f01d568 named Foo ``` We can now also just print a ClangASTContext from the debugger and see a useful name in the `m_display_name` field, e.g. ``` m_display_name = "AST for /Users/user/test/main.o"; ``` Reviewers: shafik, labath, JDevlieghere, mib Reviewed By: shafik Subscribers: clayborg, lldb-commits Tags: #lldb Differential Revision: https://reviews.llvm.org/D72391
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 | lldb/source/Plugins/ExpressionParser/Clang/ClangASTSource.cpp |
 | lldb/unittests/SymbolFile/DWARF/DWARFASTParserClangTests.cpp |
 | lldb/include/lldb/Symbol/ClangASTContext.h |
 | lldb/unittests/TestingSupport/Symbol/ClangTestUtils.h |
 | lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp |
 | lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp |
 | lldb/source/Symbol/ClangASTContext.cpp |
 | lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCTypeEncodingParser.cpp |
 | lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCDeclVendor.cpp |
 | lldb/unittests/Symbol/TestClangASTContext.cpp |
Commit
3a906a9f4e6b51130d9a1bdd5f9a7ec3705d3faa
by simon.moll[VE] i<N> and fp32/64 arguments, return values and constants Summary: Support for i<N> and fp32/64 arguments (in register), return values and constants along with tests. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D73092
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 | llvm/lib/Target/VE/VEISelLowering.cpp |
 | llvm/test/CodeGen/VE/constants_i64.ll |
 | llvm/test/CodeGen/VE/cast.ll |
 | llvm/lib/Target/VE/VEInstrInfo.td |
 | llvm/lib/Target/VE/VECallingConv.td |
 | llvm/lib/Target/VE/VERegisterInfo.td |
 | llvm/lib/Target/VE/VERegisterInfo.cpp |
 | llvm/test/CodeGen/VE/constants.ll |
 | llvm/lib/Target/VE/VEInstrFormats.td |
 | llvm/lib/Target/VE/VEISelLowering.h |
 | llvm/lib/Target/VE/VEInstrInfo.cpp |
Commit
de51559fa68049da73b696a4e89468154b12852a
by saar[Concepts] Fix incorrect recovery in TryAnnotateTypeConstraint TryAnnotateTypeConstraint would not put the scope specifier back into the token stream when faced with a non-concept name after a scope specifier.
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 | clang/lib/Parse/ParseTemplate.cpp |