Changes

Summary

  1. [Sanitizers] Fix broken LLVM_ENABLE_PROJECTS config. (details)
Commit 6e86f181714783f160991f7b8bea89a1c57c7a52 by mascasa
[Sanitizers] Fix broken LLVM_ENABLE_PROJECTS config.
The file was modifiedzorg/buildbot/builders/sanitizers/buildbot_functions.sh (diff)

Summary

  1. [CaptureTracking] Allow passing LI to PointerMayBeCapturedBefore (NFC). (details)
  2. [MLIR][Linalg] Make detensoring cost-model more flexible. (details)
  3. [lldb] [gdb-remote] Remove unused arg from GDBRemoteRegisterContext::ReadRegisterBytes() (details)
  4. [lldb] [gdb-remote] Recognize aarch64v type from gdbserver (details)
  5. Revert "[AArch64][SVE] Teach cost model that masked loads/stores are cheap" (details)
  6. [mlir] Fix integration tests failures introduced in D108505 (details)
  7. AArch64: use ldp/stp for 128-bit atomic load/store in v.84 onwards (details)
  8. [OpenCL] Supports optional writing to 3d images in C++ for OpenCL 2021 (details)
  9. Add myself as a code owner for SYCL support (details)
  10. [clang][NFC] Remove dead code (details)
  11. [NewPM] Make InlinerPass (aka 'inline') a parameterized pass (details)
  12. [GlobalISel] Improve elimination of dead instructions in legalizer (details)
  13. [lldb] [gdb-remote] Always send PID when detaching w/ multiprocess (details)
  14. [mlir][openacc] Make use of the second counter extension in DataOp translation (details)
  15. [MCA] InstructionTables::execute() - use const-ref iterator in for-range loop. NFCI. (details)
  16. [X86] X86TargetTransformInfo - remove unnecessary if-else after early exit. NFCI. (details)
  17. MachOObjectFile - checkOverlappingElement - use const-ref to avoid unnecessary copies. NFCI. (details)
  18. Fix CLANG_ENABLE_STATIC_ANALYZER=OFF building all analyzer source (details)
  19. pre-commit test for D109767 (details)
  20. [update_mir_test_checks.py] Use -NEXT FileCheck directories (details)
Commit 7f6a4826ac49e4c7075f80930480045bf983483c by flo
[CaptureTracking] Allow passing LI to PointerMayBeCapturedBefore (NFC).

isPotentiallyReachable can use LoopInfo to return earlier. This patch
allows passing an optional LI to PointerMayBeCapturedBefore. Used in
D109844.

Reviewed By: nikic, asbirlea

Differential Revision: https://reviews.llvm.org/D109978
The file was modifiedllvm/lib/Analysis/CaptureTracking.cpp
The file was modifiedllvm/include/llvm/Analysis/CaptureTracking.h
Commit bdcf4b9b9620afe24d17132027a7d12e2f1a598b by kareem.ergawy
[MLIR][Linalg] Make detensoring cost-model more flexible.

So far, the CF cost-model for detensoring was limited to discovering
pure CF structures. This means, if while discovering the CF component,
the cost-model found any op that is not detensorable, it gives up on
detensoring altogether. This patch makes it a bit more flexible by
cleaning-up the detensorable component from non-detensorable ops without
giving up entirely.

Reviewed By: silvas

Differential Revision: https://reviews.llvm.org/D109965
The file was addedmlir/test/Dialect/Linalg/detensorize_while_impure_cf.mlir
The file was removedmlir/test/Dialect/Linalg/detensorize_while_failure.mlir
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Detensorize.cpp
Commit 92904cc68fbc1d000387b30accc8b05b3fe95daa by mgorny
[lldb] [gdb-remote] Remove unused arg from GDBRemoteRegisterContext::ReadRegisterBytes()

Differential Revision: https://reviews.llvm.org/D110020
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.cpp
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.h
Commit f6e0edc23e6199bbb5fb4ef3b018b49a5b303183 by mgorny
[lldb] [gdb-remote] Recognize aarch64v type from gdbserver

Differential Revision: https://reviews.llvm.org/D109899
The file was modifiedlldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
The file was modifiedlldb/test/API/functionalities/gdb_remote_client/TestGDBServerTargetXML.py
Commit 92c9b28347c38cc15adf20223ed272abe8ec0227 by david.spickett
Revert "[AArch64][SVE] Teach cost model that masked loads/stores are cheap"

This reverts commit 734708e04f84b72f1ae7c8b35c002b8bf97dc064.

Due to build failures on the 2 stage SVE VLS bot.
https://lab.llvm.org/buildbot/#/builders/176/builds/908/steps/11/logs/stdio
The file was removedllvm/test/Analysis/CostModel/AArch64/masked_ldst_vls.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
Commit 798e4bfbeda824551fa89a388969baa2abbc2411 by vlad.vinogradov
[mlir] Fix integration tests failures introduced in D108505
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Bufferize.cpp
The file was modifiedmlir/lib/Dialect/Tensor/Transforms/Bufferize.cpp
Commit 13aa102e07695297fd17f68913c343c95a7c56ad by Tim Northover
AArch64: use ldp/stp for 128-bit atomic load/store in v.84 onwards

v8.4 says that normal loads/stores of 128-bytes are single-copy atomic if
they're properly aligned (which all LLVM atomics are) so we no longer need to
do a full RMW operation to guarantee we got a clean read.
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AArch64/atomic-ops-lse.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/v8.4-atomic-128.ll
The file was addedllvm/test/CodeGen/AArch64/v8.4-atomic-128.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64Subtarget.h
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic-128.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64.td
Commit ca3bebd8440f9f88f1457dad9c12933b73d9590f by Justas.Janickas
[OpenCL] Supports optional writing to 3d images in C++ for OpenCL 2021

Adds support for a feature macro __opencl_c_3d_image_writes in
C++ for OpenCL 2021 enabling a respective optional core feature
from OpenCL 3.0.

This change aims to achieve compatibility between C++ for OpenCL
2021 and OpenCL 3.0.

Differential Revision: https://reviews.llvm.org/D109328
The file was modifiedclang/test/Misc/opencl-c-3.0.incorrect_options.cl
The file was modifiedclang/test/SemaOpenCL/unsupported-image.cl
The file was modifiedclang/lib/Sema/SemaType.cpp
Commit 15feaaa359c7245bb59ff0a2aa3b806682f44286 by alexey.bader
Add myself as a code owner for SYCL support
The file was modifiedclang/CODE_OWNERS.TXT
Commit eb3af1e77341e82249993a5a8a50779c48e1cb61 by wingo
[clang][NFC] Remove dead code

Remove code that has no effect in SemaType.cpp:processTypeAttrs.

Differential Revision: https://reviews.llvm.org/D108360
The file was modifiedclang/lib/Sema/SemaType.cpp
Commit c8cb7f611fdf4d96c4d23a75aa48c93cca38646f by bjorn.a.pettersson
[NewPM] Make InlinerPass (aka 'inline') a parameterized pass

In default pipelines the ModuleInlinerWrapperPass is adding the
InlinerPass to the pipeline twice, once due to MandatoryFirst (passing
true in the ctor) and then a second time with false as argument.

To make it possible to bisect and reduce opt test cases for this
part of the pipeline we need to be able to choose between the two
different variants of the InlinerPass when running opt. This patch is
changing 'inline' to a CGSCC_PASS_WITH_PARAMS in the PassRegistry,
making it possible run opt with both -passes=cgscc(inline) and
-passes=cgscc(inline<only-mandatory>).

Reviewed By: aeubanks, mtrofin

Differential Revision: https://reviews.llvm.org/D109877
The file was modifiedllvm/include/llvm/Transforms/IPO/Inliner.h
The file was modifiedllvm/lib/Transforms/IPO/Inliner.cpp
The file was modifiedllvm/lib/Passes/PassBuilder.cpp
The file was modifiedllvm/lib/Passes/PassRegistry.def
Commit e4c46ddd91eba5ec162225abc1e47aa3c6c13516 by petar.avramovic
[GlobalISel] Improve elimination of dead instructions in legalizer

Add eraseInstr(s) utility functions. Before deleting an instruction
collects its use instructions. After deletion deletes use instructions
that became trivially dead.
This patch clears all dead instructions in existing legalizer mir tests.

Differential Revision: https://reviews.llvm.org/D109154
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-saddsat.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-round.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sshlsat.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext-inreg.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umax.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-brcond.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-implicit-def-s1025.mir
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/legalizer/zext_and_sext.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector.mir
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/legalizer/trunc.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-phi-insertpt-decrement.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memcpyinline.mir
The file was modifiedllvm/lib/CodeGen/GlobalISel/Utils.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/legalizer/constants.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fma.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddo.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smin.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-usube.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sadde.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-phi.mir
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/legalizer/bitwise.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/Utils.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memmove.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umin.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddsat.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.dim.a16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sdiv.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-freeze.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-extracts.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-merge-values.mir
The file was modifiedllvm/test/CodeGen/X86/GlobalISel/legalize-lshr-scalar.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/bug-legalization-artifact-combiner-dead-def.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsin.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-extract.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smax.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssube.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-unmerge-values.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract-vector-elt.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.ll
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-extract-vector-elt.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-ssubsat.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz-zero-undef.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpext.mir
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/legalizer/zextLoad_and_sextLoad.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fdiv.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert-vector-elt.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smulo.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fshr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubsat.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ffloor.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memcpy.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-and.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-concat-vectors.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ushlsat.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.store.2d.d16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-anyext.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-sadde.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubsat.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-unmerge-values.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-add.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-extload.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-uadde.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-ssubo.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-ssube.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcos.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubo.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sub.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bswap.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-build-vector.s16.mir
The file was modifiedllvm/test/CodeGen/X86/GlobalISel/legalize-ashr-scalar.mir
The file was modifiedllvm/lib/CodeGen/GlobalISel/Legalizer.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umulh.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/artifact-find-value.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uadde.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-usubo.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-implicit-def.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddo.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fshl.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memset.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-bswap.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-mul.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umulo.mir
The file was modifiedllvm/test/CodeGen/ARM/GlobalISel/arm-legalize-fp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-xor.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usube.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddsat.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsub.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-uaddo.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-zext.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-inserts.mir
The file was modifiedllvm/test/CodeGen/X86/GlobalISel/legalize-shl-scalar.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-trunc.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-phi.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-saddo.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcanonicalize.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsqrt.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.d16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-udiv.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubo.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-and.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fneg.mir
Commit b1099120ff963d0a0f1de12e3315b1ee4e4ed7e7 by mgorny
[lldb] [gdb-remote] Always send PID when detaching w/ multiprocess

Always send PID in the detach packet when multiprocess extensions are
enabled.  This is required by qemu's GDB server, as plain 'D' packet
results in an error and the emulated system is not resumed.

Differential Revision: https://reviews.llvm.org/D110033
The file was modifiedlldb/test/API/functionalities/gdb_remote_client/TestGDBRemoteClient.py
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
Commit d6929aaa67c7996a69451e301970408362af909e by clementval
[mlir][openacc] Make use of the second counter extension in DataOp translation

Make use of runtime extension for the second reference counter used in
structured data region. This extension is implemented in D106510 and D106509.

Differential Revision: https://reviews.llvm.org/D106517
The file was modifiedmlir/test/Target/LLVMIR/openacc-llvm.mlir
The file was modifiedmlir/lib/Target/LLVMIR/Dialect/OpenACC/OpenACCToLLVMIRTranslation.cpp
Commit ea17b15f2dcdc77881cc0183dce4dea1aff9bffa by llvm-dev
[MCA] InstructionTables::execute() - use const-ref iterator in for-range loop. NFCI.

Avoid unnecessary copies, reported by MSVC static analyzer.
The file was modifiedllvm/lib/MCA/Stages/InstructionTables.cpp
Commit 4ab7c0d3fa068fb0ce39b9f75c0253d45a99745e by llvm-dev
[X86] X86TargetTransformInfo - remove unnecessary if-else after early exit. NFCI.

(style) Break the if-else chain as they all return.
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
Commit 7fc12b822c5d1360780667af94c218733c3fc4e0 by llvm-dev
MachOObjectFile - checkOverlappingElement - use const-ref to avoid unnecessary copies. NFCI.

Reported by MSVC static analyzer.
The file was modifiedllvm/lib/Object/MachOObjectFile.cpp
Commit 6d7b3d6b3a8dbd62650b6c3dae1fe904a8ae9048 by Alexander.Richardson
Fix CLANG_ENABLE_STATIC_ANALYZER=OFF building all analyzer source

Since https://reviews.llvm.org/D87118, the StaticAnalyzer directory is
added unconditionally. In theory this should not cause the static analyzer
sources to be built unless they are referenced by another target. However,
the clang-cpp target (defined in clang/tools/clang-shlib) uses the
CLANG_STATIC_LIBS global property to determine which libraries need to
be included. To solve this issue, this patch avoids adding libraries to
that property if EXCLUDE_FROM_ALL is set.

In case something like this comes up again: `cmake --graphviz=targets.dot`
is quite useful to see why a target is included as part of `ninja all`.

Reviewed By: thakis

Differential Revision: https://reviews.llvm.org/D109611
The file was modifiedclang/lib/StaticAnalyzer/CMakeLists.txt
The file was modifiedllvm/cmake/modules/AddLLVM.cmake
The file was modifiedclang/cmake/modules/AddClang.cmake
Commit 7b68c0725d89ac9bd48b9b6a51d9cd0bc7146829 by Alexander.Richardson
pre-commit test for D109767

Differential Revision: https://reviews.llvm.org/D109765
The file was addedllvm/test/tools/UpdateTestChecks/update_mir_test_checks/lit.local.cfg
The file was addedllvm/test/tools/UpdateTestChecks/update_mir_test_checks/x86-condbr.test
The file was addedllvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-condbr.mir
The file was addedllvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-condbr.mir.expected
Commit 817e23d481be52e6e0fd779efce2beb105e8c7b6 by Alexander.Richardson
[update_mir_test_checks.py] Use -NEXT FileCheck directories

Previously the script emitted output using plain CHECK directives. This
can result in a test passing even if there are some instructions between
CHECK directives that should have been removed. It also makes debugging
tests that have the output in a different order more difficult since
FileCheck can match with a later line and then complain about the "wrong"
directive not being found.

This will cause quite large diffs when updating existing tests, but I'm not sure we need an opt-in flag here.

Depends on D109765 (pre-commit tests)

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D109767
The file was modifiedllvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-condbr.mir.expected
The file was modifiedllvm/utils/update_mir_test_checks.py
The file was modifiedllvm/test/CodeGen/X86/GlobalISel/select-phi.mir